diff options
author | Avinash Patil <patila@marvell.com> | 2014-09-12 10:38:49 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2014-09-15 15:00:51 -0400 |
commit | 2703a66865eb3a5b422749281371e9eefa8658c4 (patch) | |
tree | a86bf52e45edd8bb9529b67135e0a93c37385092 /drivers/net/wireless/mwifiex/pcie.h | |
parent | 3223db2086c987d4527fdaa487a027b0148e9692 (diff) |
mwifiex: support for event done interrupt
This patch adds support for writing CPU event interrupt done back
to device.
Patch also increases interrupt buffer ring size from 4 to 8.
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Cathy Luo <cluo@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/mwifiex/pcie.h')
-rw-r--r-- | drivers/net/wireless/mwifiex/pcie.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/net/wireless/mwifiex/pcie.h b/drivers/net/wireless/mwifiex/pcie.h index a1a8fd3bc1be..200e8b0cb582 100644 --- a/drivers/net/wireless/mwifiex/pcie.h +++ b/drivers/net/wireless/mwifiex/pcie.h | |||
@@ -40,8 +40,8 @@ | |||
40 | #define MWIFIEX_TXBD_MASK 0x3F | 40 | #define MWIFIEX_TXBD_MASK 0x3F |
41 | #define MWIFIEX_RXBD_MASK 0x3F | 41 | #define MWIFIEX_RXBD_MASK 0x3F |
42 | 42 | ||
43 | #define MWIFIEX_MAX_EVT_BD 0x04 | 43 | #define MWIFIEX_MAX_EVT_BD 0x08 |
44 | #define MWIFIEX_EVTBD_MASK 0x07 | 44 | #define MWIFIEX_EVTBD_MASK 0x0f |
45 | 45 | ||
46 | /* PCIE INTERNAL REGISTERS */ | 46 | /* PCIE INTERNAL REGISTERS */ |
47 | #define PCIE_SCRATCH_0_REG 0xC10 | 47 | #define PCIE_SCRATCH_0_REG 0xC10 |
@@ -69,6 +69,7 @@ | |||
69 | #define CPU_INTR_DOOR_BELL BIT(1) | 69 | #define CPU_INTR_DOOR_BELL BIT(1) |
70 | #define CPU_INTR_SLEEP_CFM_DONE BIT(2) | 70 | #define CPU_INTR_SLEEP_CFM_DONE BIT(2) |
71 | #define CPU_INTR_RESET BIT(3) | 71 | #define CPU_INTR_RESET BIT(3) |
72 | #define CPU_INTR_EVENT_DONE BIT(5) | ||
72 | 73 | ||
73 | #define HOST_INTR_DNLD_DONE BIT(0) | 74 | #define HOST_INTR_DNLD_DONE BIT(0) |
74 | #define HOST_INTR_UPLD_RDY BIT(1) | 75 | #define HOST_INTR_UPLD_RDY BIT(1) |