diff options
author | Samuel Ortiz <sameo@linux.intel.com> | 2009-10-16 01:18:52 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-10-27 16:48:26 -0400 |
commit | 7eae165e2d7dd32e88a641c0f38b2be840bcae07 (patch) | |
tree | 00f07fdfb3fa508b734cbc0c0b894eb5bf62a0ae /drivers/net/wireless/iwmc3200wifi | |
parent | 05f9589cd37be9ead62a92755cd86f14b247229d (diff) |
iwmc3200wifi: Update fixed size config definitions
We need to be in sync with the latest firmware API.
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Zhu Yi <yi.zhu@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwmc3200wifi')
-rw-r--r-- | drivers/net/wireless/iwmc3200wifi/commands.h | 60 |
1 files changed, 58 insertions, 2 deletions
diff --git a/drivers/net/wireless/iwmc3200wifi/commands.h b/drivers/net/wireless/iwmc3200wifi/commands.h index e486f8e89378..511b6e395ac5 100644 --- a/drivers/net/wireless/iwmc3200wifi/commands.h +++ b/drivers/net/wireless/iwmc3200wifi/commands.h | |||
@@ -102,7 +102,6 @@ enum { | |||
102 | CFG_SCAN_NUM_PASSIVE_CHAN_PER_PARTIAL_SCAN, | 102 | CFG_SCAN_NUM_PASSIVE_CHAN_PER_PARTIAL_SCAN, |
103 | CFG_TLC_SUPPORTED_TX_HT_RATES, | 103 | CFG_TLC_SUPPORTED_TX_HT_RATES, |
104 | CFG_TLC_SUPPORTED_TX_RATES, | 104 | CFG_TLC_SUPPORTED_TX_RATES, |
105 | CFG_TLC_VALID_ANTENNA, | ||
106 | CFG_TLC_SPATIAL_STREAM_SUPPORTED, | 105 | CFG_TLC_SPATIAL_STREAM_SUPPORTED, |
107 | CFG_TLC_RETRY_PER_RATE, | 106 | CFG_TLC_RETRY_PER_RATE, |
108 | CFG_TLC_RETRY_PER_HT_RATE, | 107 | CFG_TLC_RETRY_PER_HT_RATE, |
@@ -136,6 +135,10 @@ enum { | |||
136 | CFG_TLC_RENEW_ADDBA_DELAY, | 135 | CFG_TLC_RENEW_ADDBA_DELAY, |
137 | CFG_TLC_NUM_OF_MULTISEC_TO_COUN_LOAD, | 136 | CFG_TLC_NUM_OF_MULTISEC_TO_COUN_LOAD, |
138 | CFG_TLC_IS_STABLE_IN_HT, | 137 | CFG_TLC_IS_STABLE_IN_HT, |
138 | CFG_TLC_SR_SIC_1ST_FAIL, | ||
139 | CFG_TLC_SR_SIC_1ST_PASS, | ||
140 | CFG_TLC_SR_SIC_TOTAL_FAIL, | ||
141 | CFG_TLC_SR_SIC_TOTAL_PASS, | ||
139 | CFG_RLC_CHAIN_CTRL, | 142 | CFG_RLC_CHAIN_CTRL, |
140 | CFG_TRK_TABLE_OP_MODE, | 143 | CFG_TRK_TABLE_OP_MODE, |
141 | CFG_TRK_TABLE_RSSI_THRESHOLD, | 144 | CFG_TRK_TABLE_RSSI_THRESHOLD, |
@@ -147,6 +150,58 @@ enum { | |||
147 | CFG_MLME_DBG_NOTIF_BLOCK, | 150 | CFG_MLME_DBG_NOTIF_BLOCK, |
148 | CFG_BT_OFF_BECONS_INTERVALS, | 151 | CFG_BT_OFF_BECONS_INTERVALS, |
149 | CFG_BT_FRAG_DURATION, | 152 | CFG_BT_FRAG_DURATION, |
153 | CFG_ACTIVE_CHAINS, | ||
154 | CFG_CALIB_CTRL, | ||
155 | CFG_CAPABILITY_SUPPORTED_HT_RATES, | ||
156 | CFG_HT_MAC_PARAM_INFO, | ||
157 | CFG_MIMO_PS_MODE, | ||
158 | CFG_HT_DEFAULT_CAPABILIES_INFO, | ||
159 | CFG_LED_SC_RESOLUTION_FACTOR, | ||
160 | CFG_PTAM_ENERGY_CCK_DET_DEFAULT, | ||
161 | CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_DEFAULT, | ||
162 | CFG_PTAM_CORR40_4_TH_ADD_MIN_DEFAULT, | ||
163 | CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_DEFAULT, | ||
164 | CFG_PTAM_CORR32_4_TH_ADD_MIN_DEFAULT, | ||
165 | CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_DEFAULT, | ||
166 | CFG_PTAM_CORR32_1_TH_ADD_MIN_DEFAULT, | ||
167 | CFG_PTAM_ENERGY_CCK_DET_MIN_VAL, | ||
168 | CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_MIN_VAL, | ||
169 | CFG_PTAM_CORR40_4_TH_ADD_MIN_MIN_VAL, | ||
170 | CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_MIN_VAL, | ||
171 | CFG_PTAM_CORR32_4_TH_ADD_MIN_MIN_VAL, | ||
172 | CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_MIN_VAL, | ||
173 | CFG_PTAM_CORR32_1_TH_ADD_MIN_MIN_VAL, | ||
174 | CFG_PTAM_ENERGY_CCK_DET_MAX_VAL, | ||
175 | CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_MAX_VAL, | ||
176 | CFG_PTAM_CORR40_4_TH_ADD_MIN_MAX_VAL, | ||
177 | CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_MAX_VAL, | ||
178 | CFG_PTAM_CORR32_4_TH_ADD_MIN_MAX_VAL, | ||
179 | CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_MAX_VAL, | ||
180 | CFG_PTAM_CORR32_1_TH_ADD_MIN_MAX_VAL, | ||
181 | CFG_PTAM_ENERGY_CCK_DET_STEP_VAL, | ||
182 | CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_STEP_VAL, | ||
183 | CFG_PTAM_CORR40_4_TH_ADD_MIN_STEP_VAL, | ||
184 | CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_STEP_VAL, | ||
185 | CFG_PTAM_CORR32_4_TH_ADD_MIN_STEP_VAL, | ||
186 | CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_STEP_VAL, | ||
187 | CFG_PTAM_CORR32_1_TH_ADD_MIN_STEP_VAL, | ||
188 | CFG_PTAM_LINK_SENS_FA_OFDM_MAX, | ||
189 | CFG_PTAM_LINK_SENS_FA_OFDM_MIN, | ||
190 | CFG_PTAM_LINK_SENS_FA_CCK_MAX, | ||
191 | CFG_PTAM_LINK_SENS_FA_CCK_MIN, | ||
192 | CFG_PTAM_LINK_SENS_NRG_DIFF, | ||
193 | CFG_PTAM_LINK_SENS_NRG_MARGIN, | ||
194 | CFG_PTAM_LINK_SENS_MAX_NUMBER_OF_TIMES_IN_CCK_NO_FA, | ||
195 | CFG_PTAM_LINK_SENS_AUTO_CORR_MAX_TH_CCK, | ||
196 | CFG_AGG_MGG_TID_LOAD_ADDBA_THRESHOLD, | ||
197 | CFG_AGG_MGG_TID_LOAD_DELBA_THRESHOLD, | ||
198 | CFG_AGG_MGG_ADDBA_BUF_SIZE, | ||
199 | CFG_AGG_MGG_ADDBA_INACTIVE_TIMEOUT, | ||
200 | CFG_AGG_MGG_ADDBA_DEBUG_FLAGS, | ||
201 | CFG_SCAN_PERIODIC_RSSI_HIGH_THRESHOLD, | ||
202 | CFG_SCAN_PERIODIC_COEF_RSSI_HIGH, | ||
203 | CFG_11D_ENABLED, | ||
204 | CFG_11H_FEATURE_FLAGS, | ||
150 | 205 | ||
151 | /* <-- LAST --> */ | 206 | /* <-- LAST --> */ |
152 | CFG_TBL_FIX_LAST | 207 | CFG_TBL_FIX_LAST |
@@ -155,7 +210,8 @@ enum { | |||
155 | /* variable size table */ | 210 | /* variable size table */ |
156 | enum { | 211 | enum { |
157 | CFG_NET_ADDR = 0, | 212 | CFG_NET_ADDR = 0, |
158 | CFG_PROFILE, | 213 | CFG_LED_PATTERN_TABLE, |
214 | |||
159 | /* <-- LAST --> */ | 215 | /* <-- LAST --> */ |
160 | CFG_TBL_VAR_LAST | 216 | CFG_TBL_VAR_LAST |
161 | }; | 217 | }; |