diff options
author | David S. Miller <davem@davemloft.net> | 2009-02-03 15:41:58 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-02-03 15:41:58 -0500 |
commit | 1725d409caba16ea5fc694bd50e95e79e8ced11a (patch) | |
tree | 688fe26dd4ceda5364692f0ce307aadb6f04f331 /drivers/net/wireless/iwlwifi | |
parent | b3ff29d2ccfe3af065a9b393699a8fbf2abd1b15 (diff) | |
parent | b8abde45d7d6ab9e8ceced9b5990eeb1149d0b97 (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6
Diffstat (limited to 'drivers/net/wireless/iwlwifi')
54 files changed, 4089 insertions, 7955 deletions
diff --git a/drivers/net/wireless/iwlwifi/Kconfig b/drivers/net/wireless/iwlwifi/Kconfig index 47bee0ee0a7c..7b3bad1796c7 100644 --- a/drivers/net/wireless/iwlwifi/Kconfig +++ b/drivers/net/wireless/iwlwifi/Kconfig | |||
@@ -1,25 +1,26 @@ | |||
1 | config IWLWIFI | 1 | config IWLWIFI |
2 | tristate | 2 | bool "Intel Wireless Wifi" |
3 | depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL | ||
4 | default y | ||
3 | 5 | ||
4 | config IWLCORE | 6 | config IWLCORE |
5 | tristate "Intel Wireless Wifi Core" | 7 | tristate "Intel Wireless Wifi Core" |
6 | depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL | 8 | depends on IWLWIFI |
7 | select LIB80211 | 9 | select LIB80211 |
8 | select IWLWIFI | ||
9 | select MAC80211_LEDS if IWLWIFI_LEDS | 10 | select MAC80211_LEDS if IWLWIFI_LEDS |
10 | select LEDS_CLASS if IWLWIFI_LEDS | 11 | select LEDS_CLASS if IWLWIFI_LEDS |
11 | select RFKILL if IWLWIFI_RFKILL | 12 | select RFKILL if IWLWIFI_RFKILL |
12 | 13 | ||
13 | config IWLWIFI_LEDS | 14 | config IWLWIFI_LEDS |
14 | bool | 15 | bool "Enable LED support in iwlagn driver" |
15 | default n | 16 | depends on IWLCORE |
16 | 17 | ||
17 | config IWLWIFI_RFKILL | 18 | config IWLWIFI_RFKILL |
18 | boolean "Iwlwifi RF kill support" | 19 | bool "Enable RF kill support in iwlagn driver" |
19 | depends on IWLCORE | 20 | depends on IWLCORE |
20 | 21 | ||
21 | config IWLWIFI_DEBUG | 22 | config IWLWIFI_DEBUG |
22 | bool "Enable full debugging output in iwlagn driver" | 23 | bool "Enable full debugging output in iwlagn and iwl3945 drivers" |
23 | depends on IWLCORE | 24 | depends on IWLCORE |
24 | ---help--- | 25 | ---help--- |
25 | This option will enable debug tracing output for the iwlwifi drivers | 26 | This option will enable debug tracing output for the iwlwifi drivers |
@@ -51,7 +52,7 @@ config IWLWIFI_DEBUGFS | |||
51 | 52 | ||
52 | config IWLAGN | 53 | config IWLAGN |
53 | tristate "Intel Wireless WiFi Next Gen AGN" | 54 | tristate "Intel Wireless WiFi Next Gen AGN" |
54 | depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL | 55 | depends on IWLWIFI |
55 | select FW_LOADER | 56 | select FW_LOADER |
56 | select IWLCORE | 57 | select IWLCORE |
57 | ---help--- | 58 | ---help--- |
@@ -104,13 +105,12 @@ config IWL5000 | |||
104 | 105 | ||
105 | config IWL3945 | 106 | config IWL3945 |
106 | tristate "Intel PRO/Wireless 3945ABG/BG Network Connection" | 107 | tristate "Intel PRO/Wireless 3945ABG/BG Network Connection" |
107 | depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL | 108 | depends on IWLWIFI |
108 | select FW_LOADER | 109 | select FW_LOADER |
109 | select LIB80211 | 110 | select LIB80211 |
110 | select IWLWIFI | ||
111 | select MAC80211_LEDS if IWL3945_LEDS | 111 | select MAC80211_LEDS if IWL3945_LEDS |
112 | select LEDS_CLASS if IWL3945_LEDS | 112 | select LEDS_CLASS if IWL3945_LEDS |
113 | select RFKILL if IWL3945_RFKILL | 113 | select RFKILL if IWLWIFI_RFKILL |
114 | ---help--- | 114 | ---help--- |
115 | Select to build the driver supporting the: | 115 | Select to build the driver supporting the: |
116 | 116 | ||
@@ -133,10 +133,6 @@ config IWL3945 | |||
133 | say M here and read <file:Documentation/kbuild/modules.txt>. The | 133 | say M here and read <file:Documentation/kbuild/modules.txt>. The |
134 | module will be called iwl3945.ko. | 134 | module will be called iwl3945.ko. |
135 | 135 | ||
136 | config IWL3945_RFKILL | ||
137 | bool "Enable RF kill support in iwl3945 drivers" | ||
138 | depends on IWL3945 | ||
139 | |||
140 | config IWL3945_SPECTRUM_MEASUREMENT | 136 | config IWL3945_SPECTRUM_MEASUREMENT |
141 | bool "Enable Spectrum Measurement in iwl3945 drivers" | 137 | bool "Enable Spectrum Measurement in iwl3945 drivers" |
142 | depends on IWL3945 | 138 | depends on IWL3945 |
@@ -148,30 +144,3 @@ config IWL3945_LEDS | |||
148 | depends on IWL3945 | 144 | depends on IWL3945 |
149 | ---help--- | 145 | ---help--- |
150 | This option enables LEDS for the iwl3945 driver. | 146 | This option enables LEDS for the iwl3945 driver. |
151 | |||
152 | config IWL3945_DEBUG | ||
153 | bool "Enable full debugging output in iwl3945 driver" | ||
154 | depends on IWL3945 | ||
155 | ---help--- | ||
156 | This option will enable debug tracing output for the iwl3945 | ||
157 | driver. | ||
158 | |||
159 | This will result in the kernel module being ~100k larger. You can | ||
160 | control which debug output is sent to the kernel log by setting the | ||
161 | value in | ||
162 | |||
163 | /sys/bus/pci/drivers/${DRIVER}/debug_level | ||
164 | |||
165 | This entry will only exist if this option is enabled. | ||
166 | |||
167 | To set a value, simply echo an 8-byte hex value to the same file: | ||
168 | |||
169 | % echo 0x43fff > /sys/bus/pci/drivers/${DRIVER}/debug_level | ||
170 | |||
171 | You can find the list of debug mask values in: | ||
172 | drivers/net/wireless/iwlwifi/iwl-3945-debug.h | ||
173 | |||
174 | If this is your first time using this driver, you should say Y here | ||
175 | as the debug information can assist others in helping you resolve | ||
176 | any problems you may encounter. | ||
177 | |||
diff --git a/drivers/net/wireless/iwlwifi/Makefile b/drivers/net/wireless/iwlwifi/Makefile index 0be9e6b66aa0..fec2fbf8dc02 100644 --- a/drivers/net/wireless/iwlwifi/Makefile +++ b/drivers/net/wireless/iwlwifi/Makefile | |||
@@ -12,6 +12,8 @@ iwlagn-objs := iwl-agn.o iwl-agn-rs.o iwl-agn-hcmd-check.o | |||
12 | 12 | ||
13 | iwlagn-$(CONFIG_IWL4965) += iwl-4965.o | 13 | iwlagn-$(CONFIG_IWL4965) += iwl-4965.o |
14 | iwlagn-$(CONFIG_IWL5000) += iwl-5000.o | 14 | iwlagn-$(CONFIG_IWL5000) += iwl-5000.o |
15 | iwlagn-$(CONFIG_IWL5000) += iwl-6000.o | ||
16 | iwlagn-$(CONFIG_IWL5000) += iwl-100.o | ||
15 | 17 | ||
16 | obj-$(CONFIG_IWL3945) += iwl3945.o | 18 | obj-$(CONFIG_IWL3945) += iwl3945.o |
17 | iwl3945-objs := iwl3945-base.o iwl-3945.o iwl-3945-rs.o | 19 | iwl3945-objs := iwl3945-base.o iwl-3945.o iwl-3945-rs.o |
diff --git a/drivers/net/wireless/iwlwifi/iwl-100.c b/drivers/net/wireless/iwlwifi/iwl-100.c new file mode 100644 index 000000000000..dbadaf44f570 --- /dev/null +++ b/drivers/net/wireless/iwlwifi/iwl-100.c | |||
@@ -0,0 +1,70 @@ | |||
1 | /****************************************************************************** | ||
2 | * | ||
3 | * Copyright(c) 2008-2009 Intel Corporation. All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of version 2 of the GNU General Public License as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
12 | * more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along with | ||
15 | * this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | ||
17 | * | ||
18 | * The full GNU General Public License is included in this distribution in the | ||
19 | * file called LICENSE. | ||
20 | * | ||
21 | * Contact Information: | ||
22 | * Intel Linux Wireless <ilw@linux.intel.com> | ||
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
24 | * | ||
25 | *****************************************************************************/ | ||
26 | |||
27 | #include <linux/kernel.h> | ||
28 | #include <linux/module.h> | ||
29 | #include <linux/init.h> | ||
30 | #include <linux/pci.h> | ||
31 | #include <linux/dma-mapping.h> | ||
32 | #include <linux/delay.h> | ||
33 | #include <linux/skbuff.h> | ||
34 | #include <linux/netdevice.h> | ||
35 | #include <linux/wireless.h> | ||
36 | #include <net/mac80211.h> | ||
37 | #include <linux/etherdevice.h> | ||
38 | #include <asm/unaligned.h> | ||
39 | |||
40 | #include "iwl-eeprom.h" | ||
41 | #include "iwl-dev.h" | ||
42 | #include "iwl-core.h" | ||
43 | #include "iwl-io.h" | ||
44 | #include "iwl-sta.h" | ||
45 | #include "iwl-helpers.h" | ||
46 | #include "iwl-5000-hw.h" | ||
47 | |||
48 | /* Highest firmware API version supported */ | ||
49 | #define IWL100_UCODE_API_MAX 1 | ||
50 | |||
51 | /* Lowest firmware API version supported */ | ||
52 | #define IWL100_UCODE_API_MIN 1 | ||
53 | |||
54 | #define IWL100_FW_PRE "iwlwifi-100-" | ||
55 | #define _IWL100_MODULE_FIRMWARE(api) IWL100_FW_PRE #api ".ucode" | ||
56 | #define IWL100_MODULE_FIRMWARE(api) _IWL100_MODULE_FIRMWARE(api) | ||
57 | |||
58 | struct iwl_cfg iwl100_bgn_cfg = { | ||
59 | .name = "100 Series BGN", | ||
60 | .fw_name_pre = IWL100_FW_PRE, | ||
61 | .ucode_api_max = IWL100_UCODE_API_MAX, | ||
62 | .ucode_api_min = IWL100_UCODE_API_MIN, | ||
63 | .sku = IWL_SKU_G|IWL_SKU_N, | ||
64 | .ops = &iwl5000_ops, | ||
65 | .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, | ||
66 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, | ||
67 | .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, | ||
68 | .mod_params = &iwl50_mod_params, | ||
69 | }; | ||
70 | |||
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-commands.h b/drivers/net/wireless/iwlwifi/iwl-3945-commands.h deleted file mode 100644 index c6f4eb54a2b1..000000000000 --- a/drivers/net/wireless/iwlwifi/iwl-3945-commands.h +++ /dev/null | |||
@@ -1,1702 +0,0 @@ | |||
1 | /****************************************************************************** | ||
2 | * | ||
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | ||
4 | * redistributing this file, you may do so under either license. | ||
5 | * | ||
6 | * GPL LICENSE SUMMARY | ||
7 | * | ||
8 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of version 2 of the GNU General Public License as | ||
12 | * published by the Free Software Foundation. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, but | ||
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
17 | * General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | ||
22 | * USA | ||
23 | * | ||
24 | * The full GNU General Public License is included in this distribution | ||
25 | * in the file called LICENSE.GPL. | ||
26 | * | ||
27 | * Contact Information: | ||
28 | * Intel Linux Wireless <ilw@linux.intel.com> | ||
29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
30 | * | ||
31 | * BSD LICENSE | ||
32 | * | ||
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | ||
34 | * All rights reserved. | ||
35 | * | ||
36 | * Redistribution and use in source and binary forms, with or without | ||
37 | * modification, are permitted provided that the following conditions | ||
38 | * are met: | ||
39 | * | ||
40 | * * Redistributions of source code must retain the above copyright | ||
41 | * notice, this list of conditions and the following disclaimer. | ||
42 | * * Redistributions in binary form must reproduce the above copyright | ||
43 | * notice, this list of conditions and the following disclaimer in | ||
44 | * the documentation and/or other materials provided with the | ||
45 | * distribution. | ||
46 | * * Neither the name Intel Corporation nor the names of its | ||
47 | * contributors may be used to endorse or promote products derived | ||
48 | * from this software without specific prior written permission. | ||
49 | * | ||
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
61 | * | ||
62 | *****************************************************************************/ | ||
63 | /* | ||
64 | * Please use this file (iwl-3945-commands.h) only for uCode API definitions. | ||
65 | * Please use iwl-3945-hw.h for hardware-related definitions. | ||
66 | * Please use iwl-3945.h for driver implementation definitions. | ||
67 | */ | ||
68 | |||
69 | #ifndef __iwl_3945_commands_h__ | ||
70 | #define __iwl_3945_commands_h__ | ||
71 | |||
72 | /* uCode version contains 4 values: Major/Minor/API/Serial */ | ||
73 | #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24) | ||
74 | #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16) | ||
75 | #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8) | ||
76 | #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF) | ||
77 | |||
78 | enum { | ||
79 | REPLY_ALIVE = 0x1, | ||
80 | REPLY_ERROR = 0x2, | ||
81 | |||
82 | /* RXON and QOS commands */ | ||
83 | REPLY_RXON = 0x10, | ||
84 | REPLY_RXON_ASSOC = 0x11, | ||
85 | REPLY_QOS_PARAM = 0x13, | ||
86 | REPLY_RXON_TIMING = 0x14, | ||
87 | |||
88 | /* Multi-Station support */ | ||
89 | REPLY_ADD_STA = 0x18, | ||
90 | REPLY_REMOVE_STA = 0x19, /* not used */ | ||
91 | REPLY_REMOVE_ALL_STA = 0x1a, /* not used */ | ||
92 | |||
93 | /* RX, TX, LEDs */ | ||
94 | REPLY_3945_RX = 0x1b, /* 3945 only */ | ||
95 | REPLY_TX = 0x1c, | ||
96 | REPLY_RATE_SCALE = 0x47, /* 3945 only */ | ||
97 | REPLY_LEDS_CMD = 0x48, | ||
98 | REPLY_TX_LINK_QUALITY_CMD = 0x4e, /* 4965 only */ | ||
99 | |||
100 | /* 802.11h related */ | ||
101 | RADAR_NOTIFICATION = 0x70, /* not used */ | ||
102 | REPLY_QUIET_CMD = 0x71, /* not used */ | ||
103 | REPLY_CHANNEL_SWITCH = 0x72, | ||
104 | CHANNEL_SWITCH_NOTIFICATION = 0x73, | ||
105 | REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74, | ||
106 | SPECTRUM_MEASURE_NOTIFICATION = 0x75, | ||
107 | |||
108 | /* Power Management */ | ||
109 | POWER_TABLE_CMD = 0x77, | ||
110 | PM_SLEEP_NOTIFICATION = 0x7A, | ||
111 | PM_DEBUG_STATISTIC_NOTIFIC = 0x7B, | ||
112 | |||
113 | /* Scan commands and notifications */ | ||
114 | REPLY_SCAN_CMD = 0x80, | ||
115 | REPLY_SCAN_ABORT_CMD = 0x81, | ||
116 | SCAN_START_NOTIFICATION = 0x82, | ||
117 | SCAN_RESULTS_NOTIFICATION = 0x83, | ||
118 | SCAN_COMPLETE_NOTIFICATION = 0x84, | ||
119 | |||
120 | /* IBSS/AP commands */ | ||
121 | BEACON_NOTIFICATION = 0x90, | ||
122 | REPLY_TX_BEACON = 0x91, | ||
123 | WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */ | ||
124 | |||
125 | /* Miscellaneous commands */ | ||
126 | QUIET_NOTIFICATION = 0x96, /* not used */ | ||
127 | REPLY_TX_PWR_TABLE_CMD = 0x97, | ||
128 | MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */ | ||
129 | |||
130 | /* Bluetooth device coexistence config command */ | ||
131 | REPLY_BT_CONFIG = 0x9b, | ||
132 | |||
133 | /* Statistics */ | ||
134 | REPLY_STATISTICS_CMD = 0x9c, | ||
135 | STATISTICS_NOTIFICATION = 0x9d, | ||
136 | |||
137 | /* RF-KILL commands and notifications */ | ||
138 | REPLY_CARD_STATE_CMD = 0xa0, | ||
139 | CARD_STATE_NOTIFICATION = 0xa1, | ||
140 | |||
141 | /* Missed beacons notification */ | ||
142 | MISSED_BEACONS_NOTIFICATION = 0xa2, | ||
143 | |||
144 | REPLY_MAX = 0xff | ||
145 | }; | ||
146 | |||
147 | /****************************************************************************** | ||
148 | * (0) | ||
149 | * Commonly used structures and definitions: | ||
150 | * Command header, txpower | ||
151 | * | ||
152 | *****************************************************************************/ | ||
153 | |||
154 | /* iwl3945_cmd_header flags value */ | ||
155 | #define IWL_CMD_FAILED_MSK 0x40 | ||
156 | |||
157 | /** | ||
158 | * struct iwl3945_cmd_header | ||
159 | * | ||
160 | * This header format appears in the beginning of each command sent from the | ||
161 | * driver, and each response/notification received from uCode. | ||
162 | */ | ||
163 | struct iwl3945_cmd_header { | ||
164 | u8 cmd; /* Command ID: REPLY_RXON, etc. */ | ||
165 | u8 flags; /* IWL_CMD_* */ | ||
166 | /* | ||
167 | * The driver sets up the sequence number to values of its choosing. | ||
168 | * uCode does not use this value, but passes it back to the driver | ||
169 | * when sending the response to each driver-originated command, so | ||
170 | * the driver can match the response to the command. Since the values | ||
171 | * don't get used by uCode, the driver may set up an arbitrary format. | ||
172 | * | ||
173 | * There is one exception: uCode sets bit 15 when it originates | ||
174 | * the response/notification, i.e. when the response/notification | ||
175 | * is not a direct response to a command sent by the driver. For | ||
176 | * example, uCode issues REPLY_3945_RX when it sends a received frame | ||
177 | * to the driver; it is not a direct response to any driver command. | ||
178 | * | ||
179 | * The Linux driver uses the following format: | ||
180 | * | ||
181 | * 0:7 index/position within Tx queue | ||
182 | * 8:13 Tx queue selection | ||
183 | * 14:14 driver sets this to indicate command is in the 'huge' | ||
184 | * storage at the end of the command buffers, i.e. scan cmd | ||
185 | * 15:15 uCode sets this in uCode-originated response/notification | ||
186 | */ | ||
187 | __le16 sequence; | ||
188 | |||
189 | /* command or response/notification data follows immediately */ | ||
190 | u8 data[0]; | ||
191 | } __attribute__ ((packed)); | ||
192 | |||
193 | /** | ||
194 | * struct iwl3945_tx_power | ||
195 | * | ||
196 | * Used in REPLY_TX_PWR_TABLE_CMD, REPLY_SCAN_CMD, REPLY_CHANNEL_SWITCH | ||
197 | * | ||
198 | * Each entry contains two values: | ||
199 | * 1) DSP gain (or sometimes called DSP attenuation). This is a fine-grained | ||
200 | * linear value that multiplies the output of the digital signal processor, | ||
201 | * before being sent to the analog radio. | ||
202 | * 2) Radio gain. This sets the analog gain of the radio Tx path. | ||
203 | * It is a coarser setting, and behaves in a logarithmic (dB) fashion. | ||
204 | * | ||
205 | * Driver obtains values from struct iwl3945_tx_power power_gain_table[][]. | ||
206 | */ | ||
207 | struct iwl3945_tx_power { | ||
208 | u8 tx_gain; /* gain for analog radio */ | ||
209 | u8 dsp_atten; /* gain for DSP */ | ||
210 | } __attribute__ ((packed)); | ||
211 | |||
212 | /** | ||
213 | * struct iwl3945_power_per_rate | ||
214 | * | ||
215 | * Used in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH | ||
216 | */ | ||
217 | struct iwl3945_power_per_rate { | ||
218 | u8 rate; /* plcp */ | ||
219 | struct iwl3945_tx_power tpc; | ||
220 | u8 reserved; | ||
221 | } __attribute__ ((packed)); | ||
222 | |||
223 | /****************************************************************************** | ||
224 | * (0a) | ||
225 | * Alive and Error Commands & Responses: | ||
226 | * | ||
227 | *****************************************************************************/ | ||
228 | |||
229 | #define UCODE_VALID_OK cpu_to_le32(0x1) | ||
230 | #define INITIALIZE_SUBTYPE (9) | ||
231 | |||
232 | /* | ||
233 | * ("Initialize") REPLY_ALIVE = 0x1 (response only, not a command) | ||
234 | * | ||
235 | * uCode issues this "initialize alive" notification once the initialization | ||
236 | * uCode image has completed its work, and is ready to load the runtime image. | ||
237 | * This is the *first* "alive" notification that the driver will receive after | ||
238 | * rebooting uCode; the "initialize" alive is indicated by subtype field == 9. | ||
239 | * | ||
240 | * See comments documenting "BSM" (bootstrap state machine). | ||
241 | */ | ||
242 | struct iwl3945_init_alive_resp { | ||
243 | u8 ucode_minor; | ||
244 | u8 ucode_major; | ||
245 | __le16 reserved1; | ||
246 | u8 sw_rev[8]; | ||
247 | u8 ver_type; | ||
248 | u8 ver_subtype; /* "9" for initialize alive */ | ||
249 | __le16 reserved2; | ||
250 | __le32 log_event_table_ptr; | ||
251 | __le32 error_event_table_ptr; | ||
252 | __le32 timestamp; | ||
253 | __le32 is_valid; | ||
254 | } __attribute__ ((packed)); | ||
255 | |||
256 | |||
257 | /** | ||
258 | * REPLY_ALIVE = 0x1 (response only, not a command) | ||
259 | * | ||
260 | * uCode issues this "alive" notification once the runtime image is ready | ||
261 | * to receive commands from the driver. This is the *second* "alive" | ||
262 | * notification that the driver will receive after rebooting uCode; | ||
263 | * this "alive" is indicated by subtype field != 9. | ||
264 | * | ||
265 | * See comments documenting "BSM" (bootstrap state machine). | ||
266 | * | ||
267 | * This response includes two pointers to structures within the device's | ||
268 | * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging: | ||
269 | * | ||
270 | * 1) log_event_table_ptr indicates base of the event log. This traces | ||
271 | * a 256-entry history of uCode execution within a circular buffer. | ||
272 | * | ||
273 | * 2) error_event_table_ptr indicates base of the error log. This contains | ||
274 | * information about any uCode error that occurs. | ||
275 | * | ||
276 | * The Linux driver can print both logs to the system log when a uCode error | ||
277 | * occurs. | ||
278 | */ | ||
279 | struct iwl3945_alive_resp { | ||
280 | u8 ucode_minor; | ||
281 | u8 ucode_major; | ||
282 | __le16 reserved1; | ||
283 | u8 sw_rev[8]; | ||
284 | u8 ver_type; | ||
285 | u8 ver_subtype; /* not "9" for runtime alive */ | ||
286 | __le16 reserved2; | ||
287 | __le32 log_event_table_ptr; /* SRAM address for event log */ | ||
288 | __le32 error_event_table_ptr; /* SRAM address for error log */ | ||
289 | __le32 timestamp; | ||
290 | __le32 is_valid; | ||
291 | } __attribute__ ((packed)); | ||
292 | |||
293 | union tsf { | ||
294 | u8 byte[8]; | ||
295 | __le16 word[4]; | ||
296 | __le32 dw[2]; | ||
297 | }; | ||
298 | |||
299 | /* | ||
300 | * REPLY_ERROR = 0x2 (response only, not a command) | ||
301 | */ | ||
302 | struct iwl3945_error_resp { | ||
303 | __le32 error_type; | ||
304 | u8 cmd_id; | ||
305 | u8 reserved1; | ||
306 | __le16 bad_cmd_seq_num; | ||
307 | __le16 reserved2; | ||
308 | __le32 error_info; | ||
309 | union tsf timestamp; | ||
310 | } __attribute__ ((packed)); | ||
311 | |||
312 | /****************************************************************************** | ||
313 | * (1) | ||
314 | * RXON Commands & Responses: | ||
315 | * | ||
316 | *****************************************************************************/ | ||
317 | |||
318 | /* | ||
319 | * Rx config defines & structure | ||
320 | */ | ||
321 | /* rx_config device types */ | ||
322 | enum { | ||
323 | RXON_DEV_TYPE_AP = 1, | ||
324 | RXON_DEV_TYPE_ESS = 3, | ||
325 | RXON_DEV_TYPE_IBSS = 4, | ||
326 | RXON_DEV_TYPE_SNIFFER = 6, | ||
327 | }; | ||
328 | |||
329 | /* rx_config flags */ | ||
330 | /* band & modulation selection */ | ||
331 | #define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0) | ||
332 | #define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1) | ||
333 | /* auto detection enable */ | ||
334 | #define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2) | ||
335 | /* TGg protection when tx */ | ||
336 | #define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3) | ||
337 | /* cck short slot & preamble */ | ||
338 | #define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4) | ||
339 | #define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5) | ||
340 | /* antenna selection */ | ||
341 | #define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7) | ||
342 | #define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00) | ||
343 | #define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8) | ||
344 | #define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9) | ||
345 | /* radar detection enable */ | ||
346 | #define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12) | ||
347 | #define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13) | ||
348 | /* rx response to host with 8-byte TSF | ||
349 | * (according to ON_AIR deassertion) */ | ||
350 | #define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15) | ||
351 | |||
352 | /* rx_config filter flags */ | ||
353 | /* accept all data frames */ | ||
354 | #define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0) | ||
355 | /* pass control & management to host */ | ||
356 | #define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1) | ||
357 | /* accept multi-cast */ | ||
358 | #define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2) | ||
359 | /* don't decrypt uni-cast frames */ | ||
360 | #define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3) | ||
361 | /* don't decrypt multi-cast frames */ | ||
362 | #define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4) | ||
363 | /* STA is associated */ | ||
364 | #define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5) | ||
365 | /* transfer to host non bssid beacons in associated state */ | ||
366 | #define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6) | ||
367 | |||
368 | /** | ||
369 | * REPLY_RXON = 0x10 (command, has simple generic response) | ||
370 | * | ||
371 | * RXON tunes the radio tuner to a service channel, and sets up a number | ||
372 | * of parameters that are used primarily for Rx, but also for Tx operations. | ||
373 | * | ||
374 | * NOTE: When tuning to a new channel, driver must set the | ||
375 | * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent | ||
376 | * info within the device, including the station tables, tx retry | ||
377 | * rate tables, and txpower tables. Driver must build a new station | ||
378 | * table and txpower table before transmitting anything on the RXON | ||
379 | * channel. | ||
380 | * | ||
381 | * NOTE: All RXONs wipe clean the internal txpower table. Driver must | ||
382 | * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10), | ||
383 | * regardless of whether RXON_FILTER_ASSOC_MSK is set. | ||
384 | */ | ||
385 | struct iwl3945_rxon_cmd { | ||
386 | u8 node_addr[6]; | ||
387 | __le16 reserved1; | ||
388 | u8 bssid_addr[6]; | ||
389 | __le16 reserved2; | ||
390 | u8 wlap_bssid_addr[6]; | ||
391 | __le16 reserved3; | ||
392 | u8 dev_type; | ||
393 | u8 air_propagation; | ||
394 | __le16 reserved4; | ||
395 | u8 ofdm_basic_rates; | ||
396 | u8 cck_basic_rates; | ||
397 | __le16 assoc_id; | ||
398 | __le32 flags; | ||
399 | __le32 filter_flags; | ||
400 | __le16 channel; | ||
401 | __le16 reserved5; | ||
402 | } __attribute__ ((packed)); | ||
403 | |||
404 | /* | ||
405 | * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) | ||
406 | */ | ||
407 | struct iwl3945_rxon_assoc_cmd { | ||
408 | __le32 flags; | ||
409 | __le32 filter_flags; | ||
410 | u8 ofdm_basic_rates; | ||
411 | u8 cck_basic_rates; | ||
412 | __le16 reserved; | ||
413 | } __attribute__ ((packed)); | ||
414 | |||
415 | /* | ||
416 | * REPLY_RXON_TIMING = 0x14 (command, has simple generic response) | ||
417 | */ | ||
418 | struct iwl3945_rxon_time_cmd { | ||
419 | union tsf timestamp; | ||
420 | __le16 beacon_interval; | ||
421 | __le16 atim_window; | ||
422 | __le32 beacon_init_val; | ||
423 | __le16 listen_interval; | ||
424 | __le16 reserved; | ||
425 | } __attribute__ ((packed)); | ||
426 | |||
427 | /* | ||
428 | * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) | ||
429 | */ | ||
430 | struct iwl3945_channel_switch_cmd { | ||
431 | u8 band; | ||
432 | u8 expect_beacon; | ||
433 | __le16 channel; | ||
434 | __le32 rxon_flags; | ||
435 | __le32 rxon_filter_flags; | ||
436 | __le32 switch_time; | ||
437 | struct iwl3945_power_per_rate power[IWL_MAX_RATES]; | ||
438 | } __attribute__ ((packed)); | ||
439 | |||
440 | /* | ||
441 | * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command) | ||
442 | */ | ||
443 | struct iwl3945_csa_notification { | ||
444 | __le16 band; | ||
445 | __le16 channel; | ||
446 | __le32 status; /* 0 - OK, 1 - fail */ | ||
447 | } __attribute__ ((packed)); | ||
448 | |||
449 | /****************************************************************************** | ||
450 | * (2) | ||
451 | * Quality-of-Service (QOS) Commands & Responses: | ||
452 | * | ||
453 | *****************************************************************************/ | ||
454 | |||
455 | /** | ||
456 | * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM | ||
457 | * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd | ||
458 | * | ||
459 | * @cw_min: Contention window, start value in numbers of slots. | ||
460 | * Should be a power-of-2, minus 1. Device's default is 0x0f. | ||
461 | * @cw_max: Contention window, max value in numbers of slots. | ||
462 | * Should be a power-of-2, minus 1. Device's default is 0x3f. | ||
463 | * @aifsn: Number of slots in Arbitration Interframe Space (before | ||
464 | * performing random backoff timing prior to Tx). Device default 1. | ||
465 | * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0. | ||
466 | * | ||
467 | * Device will automatically increase contention window by (2*CW) + 1 for each | ||
468 | * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW | ||
469 | * value, to cap the CW value. | ||
470 | */ | ||
471 | struct iwl3945_ac_qos { | ||
472 | __le16 cw_min; | ||
473 | __le16 cw_max; | ||
474 | u8 aifsn; | ||
475 | u8 reserved1; | ||
476 | __le16 edca_txop; | ||
477 | } __attribute__ ((packed)); | ||
478 | |||
479 | /* QoS flags defines */ | ||
480 | #define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01) | ||
481 | #define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02) | ||
482 | #define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10) | ||
483 | |||
484 | /* Number of Access Categories (AC) (EDCA), queues 0..3 */ | ||
485 | #define AC_NUM 4 | ||
486 | |||
487 | /* | ||
488 | * REPLY_QOS_PARAM = 0x13 (command, has simple generic response) | ||
489 | * | ||
490 | * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs | ||
491 | * 0: Background, 1: Best Effort, 2: Video, 3: Voice. | ||
492 | */ | ||
493 | struct iwl3945_qosparam_cmd { | ||
494 | __le32 qos_flags; | ||
495 | struct iwl3945_ac_qos ac[AC_NUM]; | ||
496 | } __attribute__ ((packed)); | ||
497 | |||
498 | /****************************************************************************** | ||
499 | * (3) | ||
500 | * Add/Modify Stations Commands & Responses: | ||
501 | * | ||
502 | *****************************************************************************/ | ||
503 | /* | ||
504 | * Multi station support | ||
505 | */ | ||
506 | |||
507 | /* Special, dedicated locations within device's station table */ | ||
508 | #define IWL_AP_ID 0 | ||
509 | #define IWL_MULTICAST_ID 1 | ||
510 | #define IWL_STA_ID 2 | ||
511 | #define IWL3945_BROADCAST_ID 24 | ||
512 | #define IWL3945_STATION_COUNT 25 | ||
513 | |||
514 | #define IWL_STATION_COUNT 32 /* MAX(3945,4965)*/ | ||
515 | #define IWL_INVALID_STATION 255 | ||
516 | |||
517 | #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2); | ||
518 | #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8); | ||
519 | |||
520 | /* Use in mode field. 1: modify existing entry, 0: add new station entry */ | ||
521 | #define STA_CONTROL_MODIFY_MSK 0x01 | ||
522 | |||
523 | /* key flags __le16*/ | ||
524 | #define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007) | ||
525 | #define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000) | ||
526 | #define STA_KEY_FLG_WEP cpu_to_le16(0x0001) | ||
527 | #define STA_KEY_FLG_CCMP cpu_to_le16(0x0002) | ||
528 | #define STA_KEY_FLG_TKIP cpu_to_le16(0x0003) | ||
529 | |||
530 | #define STA_KEY_FLG_KEYID_POS 8 | ||
531 | #define STA_KEY_FLG_INVALID cpu_to_le16(0x0800) | ||
532 | /* wep key is either from global key (0) or from station info array (1) */ | ||
533 | #define STA_KEY_FLG_WEP_KEY_MAP_MSK cpu_to_le16(0x0008) | ||
534 | |||
535 | /* wep key in STA: 5-bytes (0) or 13-bytes (1) */ | ||
536 | #define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000) | ||
537 | #define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000) | ||
538 | |||
539 | /* Flags indicate whether to modify vs. don't change various station params */ | ||
540 | #define STA_MODIFY_KEY_MASK 0x01 | ||
541 | #define STA_MODIFY_TID_DISABLE_TX 0x02 | ||
542 | #define STA_MODIFY_TX_RATE_MSK 0x04 | ||
543 | |||
544 | /* | ||
545 | * Antenna masks: | ||
546 | * bit14:15 01 B inactive, A active | ||
547 | * 10 B active, A inactive | ||
548 | * 11 Both active | ||
549 | */ | ||
550 | #define RATE_MCS_ANT_A_POS 14 | ||
551 | #define RATE_MCS_ANT_B_POS 15 | ||
552 | #define RATE_MCS_ANT_A_MSK 0x4000 | ||
553 | #define RATE_MCS_ANT_B_MSK 0x8000 | ||
554 | #define RATE_MCS_ANT_AB_MSK 0xc000 | ||
555 | |||
556 | struct iwl3945_keyinfo { | ||
557 | __le16 key_flags; | ||
558 | u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */ | ||
559 | u8 reserved1; | ||
560 | __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */ | ||
561 | u8 key_offset; | ||
562 | u8 reserved2; | ||
563 | u8 key[16]; /* 16-byte unicast decryption key */ | ||
564 | } __attribute__ ((packed)); | ||
565 | |||
566 | /** | ||
567 | * struct sta_id_modify | ||
568 | * @addr[ETH_ALEN]: station's MAC address | ||
569 | * @sta_id: index of station in uCode's station table | ||
570 | * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change | ||
571 | * | ||
572 | * Driver selects unused table index when adding new station, | ||
573 | * or the index to a pre-existing station entry when modifying that station. | ||
574 | * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP). | ||
575 | * | ||
576 | * modify_mask flags select which parameters to modify vs. leave alone. | ||
577 | */ | ||
578 | struct sta_id_modify { | ||
579 | u8 addr[ETH_ALEN]; | ||
580 | __le16 reserved1; | ||
581 | u8 sta_id; | ||
582 | u8 modify_mask; | ||
583 | __le16 reserved2; | ||
584 | } __attribute__ ((packed)); | ||
585 | |||
586 | /* | ||
587 | * REPLY_ADD_STA = 0x18 (command) | ||
588 | * | ||
589 | * The device contains an internal table of per-station information, | ||
590 | * with info on security keys, aggregation parameters, and Tx rates for | ||
591 | * initial Tx attempt and any retries (4965 uses REPLY_TX_LINK_QUALITY_CMD, | ||
592 | * 3945 uses REPLY_RATE_SCALE to set up rate tables). | ||
593 | * | ||
594 | * REPLY_ADD_STA sets up the table entry for one station, either creating | ||
595 | * a new entry, or modifying a pre-existing one. | ||
596 | * | ||
597 | * NOTE: RXON command (without "associated" bit set) wipes the station table | ||
598 | * clean. Moving into RF_KILL state does this also. Driver must set up | ||
599 | * new station table before transmitting anything on the RXON channel | ||
600 | * (except active scans or active measurements; those commands carry | ||
601 | * their own txpower/rate setup data). | ||
602 | * | ||
603 | * When getting started on a new channel, driver must set up the | ||
604 | * IWL_BROADCAST_ID entry (last entry in the table). For a client | ||
605 | * station in a BSS, once an AP is selected, driver sets up the AP STA | ||
606 | * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP | ||
607 | * are all that are needed for a BSS client station. If the device is | ||
608 | * used as AP, or in an IBSS network, driver must set up station table | ||
609 | * entries for all STAs in network, starting with index IWL_STA_ID. | ||
610 | */ | ||
611 | struct iwl3945_addsta_cmd { | ||
612 | u8 mode; /* 1: modify existing, 0: add new station */ | ||
613 | u8 reserved[3]; | ||
614 | struct sta_id_modify sta; | ||
615 | struct iwl3945_keyinfo key; | ||
616 | __le32 station_flags; /* STA_FLG_* */ | ||
617 | __le32 station_flags_msk; /* STA_FLG_* */ | ||
618 | |||
619 | /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) | ||
620 | * corresponding to bit (e.g. bit 5 controls TID 5). | ||
621 | * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ | ||
622 | __le16 tid_disable_tx; | ||
623 | |||
624 | __le16 rate_n_flags; | ||
625 | |||
626 | /* TID for which to add block-ack support. | ||
627 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | ||
628 | u8 add_immediate_ba_tid; | ||
629 | |||
630 | /* TID for which to remove block-ack support. | ||
631 | * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */ | ||
632 | u8 remove_immediate_ba_tid; | ||
633 | |||
634 | /* Starting Sequence Number for added block-ack support. | ||
635 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | ||
636 | __le16 add_immediate_ba_ssn; | ||
637 | } __attribute__ ((packed)); | ||
638 | |||
639 | #define ADD_STA_SUCCESS_MSK 0x1 | ||
640 | #define ADD_STA_NO_ROOM_IN_TABLE 0x2 | ||
641 | #define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4 | ||
642 | /* | ||
643 | * REPLY_ADD_STA = 0x18 (response) | ||
644 | */ | ||
645 | struct iwl3945_add_sta_resp { | ||
646 | u8 status; /* ADD_STA_* */ | ||
647 | } __attribute__ ((packed)); | ||
648 | |||
649 | |||
650 | /****************************************************************************** | ||
651 | * (4) | ||
652 | * Rx Responses: | ||
653 | * | ||
654 | *****************************************************************************/ | ||
655 | |||
656 | struct iwl3945_rx_frame_stats { | ||
657 | u8 phy_count; | ||
658 | u8 id; | ||
659 | u8 rssi; | ||
660 | u8 agc; | ||
661 | __le16 sig_avg; | ||
662 | __le16 noise_diff; | ||
663 | u8 payload[0]; | ||
664 | } __attribute__ ((packed)); | ||
665 | |||
666 | struct iwl3945_rx_frame_hdr { | ||
667 | __le16 channel; | ||
668 | __le16 phy_flags; | ||
669 | u8 reserved1; | ||
670 | u8 rate; | ||
671 | __le16 len; | ||
672 | u8 payload[0]; | ||
673 | } __attribute__ ((packed)); | ||
674 | |||
675 | #define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0) | ||
676 | #define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1) | ||
677 | |||
678 | #define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0) | ||
679 | #define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1) | ||
680 | #define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2) | ||
681 | #define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3) | ||
682 | #define RX_RES_PHY_FLAGS_ANTENNA_MSK cpu_to_le16(0xf0) | ||
683 | |||
684 | #define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8) | ||
685 | #define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8) | ||
686 | #define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8) | ||
687 | #define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8) | ||
688 | #define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8) | ||
689 | |||
690 | #define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11) | ||
691 | #define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11) | ||
692 | #define RX_RES_STATUS_DECRYPT_OK (0x3 << 11) | ||
693 | #define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11) | ||
694 | #define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11) | ||
695 | |||
696 | struct iwl3945_rx_frame_end { | ||
697 | __le32 status; | ||
698 | __le64 timestamp; | ||
699 | __le32 beacon_timestamp; | ||
700 | } __attribute__ ((packed)); | ||
701 | |||
702 | /* | ||
703 | * REPLY_3945_RX = 0x1b (response only, not a command) | ||
704 | * | ||
705 | * NOTE: DO NOT dereference from casts to this structure | ||
706 | * It is provided only for calculating minimum data set size. | ||
707 | * The actual offsets of the hdr and end are dynamic based on | ||
708 | * stats.phy_count | ||
709 | */ | ||
710 | struct iwl3945_rx_frame { | ||
711 | struct iwl3945_rx_frame_stats stats; | ||
712 | struct iwl3945_rx_frame_hdr hdr; | ||
713 | struct iwl3945_rx_frame_end end; | ||
714 | } __attribute__ ((packed)); | ||
715 | |||
716 | /****************************************************************************** | ||
717 | * (5) | ||
718 | * Tx Commands & Responses: | ||
719 | * | ||
720 | * Driver must place each REPLY_TX command into one of the prioritized Tx | ||
721 | * queues in host DRAM, shared between driver and device. When the device's | ||
722 | * Tx scheduler and uCode are preparing to transmit, the device pulls the | ||
723 | * Tx command over the PCI bus via one of the device's Tx DMA channels, | ||
724 | * to fill an internal FIFO from which data will be transmitted. | ||
725 | * | ||
726 | * uCode handles all timing and protocol related to control frames | ||
727 | * (RTS/CTS/ACK), based on flags in the Tx command. | ||
728 | * | ||
729 | * uCode handles retrying Tx when an ACK is expected but not received. | ||
730 | * This includes trying lower data rates than the one requested in the Tx | ||
731 | * command, as set up by the REPLY_RATE_SCALE (for 3945) or | ||
732 | * REPLY_TX_LINK_QUALITY_CMD (4965). | ||
733 | * | ||
734 | * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD. | ||
735 | * This command must be executed after every RXON command, before Tx can occur. | ||
736 | *****************************************************************************/ | ||
737 | |||
738 | /* REPLY_TX Tx flags field */ | ||
739 | |||
740 | /* 1: Use Request-To-Send protocol before this frame. | ||
741 | * Mutually exclusive vs. TX_CMD_FLG_CTS_MSK. */ | ||
742 | #define TX_CMD_FLG_RTS_MSK cpu_to_le32(1 << 1) | ||
743 | |||
744 | /* 1: Transmit Clear-To-Send to self before this frame. | ||
745 | * Driver should set this for AUTH/DEAUTH/ASSOC-REQ/REASSOC mgmnt frames. | ||
746 | * Mutually exclusive vs. TX_CMD_FLG_RTS_MSK. */ | ||
747 | #define TX_CMD_FLG_CTS_MSK cpu_to_le32(1 << 2) | ||
748 | |||
749 | /* 1: Expect ACK from receiving station | ||
750 | * 0: Don't expect ACK (MAC header's duration field s/b 0) | ||
751 | * Set this for unicast frames, but not broadcast/multicast. */ | ||
752 | #define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3) | ||
753 | |||
754 | /* 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD). | ||
755 | * Tx command's initial_rate_index indicates first rate to try; | ||
756 | * uCode walks through table for additional Tx attempts. | ||
757 | * 0: Use Tx rate/MCS from Tx command's rate_n_flags field. | ||
758 | * This rate will be used for all Tx attempts; it will not be scaled. */ | ||
759 | #define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4) | ||
760 | |||
761 | /* 1: Expect immediate block-ack. | ||
762 | * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */ | ||
763 | #define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6) | ||
764 | |||
765 | /* 1: Frame requires full Tx-Op protection. | ||
766 | * Set this if either RTS or CTS Tx Flag gets set. */ | ||
767 | #define TX_CMD_FLG_FULL_TXOP_PROT_MSK cpu_to_le32(1 << 7) | ||
768 | |||
769 | /* Tx antenna selection field; used only for 3945, reserved (0) for 4965. | ||
770 | * Set field to "0" to allow 3945 uCode to select antenna (normal usage). */ | ||
771 | #define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00) | ||
772 | #define TX_CMD_FLG_ANT_A_MSK cpu_to_le32(1 << 8) | ||
773 | #define TX_CMD_FLG_ANT_B_MSK cpu_to_le32(1 << 9) | ||
774 | |||
775 | /* 1: Ignore Bluetooth priority for this frame. | ||
776 | * 0: Delay Tx until Bluetooth device is done (normal usage). */ | ||
777 | #define TX_CMD_FLG_BT_DIS_MSK cpu_to_le32(1 << 12) | ||
778 | |||
779 | /* 1: uCode overrides sequence control field in MAC header. | ||
780 | * 0: Driver provides sequence control field in MAC header. | ||
781 | * Set this for management frames, non-QOS data frames, non-unicast frames, | ||
782 | * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */ | ||
783 | #define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13) | ||
784 | |||
785 | /* 1: This frame is non-last MPDU; more fragments are coming. | ||
786 | * 0: Last fragment, or not using fragmentation. */ | ||
787 | #define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14) | ||
788 | |||
789 | /* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame. | ||
790 | * 0: No TSF required in outgoing frame. | ||
791 | * Set this for transmitting beacons and probe responses. */ | ||
792 | #define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16) | ||
793 | |||
794 | /* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword | ||
795 | * alignment of frame's payload data field. | ||
796 | * 0: No pad | ||
797 | * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4 | ||
798 | * field (but not both). Driver must align frame data (i.e. data following | ||
799 | * MAC header) to DWORD boundary. */ | ||
800 | #define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20) | ||
801 | |||
802 | /* HCCA-AP - disable duration overwriting. */ | ||
803 | #define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25) | ||
804 | |||
805 | /* | ||
806 | * TX command security control | ||
807 | */ | ||
808 | #define TX_CMD_SEC_WEP 0x01 | ||
809 | #define TX_CMD_SEC_CCM 0x02 | ||
810 | #define TX_CMD_SEC_TKIP 0x03 | ||
811 | #define TX_CMD_SEC_MSK 0x03 | ||
812 | #define TX_CMD_SEC_SHIFT 6 | ||
813 | #define TX_CMD_SEC_KEY128 0x08 | ||
814 | |||
815 | /* | ||
816 | * REPLY_TX = 0x1c (command) | ||
817 | */ | ||
818 | struct iwl3945_tx_cmd { | ||
819 | /* | ||
820 | * MPDU byte count: | ||
821 | * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size, | ||
822 | * + 8 byte IV for CCM or TKIP (not used for WEP) | ||
823 | * + Data payload | ||
824 | * + 8-byte MIC (not used for CCM/WEP) | ||
825 | * NOTE: Does not include Tx command bytes, post-MAC pad bytes, | ||
826 | * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i | ||
827 | * Range: 14-2342 bytes. | ||
828 | */ | ||
829 | __le16 len; | ||
830 | |||
831 | /* | ||
832 | * MPDU or MSDU byte count for next frame. | ||
833 | * Used for fragmentation and bursting, but not 11n aggregation. | ||
834 | * Same as "len", but for next frame. Set to 0 if not applicable. | ||
835 | */ | ||
836 | __le16 next_frame_len; | ||
837 | |||
838 | __le32 tx_flags; /* TX_CMD_FLG_* */ | ||
839 | |||
840 | u8 rate; | ||
841 | |||
842 | /* Index of recipient station in uCode's station table */ | ||
843 | u8 sta_id; | ||
844 | u8 tid_tspec; | ||
845 | u8 sec_ctl; | ||
846 | u8 key[16]; | ||
847 | union { | ||
848 | u8 byte[8]; | ||
849 | __le16 word[4]; | ||
850 | __le32 dw[2]; | ||
851 | } tkip_mic; | ||
852 | __le32 next_frame_info; | ||
853 | union { | ||
854 | __le32 life_time; | ||
855 | __le32 attempt; | ||
856 | } stop_time; | ||
857 | u8 supp_rates[2]; | ||
858 | u8 rts_retry_limit; /*byte 50 */ | ||
859 | u8 data_retry_limit; /*byte 51 */ | ||
860 | union { | ||
861 | __le16 pm_frame_timeout; | ||
862 | __le16 attempt_duration; | ||
863 | } timeout; | ||
864 | |||
865 | /* | ||
866 | * Duration of EDCA burst Tx Opportunity, in 32-usec units. | ||
867 | * Set this if txop time is not specified by HCCA protocol (e.g. by AP). | ||
868 | */ | ||
869 | __le16 driver_txop; | ||
870 | |||
871 | /* | ||
872 | * MAC header goes here, followed by 2 bytes padding if MAC header | ||
873 | * length is 26 or 30 bytes, followed by payload data | ||
874 | */ | ||
875 | u8 payload[0]; | ||
876 | struct ieee80211_hdr hdr[0]; | ||
877 | } __attribute__ ((packed)); | ||
878 | |||
879 | /* TX command response is sent after *all* transmission attempts. | ||
880 | * | ||
881 | * NOTES: | ||
882 | * | ||
883 | * TX_STATUS_FAIL_NEXT_FRAG | ||
884 | * | ||
885 | * If the fragment flag in the MAC header for the frame being transmitted | ||
886 | * is set and there is insufficient time to transmit the next frame, the | ||
887 | * TX status will be returned with 'TX_STATUS_FAIL_NEXT_FRAG'. | ||
888 | * | ||
889 | * TX_STATUS_FIFO_UNDERRUN | ||
890 | * | ||
891 | * Indicates the host did not provide bytes to the FIFO fast enough while | ||
892 | * a TX was in progress. | ||
893 | * | ||
894 | * TX_STATUS_FAIL_MGMNT_ABORT | ||
895 | * | ||
896 | * This status is only possible if the ABORT ON MGMT RX parameter was | ||
897 | * set to true with the TX command. | ||
898 | * | ||
899 | * If the MSB of the status parameter is set then an abort sequence is | ||
900 | * required. This sequence consists of the host activating the TX Abort | ||
901 | * control line, and then waiting for the TX Abort command response. This | ||
902 | * indicates that a the device is no longer in a transmit state, and that the | ||
903 | * command FIFO has been cleared. The host must then deactivate the TX Abort | ||
904 | * control line. Receiving is still allowed in this case. | ||
905 | */ | ||
906 | enum { | ||
907 | TX_STATUS_SUCCESS = 0x01, | ||
908 | TX_STATUS_DIRECT_DONE = 0x02, | ||
909 | TX_STATUS_FAIL_SHORT_LIMIT = 0x82, | ||
910 | TX_STATUS_FAIL_LONG_LIMIT = 0x83, | ||
911 | TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84, | ||
912 | TX_STATUS_FAIL_MGMNT_ABORT = 0x85, | ||
913 | TX_STATUS_FAIL_NEXT_FRAG = 0x86, | ||
914 | TX_STATUS_FAIL_LIFE_EXPIRE = 0x87, | ||
915 | TX_STATUS_FAIL_DEST_PS = 0x88, | ||
916 | TX_STATUS_FAIL_ABORTED = 0x89, | ||
917 | TX_STATUS_FAIL_BT_RETRY = 0x8a, | ||
918 | TX_STATUS_FAIL_STA_INVALID = 0x8b, | ||
919 | TX_STATUS_FAIL_FRAG_DROPPED = 0x8c, | ||
920 | TX_STATUS_FAIL_TID_DISABLE = 0x8d, | ||
921 | TX_STATUS_FAIL_FRAME_FLUSHED = 0x8e, | ||
922 | TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f, | ||
923 | TX_STATUS_FAIL_TX_LOCKED = 0x90, | ||
924 | TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91, | ||
925 | }; | ||
926 | |||
927 | #define TX_PACKET_MODE_REGULAR 0x0000 | ||
928 | #define TX_PACKET_MODE_BURST_SEQ 0x0100 | ||
929 | #define TX_PACKET_MODE_BURST_FIRST 0x0200 | ||
930 | |||
931 | enum { | ||
932 | TX_POWER_PA_NOT_ACTIVE = 0x0, | ||
933 | }; | ||
934 | |||
935 | enum { | ||
936 | TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */ | ||
937 | TX_STATUS_DELAY_MSK = 0x00000040, | ||
938 | TX_STATUS_ABORT_MSK = 0x00000080, | ||
939 | TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */ | ||
940 | TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */ | ||
941 | TX_RESERVED = 0x00780000, /* bits 19:22 */ | ||
942 | TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */ | ||
943 | TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */ | ||
944 | }; | ||
945 | |||
946 | /* | ||
947 | * REPLY_TX = 0x1c (response) | ||
948 | */ | ||
949 | struct iwl3945_tx_resp { | ||
950 | u8 failure_rts; | ||
951 | u8 failure_frame; | ||
952 | u8 bt_kill_count; | ||
953 | u8 rate; | ||
954 | __le32 wireless_media_time; | ||
955 | __le32 status; /* TX status */ | ||
956 | } __attribute__ ((packed)); | ||
957 | |||
958 | /* | ||
959 | * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response) | ||
960 | */ | ||
961 | struct iwl3945_txpowertable_cmd { | ||
962 | u8 band; /* 0: 5 GHz, 1: 2.4 GHz */ | ||
963 | u8 reserved; | ||
964 | __le16 channel; | ||
965 | struct iwl3945_power_per_rate power[IWL_MAX_RATES]; | ||
966 | } __attribute__ ((packed)); | ||
967 | |||
968 | struct iwl3945_rate_scaling_info { | ||
969 | __le16 rate_n_flags; | ||
970 | u8 try_cnt; | ||
971 | u8 next_rate_index; | ||
972 | } __attribute__ ((packed)); | ||
973 | |||
974 | /** | ||
975 | * struct iwl3945_rate_scaling_cmd - Rate Scaling Command & Response | ||
976 | * | ||
977 | * REPLY_RATE_SCALE = 0x47 (command, has simple generic response) | ||
978 | * | ||
979 | * NOTE: The table of rates passed to the uCode via the | ||
980 | * RATE_SCALE command sets up the corresponding order of | ||
981 | * rates used for all related commands, including rate | ||
982 | * masks, etc. | ||
983 | * | ||
984 | * For example, if you set 9MB (PLCP 0x0f) as the first | ||
985 | * rate in the rate table, the bit mask for that rate | ||
986 | * when passed through ofdm_basic_rates on the REPLY_RXON | ||
987 | * command would be bit 0 (1 << 0) | ||
988 | */ | ||
989 | struct iwl3945_rate_scaling_cmd { | ||
990 | u8 table_id; | ||
991 | u8 reserved[3]; | ||
992 | struct iwl3945_rate_scaling_info table[IWL_MAX_RATES]; | ||
993 | } __attribute__ ((packed)); | ||
994 | |||
995 | /* | ||
996 | * REPLY_BT_CONFIG = 0x9b (command, has simple generic response) | ||
997 | * | ||
998 | * 3945 and 4965 support hardware handshake with Bluetooth device on | ||
999 | * same platform. Bluetooth device alerts wireless device when it will Tx; | ||
1000 | * wireless device can delay or kill its own Tx to accommodate. | ||
1001 | */ | ||
1002 | struct iwl3945_bt_cmd { | ||
1003 | u8 flags; | ||
1004 | u8 lead_time; | ||
1005 | u8 max_kill; | ||
1006 | u8 reserved; | ||
1007 | __le32 kill_ack_mask; | ||
1008 | __le32 kill_cts_mask; | ||
1009 | } __attribute__ ((packed)); | ||
1010 | |||
1011 | /****************************************************************************** | ||
1012 | * (6) | ||
1013 | * Spectrum Management (802.11h) Commands, Responses, Notifications: | ||
1014 | * | ||
1015 | *****************************************************************************/ | ||
1016 | |||
1017 | /* | ||
1018 | * Spectrum Management | ||
1019 | */ | ||
1020 | #define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \ | ||
1021 | RXON_FILTER_CTL2HOST_MSK | \ | ||
1022 | RXON_FILTER_ACCEPT_GRP_MSK | \ | ||
1023 | RXON_FILTER_DIS_DECRYPT_MSK | \ | ||
1024 | RXON_FILTER_DIS_GRP_DECRYPT_MSK | \ | ||
1025 | RXON_FILTER_ASSOC_MSK | \ | ||
1026 | RXON_FILTER_BCON_AWARE_MSK) | ||
1027 | |||
1028 | struct iwl3945_measure_channel { | ||
1029 | __le32 duration; /* measurement duration in extended beacon | ||
1030 | * format */ | ||
1031 | u8 channel; /* channel to measure */ | ||
1032 | u8 type; /* see enum iwl3945_measure_type */ | ||
1033 | __le16 reserved; | ||
1034 | } __attribute__ ((packed)); | ||
1035 | |||
1036 | /* | ||
1037 | * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command) | ||
1038 | */ | ||
1039 | struct iwl3945_spectrum_cmd { | ||
1040 | __le16 len; /* number of bytes starting from token */ | ||
1041 | u8 token; /* token id */ | ||
1042 | u8 id; /* measurement id -- 0 or 1 */ | ||
1043 | u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */ | ||
1044 | u8 periodic; /* 1 = periodic */ | ||
1045 | __le16 path_loss_timeout; | ||
1046 | __le32 start_time; /* start time in extended beacon format */ | ||
1047 | __le32 reserved2; | ||
1048 | __le32 flags; /* rxon flags */ | ||
1049 | __le32 filter_flags; /* rxon filter flags */ | ||
1050 | __le16 channel_count; /* minimum 1, maximum 10 */ | ||
1051 | __le16 reserved3; | ||
1052 | struct iwl3945_measure_channel channels[10]; | ||
1053 | } __attribute__ ((packed)); | ||
1054 | |||
1055 | /* | ||
1056 | * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response) | ||
1057 | */ | ||
1058 | struct iwl3945_spectrum_resp { | ||
1059 | u8 token; | ||
1060 | u8 id; /* id of the prior command replaced, or 0xff */ | ||
1061 | __le16 status; /* 0 - command will be handled | ||
1062 | * 1 - cannot handle (conflicts with another | ||
1063 | * measurement) */ | ||
1064 | } __attribute__ ((packed)); | ||
1065 | |||
1066 | enum iwl3945_measurement_state { | ||
1067 | IWL_MEASUREMENT_START = 0, | ||
1068 | IWL_MEASUREMENT_STOP = 1, | ||
1069 | }; | ||
1070 | |||
1071 | enum iwl3945_measurement_status { | ||
1072 | IWL_MEASUREMENT_OK = 0, | ||
1073 | IWL_MEASUREMENT_CONCURRENT = 1, | ||
1074 | IWL_MEASUREMENT_CSA_CONFLICT = 2, | ||
1075 | IWL_MEASUREMENT_TGH_CONFLICT = 3, | ||
1076 | /* 4-5 reserved */ | ||
1077 | IWL_MEASUREMENT_STOPPED = 6, | ||
1078 | IWL_MEASUREMENT_TIMEOUT = 7, | ||
1079 | IWL_MEASUREMENT_PERIODIC_FAILED = 8, | ||
1080 | }; | ||
1081 | |||
1082 | #define NUM_ELEMENTS_IN_HISTOGRAM 8 | ||
1083 | |||
1084 | struct iwl3945_measurement_histogram { | ||
1085 | __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */ | ||
1086 | __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */ | ||
1087 | } __attribute__ ((packed)); | ||
1088 | |||
1089 | /* clear channel availability counters */ | ||
1090 | struct iwl3945_measurement_cca_counters { | ||
1091 | __le32 ofdm; | ||
1092 | __le32 cck; | ||
1093 | } __attribute__ ((packed)); | ||
1094 | |||
1095 | enum iwl3945_measure_type { | ||
1096 | IWL_MEASURE_BASIC = (1 << 0), | ||
1097 | IWL_MEASURE_CHANNEL_LOAD = (1 << 1), | ||
1098 | IWL_MEASURE_HISTOGRAM_RPI = (1 << 2), | ||
1099 | IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3), | ||
1100 | IWL_MEASURE_FRAME = (1 << 4), | ||
1101 | /* bits 5:6 are reserved */ | ||
1102 | IWL_MEASURE_IDLE = (1 << 7), | ||
1103 | }; | ||
1104 | |||
1105 | /* | ||
1106 | * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command) | ||
1107 | */ | ||
1108 | struct iwl3945_spectrum_notification { | ||
1109 | u8 id; /* measurement id -- 0 or 1 */ | ||
1110 | u8 token; | ||
1111 | u8 channel_index; /* index in measurement channel list */ | ||
1112 | u8 state; /* 0 - start, 1 - stop */ | ||
1113 | __le32 start_time; /* lower 32-bits of TSF */ | ||
1114 | u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */ | ||
1115 | u8 channel; | ||
1116 | u8 type; /* see enum iwl3945_measurement_type */ | ||
1117 | u8 reserved1; | ||
1118 | /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only | ||
1119 | * valid if applicable for measurement type requested. */ | ||
1120 | __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */ | ||
1121 | __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */ | ||
1122 | __le32 cca_time; /* channel load time in usecs */ | ||
1123 | u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 - | ||
1124 | * unidentified */ | ||
1125 | u8 reserved2[3]; | ||
1126 | struct iwl3945_measurement_histogram histogram; | ||
1127 | __le32 stop_time; /* lower 32-bits of TSF */ | ||
1128 | __le32 status; /* see iwl3945_measurement_status */ | ||
1129 | } __attribute__ ((packed)); | ||
1130 | |||
1131 | /****************************************************************************** | ||
1132 | * (7) | ||
1133 | * Power Management Commands, Responses, Notifications: | ||
1134 | * | ||
1135 | *****************************************************************************/ | ||
1136 | |||
1137 | /** | ||
1138 | * struct iwl3945_powertable_cmd - Power Table Command | ||
1139 | * @flags: See below: | ||
1140 | * | ||
1141 | * POWER_TABLE_CMD = 0x77 (command, has simple generic response) | ||
1142 | * | ||
1143 | * PM allow: | ||
1144 | * bit 0 - '0' Driver not allow power management | ||
1145 | * '1' Driver allow PM (use rest of parameters) | ||
1146 | * uCode send sleep notifications: | ||
1147 | * bit 1 - '0' Don't send sleep notification | ||
1148 | * '1' send sleep notification (SEND_PM_NOTIFICATION) | ||
1149 | * Sleep over DTIM | ||
1150 | * bit 2 - '0' PM have to walk up every DTIM | ||
1151 | * '1' PM could sleep over DTIM till listen Interval. | ||
1152 | * PCI power managed | ||
1153 | * bit 3 - '0' (PCI_LINK_CTRL & 0x1) | ||
1154 | * '1' !(PCI_LINK_CTRL & 0x1) | ||
1155 | * Force sleep Modes | ||
1156 | * bit 31/30- '00' use both mac/xtal sleeps | ||
1157 | * '01' force Mac sleep | ||
1158 | * '10' force xtal sleep | ||
1159 | * '11' Illegal set | ||
1160 | * | ||
1161 | * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then | ||
1162 | * ucode assume sleep over DTIM is allowed and we don't need to wakeup | ||
1163 | * for every DTIM. | ||
1164 | */ | ||
1165 | #define IWL_POWER_VEC_SIZE 5 | ||
1166 | |||
1167 | #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le32(1 << 0) | ||
1168 | #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le32(1 << 2) | ||
1169 | #define IWL_POWER_PCI_PM_MSK cpu_to_le32(1 << 3) | ||
1170 | struct iwl3945_powertable_cmd { | ||
1171 | __le32 flags; | ||
1172 | __le32 rx_data_timeout; | ||
1173 | __le32 tx_data_timeout; | ||
1174 | __le32 sleep_interval[IWL_POWER_VEC_SIZE]; | ||
1175 | } __attribute__((packed)); | ||
1176 | |||
1177 | /* | ||
1178 | * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command) | ||
1179 | * 3945 and 4965 identical. | ||
1180 | */ | ||
1181 | struct iwl3945_sleep_notification { | ||
1182 | u8 pm_sleep_mode; | ||
1183 | u8 pm_wakeup_src; | ||
1184 | __le16 reserved; | ||
1185 | __le32 sleep_time; | ||
1186 | __le32 tsf_low; | ||
1187 | __le32 bcon_timer; | ||
1188 | } __attribute__ ((packed)); | ||
1189 | |||
1190 | /* Sleep states. 3945 and 4965 identical. */ | ||
1191 | enum { | ||
1192 | IWL_PM_NO_SLEEP = 0, | ||
1193 | IWL_PM_SLP_MAC = 1, | ||
1194 | IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2, | ||
1195 | IWL_PM_SLP_FULL_MAC_CARD_STATE = 3, | ||
1196 | IWL_PM_SLP_PHY = 4, | ||
1197 | IWL_PM_SLP_REPENT = 5, | ||
1198 | IWL_PM_WAKEUP_BY_TIMER = 6, | ||
1199 | IWL_PM_WAKEUP_BY_DRIVER = 7, | ||
1200 | IWL_PM_WAKEUP_BY_RFKILL = 8, | ||
1201 | /* 3 reserved */ | ||
1202 | IWL_PM_NUM_OF_MODES = 12, | ||
1203 | }; | ||
1204 | |||
1205 | /* | ||
1206 | * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response) | ||
1207 | */ | ||
1208 | #define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */ | ||
1209 | #define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */ | ||
1210 | #define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */ | ||
1211 | struct iwl3945_card_state_cmd { | ||
1212 | __le32 status; /* CARD_STATE_CMD_* request new power state */ | ||
1213 | } __attribute__ ((packed)); | ||
1214 | |||
1215 | /* | ||
1216 | * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command) | ||
1217 | */ | ||
1218 | struct iwl3945_card_state_notif { | ||
1219 | __le32 flags; | ||
1220 | } __attribute__ ((packed)); | ||
1221 | |||
1222 | #define HW_CARD_DISABLED 0x01 | ||
1223 | #define SW_CARD_DISABLED 0x02 | ||
1224 | #define RF_CARD_DISABLED 0x04 | ||
1225 | #define RXON_CARD_DISABLED 0x10 | ||
1226 | |||
1227 | struct iwl3945_ct_kill_config { | ||
1228 | __le32 reserved; | ||
1229 | __le32 critical_temperature_M; | ||
1230 | __le32 critical_temperature_R; | ||
1231 | } __attribute__ ((packed)); | ||
1232 | |||
1233 | /****************************************************************************** | ||
1234 | * (8) | ||
1235 | * Scan Commands, Responses, Notifications: | ||
1236 | * | ||
1237 | *****************************************************************************/ | ||
1238 | |||
1239 | /** | ||
1240 | * struct iwl3945_scan_channel - entry in REPLY_SCAN_CMD channel table | ||
1241 | * | ||
1242 | * One for each channel in the scan list. | ||
1243 | * Each channel can independently select: | ||
1244 | * 1) SSID for directed active scans | ||
1245 | * 2) Txpower setting (for rate specified within Tx command) | ||
1246 | * 3) How long to stay on-channel (behavior may be modified by quiet_time, | ||
1247 | * quiet_plcp_th, good_CRC_th) | ||
1248 | * | ||
1249 | * To avoid uCode errors, make sure the following are true (see comments | ||
1250 | * under struct iwl3945_scan_cmd about max_out_time and quiet_time): | ||
1251 | * 1) If using passive_dwell (i.e. passive_dwell != 0): | ||
1252 | * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0) | ||
1253 | * 2) quiet_time <= active_dwell | ||
1254 | * 3) If restricting off-channel time (i.e. max_out_time !=0): | ||
1255 | * passive_dwell < max_out_time | ||
1256 | * active_dwell < max_out_time | ||
1257 | */ | ||
1258 | struct iwl3945_scan_channel { | ||
1259 | /* | ||
1260 | * type is defined as: | ||
1261 | * 0:0 1 = active, 0 = passive | ||
1262 | * 1:4 SSID direct bit map; if a bit is set, then corresponding | ||
1263 | * SSID IE is transmitted in probe request. | ||
1264 | * 5:7 reserved | ||
1265 | */ | ||
1266 | u8 type; | ||
1267 | u8 channel; /* band is selected by iwl3945_scan_cmd "flags" field */ | ||
1268 | struct iwl3945_tx_power tpc; | ||
1269 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ | ||
1270 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ | ||
1271 | } __attribute__ ((packed)); | ||
1272 | |||
1273 | /** | ||
1274 | * struct iwl3945_ssid_ie - directed scan network information element | ||
1275 | * | ||
1276 | * Up to 4 of these may appear in REPLY_SCAN_CMD, selected by "type" field | ||
1277 | * in struct iwl3945_scan_channel; each channel may select different ssids from | ||
1278 | * among the 4 entries. SSID IEs get transmitted in reverse order of entry. | ||
1279 | */ | ||
1280 | struct iwl3945_ssid_ie { | ||
1281 | u8 id; | ||
1282 | u8 len; | ||
1283 | u8 ssid[32]; | ||
1284 | } __attribute__ ((packed)); | ||
1285 | |||
1286 | #define PROBE_OPTION_MAX 0x4 | ||
1287 | #define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF) | ||
1288 | #define IWL_GOOD_CRC_TH cpu_to_le16(1) | ||
1289 | #define IWL_MAX_SCAN_SIZE 1024 | ||
1290 | |||
1291 | /* | ||
1292 | * REPLY_SCAN_CMD = 0x80 (command) | ||
1293 | * | ||
1294 | * The hardware scan command is very powerful; the driver can set it up to | ||
1295 | * maintain (relatively) normal network traffic while doing a scan in the | ||
1296 | * background. The max_out_time and suspend_time control the ratio of how | ||
1297 | * long the device stays on an associated network channel ("service channel") | ||
1298 | * vs. how long it's away from the service channel, tuned to other channels | ||
1299 | * for scanning. | ||
1300 | * | ||
1301 | * max_out_time is the max time off-channel (in usec), and suspend_time | ||
1302 | * is how long (in "extended beacon" format) that the scan is "suspended" | ||
1303 | * after returning to the service channel. That is, suspend_time is the | ||
1304 | * time that we stay on the service channel, doing normal work, between | ||
1305 | * scan segments. The driver may set these parameters differently to support | ||
1306 | * scanning when associated vs. not associated, and light vs. heavy traffic | ||
1307 | * loads when associated. | ||
1308 | * | ||
1309 | * After receiving this command, the device's scan engine does the following; | ||
1310 | * | ||
1311 | * 1) Sends SCAN_START notification to driver | ||
1312 | * 2) Checks to see if it has time to do scan for one channel | ||
1313 | * 3) Sends NULL packet, with power-save (PS) bit set to 1, | ||
1314 | * to tell AP that we're going off-channel | ||
1315 | * 4) Tunes to first channel in scan list, does active or passive scan | ||
1316 | * 5) Sends SCAN_RESULT notification to driver | ||
1317 | * 6) Checks to see if it has time to do scan on *next* channel in list | ||
1318 | * 7) Repeats 4-6 until it no longer has time to scan the next channel | ||
1319 | * before max_out_time expires | ||
1320 | * 8) Returns to service channel | ||
1321 | * 9) Sends NULL packet with PS=0 to tell AP that we're back | ||
1322 | * 10) Stays on service channel until suspend_time expires | ||
1323 | * 11) Repeats entire process 2-10 until list is complete | ||
1324 | * 12) Sends SCAN_COMPLETE notification | ||
1325 | * | ||
1326 | * For fast, efficient scans, the scan command also has support for staying on | ||
1327 | * a channel for just a short time, if doing active scanning and getting no | ||
1328 | * responses to the transmitted probe request. This time is controlled by | ||
1329 | * quiet_time, and the number of received packets below which a channel is | ||
1330 | * considered "quiet" is controlled by quiet_plcp_threshold. | ||
1331 | * | ||
1332 | * For active scanning on channels that have regulatory restrictions against | ||
1333 | * blindly transmitting, the scan can listen before transmitting, to make sure | ||
1334 | * that there is already legitimate activity on the channel. If enough | ||
1335 | * packets are cleanly received on the channel (controlled by good_CRC_th, | ||
1336 | * typical value 1), the scan engine starts transmitting probe requests. | ||
1337 | * | ||
1338 | * Driver must use separate scan commands for 2.4 vs. 5 GHz bands. | ||
1339 | * | ||
1340 | * To avoid uCode errors, see timing restrictions described under | ||
1341 | * struct iwl3945_scan_channel. | ||
1342 | */ | ||
1343 | struct iwl3945_scan_cmd { | ||
1344 | __le16 len; | ||
1345 | u8 reserved0; | ||
1346 | u8 channel_count; /* # channels in channel list */ | ||
1347 | __le16 quiet_time; /* dwell only this # millisecs on quiet channel | ||
1348 | * (only for active scan) */ | ||
1349 | __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */ | ||
1350 | __le16 good_CRC_th; /* passive -> active promotion threshold */ | ||
1351 | __le16 reserved1; | ||
1352 | __le32 max_out_time; /* max usec to be away from associated (service) | ||
1353 | * channel */ | ||
1354 | __le32 suspend_time; /* pause scan this long (in "extended beacon | ||
1355 | * format") when returning to service channel: | ||
1356 | * 3945; 31:24 # beacons, 19:0 additional usec, | ||
1357 | * 4965; 31:22 # beacons, 21:0 additional usec. | ||
1358 | */ | ||
1359 | __le32 flags; /* RXON_FLG_* */ | ||
1360 | __le32 filter_flags; /* RXON_FILTER_* */ | ||
1361 | |||
1362 | /* For active scans (set to all-0s for passive scans). | ||
1363 | * Does not include payload. Must specify Tx rate; no rate scaling. */ | ||
1364 | struct iwl3945_tx_cmd tx_cmd; | ||
1365 | |||
1366 | /* For directed active scans (set to all-0s otherwise) */ | ||
1367 | struct iwl3945_ssid_ie direct_scan[PROBE_OPTION_MAX]; | ||
1368 | |||
1369 | /* | ||
1370 | * Probe request frame, followed by channel list. | ||
1371 | * | ||
1372 | * Size of probe request frame is specified by byte count in tx_cmd. | ||
1373 | * Channel list follows immediately after probe request frame. | ||
1374 | * Number of channels in list is specified by channel_count. | ||
1375 | * Each channel in list is of type: | ||
1376 | * | ||
1377 | * struct iwl3945_scan_channel channels[0]; | ||
1378 | * | ||
1379 | * NOTE: Only one band of channels can be scanned per pass. You | ||
1380 | * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait | ||
1381 | * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION) | ||
1382 | * before requesting another scan. | ||
1383 | */ | ||
1384 | u8 data[0]; | ||
1385 | } __attribute__ ((packed)); | ||
1386 | |||
1387 | /* Can abort will notify by complete notification with abort status. */ | ||
1388 | #define CAN_ABORT_STATUS cpu_to_le32(0x1) | ||
1389 | /* complete notification statuses */ | ||
1390 | #define ABORT_STATUS 0x2 | ||
1391 | |||
1392 | /* | ||
1393 | * REPLY_SCAN_CMD = 0x80 (response) | ||
1394 | */ | ||
1395 | struct iwl3945_scanreq_notification { | ||
1396 | __le32 status; /* 1: okay, 2: cannot fulfill request */ | ||
1397 | } __attribute__ ((packed)); | ||
1398 | |||
1399 | /* | ||
1400 | * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command) | ||
1401 | */ | ||
1402 | struct iwl3945_scanstart_notification { | ||
1403 | __le32 tsf_low; | ||
1404 | __le32 tsf_high; | ||
1405 | __le32 beacon_timer; | ||
1406 | u8 channel; | ||
1407 | u8 band; | ||
1408 | u8 reserved[2]; | ||
1409 | __le32 status; | ||
1410 | } __attribute__ ((packed)); | ||
1411 | |||
1412 | #define SCAN_OWNER_STATUS 0x1; | ||
1413 | #define MEASURE_OWNER_STATUS 0x2; | ||
1414 | |||
1415 | #define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */ | ||
1416 | /* | ||
1417 | * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command) | ||
1418 | */ | ||
1419 | struct iwl3945_scanresults_notification { | ||
1420 | u8 channel; | ||
1421 | u8 band; | ||
1422 | u8 reserved[2]; | ||
1423 | __le32 tsf_low; | ||
1424 | __le32 tsf_high; | ||
1425 | __le32 statistics[NUMBER_OF_STATISTICS]; | ||
1426 | } __attribute__ ((packed)); | ||
1427 | |||
1428 | /* | ||
1429 | * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command) | ||
1430 | */ | ||
1431 | struct iwl3945_scancomplete_notification { | ||
1432 | u8 scanned_channels; | ||
1433 | u8 status; | ||
1434 | u8 reserved; | ||
1435 | u8 last_channel; | ||
1436 | __le32 tsf_low; | ||
1437 | __le32 tsf_high; | ||
1438 | } __attribute__ ((packed)); | ||
1439 | |||
1440 | |||
1441 | /****************************************************************************** | ||
1442 | * (9) | ||
1443 | * IBSS/AP Commands and Notifications: | ||
1444 | * | ||
1445 | *****************************************************************************/ | ||
1446 | |||
1447 | /* | ||
1448 | * BEACON_NOTIFICATION = 0x90 (notification only, not a command) | ||
1449 | */ | ||
1450 | struct iwl3945_beacon_notif { | ||
1451 | struct iwl3945_tx_resp beacon_notify_hdr; | ||
1452 | __le32 low_tsf; | ||
1453 | __le32 high_tsf; | ||
1454 | __le32 ibss_mgr_status; | ||
1455 | } __attribute__ ((packed)); | ||
1456 | |||
1457 | /* | ||
1458 | * REPLY_TX_BEACON = 0x91 (command, has simple generic response) | ||
1459 | */ | ||
1460 | struct iwl3945_tx_beacon_cmd { | ||
1461 | struct iwl3945_tx_cmd tx; | ||
1462 | __le16 tim_idx; | ||
1463 | u8 tim_size; | ||
1464 | u8 reserved1; | ||
1465 | struct ieee80211_hdr frame[0]; /* beacon frame */ | ||
1466 | } __attribute__ ((packed)); | ||
1467 | |||
1468 | /****************************************************************************** | ||
1469 | * (10) | ||
1470 | * Statistics Commands and Notifications: | ||
1471 | * | ||
1472 | *****************************************************************************/ | ||
1473 | |||
1474 | #define IWL_TEMP_CONVERT 260 | ||
1475 | |||
1476 | #define SUP_RATE_11A_MAX_NUM_CHANNELS 8 | ||
1477 | #define SUP_RATE_11B_MAX_NUM_CHANNELS 4 | ||
1478 | #define SUP_RATE_11G_MAX_NUM_CHANNELS 12 | ||
1479 | |||
1480 | /* Used for passing to driver number of successes and failures per rate */ | ||
1481 | struct rate_histogram { | ||
1482 | union { | ||
1483 | __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; | ||
1484 | __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; | ||
1485 | __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; | ||
1486 | } success; | ||
1487 | union { | ||
1488 | __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; | ||
1489 | __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; | ||
1490 | __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; | ||
1491 | } failed; | ||
1492 | } __attribute__ ((packed)); | ||
1493 | |||
1494 | /* statistics command response */ | ||
1495 | |||
1496 | struct statistics_rx_phy { | ||
1497 | __le32 ina_cnt; | ||
1498 | __le32 fina_cnt; | ||
1499 | __le32 plcp_err; | ||
1500 | __le32 crc32_err; | ||
1501 | __le32 overrun_err; | ||
1502 | __le32 early_overrun_err; | ||
1503 | __le32 crc32_good; | ||
1504 | __le32 false_alarm_cnt; | ||
1505 | __le32 fina_sync_err_cnt; | ||
1506 | __le32 sfd_timeout; | ||
1507 | __le32 fina_timeout; | ||
1508 | __le32 unresponded_rts; | ||
1509 | __le32 rxe_frame_limit_overrun; | ||
1510 | __le32 sent_ack_cnt; | ||
1511 | __le32 sent_cts_cnt; | ||
1512 | } __attribute__ ((packed)); | ||
1513 | |||
1514 | struct statistics_rx_non_phy { | ||
1515 | __le32 bogus_cts; /* CTS received when not expecting CTS */ | ||
1516 | __le32 bogus_ack; /* ACK received when not expecting ACK */ | ||
1517 | __le32 non_bssid_frames; /* number of frames with BSSID that | ||
1518 | * doesn't belong to the STA BSSID */ | ||
1519 | __le32 filtered_frames; /* count frames that were dumped in the | ||
1520 | * filtering process */ | ||
1521 | __le32 non_channel_beacons; /* beacons with our bss id but not on | ||
1522 | * our serving channel */ | ||
1523 | } __attribute__ ((packed)); | ||
1524 | |||
1525 | struct statistics_rx { | ||
1526 | struct statistics_rx_phy ofdm; | ||
1527 | struct statistics_rx_phy cck; | ||
1528 | struct statistics_rx_non_phy general; | ||
1529 | } __attribute__ ((packed)); | ||
1530 | |||
1531 | struct statistics_tx { | ||
1532 | __le32 preamble_cnt; | ||
1533 | __le32 rx_detected_cnt; | ||
1534 | __le32 bt_prio_defer_cnt; | ||
1535 | __le32 bt_prio_kill_cnt; | ||
1536 | __le32 few_bytes_cnt; | ||
1537 | __le32 cts_timeout; | ||
1538 | __le32 ack_timeout; | ||
1539 | __le32 expected_ack_cnt; | ||
1540 | __le32 actual_ack_cnt; | ||
1541 | } __attribute__ ((packed)); | ||
1542 | |||
1543 | struct statistics_dbg { | ||
1544 | __le32 burst_check; | ||
1545 | __le32 burst_count; | ||
1546 | __le32 reserved[4]; | ||
1547 | } __attribute__ ((packed)); | ||
1548 | |||
1549 | struct statistics_div { | ||
1550 | __le32 tx_on_a; | ||
1551 | __le32 tx_on_b; | ||
1552 | __le32 exec_time; | ||
1553 | __le32 probe_time; | ||
1554 | } __attribute__ ((packed)); | ||
1555 | |||
1556 | struct statistics_general { | ||
1557 | __le32 temperature; | ||
1558 | struct statistics_dbg dbg; | ||
1559 | __le32 sleep_time; | ||
1560 | __le32 slots_out; | ||
1561 | __le32 slots_idle; | ||
1562 | __le32 ttl_timestamp; | ||
1563 | struct statistics_div div; | ||
1564 | } __attribute__ ((packed)); | ||
1565 | |||
1566 | /* | ||
1567 | * REPLY_STATISTICS_CMD = 0x9c, | ||
1568 | * 3945 and 4965 identical. | ||
1569 | * | ||
1570 | * This command triggers an immediate response containing uCode statistics. | ||
1571 | * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below. | ||
1572 | * | ||
1573 | * If the CLEAR_STATS configuration flag is set, uCode will clear its | ||
1574 | * internal copy of the statistics (counters) after issuing the response. | ||
1575 | * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below). | ||
1576 | * | ||
1577 | * If the DISABLE_NOTIF configuration flag is set, uCode will not issue | ||
1578 | * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag | ||
1579 | * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself. | ||
1580 | */ | ||
1581 | #define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */ | ||
1582 | #define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */ | ||
1583 | struct iwl3945_statistics_cmd { | ||
1584 | __le32 configuration_flags; /* IWL_STATS_CONF_* */ | ||
1585 | } __attribute__ ((packed)); | ||
1586 | |||
1587 | /* | ||
1588 | * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command) | ||
1589 | * | ||
1590 | * By default, uCode issues this notification after receiving a beacon | ||
1591 | * while associated. To disable this behavior, set DISABLE_NOTIF flag in the | ||
1592 | * REPLY_STATISTICS_CMD 0x9c, above. | ||
1593 | * | ||
1594 | * Statistics counters continue to increment beacon after beacon, but are | ||
1595 | * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD | ||
1596 | * 0x9c with CLEAR_STATS bit set (see above). | ||
1597 | * | ||
1598 | * uCode also issues this notification during scans. uCode clears statistics | ||
1599 | * appropriately so that each notification contains statistics for only the | ||
1600 | * one channel that has just been scanned. | ||
1601 | */ | ||
1602 | #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2) | ||
1603 | #define STATISTICS_REPLY_FLG_FAT_MODE_MSK cpu_to_le32(0x8) | ||
1604 | struct iwl3945_notif_statistics { | ||
1605 | __le32 flag; | ||
1606 | struct statistics_rx rx; | ||
1607 | struct statistics_tx tx; | ||
1608 | struct statistics_general general; | ||
1609 | } __attribute__ ((packed)); | ||
1610 | |||
1611 | |||
1612 | /* | ||
1613 | * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command) | ||
1614 | */ | ||
1615 | /* if ucode missed CONSECUTIVE_MISSED_BCONS_TH beacons in a row, | ||
1616 | * then this notification will be sent. */ | ||
1617 | #define CONSECUTIVE_MISSED_BCONS_TH 20 | ||
1618 | |||
1619 | struct iwl3945_missed_beacon_notif { | ||
1620 | __le32 consequtive_missed_beacons; | ||
1621 | __le32 total_missed_becons; | ||
1622 | __le32 num_expected_beacons; | ||
1623 | __le32 num_recvd_beacons; | ||
1624 | } __attribute__ ((packed)); | ||
1625 | |||
1626 | /****************************************************************************** | ||
1627 | * (11) | ||
1628 | * Rx Calibration Commands: | ||
1629 | * | ||
1630 | *****************************************************************************/ | ||
1631 | |||
1632 | #define PHY_CALIBRATE_DIFF_GAIN_CMD (7) | ||
1633 | #define HD_TABLE_SIZE (11) | ||
1634 | |||
1635 | struct iwl3945_sensitivity_cmd { | ||
1636 | __le16 control; | ||
1637 | __le16 table[HD_TABLE_SIZE]; | ||
1638 | } __attribute__ ((packed)); | ||
1639 | |||
1640 | struct iwl3945_calibration_cmd { | ||
1641 | u8 opCode; | ||
1642 | u8 flags; | ||
1643 | __le16 reserved; | ||
1644 | s8 diff_gain_a; | ||
1645 | s8 diff_gain_b; | ||
1646 | s8 diff_gain_c; | ||
1647 | u8 reserved1; | ||
1648 | } __attribute__ ((packed)); | ||
1649 | |||
1650 | /****************************************************************************** | ||
1651 | * (12) | ||
1652 | * Miscellaneous Commands: | ||
1653 | * | ||
1654 | *****************************************************************************/ | ||
1655 | |||
1656 | /* | ||
1657 | * LEDs Command & Response | ||
1658 | * REPLY_LEDS_CMD = 0x48 (command, has simple generic response) | ||
1659 | * | ||
1660 | * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field), | ||
1661 | * this command turns it on or off, or sets up a periodic blinking cycle. | ||
1662 | */ | ||
1663 | struct iwl3945_led_cmd { | ||
1664 | __le32 interval; /* "interval" in uSec */ | ||
1665 | u8 id; /* 1: Activity, 2: Link, 3: Tech */ | ||
1666 | u8 off; /* # intervals off while blinking; | ||
1667 | * "0", with >0 "on" value, turns LED on */ | ||
1668 | u8 on; /* # intervals on while blinking; | ||
1669 | * "0", regardless of "off", turns LED off */ | ||
1670 | u8 reserved; | ||
1671 | } __attribute__ ((packed)); | ||
1672 | |||
1673 | /****************************************************************************** | ||
1674 | * (13) | ||
1675 | * Union of all expected notifications/responses: | ||
1676 | * | ||
1677 | *****************************************************************************/ | ||
1678 | |||
1679 | struct iwl3945_rx_packet { | ||
1680 | __le32 len; | ||
1681 | struct iwl3945_cmd_header hdr; | ||
1682 | union { | ||
1683 | struct iwl3945_alive_resp alive_frame; | ||
1684 | struct iwl3945_rx_frame rx_frame; | ||
1685 | struct iwl3945_tx_resp tx_resp; | ||
1686 | struct iwl3945_spectrum_notification spectrum_notif; | ||
1687 | struct iwl3945_csa_notification csa_notif; | ||
1688 | struct iwl3945_error_resp err_resp; | ||
1689 | struct iwl3945_card_state_notif card_state_notif; | ||
1690 | struct iwl3945_beacon_notif beacon_status; | ||
1691 | struct iwl3945_add_sta_resp add_sta; | ||
1692 | struct iwl3945_sleep_notification sleep_notif; | ||
1693 | struct iwl3945_spectrum_resp spectrum; | ||
1694 | struct iwl3945_notif_statistics stats; | ||
1695 | __le32 status; | ||
1696 | u8 raw[0]; | ||
1697 | } u; | ||
1698 | } __attribute__ ((packed)); | ||
1699 | |||
1700 | #define IWL_RX_FRAME_SIZE (4 + sizeof(struct iwl3945_rx_frame)) | ||
1701 | |||
1702 | #endif /* __iwl3945_3945_commands_h__ */ | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-debug.h b/drivers/net/wireless/iwlwifi/iwl-3945-debug.h deleted file mode 100644 index 85eb778f9df1..000000000000 --- a/drivers/net/wireless/iwlwifi/iwl-3945-debug.h +++ /dev/null | |||
@@ -1,167 +0,0 @@ | |||
1 | /****************************************************************************** | ||
2 | * | ||
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | ||
4 | * | ||
5 | * Portions of this file are derived from the ipw3945 project. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of version 2 of the GNU General Public License as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | * more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along with | ||
17 | * this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | ||
19 | * | ||
20 | * The full GNU General Public License is included in this distribution in the | ||
21 | * file called LICENSE. | ||
22 | * | ||
23 | * Contact Information: | ||
24 | * Intel Linux Wireless <ilw@linux.intel.com> | ||
25 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
26 | * | ||
27 | *****************************************************************************/ | ||
28 | |||
29 | #ifndef __iwl3945_debug_h__ | ||
30 | #define __iwl3945_debug_h__ | ||
31 | |||
32 | #ifdef CONFIG_IWL3945_DEBUG | ||
33 | extern u32 iwl3945_debug_level; | ||
34 | #define IWL_DEBUG(level, fmt, args...) \ | ||
35 | do { if (iwl3945_debug_level & (level)) \ | ||
36 | printk(KERN_ERR DRV_NAME": %c %s " fmt, \ | ||
37 | in_interrupt() ? 'I' : 'U', __func__ , ## args); } while (0) | ||
38 | |||
39 | #define IWL_DEBUG_LIMIT(level, fmt, args...) \ | ||
40 | do { if ((iwl3945_debug_level & (level)) && net_ratelimit()) \ | ||
41 | printk(KERN_ERR DRV_NAME": %c %s " fmt, \ | ||
42 | in_interrupt() ? 'I' : 'U', __func__ , ## args); } while (0) | ||
43 | |||
44 | static inline void iwl3945_print_hex_dump(int level, void *p, u32 len) | ||
45 | { | ||
46 | if (!(iwl3945_debug_level & level)) | ||
47 | return; | ||
48 | |||
49 | print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1, | ||
50 | p, len, 1); | ||
51 | } | ||
52 | #else | ||
53 | static inline void IWL_DEBUG(int level, const char *fmt, ...) | ||
54 | { | ||
55 | } | ||
56 | static inline void IWL_DEBUG_LIMIT(int level, const char *fmt, ...) | ||
57 | { | ||
58 | } | ||
59 | static inline void iwl3945_print_hex_dump(int level, void *p, u32 len) | ||
60 | { | ||
61 | } | ||
62 | #endif /* CONFIG_IWL3945_DEBUG */ | ||
63 | |||
64 | |||
65 | |||
66 | /* | ||
67 | * To use the debug system; | ||
68 | * | ||
69 | * If you are defining a new debug classification, simply add it to the #define | ||
70 | * list here in the form of: | ||
71 | * | ||
72 | * #define IWL_DL_xxxx VALUE | ||
73 | * | ||
74 | * shifting value to the left one bit from the previous entry. xxxx should be | ||
75 | * the name of the classification (for example, WEP) | ||
76 | * | ||
77 | * You then need to either add a IWL_xxxx_DEBUG() macro definition for your | ||
78 | * classification, or use IWL_DEBUG(IWL_DL_xxxx, ...) whenever you want | ||
79 | * to send output to that classification. | ||
80 | * | ||
81 | * To add your debug level to the list of levels seen when you perform | ||
82 | * | ||
83 | * % cat /proc/net/iwl/debug_level | ||
84 | * | ||
85 | * you simply need to add your entry to the iwl3945_debug_levels array. | ||
86 | * | ||
87 | * If you do not see debug_level in /proc/net/iwl then you do not have | ||
88 | * CONFIG_IWL3945_DEBUG defined in your kernel configuration | ||
89 | * | ||
90 | */ | ||
91 | |||
92 | #define IWL_DL_INFO (1 << 0) | ||
93 | #define IWL_DL_MAC80211 (1 << 1) | ||
94 | #define IWL_DL_HOST_COMMAND (1 << 2) | ||
95 | #define IWL_DL_STATE (1 << 3) | ||
96 | |||
97 | #define IWL_DL_RADIO (1 << 7) | ||
98 | #define IWL_DL_POWER (1 << 8) | ||
99 | #define IWL_DL_TEMP (1 << 9) | ||
100 | |||
101 | #define IWL_DL_NOTIF (1 << 10) | ||
102 | #define IWL_DL_SCAN (1 << 11) | ||
103 | #define IWL_DL_ASSOC (1 << 12) | ||
104 | #define IWL_DL_DROP (1 << 13) | ||
105 | |||
106 | #define IWL_DL_TXPOWER (1 << 14) | ||
107 | |||
108 | #define IWL_DL_AP (1 << 15) | ||
109 | |||
110 | #define IWL_DL_FW (1 << 16) | ||
111 | #define IWL_DL_RF_KILL (1 << 17) | ||
112 | #define IWL_DL_FW_ERRORS (1 << 18) | ||
113 | |||
114 | #define IWL_DL_LED (1 << 19) | ||
115 | |||
116 | #define IWL_DL_RATE (1 << 20) | ||
117 | |||
118 | #define IWL_DL_CALIB (1 << 21) | ||
119 | #define IWL_DL_WEP (1 << 22) | ||
120 | #define IWL_DL_TX (1 << 23) | ||
121 | #define IWL_DL_RX (1 << 24) | ||
122 | #define IWL_DL_ISR (1 << 25) | ||
123 | #define IWL_DL_HT (1 << 26) | ||
124 | #define IWL_DL_IO (1 << 27) | ||
125 | #define IWL_DL_11H (1 << 28) | ||
126 | |||
127 | #define IWL_DL_STATS (1 << 29) | ||
128 | #define IWL_DL_TX_REPLY (1 << 30) | ||
129 | #define IWL_DL_QOS (1 << 31) | ||
130 | |||
131 | #define IWL_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a) | ||
132 | #define IWL_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a) | ||
133 | #define IWL_DEBUG_INFO(f, a...) IWL_DEBUG(IWL_DL_INFO, f, ## a) | ||
134 | |||
135 | #define IWL_DEBUG_MAC80211(f, a...) IWL_DEBUG(IWL_DL_MAC80211, f, ## a) | ||
136 | #define IWL_DEBUG_TEMP(f, a...) IWL_DEBUG(IWL_DL_TEMP, f, ## a) | ||
137 | #define IWL_DEBUG_SCAN(f, a...) IWL_DEBUG(IWL_DL_SCAN, f, ## a) | ||
138 | #define IWL_DEBUG_RX(f, a...) IWL_DEBUG(IWL_DL_RX, f, ## a) | ||
139 | #define IWL_DEBUG_TX(f, a...) IWL_DEBUG(IWL_DL_TX, f, ## a) | ||
140 | #define IWL_DEBUG_ISR(f, a...) IWL_DEBUG(IWL_DL_ISR, f, ## a) | ||
141 | #define IWL_DEBUG_LED(f, a...) IWL_DEBUG(IWL_DL_LED, f, ## a) | ||
142 | #define IWL_DEBUG_WEP(f, a...) IWL_DEBUG(IWL_DL_WEP, f, ## a) | ||
143 | #define IWL_DEBUG_HC(f, a...) IWL_DEBUG(IWL_DL_HOST_COMMAND, f, ## a) | ||
144 | #define IWL_DEBUG_CALIB(f, a...) IWL_DEBUG(IWL_DL_CALIB, f, ## a) | ||
145 | #define IWL_DEBUG_FW(f, a...) IWL_DEBUG(IWL_DL_FW, f, ## a) | ||
146 | #define IWL_DEBUG_RF_KILL(f, a...) IWL_DEBUG(IWL_DL_RF_KILL, f, ## a) | ||
147 | #define IWL_DEBUG_DROP(f, a...) IWL_DEBUG(IWL_DL_DROP, f, ## a) | ||
148 | #define IWL_DEBUG_DROP_LIMIT(f, a...) IWL_DEBUG_LIMIT(IWL_DL_DROP, f, ## a) | ||
149 | #define IWL_DEBUG_AP(f, a...) IWL_DEBUG(IWL_DL_AP, f, ## a) | ||
150 | #define IWL_DEBUG_TXPOWER(f, a...) IWL_DEBUG(IWL_DL_TXPOWER, f, ## a) | ||
151 | #define IWL_DEBUG_IO(f, a...) IWL_DEBUG(IWL_DL_IO, f, ## a) | ||
152 | #define IWL_DEBUG_RATE(f, a...) IWL_DEBUG(IWL_DL_RATE, f, ## a) | ||
153 | #define IWL_DEBUG_RATE_LIMIT(f, a...) IWL_DEBUG_LIMIT(IWL_DL_RATE, f, ## a) | ||
154 | #define IWL_DEBUG_NOTIF(f, a...) IWL_DEBUG(IWL_DL_NOTIF, f, ## a) | ||
155 | #define IWL_DEBUG_ASSOC(f, a...) IWL_DEBUG(IWL_DL_ASSOC | IWL_DL_INFO, f, ## a) | ||
156 | #define IWL_DEBUG_ASSOC_LIMIT(f, a...) \ | ||
157 | IWL_DEBUG_LIMIT(IWL_DL_ASSOC | IWL_DL_INFO, f, ## a) | ||
158 | #define IWL_DEBUG_HT(f, a...) IWL_DEBUG(IWL_DL_HT, f, ## a) | ||
159 | #define IWL_DEBUG_STATS(f, a...) IWL_DEBUG(IWL_DL_STATS, f, ## a) | ||
160 | #define IWL_DEBUG_STATS_LIMIT(f, a...) IWL_DEBUG_LIMIT(IWL_DL_STATS, f, ## a) | ||
161 | #define IWL_DEBUG_TX_REPLY(f, a...) IWL_DEBUG(IWL_DL_TX_REPLY, f, ## a) | ||
162 | #define IWL_DEBUG_QOS(f, a...) IWL_DEBUG(IWL_DL_QOS, f, ## a) | ||
163 | #define IWL_DEBUG_RADIO(f, a...) IWL_DEBUG(IWL_DL_RADIO, f, ## a) | ||
164 | #define IWL_DEBUG_POWER(f, a...) IWL_DEBUG(IWL_DL_POWER, f, ## a) | ||
165 | #define IWL_DEBUG_11H(f, a...) IWL_DEBUG(IWL_DL_11H, f, ## a) | ||
166 | |||
167 | #endif | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-fh.h b/drivers/net/wireless/iwlwifi/iwl-3945-fh.h new file mode 100644 index 000000000000..08ce259a0e60 --- /dev/null +++ b/drivers/net/wireless/iwlwifi/iwl-3945-fh.h | |||
@@ -0,0 +1,188 @@ | |||
1 | /****************************************************************************** | ||
2 | * | ||
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | ||
4 | * redistributing this file, you may do so under either license. | ||
5 | * | ||
6 | * GPL LICENSE SUMMARY | ||
7 | * | ||
8 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of version 2 of the GNU General Public License as | ||
12 | * published by the Free Software Foundation. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, but | ||
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
17 | * General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | ||
22 | * USA | ||
23 | * | ||
24 | * The full GNU General Public License is included in this distribution | ||
25 | * in the file called LICENSE.GPL. | ||
26 | * | ||
27 | * Contact Information: | ||
28 | * Intel Linux Wireless <ilw@linux.intel.com> | ||
29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
30 | * | ||
31 | * BSD LICENSE | ||
32 | * | ||
33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. | ||
34 | * All rights reserved. | ||
35 | * | ||
36 | * Redistribution and use in source and binary forms, with or without | ||
37 | * modification, are permitted provided that the following conditions | ||
38 | * are met: | ||
39 | * | ||
40 | * * Redistributions of source code must retain the above copyright | ||
41 | * notice, this list of conditions and the following disclaimer. | ||
42 | * * Redistributions in binary form must reproduce the above copyright | ||
43 | * notice, this list of conditions and the following disclaimer in | ||
44 | * the documentation and/or other materials provided with the | ||
45 | * distribution. | ||
46 | * * Neither the name Intel Corporation nor the names of its | ||
47 | * contributors may be used to endorse or promote products derived | ||
48 | * from this software without specific prior written permission. | ||
49 | * | ||
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
61 | * | ||
62 | *****************************************************************************/ | ||
63 | #ifndef __iwl_3945_fh_h__ | ||
64 | #define __iwl_3945_fh_h__ | ||
65 | |||
66 | /************************************/ | ||
67 | /* iwl3945 Flow Handler Definitions */ | ||
68 | /************************************/ | ||
69 | |||
70 | /** | ||
71 | * This I/O area is directly read/writable by driver (e.g. Linux uses writel()) | ||
72 | * Addresses are offsets from device's PCI hardware base address. | ||
73 | */ | ||
74 | #define FH39_MEM_LOWER_BOUND (0x0800) | ||
75 | #define FH39_MEM_UPPER_BOUND (0x1000) | ||
76 | |||
77 | #define FH39_CBCC_TABLE (FH39_MEM_LOWER_BOUND + 0x140) | ||
78 | #define FH39_TFDB_TABLE (FH39_MEM_LOWER_BOUND + 0x180) | ||
79 | #define FH39_RCSR_TABLE (FH39_MEM_LOWER_BOUND + 0x400) | ||
80 | #define FH39_RSSR_TABLE (FH39_MEM_LOWER_BOUND + 0x4c0) | ||
81 | #define FH39_TCSR_TABLE (FH39_MEM_LOWER_BOUND + 0x500) | ||
82 | #define FH39_TSSR_TABLE (FH39_MEM_LOWER_BOUND + 0x680) | ||
83 | |||
84 | /* TFDB (Transmit Frame Buffer Descriptor) */ | ||
85 | #define FH39_TFDB(_ch, buf) (FH39_TFDB_TABLE + \ | ||
86 | ((_ch) * 2 + (buf)) * 0x28) | ||
87 | #define FH39_TFDB_CHNL_BUF_CTRL_REG(_ch) (FH39_TFDB_TABLE + 0x50 * (_ch)) | ||
88 | |||
89 | /* CBCC channel is [0,2] */ | ||
90 | #define FH39_CBCC(_ch) (FH39_CBCC_TABLE + (_ch) * 0x8) | ||
91 | #define FH39_CBCC_CTRL(_ch) (FH39_CBCC(_ch) + 0x00) | ||
92 | #define FH39_CBCC_BASE(_ch) (FH39_CBCC(_ch) + 0x04) | ||
93 | |||
94 | /* RCSR channel is [0,2] */ | ||
95 | #define FH39_RCSR(_ch) (FH39_RCSR_TABLE + (_ch) * 0x40) | ||
96 | #define FH39_RCSR_CONFIG(_ch) (FH39_RCSR(_ch) + 0x00) | ||
97 | #define FH39_RCSR_RBD_BASE(_ch) (FH39_RCSR(_ch) + 0x04) | ||
98 | #define FH39_RCSR_WPTR(_ch) (FH39_RCSR(_ch) + 0x20) | ||
99 | #define FH39_RCSR_RPTR_ADDR(_ch) (FH39_RCSR(_ch) + 0x24) | ||
100 | |||
101 | #define FH39_RSCSR_CHNL0_WPTR (FH39_RCSR_WPTR(0)) | ||
102 | |||
103 | /* RSSR */ | ||
104 | #define FH39_RSSR_CTRL (FH39_RSSR_TABLE + 0x000) | ||
105 | #define FH39_RSSR_STATUS (FH39_RSSR_TABLE + 0x004) | ||
106 | |||
107 | /* TCSR */ | ||
108 | #define FH39_TCSR(_ch) (FH39_TCSR_TABLE + (_ch) * 0x20) | ||
109 | #define FH39_TCSR_CONFIG(_ch) (FH39_TCSR(_ch) + 0x00) | ||
110 | #define FH39_TCSR_CREDIT(_ch) (FH39_TCSR(_ch) + 0x04) | ||
111 | #define FH39_TCSR_BUFF_STTS(_ch) (FH39_TCSR(_ch) + 0x08) | ||
112 | |||
113 | /* TSSR */ | ||
114 | #define FH39_TSSR_CBB_BASE (FH39_TSSR_TABLE + 0x000) | ||
115 | #define FH39_TSSR_MSG_CONFIG (FH39_TSSR_TABLE + 0x008) | ||
116 | #define FH39_TSSR_TX_STATUS (FH39_TSSR_TABLE + 0x010) | ||
117 | |||
118 | |||
119 | /* DBM */ | ||
120 | |||
121 | #define FH39_SRVC_CHNL (6) | ||
122 | |||
123 | #define FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE (20) | ||
124 | #define FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH (4) | ||
125 | |||
126 | #define FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN (0x08000000) | ||
127 | |||
128 | #define FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE (0x80000000) | ||
129 | |||
130 | #define FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE (0x20000000) | ||
131 | |||
132 | #define FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 (0x01000000) | ||
133 | |||
134 | #define FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST (0x00001000) | ||
135 | |||
136 | #define FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH (0x00000000) | ||
137 | |||
138 | #define FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF (0x00000000) | ||
139 | #define FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_DRIVER (0x00000001) | ||
140 | |||
141 | #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE_VAL (0x00000000) | ||
142 | #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL (0x00000008) | ||
143 | |||
144 | #define FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD (0x00200000) | ||
145 | |||
146 | #define FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT (0x00000000) | ||
147 | |||
148 | #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE (0x00000000) | ||
149 | #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE (0x80000000) | ||
150 | |||
151 | #define FH39_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID (0x00004000) | ||
152 | |||
153 | #define FH39_TCSR_CHNL_TX_BUF_STS_REG_BIT_TFDB_WPTR (0x00000001) | ||
154 | |||
155 | #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON (0xFF000000) | ||
156 | #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON (0x00FF0000) | ||
157 | |||
158 | #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B (0x00000400) | ||
159 | |||
160 | #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON (0x00000100) | ||
161 | #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON (0x00000080) | ||
162 | |||
163 | #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH (0x00000020) | ||
164 | #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH (0x00000005) | ||
165 | |||
166 | #define FH39_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_ch) (BIT(_ch) << 24) | ||
167 | #define FH39_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_ch) (BIT(_ch) << 16) | ||
168 | |||
169 | #define FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(_ch) \ | ||
170 | (FH39_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_ch) | \ | ||
171 | FH39_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_ch)) | ||
172 | |||
173 | #define FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE (0x01000000) | ||
174 | |||
175 | struct iwl3945_tfd_tb { | ||
176 | __le32 addr; | ||
177 | __le32 len; | ||
178 | } __attribute__ ((packed)); | ||
179 | |||
180 | struct iwl3945_tfd { | ||
181 | __le32 control_flags; | ||
182 | struct iwl3945_tfd_tb tbs[4]; | ||
183 | u8 __pad[28]; | ||
184 | } __attribute__ ((packed)); | ||
185 | |||
186 | |||
187 | #endif /* __iwl_3945_fh_h__ */ | ||
188 | |||
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-hw.h b/drivers/net/wireless/iwlwifi/iwl-3945-hw.h index 94ea0e60c410..1327b2ac1c53 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945-hw.h +++ b/drivers/net/wireless/iwlwifi/iwl-3945-hw.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -69,77 +69,26 @@ | |||
69 | #ifndef __iwl_3945_hw__ | 69 | #ifndef __iwl_3945_hw__ |
70 | #define __iwl_3945_hw__ | 70 | #define __iwl_3945_hw__ |
71 | 71 | ||
72 | #include "iwl-eeprom.h" | ||
73 | |||
72 | /* | 74 | /* |
73 | * uCode queue management definitions ... | 75 | * uCode queue management definitions ... |
74 | * Queue #4 is the command queue for 3945 and 4965. | 76 | * Queue #4 is the command queue for 3945 and 4965. |
75 | */ | 77 | */ |
76 | #define IWL_CMD_QUEUE_NUM 4 | 78 | #define IWL_CMD_QUEUE_NUM 4 |
77 | |||
78 | /* Tx rates */ | ||
79 | #define IWL_CCK_RATES 4 | ||
80 | #define IWL_OFDM_RATES 8 | ||
81 | #define IWL_HT_RATES 0 | ||
82 | #define IWL_MAX_RATES (IWL_CCK_RATES+IWL_OFDM_RATES+IWL_HT_RATES) | ||
83 | 79 | ||
84 | /* Time constants */ | 80 | /* Time constants */ |
85 | #define SHORT_SLOT_TIME 9 | 81 | #define SHORT_SLOT_TIME 9 |
86 | #define LONG_SLOT_TIME 20 | 82 | #define LONG_SLOT_TIME 20 |
87 | 83 | ||
88 | /* RSSI to dBm */ | 84 | /* RSSI to dBm */ |
89 | #define IWL_RSSI_OFFSET 95 | 85 | #define IWL39_RSSI_OFFSET 95 |
90 | 86 | ||
91 | /* | 87 | /* |
92 | * EEPROM related constants, enums, and structures. | 88 | * EEPROM related constants, enums, and structures. |
93 | */ | 89 | */ |
94 | |||
95 | /* | ||
96 | * EEPROM access time values: | ||
97 | * | ||
98 | * Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG, | ||
99 | * then clearing (with subsequent read/modify/write) CSR_EEPROM_REG bit | ||
100 | * CSR_EEPROM_REG_BIT_CMD (0x2). | ||
101 | * Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1). | ||
102 | * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec. | ||
103 | * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG. | ||
104 | */ | ||
105 | #define IWL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */ | ||
106 | |||
107 | /* | ||
108 | * Regulatory channel usage flags in EEPROM struct iwl_eeprom_channel.flags. | ||
109 | * | ||
110 | * IBSS and/or AP operation is allowed *only* on those channels with | ||
111 | * (VALID && IBSS && ACTIVE && !RADAR). This restriction is in place because | ||
112 | * RADAR detection is not supported by the 3945 driver, but is a | ||
113 | * requirement for establishing a new network for legal operation on channels | ||
114 | * requiring RADAR detection or restricting ACTIVE scanning. | ||
115 | * | ||
116 | * NOTE: "WIDE" flag indicates that 20 MHz channel is supported; | ||
117 | * 3945 does not support FAT 40 MHz-wide channels. | ||
118 | * | ||
119 | * NOTE: Using a channel inappropriately will result in a uCode error! | ||
120 | */ | ||
121 | enum { | ||
122 | EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */ | ||
123 | EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */ | ||
124 | /* Bit 2 Reserved */ | ||
125 | EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */ | ||
126 | EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */ | ||
127 | EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */ | ||
128 | /* Bit 6 Reserved (was Narrow Channel) */ | ||
129 | EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */ | ||
130 | }; | ||
131 | |||
132 | /* SKU Capabilities */ | ||
133 | #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0) | ||
134 | #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1) | ||
135 | #define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7) | 90 | #define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7) |
136 | 91 | ||
137 | /* *regulatory* channel data from eeprom, one for each channel */ | ||
138 | struct iwl3945_eeprom_channel { | ||
139 | u8 flags; /* flags copied from EEPROM */ | ||
140 | s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */ | ||
141 | } __attribute__ ((packed)); | ||
142 | |||
143 | /* | 92 | /* |
144 | * Mapping of a Tx power level, at factory calibration temperature, | 93 | * Mapping of a Tx power level, at factory calibration temperature, |
145 | * to a radio/DSP gain table index. | 94 | * to a radio/DSP gain table index. |
@@ -233,7 +182,7 @@ struct iwl3945_eeprom { | |||
233 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 | 182 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 |
234 | */ | 183 | */ |
235 | u16 band_1_count; /* abs.ofs: 196 */ | 184 | u16 band_1_count; /* abs.ofs: 196 */ |
236 | struct iwl3945_eeprom_channel band_1_channels[14]; /* abs.ofs: 196 */ | 185 | struct iwl_eeprom_channel band_1_channels[14]; /* abs.ofs: 198 */ |
237 | 186 | ||
238 | /* | 187 | /* |
239 | * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196, | 188 | * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196, |
@@ -241,28 +190,28 @@ struct iwl3945_eeprom { | |||
241 | * (4915-5080MHz) (none of these is ever supported) | 190 | * (4915-5080MHz) (none of these is ever supported) |
242 | */ | 191 | */ |
243 | u16 band_2_count; /* abs.ofs: 226 */ | 192 | u16 band_2_count; /* abs.ofs: 226 */ |
244 | struct iwl3945_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */ | 193 | struct iwl_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */ |
245 | 194 | ||
246 | /* | 195 | /* |
247 | * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 | 196 | * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 |
248 | * (5170-5320MHz) | 197 | * (5170-5320MHz) |
249 | */ | 198 | */ |
250 | u16 band_3_count; /* abs.ofs: 254 */ | 199 | u16 band_3_count; /* abs.ofs: 254 */ |
251 | struct iwl3945_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */ | 200 | struct iwl_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */ |
252 | 201 | ||
253 | /* | 202 | /* |
254 | * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 | 203 | * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 |
255 | * (5500-5700MHz) | 204 | * (5500-5700MHz) |
256 | */ | 205 | */ |
257 | u16 band_4_count; /* abs.ofs: 280 */ | 206 | u16 band_4_count; /* abs.ofs: 280 */ |
258 | struct iwl3945_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */ | 207 | struct iwl_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */ |
259 | 208 | ||
260 | /* | 209 | /* |
261 | * 5.7 GHz channels 145, 149, 153, 157, 161, 165 | 210 | * 5.7 GHz channels 145, 149, 153, 157, 161, 165 |
262 | * (5725-5825MHz) | 211 | * (5725-5825MHz) |
263 | */ | 212 | */ |
264 | u16 band_5_count; /* abs.ofs: 304 */ | 213 | u16 band_5_count; /* abs.ofs: 304 */ |
265 | struct iwl3945_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */ | 214 | struct iwl_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */ |
266 | 215 | ||
267 | u8 reserved9[194]; | 216 | u8 reserved9[194]; |
268 | 217 | ||
@@ -276,125 +225,21 @@ struct iwl3945_eeprom { | |||
276 | u8 reserved16[172]; /* fill out to full 1024 byte block */ | 225 | u8 reserved16[172]; /* fill out to full 1024 byte block */ |
277 | } __attribute__ ((packed)); | 226 | } __attribute__ ((packed)); |
278 | 227 | ||
279 | #define IWL_EEPROM_IMAGE_SIZE 1024 | 228 | #define IWL3945_EEPROM_IMG_SIZE 1024 |
280 | 229 | ||
281 | /* End of EEPROM */ | 230 | /* End of EEPROM */ |
282 | 231 | ||
283 | 232 | ||
284 | #include "iwl-3945-commands.h" | ||
285 | |||
286 | #define PCI_LINK_CTRL 0x0F0 | 233 | #define PCI_LINK_CTRL 0x0F0 |
287 | #define PCI_POWER_SOURCE 0x0C8 | 234 | #define PCI_POWER_SOURCE 0x0C8 |
288 | #define PCI_REG_WUM8 0x0E8 | 235 | #define PCI_REG_WUM8 0x0E8 |
289 | #define PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT (0x80000000) | 236 | #define PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT (0x80000000) |
290 | 237 | ||
291 | /*=== FH (data Flow Handler) ===*/ | ||
292 | #define FH_BASE (0x800) | ||
293 | |||
294 | #define FH_CBCC_TABLE (FH_BASE+0x140) | ||
295 | #define FH_TFDB_TABLE (FH_BASE+0x180) | ||
296 | #define FH_RCSR_TABLE (FH_BASE+0x400) | ||
297 | #define FH_RSSR_TABLE (FH_BASE+0x4c0) | ||
298 | #define FH_TCSR_TABLE (FH_BASE+0x500) | ||
299 | #define FH_TSSR_TABLE (FH_BASE+0x680) | ||
300 | |||
301 | /* TFDB (Transmit Frame Buffer Descriptor) */ | ||
302 | #define FH_TFDB(_channel, buf) \ | ||
303 | (FH_TFDB_TABLE+((_channel)*2+(buf))*0x28) | ||
304 | #define ALM_FH_TFDB_CHNL_BUF_CTRL_REG(_channel) \ | ||
305 | (FH_TFDB_TABLE + 0x50 * _channel) | ||
306 | /* CBCC _channel is [0,2] */ | ||
307 | #define FH_CBCC(_channel) (FH_CBCC_TABLE+(_channel)*0x8) | ||
308 | #define FH_CBCC_CTRL(_channel) (FH_CBCC(_channel)+0x00) | ||
309 | #define FH_CBCC_BASE(_channel) (FH_CBCC(_channel)+0x04) | ||
310 | |||
311 | /* RCSR _channel is [0,2] */ | ||
312 | #define FH_RCSR(_channel) (FH_RCSR_TABLE+(_channel)*0x40) | ||
313 | #define FH_RCSR_CONFIG(_channel) (FH_RCSR(_channel)+0x00) | ||
314 | #define FH_RCSR_RBD_BASE(_channel) (FH_RCSR(_channel)+0x04) | ||
315 | #define FH_RCSR_WPTR(_channel) (FH_RCSR(_channel)+0x20) | ||
316 | #define FH_RCSR_RPTR_ADDR(_channel) (FH_RCSR(_channel)+0x24) | ||
317 | |||
318 | #define FH_RSCSR_CHNL0_WPTR (FH_RCSR_WPTR(0)) | ||
319 | |||
320 | /* RSSR */ | ||
321 | #define FH_RSSR_CTRL (FH_RSSR_TABLE+0x000) | ||
322 | #define FH_RSSR_STATUS (FH_RSSR_TABLE+0x004) | ||
323 | #define FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE (0x01000000) | ||
324 | /* TCSR */ | ||
325 | #define FH_TCSR(_channel) (FH_TCSR_TABLE+(_channel)*0x20) | ||
326 | #define FH_TCSR_CONFIG(_channel) (FH_TCSR(_channel)+0x00) | ||
327 | #define FH_TCSR_CREDIT(_channel) (FH_TCSR(_channel)+0x04) | ||
328 | #define FH_TCSR_BUFF_STTS(_channel) (FH_TCSR(_channel)+0x08) | ||
329 | /* TSSR */ | ||
330 | #define FH_TSSR_CBB_BASE (FH_TSSR_TABLE+0x000) | ||
331 | #define FH_TSSR_MSG_CONFIG (FH_TSSR_TABLE+0x008) | ||
332 | #define FH_TSSR_TX_STATUS (FH_TSSR_TABLE+0x010) | ||
333 | |||
334 | |||
335 | /* DBM */ | ||
336 | |||
337 | #define ALM_FH_SRVC_CHNL (6) | ||
338 | |||
339 | #define ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE (20) | ||
340 | #define ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH (4) | ||
341 | |||
342 | #define ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN (0x08000000) | ||
343 | |||
344 | #define ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE (0x80000000) | ||
345 | |||
346 | #define ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE (0x20000000) | ||
347 | |||
348 | #define ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 (0x01000000) | ||
349 | |||
350 | #define ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST (0x00001000) | ||
351 | |||
352 | #define ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH (0x00000000) | ||
353 | |||
354 | #define ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF (0x00000000) | ||
355 | #define ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_DRIVER (0x00000001) | ||
356 | |||
357 | #define ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE_VAL (0x00000000) | ||
358 | #define ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL (0x00000008) | ||
359 | |||
360 | #define ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD (0x00200000) | ||
361 | |||
362 | #define ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT (0x00000000) | ||
363 | |||
364 | #define ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE (0x00000000) | ||
365 | #define ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE (0x80000000) | ||
366 | |||
367 | #define ALM_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID (0x00004000) | ||
368 | |||
369 | #define ALM_FH_TCSR_CHNL_TX_BUF_STS_REG_BIT_TFDB_WPTR (0x00000001) | ||
370 | |||
371 | #define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON (0xFF000000) | ||
372 | #define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON (0x00FF0000) | ||
373 | |||
374 | #define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B (0x00000400) | ||
375 | |||
376 | #define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON (0x00000100) | ||
377 | #define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON (0x00000080) | ||
378 | |||
379 | #define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH (0x00000020) | ||
380 | #define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH (0x00000005) | ||
381 | |||
382 | #define ALM_TB_MAX_BYTES_COUNT (0xFFF0) | ||
383 | |||
384 | #define ALM_FH_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_channel) \ | ||
385 | ((1LU << _channel) << 24) | ||
386 | #define ALM_FH_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_channel) \ | ||
387 | ((1LU << _channel) << 16) | ||
388 | |||
389 | #define ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(_channel) \ | ||
390 | (ALM_FH_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_channel) | \ | ||
391 | ALM_FH_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_channel)) | ||
392 | #define PCI_CFG_REV_ID_BIT_BASIC_SKU (0x40) /* bit 6 */ | 238 | #define PCI_CFG_REV_ID_BIT_BASIC_SKU (0x40) /* bit 6 */ |
393 | #define PCI_CFG_REV_ID_BIT_RTP (0x80) /* bit 7 */ | 239 | #define PCI_CFG_REV_ID_BIT_RTP (0x80) /* bit 7 */ |
394 | 240 | ||
395 | #define TFD_QUEUE_MIN 0 | 241 | #define TFD_QUEUE_MIN 0 |
396 | #define TFD_QUEUE_MAX 6 | 242 | #define TFD_QUEUE_MAX 6 |
397 | #define TFD_QUEUE_SIZE_MAX (256) | ||
398 | 243 | ||
399 | #define IWL_NUM_SCAN_RATES (2) | 244 | #define IWL_NUM_SCAN_RATES (2) |
400 | 245 | ||
@@ -416,12 +261,6 @@ struct iwl3945_eeprom { | |||
416 | #define TFD_CTL_PAD_SET(n) (n << 28) | 261 | #define TFD_CTL_PAD_SET(n) (n << 28) |
417 | #define TFD_CTL_PAD_GET(ctl) (ctl >> 28) | 262 | #define TFD_CTL_PAD_GET(ctl) (ctl >> 28) |
418 | 263 | ||
419 | #define TFD_TX_CMD_SLOTS 256 | ||
420 | #define TFD_CMD_SLOTS 32 | ||
421 | |||
422 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl3945_cmd) - \ | ||
423 | sizeof(struct iwl3945_cmd_meta)) | ||
424 | |||
425 | /* | 264 | /* |
426 | * RX related structures and functions | 265 | * RX related structures and functions |
427 | */ | 266 | */ |
@@ -430,45 +269,35 @@ struct iwl3945_eeprom { | |||
430 | 269 | ||
431 | /* Sizes and addresses for instruction and data memory (SRAM) in | 270 | /* Sizes and addresses for instruction and data memory (SRAM) in |
432 | * 3945's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */ | 271 | * 3945's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */ |
433 | #define RTC_INST_LOWER_BOUND (0x000000) | 272 | #define IWL39_RTC_INST_LOWER_BOUND (0x000000) |
434 | #define ALM_RTC_INST_UPPER_BOUND (0x014000) | 273 | #define IWL39_RTC_INST_UPPER_BOUND (0x014000) |
435 | 274 | ||
436 | #define RTC_DATA_LOWER_BOUND (0x800000) | 275 | #define IWL39_RTC_DATA_LOWER_BOUND (0x800000) |
437 | #define ALM_RTC_DATA_UPPER_BOUND (0x808000) | 276 | #define IWL39_RTC_DATA_UPPER_BOUND (0x808000) |
438 | 277 | ||
439 | #define ALM_RTC_INST_SIZE (ALM_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND) | 278 | #define IWL39_RTC_INST_SIZE (IWL39_RTC_INST_UPPER_BOUND - \ |
440 | #define ALM_RTC_DATA_SIZE (ALM_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND) | 279 | IWL39_RTC_INST_LOWER_BOUND) |
280 | #define IWL39_RTC_DATA_SIZE (IWL39_RTC_DATA_UPPER_BOUND - \ | ||
281 | IWL39_RTC_DATA_LOWER_BOUND) | ||
441 | 282 | ||
442 | #define IWL_MAX_INST_SIZE ALM_RTC_INST_SIZE | 283 | #define IWL39_MAX_INST_SIZE IWL39_RTC_INST_SIZE |
443 | #define IWL_MAX_DATA_SIZE ALM_RTC_DATA_SIZE | 284 | #define IWL39_MAX_DATA_SIZE IWL39_RTC_DATA_SIZE |
444 | 285 | ||
445 | /* Size of uCode instruction memory in bootstrap state machine */ | 286 | /* Size of uCode instruction memory in bootstrap state machine */ |
446 | #define IWL_MAX_BSM_SIZE ALM_RTC_INST_SIZE | 287 | #define IWL39_MAX_BSM_SIZE IWL39_RTC_INST_SIZE |
447 | 288 | ||
448 | #define IWL39_MAX_NUM_QUEUES 8 | 289 | #define IWL39_MAX_NUM_QUEUES 8 |
449 | 290 | ||
450 | static inline int iwl3945_hw_valid_rtc_data_addr(u32 addr) | 291 | static inline int iwl3945_hw_valid_rtc_data_addr(u32 addr) |
451 | { | 292 | { |
452 | return (addr >= RTC_DATA_LOWER_BOUND) && | 293 | return (addr >= IWL39_RTC_DATA_LOWER_BOUND) && |
453 | (addr < ALM_RTC_DATA_UPPER_BOUND); | 294 | (addr < IWL39_RTC_DATA_UPPER_BOUND); |
454 | } | 295 | } |
455 | 296 | ||
456 | /* Base physical address of iwl3945_shared is provided to FH_TSSR_CBB_BASE | 297 | /* Base physical address of iwl3945_shared is provided to FH_TSSR_CBB_BASE |
457 | * and &iwl3945_shared.rx_read_ptr[0] is provided to FH_RCSR_RPTR_ADDR(0) */ | 298 | * and &iwl3945_shared.rx_read_ptr[0] is provided to FH_RCSR_RPTR_ADDR(0) */ |
458 | struct iwl3945_shared { | 299 | struct iwl3945_shared { |
459 | __le32 tx_base_ptr[8]; | 300 | __le32 tx_base_ptr[8]; |
460 | __le32 rx_read_ptr[3]; | ||
461 | } __attribute__ ((packed)); | ||
462 | |||
463 | struct iwl3945_tfd_frame_data { | ||
464 | __le32 addr; | ||
465 | __le32 len; | ||
466 | } __attribute__ ((packed)); | ||
467 | |||
468 | struct iwl3945_tfd_frame { | ||
469 | __le32 control_flags; | ||
470 | struct iwl3945_tfd_frame_data pa[4]; | ||
471 | u8 reserved[28]; | ||
472 | } __attribute__ ((packed)); | 301 | } __attribute__ ((packed)); |
473 | 302 | ||
474 | static inline u8 iwl3945_hw_get_rate(__le16 rate_n_flags) | 303 | static inline u8 iwl3945_hw_get_rate(__le16 rate_n_flags) |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-io.h b/drivers/net/wireless/iwlwifi/iwl-3945-io.h deleted file mode 100644 index 2440fd664dd5..000000000000 --- a/drivers/net/wireless/iwlwifi/iwl-3945-io.h +++ /dev/null | |||
@@ -1,404 +0,0 @@ | |||
1 | /****************************************************************************** | ||
2 | * | ||
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | ||
4 | * | ||
5 | * Portions of this file are derived from the ipw3945 project. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of version 2 of the GNU General Public License as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | * more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along with | ||
17 | * this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | ||
19 | * | ||
20 | * The full GNU General Public License is included in this distribution in the | ||
21 | * file called LICENSE. | ||
22 | * | ||
23 | * Contact Information: | ||
24 | * Intel Linux Wireless <ilw@linux.intel.com> | ||
25 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
26 | * | ||
27 | *****************************************************************************/ | ||
28 | |||
29 | #ifndef __iwl3945_io_h__ | ||
30 | #define __iwl3945_io_h__ | ||
31 | |||
32 | #include <linux/io.h> | ||
33 | |||
34 | #include "iwl-3945-debug.h" | ||
35 | |||
36 | /* | ||
37 | * IO, register, and NIC memory access functions | ||
38 | * | ||
39 | * NOTE on naming convention and macro usage for these | ||
40 | * | ||
41 | * A single _ prefix before a an access function means that no state | ||
42 | * check or debug information is printed when that function is called. | ||
43 | * | ||
44 | * A double __ prefix before an access function means that state is checked | ||
45 | * and the current line number is printed in addition to any other debug output. | ||
46 | * | ||
47 | * The non-prefixed name is the #define that maps the caller into a | ||
48 | * #define that provides the caller's __LINE__ to the double prefix version. | ||
49 | * | ||
50 | * If you wish to call the function without any debug or state checking, | ||
51 | * you should use the single _ prefix version (as is used by dependent IO | ||
52 | * routines, for example _iwl3945_read_direct32 calls the non-check version of | ||
53 | * _iwl3945_read32.) | ||
54 | * | ||
55 | * These declarations are *extremely* useful in quickly isolating code deltas | ||
56 | * which result in misconfiguration of the hardware I/O. In combination with | ||
57 | * git-bisect and the IO debug level you can quickly determine the specific | ||
58 | * commit which breaks the IO sequence to the hardware. | ||
59 | * | ||
60 | */ | ||
61 | |||
62 | #define _iwl3945_write32(priv, ofs, val) iowrite32((val), (priv)->hw_base + (ofs)) | ||
63 | #ifdef CONFIG_IWL3945_DEBUG | ||
64 | static inline void __iwl3945_write32(const char *f, u32 l, struct iwl3945_priv *priv, | ||
65 | u32 ofs, u32 val) | ||
66 | { | ||
67 | IWL_DEBUG_IO("write32(0x%08X, 0x%08X) - %s %d\n", ofs, val, f, l); | ||
68 | _iwl3945_write32(priv, ofs, val); | ||
69 | } | ||
70 | #define iwl3945_write32(priv, ofs, val) \ | ||
71 | __iwl3945_write32(__FILE__, __LINE__, priv, ofs, val) | ||
72 | #else | ||
73 | #define iwl3945_write32(priv, ofs, val) _iwl3945_write32(priv, ofs, val) | ||
74 | #endif | ||
75 | |||
76 | #define _iwl3945_read32(priv, ofs) ioread32((priv)->hw_base + (ofs)) | ||
77 | #ifdef CONFIG_IWL3945_DEBUG | ||
78 | static inline u32 __iwl3945_read32(char *f, u32 l, struct iwl3945_priv *priv, u32 ofs) | ||
79 | { | ||
80 | IWL_DEBUG_IO("read_direct32(0x%08X) - %s %d\n", ofs, f, l); | ||
81 | return _iwl3945_read32(priv, ofs); | ||
82 | } | ||
83 | #define iwl3945_read32(priv, ofs)__iwl3945_read32(__FILE__, __LINE__, priv, ofs) | ||
84 | #else | ||
85 | #define iwl3945_read32(p, o) _iwl3945_read32(p, o) | ||
86 | #endif | ||
87 | |||
88 | static inline int _iwl3945_poll_bit(struct iwl3945_priv *priv, u32 addr, | ||
89 | u32 bits, u32 mask, int timeout) | ||
90 | { | ||
91 | int i = 0; | ||
92 | |||
93 | do { | ||
94 | if ((_iwl3945_read32(priv, addr) & mask) == (bits & mask)) | ||
95 | return i; | ||
96 | udelay(10); | ||
97 | i += 10; | ||
98 | } while (i < timeout); | ||
99 | |||
100 | return -ETIMEDOUT; | ||
101 | } | ||
102 | #ifdef CONFIG_IWL3945_DEBUG | ||
103 | static inline int __iwl3945_poll_bit(const char *f, u32 l, | ||
104 | struct iwl3945_priv *priv, u32 addr, | ||
105 | u32 bits, u32 mask, int timeout) | ||
106 | { | ||
107 | int ret = _iwl3945_poll_bit(priv, addr, bits, mask, timeout); | ||
108 | IWL_DEBUG_IO("poll_bit(0x%08X, 0x%08X, 0x%08X) - %s- %s %d\n", | ||
109 | addr, bits, mask, | ||
110 | unlikely(ret == -ETIMEDOUT) ? "timeout" : "", f, l); | ||
111 | return ret; | ||
112 | } | ||
113 | #define iwl3945_poll_bit(priv, addr, bits, mask, timeout) \ | ||
114 | __iwl3945_poll_bit(__FILE__, __LINE__, priv, addr, bits, mask, timeout) | ||
115 | #else | ||
116 | #define iwl3945_poll_bit(p, a, b, m, t) _iwl3945_poll_bit(p, a, b, m, t) | ||
117 | #endif | ||
118 | |||
119 | static inline void _iwl3945_set_bit(struct iwl3945_priv *priv, u32 reg, u32 mask) | ||
120 | { | ||
121 | _iwl3945_write32(priv, reg, _iwl3945_read32(priv, reg) | mask); | ||
122 | } | ||
123 | #ifdef CONFIG_IWL3945_DEBUG | ||
124 | static inline void __iwl3945_set_bit(const char *f, u32 l, | ||
125 | struct iwl3945_priv *priv, u32 reg, u32 mask) | ||
126 | { | ||
127 | u32 val = _iwl3945_read32(priv, reg) | mask; | ||
128 | IWL_DEBUG_IO("set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val); | ||
129 | _iwl3945_write32(priv, reg, val); | ||
130 | } | ||
131 | #define iwl3945_set_bit(p, r, m) __iwl3945_set_bit(__FILE__, __LINE__, p, r, m) | ||
132 | #else | ||
133 | #define iwl3945_set_bit(p, r, m) _iwl3945_set_bit(p, r, m) | ||
134 | #endif | ||
135 | |||
136 | static inline void _iwl3945_clear_bit(struct iwl3945_priv *priv, u32 reg, u32 mask) | ||
137 | { | ||
138 | _iwl3945_write32(priv, reg, _iwl3945_read32(priv, reg) & ~mask); | ||
139 | } | ||
140 | #ifdef CONFIG_IWL3945_DEBUG | ||
141 | static inline void __iwl3945_clear_bit(const char *f, u32 l, | ||
142 | struct iwl3945_priv *priv, u32 reg, u32 mask) | ||
143 | { | ||
144 | u32 val = _iwl3945_read32(priv, reg) & ~mask; | ||
145 | IWL_DEBUG_IO("clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val); | ||
146 | _iwl3945_write32(priv, reg, val); | ||
147 | } | ||
148 | #define iwl3945_clear_bit(p, r, m) __iwl3945_clear_bit(__FILE__, __LINE__, p, r, m) | ||
149 | #else | ||
150 | #define iwl3945_clear_bit(p, r, m) _iwl3945_clear_bit(p, r, m) | ||
151 | #endif | ||
152 | |||
153 | static inline int _iwl3945_grab_nic_access(struct iwl3945_priv *priv) | ||
154 | { | ||
155 | int ret; | ||
156 | #ifdef CONFIG_IWL3945_DEBUG | ||
157 | if (atomic_read(&priv->restrict_refcnt)) | ||
158 | return 0; | ||
159 | #endif | ||
160 | /* this bit wakes up the NIC */ | ||
161 | _iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
162 | ret = _iwl3945_poll_bit(priv, CSR_GP_CNTRL, | ||
163 | CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, | ||
164 | (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | | ||
165 | CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 50); | ||
166 | if (ret < 0) { | ||
167 | IWL_ERROR("MAC is in deep sleep!\n"); | ||
168 | return -EIO; | ||
169 | } | ||
170 | |||
171 | #ifdef CONFIG_IWL3945_DEBUG | ||
172 | atomic_inc(&priv->restrict_refcnt); | ||
173 | #endif | ||
174 | return 0; | ||
175 | } | ||
176 | |||
177 | #ifdef CONFIG_IWL3945_DEBUG | ||
178 | static inline int __iwl3945_grab_nic_access(const char *f, u32 l, | ||
179 | struct iwl3945_priv *priv) | ||
180 | { | ||
181 | if (atomic_read(&priv->restrict_refcnt)) | ||
182 | IWL_DEBUG_INFO("Grabbing access while already held at " | ||
183 | "line %d.\n", l); | ||
184 | |||
185 | IWL_DEBUG_IO("grabbing nic access - %s %d\n", f, l); | ||
186 | return _iwl3945_grab_nic_access(priv); | ||
187 | } | ||
188 | #define iwl3945_grab_nic_access(priv) \ | ||
189 | __iwl3945_grab_nic_access(__FILE__, __LINE__, priv) | ||
190 | #else | ||
191 | #define iwl3945_grab_nic_access(priv) \ | ||
192 | _iwl3945_grab_nic_access(priv) | ||
193 | #endif | ||
194 | |||
195 | static inline void _iwl3945_release_nic_access(struct iwl3945_priv *priv) | ||
196 | { | ||
197 | #ifdef CONFIG_IWL3945_DEBUG | ||
198 | if (atomic_dec_and_test(&priv->restrict_refcnt)) | ||
199 | #endif | ||
200 | _iwl3945_clear_bit(priv, CSR_GP_CNTRL, | ||
201 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
202 | } | ||
203 | #ifdef CONFIG_IWL3945_DEBUG | ||
204 | static inline void __iwl3945_release_nic_access(const char *f, u32 l, | ||
205 | struct iwl3945_priv *priv) | ||
206 | { | ||
207 | if (atomic_read(&priv->restrict_refcnt) <= 0) | ||
208 | IWL_ERROR("Release unheld nic access at line %d.\n", l); | ||
209 | |||
210 | IWL_DEBUG_IO("releasing nic access - %s %d\n", f, l); | ||
211 | _iwl3945_release_nic_access(priv); | ||
212 | } | ||
213 | #define iwl3945_release_nic_access(priv) \ | ||
214 | __iwl3945_release_nic_access(__FILE__, __LINE__, priv) | ||
215 | #else | ||
216 | #define iwl3945_release_nic_access(priv) \ | ||
217 | _iwl3945_release_nic_access(priv) | ||
218 | #endif | ||
219 | |||
220 | static inline u32 _iwl3945_read_direct32(struct iwl3945_priv *priv, u32 reg) | ||
221 | { | ||
222 | return _iwl3945_read32(priv, reg); | ||
223 | } | ||
224 | #ifdef CONFIG_IWL3945_DEBUG | ||
225 | static inline u32 __iwl3945_read_direct32(const char *f, u32 l, | ||
226 | struct iwl3945_priv *priv, u32 reg) | ||
227 | { | ||
228 | u32 value = _iwl3945_read_direct32(priv, reg); | ||
229 | if (!atomic_read(&priv->restrict_refcnt)) | ||
230 | IWL_ERROR("Nic access not held from %s %d\n", f, l); | ||
231 | IWL_DEBUG_IO("read_direct32(0x%4X) = 0x%08x - %s %d \n", reg, value, | ||
232 | f, l); | ||
233 | return value; | ||
234 | } | ||
235 | #define iwl3945_read_direct32(priv, reg) \ | ||
236 | __iwl3945_read_direct32(__FILE__, __LINE__, priv, reg) | ||
237 | #else | ||
238 | #define iwl3945_read_direct32 _iwl3945_read_direct32 | ||
239 | #endif | ||
240 | |||
241 | static inline void _iwl3945_write_direct32(struct iwl3945_priv *priv, | ||
242 | u32 reg, u32 value) | ||
243 | { | ||
244 | _iwl3945_write32(priv, reg, value); | ||
245 | } | ||
246 | #ifdef CONFIG_IWL3945_DEBUG | ||
247 | static void __iwl3945_write_direct32(u32 line, | ||
248 | struct iwl3945_priv *priv, u32 reg, u32 value) | ||
249 | { | ||
250 | if (!atomic_read(&priv->restrict_refcnt)) | ||
251 | IWL_ERROR("Nic access not held from line %d\n", line); | ||
252 | _iwl3945_write_direct32(priv, reg, value); | ||
253 | } | ||
254 | #define iwl3945_write_direct32(priv, reg, value) \ | ||
255 | __iwl3945_write_direct32(__LINE__, priv, reg, value) | ||
256 | #else | ||
257 | #define iwl3945_write_direct32 _iwl3945_write_direct32 | ||
258 | #endif | ||
259 | |||
260 | static inline void iwl3945_write_reg_buf(struct iwl3945_priv *priv, | ||
261 | u32 reg, u32 len, u32 *values) | ||
262 | { | ||
263 | u32 count = sizeof(u32); | ||
264 | |||
265 | if ((priv != NULL) && (values != NULL)) { | ||
266 | for (; 0 < len; len -= count, reg += count, values++) | ||
267 | _iwl3945_write_direct32(priv, reg, *values); | ||
268 | } | ||
269 | } | ||
270 | |||
271 | static inline int _iwl3945_poll_direct_bit(struct iwl3945_priv *priv, | ||
272 | u32 addr, u32 mask, int timeout) | ||
273 | { | ||
274 | return _iwl3945_poll_bit(priv, addr, mask, mask, timeout); | ||
275 | } | ||
276 | |||
277 | #ifdef CONFIG_IWL3945_DEBUG | ||
278 | static inline int __iwl3945_poll_direct_bit(const char *f, u32 l, | ||
279 | struct iwl3945_priv *priv, | ||
280 | u32 addr, u32 mask, int timeout) | ||
281 | { | ||
282 | int ret = _iwl3945_poll_direct_bit(priv, addr, mask, timeout); | ||
283 | |||
284 | if (unlikely(ret == -ETIMEDOUT)) | ||
285 | IWL_DEBUG_IO("poll_direct_bit(0x%08X, 0x%08X) - " | ||
286 | "timedout - %s %d\n", addr, mask, f, l); | ||
287 | else | ||
288 | IWL_DEBUG_IO("poll_direct_bit(0x%08X, 0x%08X) = 0x%08X " | ||
289 | "- %s %d\n", addr, mask, ret, f, l); | ||
290 | return ret; | ||
291 | } | ||
292 | #define iwl3945_poll_direct_bit(priv, addr, mask, timeout) \ | ||
293 | __iwl3945_poll_direct_bit(__FILE__, __LINE__, priv, addr, mask, timeout) | ||
294 | #else | ||
295 | #define iwl3945_poll_direct_bit _iwl3945_poll_direct_bit | ||
296 | #endif | ||
297 | |||
298 | static inline u32 _iwl3945_read_prph(struct iwl3945_priv *priv, u32 reg) | ||
299 | { | ||
300 | _iwl3945_write_direct32(priv, HBUS_TARG_PRPH_RADDR, reg | (3 << 24)); | ||
301 | rmb(); | ||
302 | return _iwl3945_read_direct32(priv, HBUS_TARG_PRPH_RDAT); | ||
303 | } | ||
304 | #ifdef CONFIG_IWL3945_DEBUG | ||
305 | static inline u32 __iwl3945_read_prph(u32 line, struct iwl3945_priv *priv, u32 reg) | ||
306 | { | ||
307 | if (!atomic_read(&priv->restrict_refcnt)) | ||
308 | IWL_ERROR("Nic access not held from line %d\n", line); | ||
309 | return _iwl3945_read_prph(priv, reg); | ||
310 | } | ||
311 | |||
312 | #define iwl3945_read_prph(priv, reg) \ | ||
313 | __iwl3945_read_prph(__LINE__, priv, reg) | ||
314 | #else | ||
315 | #define iwl3945_read_prph _iwl3945_read_prph | ||
316 | #endif | ||
317 | |||
318 | static inline void _iwl3945_write_prph(struct iwl3945_priv *priv, | ||
319 | u32 addr, u32 val) | ||
320 | { | ||
321 | _iwl3945_write_direct32(priv, HBUS_TARG_PRPH_WADDR, | ||
322 | ((addr & 0x0000FFFF) | (3 << 24))); | ||
323 | wmb(); | ||
324 | _iwl3945_write_direct32(priv, HBUS_TARG_PRPH_WDAT, val); | ||
325 | } | ||
326 | #ifdef CONFIG_IWL3945_DEBUG | ||
327 | static inline void __iwl3945_write_prph(u32 line, struct iwl3945_priv *priv, | ||
328 | u32 addr, u32 val) | ||
329 | { | ||
330 | if (!atomic_read(&priv->restrict_refcnt)) | ||
331 | IWL_ERROR("Nic access from line %d\n", line); | ||
332 | _iwl3945_write_prph(priv, addr, val); | ||
333 | } | ||
334 | |||
335 | #define iwl3945_write_prph(priv, addr, val) \ | ||
336 | __iwl3945_write_prph(__LINE__, priv, addr, val); | ||
337 | #else | ||
338 | #define iwl3945_write_prph _iwl3945_write_prph | ||
339 | #endif | ||
340 | |||
341 | #define _iwl3945_set_bits_prph(priv, reg, mask) \ | ||
342 | _iwl3945_write_prph(priv, reg, (_iwl3945_read_prph(priv, reg) | mask)) | ||
343 | #ifdef CONFIG_IWL3945_DEBUG | ||
344 | static inline void __iwl3945_set_bits_prph(u32 line, struct iwl3945_priv *priv, | ||
345 | u32 reg, u32 mask) | ||
346 | { | ||
347 | if (!atomic_read(&priv->restrict_refcnt)) | ||
348 | IWL_ERROR("Nic access not held from line %d\n", line); | ||
349 | |||
350 | _iwl3945_set_bits_prph(priv, reg, mask); | ||
351 | } | ||
352 | #define iwl3945_set_bits_prph(priv, reg, mask) \ | ||
353 | __iwl3945_set_bits_prph(__LINE__, priv, reg, mask) | ||
354 | #else | ||
355 | #define iwl3945_set_bits_prph _iwl3945_set_bits_prph | ||
356 | #endif | ||
357 | |||
358 | #define _iwl3945_set_bits_mask_prph(priv, reg, bits, mask) \ | ||
359 | _iwl3945_write_prph(priv, reg, ((_iwl3945_read_prph(priv, reg) & mask) | bits)) | ||
360 | |||
361 | #ifdef CONFIG_IWL3945_DEBUG | ||
362 | static inline void __iwl3945_set_bits_mask_prph(u32 line, | ||
363 | struct iwl3945_priv *priv, u32 reg, u32 bits, u32 mask) | ||
364 | { | ||
365 | if (!atomic_read(&priv->restrict_refcnt)) | ||
366 | IWL_ERROR("Nic access not held from line %d\n", line); | ||
367 | _iwl3945_set_bits_mask_prph(priv, reg, bits, mask); | ||
368 | } | ||
369 | #define iwl3945_set_bits_mask_prph(priv, reg, bits, mask) \ | ||
370 | __iwl3945_set_bits_mask_prph(__LINE__, priv, reg, bits, mask) | ||
371 | #else | ||
372 | #define iwl3945_set_bits_mask_prph _iwl3945_set_bits_mask_prph | ||
373 | #endif | ||
374 | |||
375 | static inline void iwl3945_clear_bits_prph(struct iwl3945_priv | ||
376 | *priv, u32 reg, u32 mask) | ||
377 | { | ||
378 | u32 val = _iwl3945_read_prph(priv, reg); | ||
379 | _iwl3945_write_prph(priv, reg, (val & ~mask)); | ||
380 | } | ||
381 | |||
382 | static inline u32 iwl3945_read_targ_mem(struct iwl3945_priv *priv, u32 addr) | ||
383 | { | ||
384 | iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, addr); | ||
385 | rmb(); | ||
386 | return iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
387 | } | ||
388 | |||
389 | static inline void iwl3945_write_targ_mem(struct iwl3945_priv *priv, u32 addr, u32 val) | ||
390 | { | ||
391 | iwl3945_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr); | ||
392 | wmb(); | ||
393 | iwl3945_write_direct32(priv, HBUS_TARG_MEM_WDAT, val); | ||
394 | } | ||
395 | |||
396 | static inline void iwl3945_write_targ_mem_buf(struct iwl3945_priv *priv, u32 addr, | ||
397 | u32 len, u32 *values) | ||
398 | { | ||
399 | iwl3945_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr); | ||
400 | wmb(); | ||
401 | for (; 0 < len; len -= sizeof(u32), values++) | ||
402 | iwl3945_write_direct32(priv, HBUS_TARG_MEM_WDAT, *values); | ||
403 | } | ||
404 | #endif | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-led.c b/drivers/net/wireless/iwlwifi/iwl-3945-led.c index 4c638909a7db..fab137365000 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945-led.c +++ b/drivers/net/wireless/iwlwifi/iwl-3945-led.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -38,8 +38,10 @@ | |||
38 | #include <linux/etherdevice.h> | 38 | #include <linux/etherdevice.h> |
39 | #include <asm/unaligned.h> | 39 | #include <asm/unaligned.h> |
40 | 40 | ||
41 | #include "iwl-commands.h" | ||
41 | #include "iwl-3945.h" | 42 | #include "iwl-3945.h" |
42 | #include "iwl-helpers.h" | 43 | #include "iwl-core.h" |
44 | #include "iwl-dev.h" | ||
43 | 45 | ||
44 | 46 | ||
45 | static const struct { | 47 | static const struct { |
@@ -67,8 +69,8 @@ static const struct { | |||
67 | #define IWL_MAX_BLINK_TBL (ARRAY_SIZE(blink_tbl) - 1) /*Exclude Solid on*/ | 69 | #define IWL_MAX_BLINK_TBL (ARRAY_SIZE(blink_tbl) - 1) /*Exclude Solid on*/ |
68 | #define IWL_SOLID_BLINK_IDX (ARRAY_SIZE(blink_tbl) - 1) | 70 | #define IWL_SOLID_BLINK_IDX (ARRAY_SIZE(blink_tbl) - 1) |
69 | 71 | ||
70 | static int iwl3945_led_cmd_callback(struct iwl3945_priv *priv, | 72 | static int iwl3945_led_cmd_callback(struct iwl_priv *priv, |
71 | struct iwl3945_cmd *cmd, | 73 | struct iwl_cmd *cmd, |
72 | struct sk_buff *skb) | 74 | struct sk_buff *skb) |
73 | { | 75 | { |
74 | return 1; | 76 | return 1; |
@@ -80,27 +82,27 @@ static inline int iwl3945_brightness_to_idx(enum led_brightness brightness) | |||
80 | } | 82 | } |
81 | 83 | ||
82 | /* Send led command */ | 84 | /* Send led command */ |
83 | static int iwl_send_led_cmd(struct iwl3945_priv *priv, | 85 | static int iwl_send_led_cmd(struct iwl_priv *priv, |
84 | struct iwl3945_led_cmd *led_cmd) | 86 | struct iwl_led_cmd *led_cmd) |
85 | { | 87 | { |
86 | struct iwl3945_host_cmd cmd = { | 88 | struct iwl_host_cmd cmd = { |
87 | .id = REPLY_LEDS_CMD, | 89 | .id = REPLY_LEDS_CMD, |
88 | .len = sizeof(struct iwl3945_led_cmd), | 90 | .len = sizeof(struct iwl_led_cmd), |
89 | .data = led_cmd, | 91 | .data = led_cmd, |
90 | .meta.flags = CMD_ASYNC, | 92 | .meta.flags = CMD_ASYNC, |
91 | .meta.u.callback = iwl3945_led_cmd_callback, | 93 | .meta.u.callback = iwl3945_led_cmd_callback, |
92 | }; | 94 | }; |
93 | 95 | ||
94 | return iwl3945_send_cmd(priv, &cmd); | 96 | return iwl_send_cmd(priv, &cmd); |
95 | } | 97 | } |
96 | 98 | ||
97 | 99 | ||
98 | 100 | ||
99 | /* Set led on command */ | 101 | /* Set led on command */ |
100 | static int iwl3945_led_pattern(struct iwl3945_priv *priv, int led_id, | 102 | static int iwl3945_led_pattern(struct iwl_priv *priv, int led_id, |
101 | unsigned int idx) | 103 | unsigned int idx) |
102 | { | 104 | { |
103 | struct iwl3945_led_cmd led_cmd = { | 105 | struct iwl_led_cmd led_cmd = { |
104 | .id = led_id, | 106 | .id = led_id, |
105 | .interval = IWL_DEF_LED_INTRVL | 107 | .interval = IWL_DEF_LED_INTRVL |
106 | }; | 108 | }; |
@@ -114,11 +116,10 @@ static int iwl3945_led_pattern(struct iwl3945_priv *priv, int led_id, | |||
114 | } | 116 | } |
115 | 117 | ||
116 | 118 | ||
117 | #if 1 | ||
118 | /* Set led on command */ | 119 | /* Set led on command */ |
119 | static int iwl3945_led_on(struct iwl3945_priv *priv, int led_id) | 120 | static int iwl3945_led_on(struct iwl_priv *priv, int led_id) |
120 | { | 121 | { |
121 | struct iwl3945_led_cmd led_cmd = { | 122 | struct iwl_led_cmd led_cmd = { |
122 | .id = led_id, | 123 | .id = led_id, |
123 | .on = IWL_LED_SOLID, | 124 | .on = IWL_LED_SOLID, |
124 | .off = 0, | 125 | .off = 0, |
@@ -128,9 +129,9 @@ static int iwl3945_led_on(struct iwl3945_priv *priv, int led_id) | |||
128 | } | 129 | } |
129 | 130 | ||
130 | /* Set led off command */ | 131 | /* Set led off command */ |
131 | static int iwl3945_led_off(struct iwl3945_priv *priv, int led_id) | 132 | static int iwl3945_led_off(struct iwl_priv *priv, int led_id) |
132 | { | 133 | { |
133 | struct iwl3945_led_cmd led_cmd = { | 134 | struct iwl_led_cmd led_cmd = { |
134 | .id = led_id, | 135 | .id = led_id, |
135 | .on = 0, | 136 | .on = 0, |
136 | .off = 0, | 137 | .off = 0, |
@@ -139,13 +140,11 @@ static int iwl3945_led_off(struct iwl3945_priv *priv, int led_id) | |||
139 | IWL_DEBUG_LED("led off %d\n", led_id); | 140 | IWL_DEBUG_LED("led off %d\n", led_id); |
140 | return iwl_send_led_cmd(priv, &led_cmd); | 141 | return iwl_send_led_cmd(priv, &led_cmd); |
141 | } | 142 | } |
142 | #endif | ||
143 | |||
144 | 143 | ||
145 | /* | 144 | /* |
146 | * brightness call back function for Tx/Rx LED | 145 | * brightness call back function for Tx/Rx LED |
147 | */ | 146 | */ |
148 | static int iwl3945_led_associated(struct iwl3945_priv *priv, int led_id) | 147 | static int iwl3945_led_associated(struct iwl_priv *priv, int led_id) |
149 | { | 148 | { |
150 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || | 149 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || |
151 | !test_bit(STATUS_READY, &priv->status)) | 150 | !test_bit(STATUS_READY, &priv->status)) |
@@ -166,7 +165,7 @@ static void iwl3945_led_brightness_set(struct led_classdev *led_cdev, | |||
166 | { | 165 | { |
167 | struct iwl3945_led *led = container_of(led_cdev, | 166 | struct iwl3945_led *led = container_of(led_cdev, |
168 | struct iwl3945_led, led_dev); | 167 | struct iwl3945_led, led_dev); |
169 | struct iwl3945_priv *priv = led->priv; | 168 | struct iwl_priv *priv = led->priv; |
170 | 169 | ||
171 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | 170 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
172 | return; | 171 | return; |
@@ -202,7 +201,7 @@ static void iwl3945_led_brightness_set(struct led_classdev *led_cdev, | |||
202 | /* | 201 | /* |
203 | * Register led class with the system | 202 | * Register led class with the system |
204 | */ | 203 | */ |
205 | static int iwl3945_led_register_led(struct iwl3945_priv *priv, | 204 | static int iwl3945_led_register_led(struct iwl_priv *priv, |
206 | struct iwl3945_led *led, | 205 | struct iwl3945_led *led, |
207 | enum led_type type, u8 set_led, | 206 | enum led_type type, u8 set_led, |
208 | char *trigger) | 207 | char *trigger) |
@@ -219,7 +218,7 @@ static int iwl3945_led_register_led(struct iwl3945_priv *priv, | |||
219 | 218 | ||
220 | ret = led_classdev_register(device, &led->led_dev); | 219 | ret = led_classdev_register(device, &led->led_dev); |
221 | if (ret) { | 220 | if (ret) { |
222 | IWL_ERROR("Error: failed to register led handler.\n"); | 221 | IWL_ERR(priv, "Error: failed to register led handler.\n"); |
223 | return ret; | 222 | return ret; |
224 | } | 223 | } |
225 | 224 | ||
@@ -234,7 +233,7 @@ static int iwl3945_led_register_led(struct iwl3945_priv *priv, | |||
234 | /* | 233 | /* |
235 | * calculate blink rate according to last 2 sec Tx/Rx activities | 234 | * calculate blink rate according to last 2 sec Tx/Rx activities |
236 | */ | 235 | */ |
237 | static inline u8 get_blink_rate(struct iwl3945_priv *priv) | 236 | static inline u8 get_blink_rate(struct iwl_priv *priv) |
238 | { | 237 | { |
239 | int index; | 238 | int index; |
240 | u64 current_tpt = priv->rxtxpackets; | 239 | u64 current_tpt = priv->rxtxpackets; |
@@ -253,7 +252,7 @@ static inline u8 get_blink_rate(struct iwl3945_priv *priv) | |||
253 | return index; | 252 | return index; |
254 | } | 253 | } |
255 | 254 | ||
256 | static inline int is_rf_kill(struct iwl3945_priv *priv) | 255 | static inline int is_rf_kill(struct iwl_priv *priv) |
257 | { | 256 | { |
258 | return test_bit(STATUS_RF_KILL_HW, &priv->status) || | 257 | return test_bit(STATUS_RF_KILL_HW, &priv->status) || |
259 | test_bit(STATUS_RF_KILL_SW, &priv->status); | 258 | test_bit(STATUS_RF_KILL_SW, &priv->status); |
@@ -264,7 +263,7 @@ static inline int is_rf_kill(struct iwl3945_priv *priv) | |||
264 | * happen very frequent we postpone led command to be called from | 263 | * happen very frequent we postpone led command to be called from |
265 | * REPLY handler so we know ucode is up | 264 | * REPLY handler so we know ucode is up |
266 | */ | 265 | */ |
267 | void iwl3945_led_background(struct iwl3945_priv *priv) | 266 | void iwl3945_led_background(struct iwl_priv *priv) |
268 | { | 267 | { |
269 | u8 blink_idx; | 268 | u8 blink_idx; |
270 | 269 | ||
@@ -304,7 +303,7 @@ void iwl3945_led_background(struct iwl3945_priv *priv) | |||
304 | 303 | ||
305 | 304 | ||
306 | /* Register all led handler */ | 305 | /* Register all led handler */ |
307 | int iwl3945_led_register(struct iwl3945_priv *priv) | 306 | int iwl3945_led_register(struct iwl_priv *priv) |
308 | { | 307 | { |
309 | char *trigger; | 308 | char *trigger; |
310 | int ret; | 309 | int ret; |
@@ -316,66 +315,66 @@ int iwl3945_led_register(struct iwl3945_priv *priv) | |||
316 | priv->allow_blinking = 0; | 315 | priv->allow_blinking = 0; |
317 | 316 | ||
318 | trigger = ieee80211_get_radio_led_name(priv->hw); | 317 | trigger = ieee80211_get_radio_led_name(priv->hw); |
319 | snprintf(priv->led[IWL_LED_TRG_RADIO].name, | 318 | snprintf(priv->led39[IWL_LED_TRG_RADIO].name, |
320 | sizeof(priv->led[IWL_LED_TRG_RADIO].name), "iwl-%s:radio", | 319 | sizeof(priv->led39[IWL_LED_TRG_RADIO].name), "iwl-%s:radio", |
321 | wiphy_name(priv->hw->wiphy)); | 320 | wiphy_name(priv->hw->wiphy)); |
322 | 321 | ||
323 | priv->led[IWL_LED_TRG_RADIO].led_on = iwl3945_led_on; | 322 | priv->led39[IWL_LED_TRG_RADIO].led_on = iwl3945_led_on; |
324 | priv->led[IWL_LED_TRG_RADIO].led_off = iwl3945_led_off; | 323 | priv->led39[IWL_LED_TRG_RADIO].led_off = iwl3945_led_off; |
325 | priv->led[IWL_LED_TRG_RADIO].led_pattern = NULL; | 324 | priv->led39[IWL_LED_TRG_RADIO].led_pattern = NULL; |
326 | 325 | ||
327 | ret = iwl3945_led_register_led(priv, | 326 | ret = iwl3945_led_register_led(priv, |
328 | &priv->led[IWL_LED_TRG_RADIO], | 327 | &priv->led39[IWL_LED_TRG_RADIO], |
329 | IWL_LED_TRG_RADIO, 1, trigger); | 328 | IWL_LED_TRG_RADIO, 1, trigger); |
330 | 329 | ||
331 | if (ret) | 330 | if (ret) |
332 | goto exit_fail; | 331 | goto exit_fail; |
333 | 332 | ||
334 | trigger = ieee80211_get_assoc_led_name(priv->hw); | 333 | trigger = ieee80211_get_assoc_led_name(priv->hw); |
335 | snprintf(priv->led[IWL_LED_TRG_ASSOC].name, | 334 | snprintf(priv->led39[IWL_LED_TRG_ASSOC].name, |
336 | sizeof(priv->led[IWL_LED_TRG_ASSOC].name), "iwl-%s:assoc", | 335 | sizeof(priv->led39[IWL_LED_TRG_ASSOC].name), "iwl-%s:assoc", |
337 | wiphy_name(priv->hw->wiphy)); | 336 | wiphy_name(priv->hw->wiphy)); |
338 | 337 | ||
339 | ret = iwl3945_led_register_led(priv, | 338 | ret = iwl3945_led_register_led(priv, |
340 | &priv->led[IWL_LED_TRG_ASSOC], | 339 | &priv->led39[IWL_LED_TRG_ASSOC], |
341 | IWL_LED_TRG_ASSOC, 0, trigger); | 340 | IWL_LED_TRG_ASSOC, 0, trigger); |
342 | 341 | ||
343 | /* for assoc always turn led on */ | 342 | /* for assoc always turn led on */ |
344 | priv->led[IWL_LED_TRG_ASSOC].led_on = iwl3945_led_on; | 343 | priv->led39[IWL_LED_TRG_ASSOC].led_on = iwl3945_led_on; |
345 | priv->led[IWL_LED_TRG_ASSOC].led_off = iwl3945_led_on; | 344 | priv->led39[IWL_LED_TRG_ASSOC].led_off = iwl3945_led_on; |
346 | priv->led[IWL_LED_TRG_ASSOC].led_pattern = NULL; | 345 | priv->led39[IWL_LED_TRG_ASSOC].led_pattern = NULL; |
347 | 346 | ||
348 | if (ret) | 347 | if (ret) |
349 | goto exit_fail; | 348 | goto exit_fail; |
350 | 349 | ||
351 | trigger = ieee80211_get_rx_led_name(priv->hw); | 350 | trigger = ieee80211_get_rx_led_name(priv->hw); |
352 | snprintf(priv->led[IWL_LED_TRG_RX].name, | 351 | snprintf(priv->led39[IWL_LED_TRG_RX].name, |
353 | sizeof(priv->led[IWL_LED_TRG_RX].name), "iwl-%s:RX", | 352 | sizeof(priv->led39[IWL_LED_TRG_RX].name), "iwl-%s:RX", |
354 | wiphy_name(priv->hw->wiphy)); | 353 | wiphy_name(priv->hw->wiphy)); |
355 | 354 | ||
356 | ret = iwl3945_led_register_led(priv, | 355 | ret = iwl3945_led_register_led(priv, |
357 | &priv->led[IWL_LED_TRG_RX], | 356 | &priv->led39[IWL_LED_TRG_RX], |
358 | IWL_LED_TRG_RX, 0, trigger); | 357 | IWL_LED_TRG_RX, 0, trigger); |
359 | 358 | ||
360 | priv->led[IWL_LED_TRG_RX].led_on = iwl3945_led_associated; | 359 | priv->led39[IWL_LED_TRG_RX].led_on = iwl3945_led_associated; |
361 | priv->led[IWL_LED_TRG_RX].led_off = iwl3945_led_associated; | 360 | priv->led39[IWL_LED_TRG_RX].led_off = iwl3945_led_associated; |
362 | priv->led[IWL_LED_TRG_RX].led_pattern = iwl3945_led_pattern; | 361 | priv->led39[IWL_LED_TRG_RX].led_pattern = iwl3945_led_pattern; |
363 | 362 | ||
364 | if (ret) | 363 | if (ret) |
365 | goto exit_fail; | 364 | goto exit_fail; |
366 | 365 | ||
367 | trigger = ieee80211_get_tx_led_name(priv->hw); | 366 | trigger = ieee80211_get_tx_led_name(priv->hw); |
368 | snprintf(priv->led[IWL_LED_TRG_TX].name, | 367 | snprintf(priv->led39[IWL_LED_TRG_TX].name, |
369 | sizeof(priv->led[IWL_LED_TRG_TX].name), "iwl-%s:TX", | 368 | sizeof(priv->led39[IWL_LED_TRG_TX].name), "iwl-%s:TX", |
370 | wiphy_name(priv->hw->wiphy)); | 369 | wiphy_name(priv->hw->wiphy)); |
371 | 370 | ||
372 | ret = iwl3945_led_register_led(priv, | 371 | ret = iwl3945_led_register_led(priv, |
373 | &priv->led[IWL_LED_TRG_TX], | 372 | &priv->led39[IWL_LED_TRG_TX], |
374 | IWL_LED_TRG_TX, 0, trigger); | 373 | IWL_LED_TRG_TX, 0, trigger); |
375 | 374 | ||
376 | priv->led[IWL_LED_TRG_TX].led_on = iwl3945_led_associated; | 375 | priv->led39[IWL_LED_TRG_TX].led_on = iwl3945_led_associated; |
377 | priv->led[IWL_LED_TRG_TX].led_off = iwl3945_led_associated; | 376 | priv->led39[IWL_LED_TRG_TX].led_off = iwl3945_led_associated; |
378 | priv->led[IWL_LED_TRG_TX].led_pattern = iwl3945_led_pattern; | 377 | priv->led39[IWL_LED_TRG_TX].led_pattern = iwl3945_led_pattern; |
379 | 378 | ||
380 | if (ret) | 379 | if (ret) |
381 | goto exit_fail; | 380 | goto exit_fail; |
@@ -402,11 +401,11 @@ static void iwl3945_led_unregister_led(struct iwl3945_led *led, u8 set_led) | |||
402 | } | 401 | } |
403 | 402 | ||
404 | /* Unregister all led handlers */ | 403 | /* Unregister all led handlers */ |
405 | void iwl3945_led_unregister(struct iwl3945_priv *priv) | 404 | void iwl3945_led_unregister(struct iwl_priv *priv) |
406 | { | 405 | { |
407 | iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_ASSOC], 0); | 406 | iwl3945_led_unregister_led(&priv->led39[IWL_LED_TRG_ASSOC], 0); |
408 | iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_RX], 0); | 407 | iwl3945_led_unregister_led(&priv->led39[IWL_LED_TRG_RX], 0); |
409 | iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_TX], 0); | 408 | iwl3945_led_unregister_led(&priv->led39[IWL_LED_TRG_TX], 0); |
410 | iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_RADIO], 1); | 409 | iwl3945_led_unregister_led(&priv->led39[IWL_LED_TRG_RADIO], 1); |
411 | } | 410 | } |
412 | 411 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-led.h b/drivers/net/wireless/iwlwifi/iwl-3945-led.h index 749ac035fd6a..88185a6ccd6a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945-led.h +++ b/drivers/net/wireless/iwlwifi/iwl-3945-led.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -27,48 +27,34 @@ | |||
27 | #ifndef IWL3945_LEDS_H | 27 | #ifndef IWL3945_LEDS_H |
28 | #define IWL3945_LEDS_H | 28 | #define IWL3945_LEDS_H |
29 | 29 | ||
30 | struct iwl3945_priv; | 30 | struct iwl_priv; |
31 | 31 | ||
32 | #ifdef CONFIG_IWL3945_LEDS | 32 | #ifdef CONFIG_IWL3945_LEDS |
33 | #define IWL_LED_SOLID 11 | ||
34 | #define IWL_LED_NAME_LEN 31 | ||
35 | #define IWL_DEF_LED_INTRVL __constant_cpu_to_le32(1000) | ||
36 | 33 | ||
37 | #define IWL_LED_ACTIVITY (0<<1) | 34 | #include "iwl-led.h" |
38 | #define IWL_LED_LINK (1<<1) | ||
39 | |||
40 | enum led_type { | ||
41 | IWL_LED_TRG_TX, | ||
42 | IWL_LED_TRG_RX, | ||
43 | IWL_LED_TRG_ASSOC, | ||
44 | IWL_LED_TRG_RADIO, | ||
45 | IWL_LED_TRG_MAX, | ||
46 | }; | ||
47 | |||
48 | #include <linux/leds.h> | ||
49 | 35 | ||
50 | struct iwl3945_led { | 36 | struct iwl3945_led { |
51 | struct iwl3945_priv *priv; | 37 | struct iwl_priv *priv; |
52 | struct led_classdev led_dev; | 38 | struct led_classdev led_dev; |
53 | char name[32]; | 39 | char name[32]; |
54 | 40 | ||
55 | int (*led_on) (struct iwl3945_priv *priv, int led_id); | 41 | int (*led_on) (struct iwl_priv *priv, int led_id); |
56 | int (*led_off) (struct iwl3945_priv *priv, int led_id); | 42 | int (*led_off) (struct iwl_priv *priv, int led_id); |
57 | int (*led_pattern) (struct iwl3945_priv *priv, int led_id, | 43 | int (*led_pattern) (struct iwl_priv *priv, int led_id, |
58 | unsigned int idx); | 44 | unsigned int idx); |
59 | 45 | ||
60 | enum led_type type; | 46 | enum led_type type; |
61 | unsigned int registered; | 47 | unsigned int registered; |
62 | }; | 48 | }; |
63 | 49 | ||
64 | extern int iwl3945_led_register(struct iwl3945_priv *priv); | 50 | extern int iwl3945_led_register(struct iwl_priv *priv); |
65 | extern void iwl3945_led_unregister(struct iwl3945_priv *priv); | 51 | extern void iwl3945_led_unregister(struct iwl_priv *priv); |
66 | extern void iwl3945_led_background(struct iwl3945_priv *priv); | 52 | extern void iwl3945_led_background(struct iwl_priv *priv); |
67 | 53 | ||
68 | #else | 54 | #else |
69 | static inline int iwl3945_led_register(struct iwl3945_priv *priv) { return 0; } | 55 | static inline int iwl3945_led_register(struct iwl_priv *priv) { return 0; } |
70 | static inline void iwl3945_led_unregister(struct iwl3945_priv *priv) {} | 56 | static inline void iwl3945_led_unregister(struct iwl_priv *priv) {} |
71 | static inline void iwl3945_led_background(struct iwl3945_priv *priv) {} | 57 | static inline void iwl3945_led_background(struct iwl_priv *priv) {} |
72 | #endif /* CONFIG_IWL3945_LEDS */ | 58 | #endif /* CONFIG_IWL3945_LEDS */ |
73 | 59 | ||
74 | #endif /* IWL3945_LEDS_H */ | 60 | #endif /* IWL3945_LEDS_H */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-rs.c b/drivers/net/wireless/iwlwifi/iwl-3945-rs.c index 21c841847d88..044abf734eb6 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945-rs.c +++ b/drivers/net/wireless/iwlwifi/iwl-3945-rs.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -36,6 +36,7 @@ | |||
36 | 36 | ||
37 | #include <linux/workqueue.h> | 37 | #include <linux/workqueue.h> |
38 | 38 | ||
39 | #include "iwl-commands.h" | ||
39 | #include "iwl-3945.h" | 40 | #include "iwl-3945.h" |
40 | 41 | ||
41 | #define RS_NAME "iwl-3945-rs" | 42 | #define RS_NAME "iwl-3945-rs" |
@@ -51,6 +52,7 @@ struct iwl3945_rate_scale_data { | |||
51 | 52 | ||
52 | struct iwl3945_rs_sta { | 53 | struct iwl3945_rs_sta { |
53 | spinlock_t lock; | 54 | spinlock_t lock; |
55 | struct iwl_priv *priv; | ||
54 | s32 *expected_tpt; | 56 | s32 *expected_tpt; |
55 | unsigned long last_partial_flush; | 57 | unsigned long last_partial_flush; |
56 | unsigned long last_flush; | 58 | unsigned long last_flush; |
@@ -62,7 +64,7 @@ struct iwl3945_rs_sta { | |||
62 | u8 start_rate; | 64 | u8 start_rate; |
63 | u8 ibss_sta_added; | 65 | u8 ibss_sta_added; |
64 | struct timer_list rate_scale_flush; | 66 | struct timer_list rate_scale_flush; |
65 | struct iwl3945_rate_scale_data win[IWL_RATE_COUNT]; | 67 | struct iwl3945_rate_scale_data win[IWL_RATE_COUNT_3945]; |
66 | #ifdef CONFIG_MAC80211_DEBUGFS | 68 | #ifdef CONFIG_MAC80211_DEBUGFS |
67 | struct dentry *rs_sta_dbgfs_stats_table_file; | 69 | struct dentry *rs_sta_dbgfs_stats_table_file; |
68 | #endif | 70 | #endif |
@@ -71,19 +73,19 @@ struct iwl3945_rs_sta { | |||
71 | int last_txrate_idx; | 73 | int last_txrate_idx; |
72 | }; | 74 | }; |
73 | 75 | ||
74 | static s32 iwl3945_expected_tpt_g[IWL_RATE_COUNT] = { | 76 | static s32 iwl3945_expected_tpt_g[IWL_RATE_COUNT_3945] = { |
75 | 7, 13, 35, 58, 0, 0, 76, 104, 130, 168, 191, 202 | 77 | 7, 13, 35, 58, 0, 0, 76, 104, 130, 168, 191, 202 |
76 | }; | 78 | }; |
77 | 79 | ||
78 | static s32 iwl3945_expected_tpt_g_prot[IWL_RATE_COUNT] = { | 80 | static s32 iwl3945_expected_tpt_g_prot[IWL_RATE_COUNT_3945] = { |
79 | 7, 13, 35, 58, 0, 0, 0, 80, 93, 113, 123, 125 | 81 | 7, 13, 35, 58, 0, 0, 0, 80, 93, 113, 123, 125 |
80 | }; | 82 | }; |
81 | 83 | ||
82 | static s32 iwl3945_expected_tpt_a[IWL_RATE_COUNT] = { | 84 | static s32 iwl3945_expected_tpt_a[IWL_RATE_COUNT_3945] = { |
83 | 0, 0, 0, 0, 40, 57, 72, 98, 121, 154, 177, 186 | 85 | 0, 0, 0, 0, 40, 57, 72, 98, 121, 154, 177, 186 |
84 | }; | 86 | }; |
85 | 87 | ||
86 | static s32 iwl3945_expected_tpt_b[IWL_RATE_COUNT] = { | 88 | static s32 iwl3945_expected_tpt_b[IWL_RATE_COUNT_3945] = { |
87 | 7, 13, 35, 58, 0, 0, 0, 0, 0, 0, 0, 0 | 89 | 7, 13, 35, 58, 0, 0, 0, 0, 0, 0, 0, 0 |
88 | }; | 90 | }; |
89 | 91 | ||
@@ -119,7 +121,7 @@ static struct iwl3945_tpt_entry iwl3945_tpt_table_g[] = { | |||
119 | #define IWL_RATE_MAX_WINDOW 62 | 121 | #define IWL_RATE_MAX_WINDOW 62 |
120 | #define IWL_RATE_FLUSH (3*HZ) | 122 | #define IWL_RATE_FLUSH (3*HZ) |
121 | #define IWL_RATE_WIN_FLUSH (HZ/2) | 123 | #define IWL_RATE_WIN_FLUSH (HZ/2) |
122 | #define IWL_RATE_HIGH_TH 11520 | 124 | #define IWL39_RATE_HIGH_TH 11520 |
123 | #define IWL_SUCCESS_UP_TH 8960 | 125 | #define IWL_SUCCESS_UP_TH 8960 |
124 | #define IWL_SUCCESS_DOWN_TH 10880 | 126 | #define IWL_SUCCESS_DOWN_TH 10880 |
125 | #define IWL_RATE_MIN_FAILURE_TH 8 | 127 | #define IWL_RATE_MIN_FAILURE_TH 8 |
@@ -165,7 +167,7 @@ static void iwl3945_clear_window(struct iwl3945_rate_scale_data *window) | |||
165 | window->success_counter = 0; | 167 | window->success_counter = 0; |
166 | window->success_ratio = -1; | 168 | window->success_ratio = -1; |
167 | window->counter = 0; | 169 | window->counter = 0; |
168 | window->average_tpt = IWL_INV_TPT; | 170 | window->average_tpt = IWL_INVALID_VALUE; |
169 | window->stamp = 0; | 171 | window->stamp = 0; |
170 | } | 172 | } |
171 | 173 | ||
@@ -181,13 +183,14 @@ static int iwl3945_rate_scale_flush_windows(struct iwl3945_rs_sta *rs_sta) | |||
181 | int unflushed = 0; | 183 | int unflushed = 0; |
182 | int i; | 184 | int i; |
183 | unsigned long flags; | 185 | unsigned long flags; |
186 | struct iwl_priv *priv = rs_sta->priv; | ||
184 | 187 | ||
185 | /* | 188 | /* |
186 | * For each rate, if we have collected data on that rate | 189 | * For each rate, if we have collected data on that rate |
187 | * and it has been more than IWL_RATE_WIN_FLUSH | 190 | * and it has been more than IWL_RATE_WIN_FLUSH |
188 | * since we flushed, clear out the gathered statistics | 191 | * since we flushed, clear out the gathered statistics |
189 | */ | 192 | */ |
190 | for (i = 0; i < IWL_RATE_COUNT; i++) { | 193 | for (i = 0; i < IWL_RATE_COUNT_3945; i++) { |
191 | if (!rs_sta->win[i].counter) | 194 | if (!rs_sta->win[i].counter) |
192 | continue; | 195 | continue; |
193 | 196 | ||
@@ -213,6 +216,7 @@ static int iwl3945_rate_scale_flush_windows(struct iwl3945_rs_sta *rs_sta) | |||
213 | static void iwl3945_bg_rate_scale_flush(unsigned long data) | 216 | static void iwl3945_bg_rate_scale_flush(unsigned long data) |
214 | { | 217 | { |
215 | struct iwl3945_rs_sta *rs_sta = (void *)data; | 218 | struct iwl3945_rs_sta *rs_sta = (void *)data; |
219 | struct iwl_priv *priv = rs_sta->priv; | ||
216 | int unflushed = 0; | 220 | int unflushed = 0; |
217 | unsigned long flags; | 221 | unsigned long flags; |
218 | u32 packet_count, duration, pps; | 222 | u32 packet_count, duration, pps; |
@@ -286,6 +290,7 @@ static void iwl3945_collect_tx_data(struct iwl3945_rs_sta *rs_sta, | |||
286 | { | 290 | { |
287 | unsigned long flags; | 291 | unsigned long flags; |
288 | s32 fail_count; | 292 | s32 fail_count; |
293 | struct iwl_priv *priv = rs_sta->priv; | ||
289 | 294 | ||
290 | if (!retries) { | 295 | if (!retries) { |
291 | IWL_DEBUG_RATE("leave: retries == 0 -- should be at least 1\n"); | 296 | IWL_DEBUG_RATE("leave: retries == 0 -- should be at least 1\n"); |
@@ -329,7 +334,7 @@ static void iwl3945_collect_tx_data(struct iwl3945_rs_sta *rs_sta, | |||
329 | window->average_tpt = ((window->success_ratio * | 334 | window->average_tpt = ((window->success_ratio * |
330 | rs_sta->expected_tpt[index] + 64) / 128); | 335 | rs_sta->expected_tpt[index] + 64) / 128); |
331 | else | 336 | else |
332 | window->average_tpt = IWL_INV_TPT; | 337 | window->average_tpt = IWL_INVALID_VALUE; |
333 | 338 | ||
334 | spin_unlock_irqrestore(&rs_sta->lock, flags); | 339 | spin_unlock_irqrestore(&rs_sta->lock, flags); |
335 | 340 | ||
@@ -339,7 +344,7 @@ static void rs_rate_init(void *priv_r, struct ieee80211_supported_band *sband, | |||
339 | struct ieee80211_sta *sta, void *priv_sta) | 344 | struct ieee80211_sta *sta, void *priv_sta) |
340 | { | 345 | { |
341 | struct iwl3945_rs_sta *rs_sta = priv_sta; | 346 | struct iwl3945_rs_sta *rs_sta = priv_sta; |
342 | struct iwl3945_priv *priv = (struct iwl3945_priv *)priv_r; | 347 | struct iwl_priv *priv = (struct iwl_priv *)priv_r; |
343 | int i; | 348 | int i; |
344 | 349 | ||
345 | IWL_DEBUG_RATE("enter\n"); | 350 | IWL_DEBUG_RATE("enter\n"); |
@@ -379,10 +384,11 @@ static void rs_free(void *priv) | |||
379 | return; | 384 | return; |
380 | } | 385 | } |
381 | 386 | ||
382 | static void *rs_alloc_sta(void *priv, struct ieee80211_sta *sta, gfp_t gfp) | 387 | static void *rs_alloc_sta(void *iwl_priv, struct ieee80211_sta *sta, gfp_t gfp) |
383 | { | 388 | { |
384 | struct iwl3945_rs_sta *rs_sta; | 389 | struct iwl3945_rs_sta *rs_sta; |
385 | struct iwl3945_sta_priv *psta = (void *) sta->drv_priv; | 390 | struct iwl3945_sta_priv *psta = (void *) sta->drv_priv; |
391 | struct iwl_priv *priv = iwl_priv; | ||
386 | int i; | 392 | int i; |
387 | 393 | ||
388 | /* | 394 | /* |
@@ -402,6 +408,8 @@ static void *rs_alloc_sta(void *priv, struct ieee80211_sta *sta, gfp_t gfp) | |||
402 | 408 | ||
403 | spin_lock_init(&rs_sta->lock); | 409 | spin_lock_init(&rs_sta->lock); |
404 | 410 | ||
411 | rs_sta->priv = priv; | ||
412 | |||
405 | rs_sta->start_rate = IWL_RATE_INVALID; | 413 | rs_sta->start_rate = IWL_RATE_INVALID; |
406 | 414 | ||
407 | /* default to just 802.11b */ | 415 | /* default to just 802.11b */ |
@@ -417,7 +425,7 @@ static void *rs_alloc_sta(void *priv, struct ieee80211_sta *sta, gfp_t gfp) | |||
417 | rs_sta->rate_scale_flush.data = (unsigned long)rs_sta; | 425 | rs_sta->rate_scale_flush.data = (unsigned long)rs_sta; |
418 | rs_sta->rate_scale_flush.function = &iwl3945_bg_rate_scale_flush; | 426 | rs_sta->rate_scale_flush.function = &iwl3945_bg_rate_scale_flush; |
419 | 427 | ||
420 | for (i = 0; i < IWL_RATE_COUNT; i++) | 428 | for (i = 0; i < IWL_RATE_COUNT_3945; i++) |
421 | iwl3945_clear_window(&rs_sta->win[i]); | 429 | iwl3945_clear_window(&rs_sta->win[i]); |
422 | 430 | ||
423 | IWL_DEBUG_RATE("leave\n"); | 431 | IWL_DEBUG_RATE("leave\n"); |
@@ -425,11 +433,12 @@ static void *rs_alloc_sta(void *priv, struct ieee80211_sta *sta, gfp_t gfp) | |||
425 | return rs_sta; | 433 | return rs_sta; |
426 | } | 434 | } |
427 | 435 | ||
428 | static void rs_free_sta(void *priv, struct ieee80211_sta *sta, | 436 | static void rs_free_sta(void *iwl_priv, struct ieee80211_sta *sta, |
429 | void *priv_sta) | 437 | void *priv_sta) |
430 | { | 438 | { |
431 | struct iwl3945_sta_priv *psta = (void *) sta->drv_priv; | 439 | struct iwl3945_sta_priv *psta = (void *) sta->drv_priv; |
432 | struct iwl3945_rs_sta *rs_sta = priv_sta; | 440 | struct iwl3945_rs_sta *rs_sta = priv_sta; |
441 | struct iwl_priv *priv = rs_sta->priv; | ||
433 | 442 | ||
434 | psta->rs_sta = NULL; | 443 | psta->rs_sta = NULL; |
435 | 444 | ||
@@ -443,7 +452,7 @@ static void rs_free_sta(void *priv, struct ieee80211_sta *sta, | |||
443 | /** | 452 | /** |
444 | * rs_tx_status - Update rate control values based on Tx results | 453 | * rs_tx_status - Update rate control values based on Tx results |
445 | * | 454 | * |
446 | * NOTE: Uses iwl3945_priv->retry_rate for the # of retries attempted by | 455 | * NOTE: Uses iwl_priv->retry_rate for the # of retries attempted by |
447 | * the hardware for each rate. | 456 | * the hardware for each rate. |
448 | */ | 457 | */ |
449 | static void rs_tx_status(void *priv_rate, struct ieee80211_supported_band *sband, | 458 | static void rs_tx_status(void *priv_rate, struct ieee80211_supported_band *sband, |
@@ -453,7 +462,7 @@ static void rs_tx_status(void *priv_rate, struct ieee80211_supported_band *sband | |||
453 | s8 retries = 0, current_count; | 462 | s8 retries = 0, current_count; |
454 | int scale_rate_index, first_index, last_index; | 463 | int scale_rate_index, first_index, last_index; |
455 | unsigned long flags; | 464 | unsigned long flags; |
456 | struct iwl3945_priv *priv = (struct iwl3945_priv *)priv_rate; | 465 | struct iwl_priv *priv = (struct iwl_priv *)priv_rate; |
457 | struct iwl3945_rs_sta *rs_sta = priv_sta; | 466 | struct iwl3945_rs_sta *rs_sta = priv_sta; |
458 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 467 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
459 | 468 | ||
@@ -462,7 +471,7 @@ static void rs_tx_status(void *priv_rate, struct ieee80211_supported_band *sband | |||
462 | retries = info->status.rates[0].count; | 471 | retries = info->status.rates[0].count; |
463 | 472 | ||
464 | first_index = sband->bitrates[info->status.rates[0].idx].hw_value; | 473 | first_index = sband->bitrates[info->status.rates[0].idx].hw_value; |
465 | if ((first_index < 0) || (first_index >= IWL_RATE_COUNT)) { | 474 | if ((first_index < 0) || (first_index >= IWL_RATE_COUNT_3945)) { |
466 | IWL_DEBUG_RATE("leave: Rate out of bounds: %d\n", first_index); | 475 | IWL_DEBUG_RATE("leave: Rate out of bounds: %d\n", first_index); |
467 | return; | 476 | return; |
468 | } | 477 | } |
@@ -547,6 +556,7 @@ static u16 iwl3945_get_adjacent_rate(struct iwl3945_rs_sta *rs_sta, | |||
547 | { | 556 | { |
548 | u8 high = IWL_RATE_INVALID; | 557 | u8 high = IWL_RATE_INVALID; |
549 | u8 low = IWL_RATE_INVALID; | 558 | u8 low = IWL_RATE_INVALID; |
559 | struct iwl_priv *priv = rs_sta->priv; | ||
550 | 560 | ||
551 | /* 802.11A walks to the next literal adjacent rate in | 561 | /* 802.11A walks to the next literal adjacent rate in |
552 | * the rate table */ | 562 | * the rate table */ |
@@ -565,7 +575,8 @@ static u16 iwl3945_get_adjacent_rate(struct iwl3945_rs_sta *rs_sta, | |||
565 | 575 | ||
566 | /* Find the next rate that is in the rate mask */ | 576 | /* Find the next rate that is in the rate mask */ |
567 | i = index + 1; | 577 | i = index + 1; |
568 | for (mask = (1 << i); i < IWL_RATE_COUNT; i++, mask <<= 1) { | 578 | for (mask = (1 << i); i < IWL_RATE_COUNT_3945; |
579 | i++, mask <<= 1) { | ||
569 | if (rate_mask & mask) { | 580 | if (rate_mask & mask) { |
570 | high = i; | 581 | high = i; |
571 | break; | 582 | break; |
@@ -631,16 +642,17 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta, | |||
631 | int index; | 642 | int index; |
632 | struct iwl3945_rs_sta *rs_sta = priv_sta; | 643 | struct iwl3945_rs_sta *rs_sta = priv_sta; |
633 | struct iwl3945_rate_scale_data *window = NULL; | 644 | struct iwl3945_rate_scale_data *window = NULL; |
634 | int current_tpt = IWL_INV_TPT; | 645 | int current_tpt = IWL_INVALID_VALUE; |
635 | int low_tpt = IWL_INV_TPT; | 646 | int low_tpt = IWL_INVALID_VALUE; |
636 | int high_tpt = IWL_INV_TPT; | 647 | int high_tpt = IWL_INVALID_VALUE; |
637 | u32 fail_count; | 648 | u32 fail_count; |
638 | s8 scale_action = 0; | 649 | s8 scale_action = 0; |
639 | unsigned long flags; | 650 | unsigned long flags; |
640 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | 651 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
641 | u16 fc; | 652 | u16 fc; |
642 | u16 rate_mask = 0; | 653 | u16 rate_mask = 0; |
643 | struct iwl3945_priv *priv = (struct iwl3945_priv *)priv_r; | 654 | s8 max_rate_idx = -1; |
655 | struct iwl_priv *priv = (struct iwl_priv *)priv_r; | ||
644 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 656 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
645 | 657 | ||
646 | IWL_DEBUG_RATE("enter\n"); | 658 | IWL_DEBUG_RATE("enter\n"); |
@@ -664,7 +676,14 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta, | |||
664 | return; | 676 | return; |
665 | } | 677 | } |
666 | 678 | ||
667 | index = min(rs_sta->last_txrate_idx & 0xffff, IWL_RATE_COUNT - 1); | 679 | /* get user max rate if set */ |
680 | max_rate_idx = txrc->max_rate_idx; | ||
681 | if ((sband->band == IEEE80211_BAND_5GHZ) && (max_rate_idx != -1)) | ||
682 | max_rate_idx += IWL_FIRST_OFDM_RATE; | ||
683 | if ((max_rate_idx < 0) || (max_rate_idx >= IWL_RATE_COUNT)) | ||
684 | max_rate_idx = -1; | ||
685 | |||
686 | index = min(rs_sta->last_txrate_idx & 0xffff, IWL_RATE_COUNT_3945 - 1); | ||
668 | 687 | ||
669 | if (sband->band == IEEE80211_BAND_5GHZ) | 688 | if (sband->band == IEEE80211_BAND_5GHZ) |
670 | rate_mask = rate_mask << IWL_FIRST_OFDM_RATE; | 689 | rate_mask = rate_mask << IWL_FIRST_OFDM_RATE; |
@@ -695,6 +714,12 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta, | |||
695 | rs_sta->start_rate = IWL_RATE_INVALID; | 714 | rs_sta->start_rate = IWL_RATE_INVALID; |
696 | } | 715 | } |
697 | 716 | ||
717 | /* force user max rate if set by user */ | ||
718 | if ((max_rate_idx != -1) && (max_rate_idx < index)) { | ||
719 | if (rate_mask & (1 << max_rate_idx)) | ||
720 | index = max_rate_idx; | ||
721 | } | ||
722 | |||
698 | window = &(rs_sta->win[index]); | 723 | window = &(rs_sta->win[index]); |
699 | 724 | ||
700 | fail_count = window->counter - window->success_counter; | 725 | fail_count = window->counter - window->success_counter; |
@@ -721,6 +746,10 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta, | |||
721 | low = high_low & 0xff; | 746 | low = high_low & 0xff; |
722 | high = (high_low >> 8) & 0xff; | 747 | high = (high_low >> 8) & 0xff; |
723 | 748 | ||
749 | /* If user set max rate, dont allow higher than user constrain */ | ||
750 | if ((max_rate_idx != -1) && (max_rate_idx < high)) | ||
751 | high = IWL_RATE_INVALID; | ||
752 | |||
724 | if (low != IWL_RATE_INVALID) | 753 | if (low != IWL_RATE_INVALID) |
725 | low_tpt = rs_sta->win[low].average_tpt; | 754 | low_tpt = rs_sta->win[low].average_tpt; |
726 | 755 | ||
@@ -734,16 +763,18 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta, | |||
734 | if ((window->success_ratio < IWL_RATE_DECREASE_TH) || !current_tpt) { | 763 | if ((window->success_ratio < IWL_RATE_DECREASE_TH) || !current_tpt) { |
735 | IWL_DEBUG_RATE("decrease rate because of low success_ratio\n"); | 764 | IWL_DEBUG_RATE("decrease rate because of low success_ratio\n"); |
736 | scale_action = -1; | 765 | scale_action = -1; |
737 | } else if ((low_tpt == IWL_INV_TPT) && (high_tpt == IWL_INV_TPT)) | 766 | } else if ((low_tpt == IWL_INVALID_VALUE) && |
767 | (high_tpt == IWL_INVALID_VALUE)) | ||
738 | scale_action = 1; | 768 | scale_action = 1; |
739 | else if ((low_tpt != IWL_INV_TPT) && (high_tpt != IWL_INV_TPT) && | 769 | else if ((low_tpt != IWL_INVALID_VALUE) && |
770 | (high_tpt != IWL_INVALID_VALUE) && | ||
740 | (low_tpt < current_tpt) && (high_tpt < current_tpt)) { | 771 | (low_tpt < current_tpt) && (high_tpt < current_tpt)) { |
741 | IWL_DEBUG_RATE("No action -- low [%d] & high [%d] < " | 772 | IWL_DEBUG_RATE("No action -- low [%d] & high [%d] < " |
742 | "current_tpt [%d]\n", | 773 | "current_tpt [%d]\n", |
743 | low_tpt, high_tpt, current_tpt); | 774 | low_tpt, high_tpt, current_tpt); |
744 | scale_action = 0; | 775 | scale_action = 0; |
745 | } else { | 776 | } else { |
746 | if (high_tpt != IWL_INV_TPT) { | 777 | if (high_tpt != IWL_INVALID_VALUE) { |
747 | if (high_tpt > current_tpt) | 778 | if (high_tpt > current_tpt) |
748 | scale_action = 1; | 779 | scale_action = 1; |
749 | else { | 780 | else { |
@@ -751,7 +782,7 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta, | |||
751 | ("decrease rate because of high tpt\n"); | 782 | ("decrease rate because of high tpt\n"); |
752 | scale_action = -1; | 783 | scale_action = -1; |
753 | } | 784 | } |
754 | } else if (low_tpt != IWL_INV_TPT) { | 785 | } else if (low_tpt != IWL_INVALID_VALUE) { |
755 | if (low_tpt > current_tpt) { | 786 | if (low_tpt > current_tpt) { |
756 | IWL_DEBUG_RATE | 787 | IWL_DEBUG_RATE |
757 | ("decrease rate because of low tpt\n"); | 788 | ("decrease rate because of low tpt\n"); |
@@ -825,7 +856,7 @@ static ssize_t iwl3945_sta_dbgfs_stats_table_read(struct file *file, | |||
825 | lq_sta->tx_packets, | 856 | lq_sta->tx_packets, |
826 | lq_sta->last_txrate_idx, | 857 | lq_sta->last_txrate_idx, |
827 | lq_sta->start_rate, jiffies_to_msecs(lq_sta->flush_time)); | 858 | lq_sta->start_rate, jiffies_to_msecs(lq_sta->flush_time)); |
828 | for (j = 0; j < IWL_RATE_COUNT; j++) { | 859 | for (j = 0; j < IWL_RATE_COUNT_3945; j++) { |
829 | desc += sprintf(buff+desc, | 860 | desc += sprintf(buff+desc, |
830 | "counter=%d success=%d %%=%d\n", | 861 | "counter=%d success=%d %%=%d\n", |
831 | lq_sta->win[j].counter, | 862 | lq_sta->win[j].counter, |
@@ -877,7 +908,7 @@ static struct rate_control_ops rs_ops = { | |||
877 | 908 | ||
878 | void iwl3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id) | 909 | void iwl3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id) |
879 | { | 910 | { |
880 | struct iwl3945_priv *priv = hw->priv; | 911 | struct iwl_priv *priv = hw->priv; |
881 | s32 rssi = 0; | 912 | s32 rssi = 0; |
882 | unsigned long flags; | 913 | unsigned long flags; |
883 | struct iwl3945_rs_sta *rs_sta; | 914 | struct iwl3945_rs_sta *rs_sta; |
@@ -888,7 +919,7 @@ void iwl3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id) | |||
888 | 919 | ||
889 | rcu_read_lock(); | 920 | rcu_read_lock(); |
890 | 921 | ||
891 | sta = ieee80211_find_sta(hw, priv->stations[sta_id].sta.sta.addr); | 922 | sta = ieee80211_find_sta(hw, priv->stations_39[sta_id].sta.sta.addr); |
892 | if (!sta) { | 923 | if (!sta) { |
893 | rcu_read_unlock(); | 924 | rcu_read_unlock(); |
894 | return; | 925 | return; |
@@ -903,7 +934,7 @@ void iwl3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id) | |||
903 | switch (priv->band) { | 934 | switch (priv->band) { |
904 | case IEEE80211_BAND_2GHZ: | 935 | case IEEE80211_BAND_2GHZ: |
905 | /* TODO: this always does G, not a regression */ | 936 | /* TODO: this always does G, not a regression */ |
906 | if (priv->active_rxon.flags & RXON_FLG_TGG_PROTECT_MSK) { | 937 | if (priv->active39_rxon.flags & RXON_FLG_TGG_PROTECT_MSK) { |
907 | rs_sta->tgg = 1; | 938 | rs_sta->tgg = 1; |
908 | rs_sta->expected_tpt = iwl3945_expected_tpt_g_prot; | 939 | rs_sta->expected_tpt = iwl3945_expected_tpt_g_prot; |
909 | } else | 940 | } else |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-rs.h b/drivers/net/wireless/iwlwifi/iwl-3945-rs.h deleted file mode 100644 index b5a66135dedd..000000000000 --- a/drivers/net/wireless/iwlwifi/iwl-3945-rs.h +++ /dev/null | |||
@@ -1,206 +0,0 @@ | |||
1 | /****************************************************************************** | ||
2 | * | ||
3 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of version 2 of the GNU General Public License as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
12 | * more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along with | ||
15 | * this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | ||
17 | * | ||
18 | * The full GNU General Public License is included in this distribution in the | ||
19 | * file called LICENSE. | ||
20 | * | ||
21 | * Contact Information: | ||
22 | * Intel Linux Wireless <ilw@linux.intel.com> | ||
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
24 | * | ||
25 | *****************************************************************************/ | ||
26 | |||
27 | #ifndef __iwl_3945_rs_h__ | ||
28 | #define __iwl_3945_rs_h__ | ||
29 | |||
30 | struct iwl3945_rate_info { | ||
31 | u8 plcp; /* uCode API: IWL_RATE_6M_PLCP, etc. */ | ||
32 | u8 ieee; /* MAC header: IWL_RATE_6M_IEEE, etc. */ | ||
33 | u8 prev_ieee; /* previous rate in IEEE speeds */ | ||
34 | u8 next_ieee; /* next rate in IEEE speeds */ | ||
35 | u8 prev_rs; /* previous rate used in rs algo */ | ||
36 | u8 next_rs; /* next rate used in rs algo */ | ||
37 | u8 prev_rs_tgg; /* previous rate used in TGG rs algo */ | ||
38 | u8 next_rs_tgg; /* next rate used in TGG rs algo */ | ||
39 | u8 table_rs_index; /* index in rate scale table cmd */ | ||
40 | u8 prev_table_rs; /* prev in rate table cmd */ | ||
41 | }; | ||
42 | |||
43 | /* | ||
44 | * These serve as indexes into | ||
45 | * struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT]; | ||
46 | */ | ||
47 | enum { | ||
48 | IWL_RATE_1M_INDEX = 0, | ||
49 | IWL_RATE_2M_INDEX, | ||
50 | IWL_RATE_5M_INDEX, | ||
51 | IWL_RATE_11M_INDEX, | ||
52 | IWL_RATE_6M_INDEX, | ||
53 | IWL_RATE_9M_INDEX, | ||
54 | IWL_RATE_12M_INDEX, | ||
55 | IWL_RATE_18M_INDEX, | ||
56 | IWL_RATE_24M_INDEX, | ||
57 | IWL_RATE_36M_INDEX, | ||
58 | IWL_RATE_48M_INDEX, | ||
59 | IWL_RATE_54M_INDEX, | ||
60 | IWL_RATE_COUNT, | ||
61 | IWL_RATE_INVM_INDEX, | ||
62 | IWL_RATE_INVALID = IWL_RATE_INVM_INDEX | ||
63 | }; | ||
64 | |||
65 | enum { | ||
66 | IWL_RATE_6M_INDEX_TABLE = 0, | ||
67 | IWL_RATE_9M_INDEX_TABLE, | ||
68 | IWL_RATE_12M_INDEX_TABLE, | ||
69 | IWL_RATE_18M_INDEX_TABLE, | ||
70 | IWL_RATE_24M_INDEX_TABLE, | ||
71 | IWL_RATE_36M_INDEX_TABLE, | ||
72 | IWL_RATE_48M_INDEX_TABLE, | ||
73 | IWL_RATE_54M_INDEX_TABLE, | ||
74 | IWL_RATE_1M_INDEX_TABLE, | ||
75 | IWL_RATE_2M_INDEX_TABLE, | ||
76 | IWL_RATE_5M_INDEX_TABLE, | ||
77 | IWL_RATE_11M_INDEX_TABLE, | ||
78 | IWL_RATE_INVM_INDEX_TABLE = IWL_RATE_INVM_INDEX, | ||
79 | }; | ||
80 | |||
81 | enum { | ||
82 | IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX, | ||
83 | IWL_LAST_OFDM_RATE = IWL_RATE_54M_INDEX, | ||
84 | IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX, | ||
85 | IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX, | ||
86 | }; | ||
87 | |||
88 | /* #define vs. enum to keep from defaulting to 'large integer' */ | ||
89 | #define IWL_RATE_6M_MASK (1 << IWL_RATE_6M_INDEX) | ||
90 | #define IWL_RATE_9M_MASK (1 << IWL_RATE_9M_INDEX) | ||
91 | #define IWL_RATE_12M_MASK (1 << IWL_RATE_12M_INDEX) | ||
92 | #define IWL_RATE_18M_MASK (1 << IWL_RATE_18M_INDEX) | ||
93 | #define IWL_RATE_24M_MASK (1 << IWL_RATE_24M_INDEX) | ||
94 | #define IWL_RATE_36M_MASK (1 << IWL_RATE_36M_INDEX) | ||
95 | #define IWL_RATE_48M_MASK (1 << IWL_RATE_48M_INDEX) | ||
96 | #define IWL_RATE_54M_MASK (1 << IWL_RATE_54M_INDEX) | ||
97 | #define IWL_RATE_1M_MASK (1 << IWL_RATE_1M_INDEX) | ||
98 | #define IWL_RATE_2M_MASK (1 << IWL_RATE_2M_INDEX) | ||
99 | #define IWL_RATE_5M_MASK (1 << IWL_RATE_5M_INDEX) | ||
100 | #define IWL_RATE_11M_MASK (1 << IWL_RATE_11M_INDEX) | ||
101 | |||
102 | /* 3945 uCode API values for (legacy) bit rates, both OFDM and CCK */ | ||
103 | enum { | ||
104 | IWL_RATE_6M_PLCP = 13, | ||
105 | IWL_RATE_9M_PLCP = 15, | ||
106 | IWL_RATE_12M_PLCP = 5, | ||
107 | IWL_RATE_18M_PLCP = 7, | ||
108 | IWL_RATE_24M_PLCP = 9, | ||
109 | IWL_RATE_36M_PLCP = 11, | ||
110 | IWL_RATE_48M_PLCP = 1, | ||
111 | IWL_RATE_54M_PLCP = 3, | ||
112 | IWL_RATE_1M_PLCP = 10, | ||
113 | IWL_RATE_2M_PLCP = 20, | ||
114 | IWL_RATE_5M_PLCP = 55, | ||
115 | IWL_RATE_11M_PLCP = 110, | ||
116 | }; | ||
117 | |||
118 | /* MAC header values for bit rates */ | ||
119 | enum { | ||
120 | IWL_RATE_6M_IEEE = 12, | ||
121 | IWL_RATE_9M_IEEE = 18, | ||
122 | IWL_RATE_12M_IEEE = 24, | ||
123 | IWL_RATE_18M_IEEE = 36, | ||
124 | IWL_RATE_24M_IEEE = 48, | ||
125 | IWL_RATE_36M_IEEE = 72, | ||
126 | IWL_RATE_48M_IEEE = 96, | ||
127 | IWL_RATE_54M_IEEE = 108, | ||
128 | IWL_RATE_1M_IEEE = 2, | ||
129 | IWL_RATE_2M_IEEE = 4, | ||
130 | IWL_RATE_5M_IEEE = 11, | ||
131 | IWL_RATE_11M_IEEE = 22, | ||
132 | }; | ||
133 | |||
134 | #define IWL_CCK_BASIC_RATES_MASK \ | ||
135 | (IWL_RATE_1M_MASK | \ | ||
136 | IWL_RATE_2M_MASK) | ||
137 | |||
138 | #define IWL_CCK_RATES_MASK \ | ||
139 | (IWL_BASIC_RATES_MASK | \ | ||
140 | IWL_RATE_5M_MASK | \ | ||
141 | IWL_RATE_11M_MASK) | ||
142 | |||
143 | #define IWL_OFDM_BASIC_RATES_MASK \ | ||
144 | (IWL_RATE_6M_MASK | \ | ||
145 | IWL_RATE_12M_MASK | \ | ||
146 | IWL_RATE_24M_MASK) | ||
147 | |||
148 | #define IWL_OFDM_RATES_MASK \ | ||
149 | (IWL_OFDM_BASIC_RATES_MASK | \ | ||
150 | IWL_RATE_9M_MASK | \ | ||
151 | IWL_RATE_18M_MASK | \ | ||
152 | IWL_RATE_36M_MASK | \ | ||
153 | IWL_RATE_48M_MASK | \ | ||
154 | IWL_RATE_54M_MASK) | ||
155 | |||
156 | #define IWL_BASIC_RATES_MASK \ | ||
157 | (IWL_OFDM_BASIC_RATES_MASK | \ | ||
158 | IWL_CCK_BASIC_RATES_MASK) | ||
159 | |||
160 | #define IWL_RATES_MASK ((1 << IWL_RATE_COUNT) - 1) | ||
161 | |||
162 | #define IWL_INV_TPT -1 | ||
163 | |||
164 | #define IWL_MIN_RSSI_VAL -100 | ||
165 | #define IWL_MAX_RSSI_VAL 0 | ||
166 | |||
167 | extern const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT]; | ||
168 | |||
169 | static inline u8 iwl3945_get_prev_ieee_rate(u8 rate_index) | ||
170 | { | ||
171 | u8 rate = iwl3945_rates[rate_index].prev_ieee; | ||
172 | |||
173 | if (rate == IWL_RATE_INVALID) | ||
174 | rate = rate_index; | ||
175 | return rate; | ||
176 | } | ||
177 | |||
178 | /** | ||
179 | * iwl3945_rate_scale_init - Initialize the rate scale table based on assoc info | ||
180 | * | ||
181 | * The specific throughput table used is based on the type of network | ||
182 | * the associated with, including A, B, G, and G w/ TGG protection | ||
183 | */ | ||
184 | extern void iwl3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id); | ||
185 | |||
186 | /** | ||
187 | * iwl3945_rate_control_register - Register the rate control algorithm callbacks | ||
188 | * | ||
189 | * Since the rate control algorithm is hardware specific, there is no need | ||
190 | * or reason to place it as a stand alone module. The driver can call | ||
191 | * iwl3945_rate_control_register in order to register the rate control callbacks | ||
192 | * with the mac80211 subsystem. This should be performed prior to calling | ||
193 | * ieee80211_register_hw | ||
194 | * | ||
195 | */ | ||
196 | extern int iwl3945_rate_control_register(void); | ||
197 | |||
198 | /** | ||
199 | * iwl3945_rate_control_unregister - Unregister the rate control callbacks | ||
200 | * | ||
201 | * This should be called after calling ieee80211_unregister_hw, but before | ||
202 | * the driver is unloaded. | ||
203 | */ | ||
204 | extern void iwl3945_rate_control_unregister(void); | ||
205 | |||
206 | #endif | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c index 45cfa1cf194a..12f93b6207d6 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945.c +++ b/drivers/net/wireless/iwlwifi/iwl-3945.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -38,10 +38,15 @@ | |||
38 | #include <asm/unaligned.h> | 38 | #include <asm/unaligned.h> |
39 | #include <net/mac80211.h> | 39 | #include <net/mac80211.h> |
40 | 40 | ||
41 | #include "iwl-3945-core.h" | 41 | #include "iwl-fh.h" |
42 | #include "iwl-3945-fh.h" | ||
43 | #include "iwl-commands.h" | ||
44 | #include "iwl-sta.h" | ||
42 | #include "iwl-3945.h" | 45 | #include "iwl-3945.h" |
46 | #include "iwl-eeprom.h" | ||
43 | #include "iwl-helpers.h" | 47 | #include "iwl-helpers.h" |
44 | #include "iwl-3945-rs.h" | 48 | #include "iwl-core.h" |
49 | #include "iwl-agn-rs.h" | ||
45 | 50 | ||
46 | #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \ | 51 | #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \ |
47 | [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \ | 52 | [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \ |
@@ -63,7 +68,7 @@ | |||
63 | * maps to IWL_RATE_INVALID | 68 | * maps to IWL_RATE_INVALID |
64 | * | 69 | * |
65 | */ | 70 | */ |
66 | const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = { | 71 | const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT_3945] = { |
67 | IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */ | 72 | IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */ |
68 | IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */ | 73 | IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */ |
69 | IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */ | 74 | IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */ |
@@ -91,7 +96,7 @@ const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = { | |||
91 | * Use for only special debugging. This function is just a placeholder as-is, | 96 | * Use for only special debugging. This function is just a placeholder as-is, |
92 | * you'll need to provide the special bits! ... | 97 | * you'll need to provide the special bits! ... |
93 | * ... and set IWL_EVT_DISABLE to 1. */ | 98 | * ... and set IWL_EVT_DISABLE to 1. */ |
94 | void iwl3945_disable_events(struct iwl3945_priv *priv) | 99 | void iwl3945_disable_events(struct iwl_priv *priv) |
95 | { | 100 | { |
96 | int ret; | 101 | int ret; |
97 | int i; | 102 | int i; |
@@ -150,30 +155,30 @@ void iwl3945_disable_events(struct iwl3945_priv *priv) | |||
150 | 155 | ||
151 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | 156 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); |
152 | if (!iwl3945_hw_valid_rtc_data_addr(base)) { | 157 | if (!iwl3945_hw_valid_rtc_data_addr(base)) { |
153 | IWL_ERROR("Invalid event log pointer 0x%08X\n", base); | 158 | IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base); |
154 | return; | 159 | return; |
155 | } | 160 | } |
156 | 161 | ||
157 | ret = iwl3945_grab_nic_access(priv); | 162 | ret = iwl_grab_nic_access(priv); |
158 | if (ret) { | 163 | if (ret) { |
159 | IWL_WARNING("Can not read from adapter at this time.\n"); | 164 | IWL_WARN(priv, "Can not read from adapter at this time.\n"); |
160 | return; | 165 | return; |
161 | } | 166 | } |
162 | 167 | ||
163 | disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32))); | 168 | disable_ptr = iwl_read_targ_mem(priv, base + (4 * sizeof(u32))); |
164 | array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32))); | 169 | array_size = iwl_read_targ_mem(priv, base + (5 * sizeof(u32))); |
165 | iwl3945_release_nic_access(priv); | 170 | iwl_release_nic_access(priv); |
166 | 171 | ||
167 | if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) { | 172 | if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) { |
168 | IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n", | 173 | IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n", |
169 | disable_ptr); | 174 | disable_ptr); |
170 | ret = iwl3945_grab_nic_access(priv); | 175 | ret = iwl_grab_nic_access(priv); |
171 | for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++) | 176 | for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++) |
172 | iwl3945_write_targ_mem(priv, | 177 | iwl_write_targ_mem(priv, |
173 | disable_ptr + (i * sizeof(u32)), | 178 | disable_ptr + (i * sizeof(u32)), |
174 | evt_disable[i]); | 179 | evt_disable[i]); |
175 | 180 | ||
176 | iwl3945_release_nic_access(priv); | 181 | iwl_release_nic_access(priv); |
177 | } else { | 182 | } else { |
178 | IWL_DEBUG_INFO("Selected uCode log events may be disabled\n"); | 183 | IWL_DEBUG_INFO("Selected uCode log events may be disabled\n"); |
179 | IWL_DEBUG_INFO(" by writing \"1\"s into disable bitmap\n"); | 184 | IWL_DEBUG_INFO(" by writing \"1\"s into disable bitmap\n"); |
@@ -193,40 +198,7 @@ static int iwl3945_hwrate_to_plcp_idx(u8 plcp) | |||
193 | return -1; | 198 | return -1; |
194 | } | 199 | } |
195 | 200 | ||
196 | /** | 201 | #ifdef CONFIG_IWLWIFI_DEBUG |
197 | * iwl3945_get_antenna_flags - Get antenna flags for RXON command | ||
198 | * @priv: eeprom and antenna fields are used to determine antenna flags | ||
199 | * | ||
200 | * priv->eeprom is used to determine if antenna AUX/MAIN are reversed | ||
201 | * priv->antenna specifies the antenna diversity mode: | ||
202 | * | ||
203 | * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself | ||
204 | * IWL_ANTENNA_MAIN - Force MAIN antenna | ||
205 | * IWL_ANTENNA_AUX - Force AUX antenna | ||
206 | */ | ||
207 | __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv) | ||
208 | { | ||
209 | switch (priv->antenna) { | ||
210 | case IWL_ANTENNA_DIVERSITY: | ||
211 | return 0; | ||
212 | |||
213 | case IWL_ANTENNA_MAIN: | ||
214 | if (priv->eeprom.antenna_switch_type) | ||
215 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; | ||
216 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; | ||
217 | |||
218 | case IWL_ANTENNA_AUX: | ||
219 | if (priv->eeprom.antenna_switch_type) | ||
220 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; | ||
221 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; | ||
222 | } | ||
223 | |||
224 | /* bad antenna selector value */ | ||
225 | IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna); | ||
226 | return 0; /* "diversity" is default if error */ | ||
227 | } | ||
228 | |||
229 | #ifdef CONFIG_IWL3945_DEBUG | ||
230 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | 202 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x |
231 | 203 | ||
232 | static const char *iwl3945_get_tx_fail_reason(u32 status) | 204 | static const char *iwl3945_get_tx_fail_reason(u32 status) |
@@ -266,7 +238,7 @@ static inline const char *iwl3945_get_tx_fail_reason(u32 status) | |||
266 | * for A and B mode we need to overright prev | 238 | * for A and B mode we need to overright prev |
267 | * value | 239 | * value |
268 | */ | 240 | */ |
269 | int iwl3945_rs_next_rate(struct iwl3945_priv *priv, int rate) | 241 | int iwl3945_rs_next_rate(struct iwl_priv *priv, int rate) |
270 | { | 242 | { |
271 | int next_rate = iwl3945_get_prev_ieee_rate(rate); | 243 | int next_rate = iwl3945_get_prev_ieee_rate(rate); |
272 | 244 | ||
@@ -300,12 +272,12 @@ int iwl3945_rs_next_rate(struct iwl3945_priv *priv, int rate) | |||
300 | * need to be reclaimed. As result, some free space forms. If there is | 272 | * need to be reclaimed. As result, some free space forms. If there is |
301 | * enough free space (> low mark), wake the stack that feeds us. | 273 | * enough free space (> low mark), wake the stack that feeds us. |
302 | */ | 274 | */ |
303 | static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, | 275 | static void iwl3945_tx_queue_reclaim(struct iwl_priv *priv, |
304 | int txq_id, int index) | 276 | int txq_id, int index) |
305 | { | 277 | { |
306 | struct iwl3945_tx_queue *txq = &priv->txq[txq_id]; | 278 | struct iwl_tx_queue *txq = &priv->txq[txq_id]; |
307 | struct iwl3945_queue *q = &txq->q; | 279 | struct iwl_queue *q = &txq->q; |
308 | struct iwl3945_tx_info *tx_info; | 280 | struct iwl_tx_info *tx_info; |
309 | 281 | ||
310 | BUG_ON(txq_id == IWL_CMD_QUEUE_NUM); | 282 | BUG_ON(txq_id == IWL_CMD_QUEUE_NUM); |
311 | 283 | ||
@@ -315,10 +287,10 @@ static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, | |||
315 | tx_info = &txq->txb[txq->q.read_ptr]; | 287 | tx_info = &txq->txb[txq->q.read_ptr]; |
316 | ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]); | 288 | ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]); |
317 | tx_info->skb[0] = NULL; | 289 | tx_info->skb[0] = NULL; |
318 | iwl3945_hw_txq_free_tfd(priv, txq); | 290 | priv->cfg->ops->lib->txq_free_tfd(priv, txq); |
319 | } | 291 | } |
320 | 292 | ||
321 | if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) && | 293 | if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) && |
322 | (txq_id != IWL_CMD_QUEUE_NUM) && | 294 | (txq_id != IWL_CMD_QUEUE_NUM) && |
323 | priv->mac80211_registered) | 295 | priv->mac80211_registered) |
324 | ieee80211_wake_queue(priv->hw, txq_id); | 296 | ieee80211_wake_queue(priv->hw, txq_id); |
@@ -327,22 +299,22 @@ static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, | |||
327 | /** | 299 | /** |
328 | * iwl3945_rx_reply_tx - Handle Tx response | 300 | * iwl3945_rx_reply_tx - Handle Tx response |
329 | */ | 301 | */ |
330 | static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv, | 302 | static void iwl3945_rx_reply_tx(struct iwl_priv *priv, |
331 | struct iwl3945_rx_mem_buffer *rxb) | 303 | struct iwl_rx_mem_buffer *rxb) |
332 | { | 304 | { |
333 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 305 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
334 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); | 306 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
335 | int txq_id = SEQ_TO_QUEUE(sequence); | 307 | int txq_id = SEQ_TO_QUEUE(sequence); |
336 | int index = SEQ_TO_INDEX(sequence); | 308 | int index = SEQ_TO_INDEX(sequence); |
337 | struct iwl3945_tx_queue *txq = &priv->txq[txq_id]; | 309 | struct iwl_tx_queue *txq = &priv->txq[txq_id]; |
338 | struct ieee80211_tx_info *info; | 310 | struct ieee80211_tx_info *info; |
339 | struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; | 311 | struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; |
340 | u32 status = le32_to_cpu(tx_resp->status); | 312 | u32 status = le32_to_cpu(tx_resp->status); |
341 | int rate_idx; | 313 | int rate_idx; |
342 | int fail; | 314 | int fail; |
343 | 315 | ||
344 | if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) { | 316 | if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) { |
345 | IWL_ERROR("Read index for DMA queue txq_id (%d) index %d " | 317 | IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d " |
346 | "is out of range [0-%d] %d %d\n", txq_id, | 318 | "is out of range [0-%d] %d %d\n", txq_id, |
347 | index, txq->q.n_bd, txq->q.write_ptr, | 319 | index, txq->q.n_bd, txq->q.write_ptr, |
348 | txq->q.read_ptr); | 320 | txq->q.read_ptr); |
@@ -374,7 +346,7 @@ static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv, | |||
374 | iwl3945_tx_queue_reclaim(priv, txq_id, index); | 346 | iwl3945_tx_queue_reclaim(priv, txq_id, index); |
375 | 347 | ||
376 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) | 348 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) |
377 | IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n"); | 349 | IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n"); |
378 | } | 350 | } |
379 | 351 | ||
380 | 352 | ||
@@ -387,14 +359,14 @@ static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv, | |||
387 | * | 359 | * |
388 | *****************************************************************************/ | 360 | *****************************************************************************/ |
389 | 361 | ||
390 | void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb) | 362 | void iwl3945_hw_rx_statistics(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
391 | { | 363 | { |
392 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 364 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
393 | IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n", | 365 | IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n", |
394 | (int)sizeof(struct iwl3945_notif_statistics), | 366 | (int)sizeof(struct iwl3945_notif_statistics), |
395 | le32_to_cpu(pkt->len)); | 367 | le32_to_cpu(pkt->len)); |
396 | 368 | ||
397 | memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics)); | 369 | memcpy(&priv->statistics_39, pkt->u.raw, sizeof(priv->statistics_39)); |
398 | 370 | ||
399 | iwl3945_led_background(priv); | 371 | iwl3945_led_background(priv); |
400 | 372 | ||
@@ -406,7 +378,7 @@ void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_b | |||
406 | * Misc. internal state and helper functions | 378 | * Misc. internal state and helper functions |
407 | * | 379 | * |
408 | ******************************************************************************/ | 380 | ******************************************************************************/ |
409 | #ifdef CONFIG_IWL3945_DEBUG | 381 | #ifdef CONFIG_IWLWIFI_DEBUG |
410 | 382 | ||
411 | /** | 383 | /** |
412 | * iwl3945_report_frame - dump frame to syslog during debug sessions | 384 | * iwl3945_report_frame - dump frame to syslog during debug sessions |
@@ -415,8 +387,8 @@ void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_b | |||
415 | * including selective frame dumps. | 387 | * including selective frame dumps. |
416 | * group100 parameter selects whether to show 1 out of 100 good frames. | 388 | * group100 parameter selects whether to show 1 out of 100 good frames. |
417 | */ | 389 | */ |
418 | static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv, | 390 | static void _iwl3945_dbg_report_frame(struct iwl_priv *priv, |
419 | struct iwl3945_rx_packet *pkt, | 391 | struct iwl_rx_packet *pkt, |
420 | struct ieee80211_hdr *header, int group100) | 392 | struct ieee80211_hdr *header, int group100) |
421 | { | 393 | { |
422 | u32 to_us; | 394 | u32 to_us; |
@@ -540,18 +512,27 @@ static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv, | |||
540 | } | 512 | } |
541 | } | 513 | } |
542 | if (print_dump) | 514 | if (print_dump) |
543 | iwl3945_print_hex_dump(IWL_DL_RX, data, length); | 515 | iwl_print_hex_dump(priv, IWL_DL_RX, data, length); |
516 | } | ||
517 | |||
518 | static void iwl3945_dbg_report_frame(struct iwl_priv *priv, | ||
519 | struct iwl_rx_packet *pkt, | ||
520 | struct ieee80211_hdr *header, int group100) | ||
521 | { | ||
522 | if (priv->debug_level & IWL_DL_RX) | ||
523 | _iwl3945_dbg_report_frame(priv, pkt, header, group100); | ||
544 | } | 524 | } |
525 | |||
545 | #else | 526 | #else |
546 | static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv, | 527 | static inline void iwl3945_dbg_report_frame(struct iwl_priv *priv, |
547 | struct iwl3945_rx_packet *pkt, | 528 | struct iwl_rx_packet *pkt, |
548 | struct ieee80211_hdr *header, int group100) | 529 | struct ieee80211_hdr *header, int group100) |
549 | { | 530 | { |
550 | } | 531 | } |
551 | #endif | 532 | #endif |
552 | 533 | ||
553 | /* This is necessary only for a number of statistics, see the caller. */ | 534 | /* This is necessary only for a number of statistics, see the caller. */ |
554 | static int iwl3945_is_network_packet(struct iwl3945_priv *priv, | 535 | static int iwl3945_is_network_packet(struct iwl_priv *priv, |
555 | struct ieee80211_hdr *header) | 536 | struct ieee80211_hdr *header) |
556 | { | 537 | { |
557 | /* Filter incoming packets to determine if they are targeted toward | 538 | /* Filter incoming packets to determine if they are targeted toward |
@@ -568,11 +549,11 @@ static int iwl3945_is_network_packet(struct iwl3945_priv *priv, | |||
568 | } | 549 | } |
569 | } | 550 | } |
570 | 551 | ||
571 | static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv, | 552 | static void iwl3945_pass_packet_to_mac80211(struct iwl_priv *priv, |
572 | struct iwl3945_rx_mem_buffer *rxb, | 553 | struct iwl_rx_mem_buffer *rxb, |
573 | struct ieee80211_rx_status *stats) | 554 | struct ieee80211_rx_status *stats) |
574 | { | 555 | { |
575 | struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data; | 556 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
576 | #ifdef CONFIG_IWL3945_LEDS | 557 | #ifdef CONFIG_IWL3945_LEDS |
577 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt); | 558 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt); |
578 | #endif | 559 | #endif |
@@ -581,7 +562,7 @@ static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv, | |||
581 | short len = le16_to_cpu(rx_hdr->len); | 562 | short len = le16_to_cpu(rx_hdr->len); |
582 | 563 | ||
583 | /* We received data from the HW, so stop the watchdog */ | 564 | /* We received data from the HW, so stop the watchdog */ |
584 | if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) { | 565 | if (unlikely((len + IWL39_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) { |
585 | IWL_DEBUG_DROP("Corruption detected!\n"); | 566 | IWL_DEBUG_DROP("Corruption detected!\n"); |
586 | return; | 567 | return; |
587 | } | 568 | } |
@@ -597,7 +578,7 @@ static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv, | |||
597 | /* Set the size of the skb to the size of the frame */ | 578 | /* Set the size of the skb to the size of the frame */ |
598 | skb_put(rxb->skb, le16_to_cpu(rx_hdr->len)); | 579 | skb_put(rxb->skb, le16_to_cpu(rx_hdr->len)); |
599 | 580 | ||
600 | if (iwl3945_param_hwcrypto) | 581 | if (!iwl3945_mod_params.sw_crypto) |
601 | iwl3945_set_decrypted_flag(priv, rxb->skb, | 582 | iwl3945_set_decrypted_flag(priv, rxb->skb, |
602 | le32_to_cpu(rx_end->status), stats); | 583 | le32_to_cpu(rx_end->status), stats); |
603 | 584 | ||
@@ -611,12 +592,12 @@ static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv, | |||
611 | 592 | ||
612 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) | 593 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
613 | 594 | ||
614 | static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv, | 595 | static void iwl3945_rx_reply_rx(struct iwl_priv *priv, |
615 | struct iwl3945_rx_mem_buffer *rxb) | 596 | struct iwl_rx_mem_buffer *rxb) |
616 | { | 597 | { |
617 | struct ieee80211_hdr *header; | 598 | struct ieee80211_hdr *header; |
618 | struct ieee80211_rx_status rx_status; | 599 | struct ieee80211_rx_status rx_status; |
619 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 600 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
620 | struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt); | 601 | struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt); |
621 | struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt); | 602 | struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt); |
622 | struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt); | 603 | struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt); |
@@ -659,7 +640,7 @@ static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv, | |||
659 | 640 | ||
660 | 641 | ||
661 | /* Convert 3945's rssi indicator to dBm */ | 642 | /* Convert 3945's rssi indicator to dBm */ |
662 | rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET; | 643 | rx_status.signal = rx_stats->rssi - IWL39_RSSI_OFFSET; |
663 | 644 | ||
664 | /* Set default noise value to -127 */ | 645 | /* Set default noise value to -127 */ |
665 | if (priv->last_rx_noise == 0) | 646 | if (priv->last_rx_noise == 0) |
@@ -705,11 +686,8 @@ static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv, | |||
705 | rx_status.signal, rx_status.signal, | 686 | rx_status.signal, rx_status.signal, |
706 | rx_status.noise, rx_status.rate_idx); | 687 | rx_status.noise, rx_status.rate_idx); |
707 | 688 | ||
708 | #ifdef CONFIG_IWL3945_DEBUG | 689 | /* Set "1" to report good data frames in groups of 100 */ |
709 | if (iwl3945_debug_level & (IWL_DL_RX)) | 690 | iwl3945_dbg_report_frame(priv, pkt, header, 1); |
710 | /* Set "1" to report good data frames in groups of 100 */ | ||
711 | iwl3945_dbg_report_frame(priv, pkt, header, 1); | ||
712 | #endif | ||
713 | 691 | ||
714 | if (network_packet) { | 692 | if (network_packet) { |
715 | priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp); | 693 | priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp); |
@@ -721,24 +699,31 @@ static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv, | |||
721 | iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status); | 699 | iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status); |
722 | } | 700 | } |
723 | 701 | ||
724 | int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr, | 702 | int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, |
725 | dma_addr_t addr, u16 len) | 703 | struct iwl_tx_queue *txq, |
704 | dma_addr_t addr, u16 len, u8 reset, u8 pad) | ||
726 | { | 705 | { |
727 | int count; | 706 | int count; |
728 | u32 pad; | 707 | struct iwl_queue *q; |
729 | struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr; | 708 | struct iwl3945_tfd *tfd, *tfd_tmp; |
709 | |||
710 | q = &txq->q; | ||
711 | tfd_tmp = (struct iwl3945_tfd *)txq->tfds; | ||
712 | tfd = &tfd_tmp[q->write_ptr]; | ||
713 | |||
714 | if (reset) | ||
715 | memset(tfd, 0, sizeof(*tfd)); | ||
730 | 716 | ||
731 | count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags)); | 717 | count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags)); |
732 | pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags)); | ||
733 | 718 | ||
734 | if ((count >= NUM_TFD_CHUNKS) || (count < 0)) { | 719 | if ((count >= NUM_TFD_CHUNKS) || (count < 0)) { |
735 | IWL_ERROR("Error can not send more than %d chunks\n", | 720 | IWL_ERR(priv, "Error can not send more than %d chunks\n", |
736 | NUM_TFD_CHUNKS); | 721 | NUM_TFD_CHUNKS); |
737 | return -EINVAL; | 722 | return -EINVAL; |
738 | } | 723 | } |
739 | 724 | ||
740 | tfd->pa[count].addr = cpu_to_le32(addr); | 725 | tfd->tbs[count].addr = cpu_to_le32(addr); |
741 | tfd->pa[count].len = cpu_to_le32(len); | 726 | tfd->tbs[count].len = cpu_to_le32(len); |
742 | 727 | ||
743 | count++; | 728 | count++; |
744 | 729 | ||
@@ -753,10 +738,10 @@ int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr, | |||
753 | * | 738 | * |
754 | * Does NOT advance any indexes | 739 | * Does NOT advance any indexes |
755 | */ | 740 | */ |
756 | int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq) | 741 | void iwl3945_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq) |
757 | { | 742 | { |
758 | struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0]; | 743 | struct iwl3945_tfd *tfd_tmp = (struct iwl3945_tfd *)txq->tfds; |
759 | struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr]; | 744 | struct iwl3945_tfd *tfd = &tfd_tmp[txq->q.read_ptr]; |
760 | struct pci_dev *dev = priv->pci_dev; | 745 | struct pci_dev *dev = priv->pci_dev; |
761 | int i; | 746 | int i; |
762 | int counter; | 747 | int counter; |
@@ -764,21 +749,21 @@ int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue * | |||
764 | /* classify bd */ | 749 | /* classify bd */ |
765 | if (txq->q.id == IWL_CMD_QUEUE_NUM) | 750 | if (txq->q.id == IWL_CMD_QUEUE_NUM) |
766 | /* nothing to cleanup after for host commands */ | 751 | /* nothing to cleanup after for host commands */ |
767 | return 0; | 752 | return; |
768 | 753 | ||
769 | /* sanity check */ | 754 | /* sanity check */ |
770 | counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags)); | 755 | counter = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags)); |
771 | if (counter > NUM_TFD_CHUNKS) { | 756 | if (counter > NUM_TFD_CHUNKS) { |
772 | IWL_ERROR("Too many chunks: %i\n", counter); | 757 | IWL_ERR(priv, "Too many chunks: %i\n", counter); |
773 | /* @todo issue fatal error, it is quite serious situation */ | 758 | /* @todo issue fatal error, it is quite serious situation */ |
774 | return 0; | 759 | return; |
775 | } | 760 | } |
776 | 761 | ||
777 | /* unmap chunks if any */ | 762 | /* unmap chunks if any */ |
778 | 763 | ||
779 | for (i = 1; i < counter; i++) { | 764 | for (i = 1; i < counter; i++) { |
780 | pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr), | 765 | pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr), |
781 | le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE); | 766 | le32_to_cpu(tfd->tbs[i].len), PCI_DMA_TODEVICE); |
782 | if (txq->txb[txq->q.read_ptr].skb[0]) { | 767 | if (txq->txb[txq->q.read_ptr].skb[0]) { |
783 | struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0]; | 768 | struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0]; |
784 | if (txq->txb[txq->q.read_ptr].skb[0]) { | 769 | if (txq->txb[txq->q.read_ptr].skb[0]) { |
@@ -788,10 +773,10 @@ int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue * | |||
788 | } | 773 | } |
789 | } | 774 | } |
790 | } | 775 | } |
791 | return 0; | 776 | return ; |
792 | } | 777 | } |
793 | 778 | ||
794 | u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr) | 779 | u8 iwl3945_hw_find_station(struct iwl_priv *priv, const u8 *addr) |
795 | { | 780 | { |
796 | int i, start = IWL_AP_ID; | 781 | int i, start = IWL_AP_ID; |
797 | int ret = IWL_INVALID_STATION; | 782 | int ret = IWL_INVALID_STATION; |
@@ -802,13 +787,13 @@ u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr) | |||
802 | start = IWL_STA_ID; | 787 | start = IWL_STA_ID; |
803 | 788 | ||
804 | if (is_broadcast_ether_addr(addr)) | 789 | if (is_broadcast_ether_addr(addr)) |
805 | return priv->hw_setting.bcast_sta_id; | 790 | return priv->hw_params.bcast_sta_id; |
806 | 791 | ||
807 | spin_lock_irqsave(&priv->sta_lock, flags); | 792 | spin_lock_irqsave(&priv->sta_lock, flags); |
808 | for (i = start; i < priv->hw_setting.max_stations; i++) | 793 | for (i = start; i < priv->hw_params.max_stations; i++) |
809 | if ((priv->stations[i].used) && | 794 | if ((priv->stations_39[i].used) && |
810 | (!compare_ether_addr | 795 | (!compare_ether_addr |
811 | (priv->stations[i].sta.sta.addr, addr))) { | 796 | (priv->stations_39[i].sta.sta.addr, addr))) { |
812 | ret = i; | 797 | ret = i; |
813 | goto out; | 798 | goto out; |
814 | } | 799 | } |
@@ -824,12 +809,10 @@ u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr) | |||
824 | * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD: | 809 | * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD: |
825 | * | 810 | * |
826 | */ | 811 | */ |
827 | void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv, | 812 | void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv *priv, struct iwl_cmd *cmd, |
828 | struct iwl3945_cmd *cmd, | ||
829 | struct ieee80211_tx_info *info, | 813 | struct ieee80211_tx_info *info, |
830 | struct ieee80211_hdr *hdr, int sta_id, int tx_id) | 814 | struct ieee80211_hdr *hdr, int sta_id, int tx_id) |
831 | { | 815 | { |
832 | unsigned long flags; | ||
833 | u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value; | 816 | u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value; |
834 | u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1); | 817 | u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1); |
835 | u16 rate_mask; | 818 | u16 rate_mask; |
@@ -838,25 +821,15 @@ void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv, | |||
838 | u8 data_retry_limit; | 821 | u8 data_retry_limit; |
839 | __le32 tx_flags; | 822 | __le32 tx_flags; |
840 | __le16 fc = hdr->frame_control; | 823 | __le16 fc = hdr->frame_control; |
824 | struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload; | ||
841 | 825 | ||
842 | rate = iwl3945_rates[rate_index].plcp; | 826 | rate = iwl3945_rates[rate_index].plcp; |
843 | tx_flags = cmd->cmd.tx.tx_flags; | 827 | tx_flags = tx->tx_flags; |
844 | 828 | ||
845 | /* We need to figure out how to get the sta->supp_rates while | 829 | /* We need to figure out how to get the sta->supp_rates while |
846 | * in this running context */ | 830 | * in this running context */ |
847 | rate_mask = IWL_RATES_MASK; | 831 | rate_mask = IWL_RATES_MASK; |
848 | 832 | ||
849 | spin_lock_irqsave(&priv->sta_lock, flags); | ||
850 | |||
851 | priv->stations[sta_id].current_rate.rate_n_flags = rate; | ||
852 | |||
853 | if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) && | ||
854 | (sta_id != priv->hw_setting.bcast_sta_id) && | ||
855 | (sta_id != IWL_MULTICAST_ID)) | ||
856 | priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate; | ||
857 | |||
858 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
859 | |||
860 | if (tx_id >= IWL_CMD_QUEUE_NUM) | 833 | if (tx_id >= IWL_CMD_QUEUE_NUM) |
861 | rts_retry_limit = 3; | 834 | rts_retry_limit = 3; |
862 | else | 835 | else |
@@ -888,25 +861,25 @@ void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv, | |||
888 | } | 861 | } |
889 | } | 862 | } |
890 | 863 | ||
891 | cmd->cmd.tx.rts_retry_limit = rts_retry_limit; | 864 | tx->rts_retry_limit = rts_retry_limit; |
892 | cmd->cmd.tx.data_retry_limit = data_retry_limit; | 865 | tx->data_retry_limit = data_retry_limit; |
893 | cmd->cmd.tx.rate = rate; | 866 | tx->rate = rate; |
894 | cmd->cmd.tx.tx_flags = tx_flags; | 867 | tx->tx_flags = tx_flags; |
895 | 868 | ||
896 | /* OFDM */ | 869 | /* OFDM */ |
897 | cmd->cmd.tx.supp_rates[0] = | 870 | tx->supp_rates[0] = |
898 | ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF; | 871 | ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF; |
899 | 872 | ||
900 | /* CCK */ | 873 | /* CCK */ |
901 | cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF); | 874 | tx->supp_rates[1] = (rate_mask & 0xF); |
902 | 875 | ||
903 | IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X " | 876 | IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X " |
904 | "cck/ofdm mask: 0x%x/0x%x\n", sta_id, | 877 | "cck/ofdm mask: 0x%x/0x%x\n", sta_id, |
905 | cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags), | 878 | tx->rate, le32_to_cpu(tx->tx_flags), |
906 | cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]); | 879 | tx->supp_rates[1], tx->supp_rates[0]); |
907 | } | 880 | } |
908 | 881 | ||
909 | u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags) | 882 | u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags) |
910 | { | 883 | { |
911 | unsigned long flags_spin; | 884 | unsigned long flags_spin; |
912 | struct iwl3945_station_entry *station; | 885 | struct iwl3945_station_entry *station; |
@@ -915,56 +888,56 @@ u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags | |||
915 | return IWL_INVALID_STATION; | 888 | return IWL_INVALID_STATION; |
916 | 889 | ||
917 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | 890 | spin_lock_irqsave(&priv->sta_lock, flags_spin); |
918 | station = &priv->stations[sta_id]; | 891 | station = &priv->stations_39[sta_id]; |
919 | 892 | ||
920 | station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK; | 893 | station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK; |
921 | station->sta.rate_n_flags = cpu_to_le16(tx_rate); | 894 | station->sta.rate_n_flags = cpu_to_le16(tx_rate); |
922 | station->current_rate.rate_n_flags = tx_rate; | ||
923 | station->sta.mode = STA_CONTROL_MODIFY_MSK; | 895 | station->sta.mode = STA_CONTROL_MODIFY_MSK; |
924 | 896 | ||
925 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | 897 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); |
926 | 898 | ||
927 | iwl3945_send_add_station(priv, &station->sta, flags); | 899 | iwl_send_add_sta(priv, |
900 | (struct iwl_addsta_cmd *)&station->sta, flags); | ||
928 | IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n", | 901 | IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n", |
929 | sta_id, tx_rate); | 902 | sta_id, tx_rate); |
930 | return sta_id; | 903 | return sta_id; |
931 | } | 904 | } |
932 | 905 | ||
933 | static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max) | 906 | static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) |
934 | { | 907 | { |
935 | int rc; | 908 | int rc; |
936 | unsigned long flags; | 909 | unsigned long flags; |
937 | 910 | ||
938 | spin_lock_irqsave(&priv->lock, flags); | 911 | spin_lock_irqsave(&priv->lock, flags); |
939 | rc = iwl3945_grab_nic_access(priv); | 912 | rc = iwl_grab_nic_access(priv); |
940 | if (rc) { | 913 | if (rc) { |
941 | spin_unlock_irqrestore(&priv->lock, flags); | 914 | spin_unlock_irqrestore(&priv->lock, flags); |
942 | return rc; | 915 | return rc; |
943 | } | 916 | } |
944 | 917 | ||
945 | if (!pwr_max) { | 918 | if (src == IWL_PWR_SRC_VAUX) { |
946 | u32 val; | 919 | u32 val; |
947 | 920 | ||
948 | rc = pci_read_config_dword(priv->pci_dev, | 921 | rc = pci_read_config_dword(priv->pci_dev, |
949 | PCI_POWER_SOURCE, &val); | 922 | PCI_POWER_SOURCE, &val); |
950 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) { | 923 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) { |
951 | iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | 924 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, |
952 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, | 925 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, |
953 | ~APMG_PS_CTRL_MSK_PWR_SRC); | 926 | ~APMG_PS_CTRL_MSK_PWR_SRC); |
954 | iwl3945_release_nic_access(priv); | 927 | iwl_release_nic_access(priv); |
955 | 928 | ||
956 | iwl3945_poll_bit(priv, CSR_GPIO_IN, | 929 | iwl_poll_bit(priv, CSR_GPIO_IN, |
957 | CSR_GPIO_IN_VAL_VAUX_PWR_SRC, | 930 | CSR_GPIO_IN_VAL_VAUX_PWR_SRC, |
958 | CSR_GPIO_IN_BIT_AUX_POWER, 5000); | 931 | CSR_GPIO_IN_BIT_AUX_POWER, 5000); |
959 | } else | 932 | } else |
960 | iwl3945_release_nic_access(priv); | 933 | iwl_release_nic_access(priv); |
961 | } else { | 934 | } else { |
962 | iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | 935 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, |
963 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | 936 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, |
964 | ~APMG_PS_CTRL_MSK_PWR_SRC); | 937 | ~APMG_PS_CTRL_MSK_PWR_SRC); |
965 | 938 | ||
966 | iwl3945_release_nic_access(priv); | 939 | iwl_release_nic_access(priv); |
967 | iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC, | 940 | iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC, |
968 | CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */ | 941 | CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */ |
969 | } | 942 | } |
970 | spin_unlock_irqrestore(&priv->lock, flags); | 943 | spin_unlock_irqrestore(&priv->lock, flags); |
@@ -972,81 +945,79 @@ static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max) | |||
972 | return rc; | 945 | return rc; |
973 | } | 946 | } |
974 | 947 | ||
975 | static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq) | 948 | static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq) |
976 | { | 949 | { |
977 | int rc; | 950 | int rc; |
978 | unsigned long flags; | 951 | unsigned long flags; |
979 | 952 | ||
980 | spin_lock_irqsave(&priv->lock, flags); | 953 | spin_lock_irqsave(&priv->lock, flags); |
981 | rc = iwl3945_grab_nic_access(priv); | 954 | rc = iwl_grab_nic_access(priv); |
982 | if (rc) { | 955 | if (rc) { |
983 | spin_unlock_irqrestore(&priv->lock, flags); | 956 | spin_unlock_irqrestore(&priv->lock, flags); |
984 | return rc; | 957 | return rc; |
985 | } | 958 | } |
986 | 959 | ||
987 | iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr); | 960 | iwl_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->dma_addr); |
988 | iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0), | 961 | iwl_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma); |
989 | priv->hw_setting.shared_phys + | 962 | iwl_write_direct32(priv, FH39_RCSR_WPTR(0), 0); |
990 | offsetof(struct iwl3945_shared, rx_read_ptr[0])); | 963 | iwl_write_direct32(priv, FH39_RCSR_CONFIG(0), |
991 | iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0); | 964 | FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE | |
992 | iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), | 965 | FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE | |
993 | ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE | | 966 | FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN | |
994 | ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE | | 967 | FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 | |
995 | ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN | | 968 | (RX_QUEUE_SIZE_LOG << FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) | |
996 | ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 | | 969 | FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST | |
997 | (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) | | 970 | (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) | |
998 | ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST | | 971 | FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH); |
999 | (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) | | ||
1000 | ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH); | ||
1001 | 972 | ||
1002 | /* fake read to flush all prev I/O */ | 973 | /* fake read to flush all prev I/O */ |
1003 | iwl3945_read_direct32(priv, FH_RSSR_CTRL); | 974 | iwl_read_direct32(priv, FH39_RSSR_CTRL); |
1004 | 975 | ||
1005 | iwl3945_release_nic_access(priv); | 976 | iwl_release_nic_access(priv); |
1006 | spin_unlock_irqrestore(&priv->lock, flags); | 977 | spin_unlock_irqrestore(&priv->lock, flags); |
1007 | 978 | ||
1008 | return 0; | 979 | return 0; |
1009 | } | 980 | } |
1010 | 981 | ||
1011 | static int iwl3945_tx_reset(struct iwl3945_priv *priv) | 982 | static int iwl3945_tx_reset(struct iwl_priv *priv) |
1012 | { | 983 | { |
1013 | int rc; | 984 | int rc; |
1014 | unsigned long flags; | 985 | unsigned long flags; |
1015 | 986 | ||
1016 | spin_lock_irqsave(&priv->lock, flags); | 987 | spin_lock_irqsave(&priv->lock, flags); |
1017 | rc = iwl3945_grab_nic_access(priv); | 988 | rc = iwl_grab_nic_access(priv); |
1018 | if (rc) { | 989 | if (rc) { |
1019 | spin_unlock_irqrestore(&priv->lock, flags); | 990 | spin_unlock_irqrestore(&priv->lock, flags); |
1020 | return rc; | 991 | return rc; |
1021 | } | 992 | } |
1022 | 993 | ||
1023 | /* bypass mode */ | 994 | /* bypass mode */ |
1024 | iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2); | 995 | iwl_write_prph(priv, ALM_SCD_MODE_REG, 0x2); |
1025 | 996 | ||
1026 | /* RA 0 is active */ | 997 | /* RA 0 is active */ |
1027 | iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01); | 998 | iwl_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01); |
1028 | 999 | ||
1029 | /* all 6 fifo are active */ | 1000 | /* all 6 fifo are active */ |
1030 | iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f); | 1001 | iwl_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f); |
1031 | 1002 | ||
1032 | iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000); | 1003 | iwl_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000); |
1033 | iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002); | 1004 | iwl_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002); |
1034 | iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004); | 1005 | iwl_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004); |
1035 | iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005); | 1006 | iwl_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005); |
1036 | 1007 | ||
1037 | iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE, | 1008 | iwl_write_direct32(priv, FH39_TSSR_CBB_BASE, |
1038 | priv->hw_setting.shared_phys); | 1009 | priv->shared_phys); |
1039 | 1010 | ||
1040 | iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG, | 1011 | iwl_write_direct32(priv, FH39_TSSR_MSG_CONFIG, |
1041 | ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON | | 1012 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON | |
1042 | ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON | | 1013 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON | |
1043 | ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B | | 1014 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B | |
1044 | ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON | | 1015 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON | |
1045 | ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON | | 1016 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON | |
1046 | ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH | | 1017 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH | |
1047 | ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH); | 1018 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH); |
1048 | 1019 | ||
1049 | iwl3945_release_nic_access(priv); | 1020 | iwl_release_nic_access(priv); |
1050 | spin_unlock_irqrestore(&priv->lock, flags); | 1021 | spin_unlock_irqrestore(&priv->lock, flags); |
1051 | 1022 | ||
1052 | return 0; | 1023 | return 0; |
@@ -1057,7 +1028,7 @@ static int iwl3945_tx_reset(struct iwl3945_priv *priv) | |||
1057 | * | 1028 | * |
1058 | * Destroys all DMA structures and initialize them again | 1029 | * Destroys all DMA structures and initialize them again |
1059 | */ | 1030 | */ |
1060 | static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv) | 1031 | static int iwl3945_txq_ctx_reset(struct iwl_priv *priv) |
1061 | { | 1032 | { |
1062 | int rc; | 1033 | int rc; |
1063 | int txq_id, slots_num; | 1034 | int txq_id, slots_num; |
@@ -1073,10 +1044,10 @@ static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv) | |||
1073 | for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) { | 1044 | for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) { |
1074 | slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ? | 1045 | slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ? |
1075 | TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; | 1046 | TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; |
1076 | rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num, | 1047 | rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num, |
1077 | txq_id); | 1048 | txq_id); |
1078 | if (rc) { | 1049 | if (rc) { |
1079 | IWL_ERROR("Tx %d queue init failed\n", txq_id); | 1050 | IWL_ERR(priv, "Tx %d queue init failed\n", txq_id); |
1080 | goto error; | 1051 | goto error; |
1081 | } | 1052 | } |
1082 | } | 1053 | } |
@@ -1088,111 +1059,140 @@ static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv) | |||
1088 | return rc; | 1059 | return rc; |
1089 | } | 1060 | } |
1090 | 1061 | ||
1091 | int iwl3945_hw_nic_init(struct iwl3945_priv *priv) | 1062 | static int iwl3945_apm_init(struct iwl_priv *priv) |
1092 | { | 1063 | { |
1093 | u8 rev_id; | 1064 | int ret = 0; |
1094 | int rc; | ||
1095 | unsigned long flags; | ||
1096 | struct iwl3945_rx_queue *rxq = &priv->rxq; | ||
1097 | 1065 | ||
1098 | iwl3945_power_init_handle(priv); | 1066 | iwl3945_power_init_handle(priv); |
1099 | 1067 | ||
1100 | spin_lock_irqsave(&priv->lock, flags); | 1068 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, |
1101 | iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL); | 1069 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); |
1102 | iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS, | 1070 | |
1103 | CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); | 1071 | /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */ |
1104 | 1072 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, | |
1105 | iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); | 1073 | CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); |
1106 | rc = iwl3945_poll_direct_bit(priv, CSR_GP_CNTRL, | 1074 | |
1107 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); | 1075 | /* set "initialization complete" bit to move adapter |
1108 | if (rc < 0) { | 1076 | * D0U* --> D0A* state */ |
1109 | spin_unlock_irqrestore(&priv->lock, flags); | 1077 | iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); |
1078 | |||
1079 | iwl_poll_direct_bit(priv, CSR_GP_CNTRL, | ||
1080 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); | ||
1081 | if (ret < 0) { | ||
1110 | IWL_DEBUG_INFO("Failed to init the card\n"); | 1082 | IWL_DEBUG_INFO("Failed to init the card\n"); |
1111 | return rc; | 1083 | goto out; |
1112 | } | 1084 | } |
1113 | 1085 | ||
1114 | rc = iwl3945_grab_nic_access(priv); | 1086 | ret = iwl_grab_nic_access(priv); |
1115 | if (rc) { | 1087 | if (ret) |
1116 | spin_unlock_irqrestore(&priv->lock, flags); | 1088 | goto out; |
1117 | return rc; | 1089 | |
1118 | } | 1090 | /* enable DMA */ |
1119 | iwl3945_write_prph(priv, APMG_CLK_EN_REG, | 1091 | iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT | |
1120 | APMG_CLK_VAL_DMA_CLK_RQT | | 1092 | APMG_CLK_VAL_BSM_CLK_RQT); |
1121 | APMG_CLK_VAL_BSM_CLK_RQT); | 1093 | |
1122 | udelay(20); | 1094 | udelay(20); |
1123 | iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG, | ||
1124 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); | ||
1125 | iwl3945_release_nic_access(priv); | ||
1126 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1127 | 1095 | ||
1128 | /* Determine HW type */ | 1096 | /* disable L1-Active */ |
1129 | rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id); | 1097 | iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, |
1130 | if (rc) | 1098 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); |
1131 | return rc; | 1099 | |
1132 | IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id); | 1100 | iwl_release_nic_access(priv); |
1101 | out: | ||
1102 | return ret; | ||
1103 | } | ||
1104 | |||
1105 | static void iwl3945_nic_config(struct iwl_priv *priv) | ||
1106 | { | ||
1107 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; | ||
1108 | unsigned long flags; | ||
1109 | u8 rev_id = 0; | ||
1133 | 1110 | ||
1134 | iwl3945_nic_set_pwr_src(priv, 1); | ||
1135 | spin_lock_irqsave(&priv->lock, flags); | 1111 | spin_lock_irqsave(&priv->lock, flags); |
1136 | 1112 | ||
1137 | if (rev_id & PCI_CFG_REV_ID_BIT_RTP) | 1113 | if (rev_id & PCI_CFG_REV_ID_BIT_RTP) |
1138 | IWL_DEBUG_INFO("RTP type \n"); | 1114 | IWL_DEBUG_INFO("RTP type \n"); |
1139 | else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) { | 1115 | else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) { |
1140 | IWL_DEBUG_INFO("3945 RADIO-MB type\n"); | 1116 | IWL_DEBUG_INFO("3945 RADIO-MB type\n"); |
1141 | iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG, | 1117 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, |
1142 | CSR39_HW_IF_CONFIG_REG_BIT_3945_MB); | 1118 | CSR39_HW_IF_CONFIG_REG_BIT_3945_MB); |
1143 | } else { | 1119 | } else { |
1144 | IWL_DEBUG_INFO("3945 RADIO-MM type\n"); | 1120 | IWL_DEBUG_INFO("3945 RADIO-MM type\n"); |
1145 | iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG, | 1121 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, |
1146 | CSR39_HW_IF_CONFIG_REG_BIT_3945_MM); | 1122 | CSR39_HW_IF_CONFIG_REG_BIT_3945_MM); |
1147 | } | 1123 | } |
1148 | 1124 | ||
1149 | if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) { | 1125 | if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) { |
1150 | IWL_DEBUG_INFO("SKU OP mode is mrc\n"); | 1126 | IWL_DEBUG_INFO("SKU OP mode is mrc\n"); |
1151 | iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG, | 1127 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, |
1152 | CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC); | 1128 | CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC); |
1153 | } else | 1129 | } else |
1154 | IWL_DEBUG_INFO("SKU OP mode is basic\n"); | 1130 | IWL_DEBUG_INFO("SKU OP mode is basic\n"); |
1155 | 1131 | ||
1156 | if ((priv->eeprom.board_revision & 0xF0) == 0xD0) { | 1132 | if ((eeprom->board_revision & 0xF0) == 0xD0) { |
1157 | IWL_DEBUG_INFO("3945ABG revision is 0x%X\n", | 1133 | IWL_DEBUG_INFO("3945ABG revision is 0x%X\n", |
1158 | priv->eeprom.board_revision); | 1134 | eeprom->board_revision); |
1159 | iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG, | 1135 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, |
1160 | CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE); | 1136 | CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE); |
1161 | } else { | 1137 | } else { |
1162 | IWL_DEBUG_INFO("3945ABG revision is 0x%X\n", | 1138 | IWL_DEBUG_INFO("3945ABG revision is 0x%X\n", |
1163 | priv->eeprom.board_revision); | 1139 | eeprom->board_revision); |
1164 | iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG, | 1140 | iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG, |
1165 | CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE); | 1141 | CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE); |
1166 | } | 1142 | } |
1167 | 1143 | ||
1168 | if (priv->eeprom.almgor_m_version <= 1) { | 1144 | if (eeprom->almgor_m_version <= 1) { |
1169 | iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG, | 1145 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, |
1170 | CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A); | 1146 | CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A); |
1171 | IWL_DEBUG_INFO("Card M type A version is 0x%X\n", | 1147 | IWL_DEBUG_INFO("Card M type A version is 0x%X\n", |
1172 | priv->eeprom.almgor_m_version); | 1148 | eeprom->almgor_m_version); |
1173 | } else { | 1149 | } else { |
1174 | IWL_DEBUG_INFO("Card M type B version is 0x%X\n", | 1150 | IWL_DEBUG_INFO("Card M type B version is 0x%X\n", |
1175 | priv->eeprom.almgor_m_version); | 1151 | eeprom->almgor_m_version); |
1176 | iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG, | 1152 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, |
1177 | CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B); | 1153 | CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B); |
1178 | } | 1154 | } |
1179 | spin_unlock_irqrestore(&priv->lock, flags); | 1155 | spin_unlock_irqrestore(&priv->lock, flags); |
1180 | 1156 | ||
1181 | if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE) | 1157 | if (eeprom->sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE) |
1182 | IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n"); | 1158 | IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n"); |
1183 | 1159 | ||
1184 | if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE) | 1160 | if (eeprom->sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE) |
1185 | IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n"); | 1161 | IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n"); |
1162 | } | ||
1163 | |||
1164 | int iwl3945_hw_nic_init(struct iwl_priv *priv) | ||
1165 | { | ||
1166 | u8 rev_id; | ||
1167 | int rc; | ||
1168 | unsigned long flags; | ||
1169 | struct iwl_rx_queue *rxq = &priv->rxq; | ||
1170 | |||
1171 | spin_lock_irqsave(&priv->lock, flags); | ||
1172 | priv->cfg->ops->lib->apm_ops.init(priv); | ||
1173 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1174 | |||
1175 | /* Determine HW type */ | ||
1176 | rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id); | ||
1177 | if (rc) | ||
1178 | return rc; | ||
1179 | IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id); | ||
1180 | |||
1181 | rc = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN); | ||
1182 | if(rc) | ||
1183 | return rc; | ||
1184 | |||
1185 | priv->cfg->ops->lib->apm_ops.config(priv); | ||
1186 | 1186 | ||
1187 | /* Allocate the RX queue, or reset if it is already allocated */ | 1187 | /* Allocate the RX queue, or reset if it is already allocated */ |
1188 | if (!rxq->bd) { | 1188 | if (!rxq->bd) { |
1189 | rc = iwl3945_rx_queue_alloc(priv); | 1189 | rc = iwl_rx_queue_alloc(priv); |
1190 | if (rc) { | 1190 | if (rc) { |
1191 | IWL_ERROR("Unable to initialize Rx queue\n"); | 1191 | IWL_ERR(priv, "Unable to initialize Rx queue\n"); |
1192 | return -ENOMEM; | 1192 | return -ENOMEM; |
1193 | } | 1193 | } |
1194 | } else | 1194 | } else |
1195 | iwl3945_rx_queue_reset(priv, rxq); | 1195 | iwl_rx_queue_reset(priv, rxq); |
1196 | 1196 | ||
1197 | iwl3945_rx_replenish(priv); | 1197 | iwl3945_rx_replenish(priv); |
1198 | 1198 | ||
@@ -1202,16 +1202,16 @@ int iwl3945_hw_nic_init(struct iwl3945_priv *priv) | |||
1202 | 1202 | ||
1203 | /* Look at using this instead: | 1203 | /* Look at using this instead: |
1204 | rxq->need_update = 1; | 1204 | rxq->need_update = 1; |
1205 | iwl3945_rx_queue_update_write_ptr(priv, rxq); | 1205 | iwl_rx_queue_update_write_ptr(priv, rxq); |
1206 | */ | 1206 | */ |
1207 | 1207 | ||
1208 | rc = iwl3945_grab_nic_access(priv); | 1208 | rc = iwl_grab_nic_access(priv); |
1209 | if (rc) { | 1209 | if (rc) { |
1210 | spin_unlock_irqrestore(&priv->lock, flags); | 1210 | spin_unlock_irqrestore(&priv->lock, flags); |
1211 | return rc; | 1211 | return rc; |
1212 | } | 1212 | } |
1213 | iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7); | 1213 | iwl_write_direct32(priv, FH39_RCSR_WPTR(0), rxq->write & ~7); |
1214 | iwl3945_release_nic_access(priv); | 1214 | iwl_release_nic_access(priv); |
1215 | 1215 | ||
1216 | spin_unlock_irqrestore(&priv->lock, flags); | 1216 | spin_unlock_irqrestore(&priv->lock, flags); |
1217 | 1217 | ||
@@ -1229,116 +1229,121 @@ int iwl3945_hw_nic_init(struct iwl3945_priv *priv) | |||
1229 | * | 1229 | * |
1230 | * Destroy all TX DMA queues and structures | 1230 | * Destroy all TX DMA queues and structures |
1231 | */ | 1231 | */ |
1232 | void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv) | 1232 | void iwl3945_hw_txq_ctx_free(struct iwl_priv *priv) |
1233 | { | 1233 | { |
1234 | int txq_id; | 1234 | int txq_id; |
1235 | 1235 | ||
1236 | /* Tx queues */ | 1236 | /* Tx queues */ |
1237 | for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) | 1237 | for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) |
1238 | iwl3945_tx_queue_free(priv, &priv->txq[txq_id]); | 1238 | iwl_tx_queue_free(priv, txq_id); |
1239 | } | 1239 | } |
1240 | 1240 | ||
1241 | void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv) | 1241 | void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv) |
1242 | { | 1242 | { |
1243 | int queue; | 1243 | int txq_id; |
1244 | unsigned long flags; | 1244 | unsigned long flags; |
1245 | 1245 | ||
1246 | spin_lock_irqsave(&priv->lock, flags); | 1246 | spin_lock_irqsave(&priv->lock, flags); |
1247 | if (iwl3945_grab_nic_access(priv)) { | 1247 | if (iwl_grab_nic_access(priv)) { |
1248 | spin_unlock_irqrestore(&priv->lock, flags); | 1248 | spin_unlock_irqrestore(&priv->lock, flags); |
1249 | iwl3945_hw_txq_ctx_free(priv); | 1249 | iwl3945_hw_txq_ctx_free(priv); |
1250 | return; | 1250 | return; |
1251 | } | 1251 | } |
1252 | 1252 | ||
1253 | /* stop SCD */ | 1253 | /* stop SCD */ |
1254 | iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0); | 1254 | iwl_write_prph(priv, ALM_SCD_MODE_REG, 0); |
1255 | 1255 | ||
1256 | /* reset TFD queues */ | 1256 | /* reset TFD queues */ |
1257 | for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) { | 1257 | for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) { |
1258 | iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0); | 1258 | iwl_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), 0x0); |
1259 | iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS, | 1259 | iwl_poll_direct_bit(priv, FH39_TSSR_TX_STATUS, |
1260 | ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue), | 1260 | FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id), |
1261 | 1000); | 1261 | 1000); |
1262 | } | 1262 | } |
1263 | 1263 | ||
1264 | iwl3945_release_nic_access(priv); | 1264 | iwl_release_nic_access(priv); |
1265 | spin_unlock_irqrestore(&priv->lock, flags); | 1265 | spin_unlock_irqrestore(&priv->lock, flags); |
1266 | 1266 | ||
1267 | iwl3945_hw_txq_ctx_free(priv); | 1267 | iwl3945_hw_txq_ctx_free(priv); |
1268 | } | 1268 | } |
1269 | 1269 | ||
1270 | int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv) | 1270 | static int iwl3945_apm_stop_master(struct iwl_priv *priv) |
1271 | { | 1271 | { |
1272 | int rc = 0; | 1272 | int ret = 0; |
1273 | u32 reg_val; | ||
1274 | unsigned long flags; | 1273 | unsigned long flags; |
1275 | 1274 | ||
1276 | spin_lock_irqsave(&priv->lock, flags); | 1275 | spin_lock_irqsave(&priv->lock, flags); |
1277 | 1276 | ||
1278 | /* set stop master bit */ | 1277 | /* set stop master bit */ |
1279 | iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); | 1278 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); |
1280 | 1279 | ||
1281 | reg_val = iwl3945_read32(priv, CSR_GP_CNTRL); | 1280 | iwl_poll_direct_bit(priv, CSR_RESET, |
1281 | CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); | ||
1282 | 1282 | ||
1283 | if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE == | 1283 | if (ret < 0) |
1284 | (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE)) | 1284 | goto out; |
1285 | IWL_DEBUG_INFO("Card in power save, master is already " | ||
1286 | "stopped\n"); | ||
1287 | else { | ||
1288 | rc = iwl3945_poll_direct_bit(priv, CSR_RESET, | ||
1289 | CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); | ||
1290 | if (rc < 0) { | ||
1291 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1292 | return rc; | ||
1293 | } | ||
1294 | } | ||
1295 | 1285 | ||
1286 | out: | ||
1296 | spin_unlock_irqrestore(&priv->lock, flags); | 1287 | spin_unlock_irqrestore(&priv->lock, flags); |
1297 | IWL_DEBUG_INFO("stop master\n"); | 1288 | IWL_DEBUG_INFO("stop master\n"); |
1298 | 1289 | ||
1299 | return rc; | 1290 | return ret; |
1291 | } | ||
1292 | |||
1293 | static void iwl3945_apm_stop(struct iwl_priv *priv) | ||
1294 | { | ||
1295 | unsigned long flags; | ||
1296 | |||
1297 | iwl3945_apm_stop_master(priv); | ||
1298 | |||
1299 | spin_lock_irqsave(&priv->lock, flags); | ||
1300 | |||
1301 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); | ||
1302 | |||
1303 | udelay(10); | ||
1304 | /* clear "init complete" move adapter D0A* --> D0U state */ | ||
1305 | iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); | ||
1306 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1300 | } | 1307 | } |
1301 | 1308 | ||
1302 | int iwl3945_hw_nic_reset(struct iwl3945_priv *priv) | 1309 | static int iwl3945_apm_reset(struct iwl_priv *priv) |
1303 | { | 1310 | { |
1304 | int rc; | 1311 | int rc; |
1305 | unsigned long flags; | 1312 | unsigned long flags; |
1306 | 1313 | ||
1307 | iwl3945_hw_nic_stop_master(priv); | 1314 | iwl3945_apm_stop_master(priv); |
1308 | 1315 | ||
1309 | spin_lock_irqsave(&priv->lock, flags); | 1316 | spin_lock_irqsave(&priv->lock, flags); |
1310 | 1317 | ||
1311 | iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); | 1318 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); |
1319 | udelay(10); | ||
1312 | 1320 | ||
1313 | iwl3945_poll_direct_bit(priv, CSR_GP_CNTRL, | 1321 | iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); |
1322 | |||
1323 | iwl_poll_direct_bit(priv, CSR_GP_CNTRL, | ||
1314 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); | 1324 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); |
1315 | 1325 | ||
1316 | rc = iwl3945_grab_nic_access(priv); | 1326 | rc = iwl_grab_nic_access(priv); |
1317 | if (!rc) { | 1327 | if (!rc) { |
1318 | iwl3945_write_prph(priv, APMG_CLK_CTRL_REG, | 1328 | iwl_write_prph(priv, APMG_CLK_CTRL_REG, |
1319 | APMG_CLK_VAL_BSM_CLK_RQT); | 1329 | APMG_CLK_VAL_BSM_CLK_RQT); |
1320 | 1330 | ||
1321 | udelay(10); | 1331 | iwl_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0); |
1322 | 1332 | iwl_write_prph(priv, APMG_RTC_INT_STT_REG, | |
1323 | iwl3945_set_bit(priv, CSR_GP_CNTRL, | ||
1324 | CSR_GP_CNTRL_REG_FLAG_INIT_DONE); | ||
1325 | |||
1326 | iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0); | ||
1327 | iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG, | ||
1328 | 0xFFFFFFFF); | 1333 | 0xFFFFFFFF); |
1329 | 1334 | ||
1330 | /* enable DMA */ | 1335 | /* enable DMA */ |
1331 | iwl3945_write_prph(priv, APMG_CLK_EN_REG, | 1336 | iwl_write_prph(priv, APMG_CLK_EN_REG, |
1332 | APMG_CLK_VAL_DMA_CLK_RQT | | 1337 | APMG_CLK_VAL_DMA_CLK_RQT | |
1333 | APMG_CLK_VAL_BSM_CLK_RQT); | 1338 | APMG_CLK_VAL_BSM_CLK_RQT); |
1334 | udelay(10); | 1339 | udelay(10); |
1335 | 1340 | ||
1336 | iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG, | 1341 | iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, |
1337 | APMG_PS_CTRL_VAL_RESET_REQ); | 1342 | APMG_PS_CTRL_VAL_RESET_REQ); |
1338 | udelay(5); | 1343 | udelay(5); |
1339 | iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG, | 1344 | iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, |
1340 | APMG_PS_CTRL_VAL_RESET_REQ); | 1345 | APMG_PS_CTRL_VAL_RESET_REQ); |
1341 | iwl3945_release_nic_access(priv); | 1346 | iwl_release_nic_access(priv); |
1342 | } | 1347 | } |
1343 | 1348 | ||
1344 | /* Clear the 'host command active' bit... */ | 1349 | /* Clear the 'host command active' bit... */ |
@@ -1367,17 +1372,18 @@ static inline int iwl3945_hw_reg_temp_out_of_range(int temperature) | |||
1367 | return ((temperature < -260) || (temperature > 25)) ? 1 : 0; | 1372 | return ((temperature < -260) || (temperature > 25)) ? 1 : 0; |
1368 | } | 1373 | } |
1369 | 1374 | ||
1370 | int iwl3945_hw_get_temperature(struct iwl3945_priv *priv) | 1375 | int iwl3945_hw_get_temperature(struct iwl_priv *priv) |
1371 | { | 1376 | { |
1372 | return iwl3945_read32(priv, CSR_UCODE_DRV_GP2); | 1377 | return iwl_read32(priv, CSR_UCODE_DRV_GP2); |
1373 | } | 1378 | } |
1374 | 1379 | ||
1375 | /** | 1380 | /** |
1376 | * iwl3945_hw_reg_txpower_get_temperature | 1381 | * iwl3945_hw_reg_txpower_get_temperature |
1377 | * get the current temperature by reading from NIC | 1382 | * get the current temperature by reading from NIC |
1378 | */ | 1383 | */ |
1379 | static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv) | 1384 | static int iwl3945_hw_reg_txpower_get_temperature(struct iwl_priv *priv) |
1380 | { | 1385 | { |
1386 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; | ||
1381 | int temperature; | 1387 | int temperature; |
1382 | 1388 | ||
1383 | temperature = iwl3945_hw_get_temperature(priv); | 1389 | temperature = iwl3945_hw_get_temperature(priv); |
@@ -1388,12 +1394,12 @@ static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv) | |||
1388 | 1394 | ||
1389 | /* handle insane temp reading */ | 1395 | /* handle insane temp reading */ |
1390 | if (iwl3945_hw_reg_temp_out_of_range(temperature)) { | 1396 | if (iwl3945_hw_reg_temp_out_of_range(temperature)) { |
1391 | IWL_ERROR("Error bad temperature value %d\n", temperature); | 1397 | IWL_ERR(priv, "Error bad temperature value %d\n", temperature); |
1392 | 1398 | ||
1393 | /* if really really hot(?), | 1399 | /* if really really hot(?), |
1394 | * substitute the 3rd band/group's temp measured at factory */ | 1400 | * substitute the 3rd band/group's temp measured at factory */ |
1395 | if (priv->last_temperature > 100) | 1401 | if (priv->last_temperature > 100) |
1396 | temperature = priv->eeprom.groups[2].temperature; | 1402 | temperature = eeprom->groups[2].temperature; |
1397 | else /* else use most recent "sane" value from driver */ | 1403 | else /* else use most recent "sane" value from driver */ |
1398 | temperature = priv->last_temperature; | 1404 | temperature = priv->last_temperature; |
1399 | } | 1405 | } |
@@ -1412,7 +1418,7 @@ static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv) | |||
1412 | * records new temperature in tx_mgr->temperature. | 1418 | * records new temperature in tx_mgr->temperature. |
1413 | * replaces tx_mgr->last_temperature *only* if calib needed | 1419 | * replaces tx_mgr->last_temperature *only* if calib needed |
1414 | * (assumes caller will actually do the calibration!). */ | 1420 | * (assumes caller will actually do the calibration!). */ |
1415 | static int is_temp_calib_needed(struct iwl3945_priv *priv) | 1421 | static int is_temp_calib_needed(struct iwl_priv *priv) |
1416 | { | 1422 | { |
1417 | int temp_diff; | 1423 | int temp_diff; |
1418 | 1424 | ||
@@ -1627,9 +1633,9 @@ static inline u8 iwl3945_hw_reg_fix_power_index(int index) | |||
1627 | * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK) | 1633 | * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK) |
1628 | * or 6 Mbit (OFDM) rates. | 1634 | * or 6 Mbit (OFDM) rates. |
1629 | */ | 1635 | */ |
1630 | static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index, | 1636 | static void iwl3945_hw_reg_set_scan_power(struct iwl_priv *priv, u32 scan_tbl_index, |
1631 | s32 rate_index, const s8 *clip_pwrs, | 1637 | s32 rate_index, const s8 *clip_pwrs, |
1632 | struct iwl3945_channel_info *ch_info, | 1638 | struct iwl_channel_info *ch_info, |
1633 | int band_index) | 1639 | int band_index) |
1634 | { | 1640 | { |
1635 | struct iwl3945_scan_power_info *scan_power_info; | 1641 | struct iwl3945_scan_power_info *scan_power_info; |
@@ -1646,7 +1652,7 @@ static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tb | |||
1646 | /* further limit to user's max power preference. | 1652 | /* further limit to user's max power preference. |
1647 | * FIXME: Other spectrum management power limitations do not | 1653 | * FIXME: Other spectrum management power limitations do not |
1648 | * seem to apply?? */ | 1654 | * seem to apply?? */ |
1649 | power = min(power, priv->user_txpower_limit); | 1655 | power = min(power, priv->tx_power_user_lmt); |
1650 | scan_power_info->requested_power = power; | 1656 | scan_power_info->requested_power = power; |
1651 | 1657 | ||
1652 | /* find difference between new scan *power* and current "normal" | 1658 | /* find difference between new scan *power* and current "normal" |
@@ -1678,27 +1684,27 @@ static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tb | |||
1678 | } | 1684 | } |
1679 | 1685 | ||
1680 | /** | 1686 | /** |
1681 | * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings | 1687 | * iwl3945_send_tx_power - fill in Tx Power command with gain settings |
1682 | * | 1688 | * |
1683 | * Configures power settings for all rates for the current channel, | 1689 | * Configures power settings for all rates for the current channel, |
1684 | * using values from channel info struct, and send to NIC | 1690 | * using values from channel info struct, and send to NIC |
1685 | */ | 1691 | */ |
1686 | int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv) | 1692 | int iwl3945_send_tx_power(struct iwl_priv *priv) |
1687 | { | 1693 | { |
1688 | int rate_idx, i; | 1694 | int rate_idx, i; |
1689 | const struct iwl3945_channel_info *ch_info = NULL; | 1695 | const struct iwl_channel_info *ch_info = NULL; |
1690 | struct iwl3945_txpowertable_cmd txpower = { | 1696 | struct iwl3945_txpowertable_cmd txpower = { |
1691 | .channel = priv->active_rxon.channel, | 1697 | .channel = priv->active39_rxon.channel, |
1692 | }; | 1698 | }; |
1693 | 1699 | ||
1694 | txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1; | 1700 | txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1; |
1695 | ch_info = iwl3945_get_channel_info(priv, | 1701 | ch_info = iwl_get_channel_info(priv, |
1696 | priv->band, | 1702 | priv->band, |
1697 | le16_to_cpu(priv->active_rxon.channel)); | 1703 | le16_to_cpu(priv->active39_rxon.channel)); |
1698 | if (!ch_info) { | 1704 | if (!ch_info) { |
1699 | IWL_ERROR | 1705 | IWL_ERR(priv, |
1700 | ("Failed to get channel info for channel %d [%d]\n", | 1706 | "Failed to get channel info for channel %d [%d]\n", |
1701 | le16_to_cpu(priv->active_rxon.channel), priv->band); | 1707 | le16_to_cpu(priv->active39_rxon.channel), priv->band); |
1702 | return -EINVAL; | 1708 | return -EINVAL; |
1703 | } | 1709 | } |
1704 | 1710 | ||
@@ -1711,7 +1717,7 @@ int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv) | |||
1711 | /* fill cmd with power settings for all rates for current channel */ | 1717 | /* fill cmd with power settings for all rates for current channel */ |
1712 | /* Fill OFDM rate */ | 1718 | /* Fill OFDM rate */ |
1713 | for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0; | 1719 | for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0; |
1714 | rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) { | 1720 | rate_idx <= IWL39_LAST_OFDM_RATE; rate_idx++, i++) { |
1715 | 1721 | ||
1716 | txpower.power[i].tpc = ch_info->power_info[i].tpc; | 1722 | txpower.power[i].tpc = ch_info->power_info[i].tpc; |
1717 | txpower.power[i].rate = iwl3945_rates[rate_idx].plcp; | 1723 | txpower.power[i].rate = iwl3945_rates[rate_idx].plcp; |
@@ -1737,8 +1743,9 @@ int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv) | |||
1737 | txpower.power[i].rate); | 1743 | txpower.power[i].rate); |
1738 | } | 1744 | } |
1739 | 1745 | ||
1740 | return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, | 1746 | return iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, |
1741 | sizeof(struct iwl3945_txpowertable_cmd), &txpower); | 1747 | sizeof(struct iwl3945_txpowertable_cmd), |
1748 | &txpower); | ||
1742 | 1749 | ||
1743 | } | 1750 | } |
1744 | 1751 | ||
@@ -1758,8 +1765,8 @@ int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv) | |||
1758 | * properly fill out the scan powers, and actual h/w gain settings, | 1765 | * properly fill out the scan powers, and actual h/w gain settings, |
1759 | * and send changes to NIC | 1766 | * and send changes to NIC |
1760 | */ | 1767 | */ |
1761 | static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv, | 1768 | static int iwl3945_hw_reg_set_new_power(struct iwl_priv *priv, |
1762 | struct iwl3945_channel_info *ch_info) | 1769 | struct iwl_channel_info *ch_info) |
1763 | { | 1770 | { |
1764 | struct iwl3945_channel_power_info *power_info; | 1771 | struct iwl3945_channel_power_info *power_info; |
1765 | int power_changed = 0; | 1772 | int power_changed = 0; |
@@ -1768,7 +1775,7 @@ static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv, | |||
1768 | int power; | 1775 | int power; |
1769 | 1776 | ||
1770 | /* Get this chnlgrp's rate-to-max/clip-powers table */ | 1777 | /* Get this chnlgrp's rate-to-max/clip-powers table */ |
1771 | clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers; | 1778 | clip_pwrs = priv->clip39_groups[ch_info->group_index].clip_powers; |
1772 | 1779 | ||
1773 | /* Get this channel's rate-to-current-power settings table */ | 1780 | /* Get this channel's rate-to-current-power settings table */ |
1774 | power_info = ch_info->power_info; | 1781 | power_info = ch_info->power_info; |
@@ -1821,7 +1828,7 @@ static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv, | |||
1821 | * based strictly on regulatory (eeprom and spectrum mgt) limitations | 1828 | * based strictly on regulatory (eeprom and spectrum mgt) limitations |
1822 | * (no consideration for h/w clipping limitations). | 1829 | * (no consideration for h/w clipping limitations). |
1823 | */ | 1830 | */ |
1824 | static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info) | 1831 | static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl_channel_info *ch_info) |
1825 | { | 1832 | { |
1826 | s8 max_power; | 1833 | s8 max_power; |
1827 | 1834 | ||
@@ -1849,9 +1856,10 @@ static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_i | |||
1849 | * | 1856 | * |
1850 | * If RxOn is "associated", this sends the new Txpower to NIC! | 1857 | * If RxOn is "associated", this sends the new Txpower to NIC! |
1851 | */ | 1858 | */ |
1852 | static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv) | 1859 | static int iwl3945_hw_reg_comp_txpower_temp(struct iwl_priv *priv) |
1853 | { | 1860 | { |
1854 | struct iwl3945_channel_info *ch_info = NULL; | 1861 | struct iwl_channel_info *ch_info = NULL; |
1862 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; | ||
1855 | int delta_index; | 1863 | int delta_index; |
1856 | const s8 *clip_pwrs; /* array of h/w max power levels for each rate */ | 1864 | const s8 *clip_pwrs; /* array of h/w max power levels for each rate */ |
1857 | u8 a_band; | 1865 | u8 a_band; |
@@ -1867,7 +1875,7 @@ static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv) | |||
1867 | a_band = is_channel_a_band(ch_info); | 1875 | a_band = is_channel_a_band(ch_info); |
1868 | 1876 | ||
1869 | /* Get this chnlgrp's factory calibration temperature */ | 1877 | /* Get this chnlgrp's factory calibration temperature */ |
1870 | ref_temp = (s16)priv->eeprom.groups[ch_info->group_index]. | 1878 | ref_temp = (s16)eeprom->groups[ch_info->group_index]. |
1871 | temperature; | 1879 | temperature; |
1872 | 1880 | ||
1873 | /* get power index adjustment based on current and factory | 1881 | /* get power index adjustment based on current and factory |
@@ -1893,7 +1901,7 @@ static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv) | |||
1893 | } | 1901 | } |
1894 | 1902 | ||
1895 | /* Get this chnlgrp's rate-to-max/clip-powers table */ | 1903 | /* Get this chnlgrp's rate-to-max/clip-powers table */ |
1896 | clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers; | 1904 | clip_pwrs = priv->clip39_groups[ch_info->group_index].clip_powers; |
1897 | 1905 | ||
1898 | /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */ | 1906 | /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */ |
1899 | for (scan_tbl_index = 0; | 1907 | for (scan_tbl_index = 0; |
@@ -1907,24 +1915,24 @@ static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv) | |||
1907 | } | 1915 | } |
1908 | 1916 | ||
1909 | /* send Txpower command for current channel to ucode */ | 1917 | /* send Txpower command for current channel to ucode */ |
1910 | return iwl3945_hw_reg_send_txpower(priv); | 1918 | return priv->cfg->ops->lib->send_tx_power(priv); |
1911 | } | 1919 | } |
1912 | 1920 | ||
1913 | int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power) | 1921 | int iwl3945_hw_reg_set_txpower(struct iwl_priv *priv, s8 power) |
1914 | { | 1922 | { |
1915 | struct iwl3945_channel_info *ch_info; | 1923 | struct iwl_channel_info *ch_info; |
1916 | s8 max_power; | 1924 | s8 max_power; |
1917 | u8 a_band; | 1925 | u8 a_band; |
1918 | u8 i; | 1926 | u8 i; |
1919 | 1927 | ||
1920 | if (priv->user_txpower_limit == power) { | 1928 | if (priv->tx_power_user_lmt == power) { |
1921 | IWL_DEBUG_POWER("Requested Tx power same as current " | 1929 | IWL_DEBUG_POWER("Requested Tx power same as current " |
1922 | "limit: %ddBm.\n", power); | 1930 | "limit: %ddBm.\n", power); |
1923 | return 0; | 1931 | return 0; |
1924 | } | 1932 | } |
1925 | 1933 | ||
1926 | IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power); | 1934 | IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power); |
1927 | priv->user_txpower_limit = power; | 1935 | priv->tx_power_user_lmt = power; |
1928 | 1936 | ||
1929 | /* set up new Tx powers for each and every channel, 2.4 and 5.x */ | 1937 | /* set up new Tx powers for each and every channel, 2.4 and 5.x */ |
1930 | 1938 | ||
@@ -1953,7 +1961,7 @@ int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power) | |||
1953 | } | 1961 | } |
1954 | 1962 | ||
1955 | /* will add 3945 channel switch cmd handling later */ | 1963 | /* will add 3945 channel switch cmd handling later */ |
1956 | int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel) | 1964 | int iwl3945_hw_channel_switch(struct iwl_priv *priv, u16 channel) |
1957 | { | 1965 | { |
1958 | return 0; | 1966 | return 0; |
1959 | } | 1967 | } |
@@ -1968,7 +1976,7 @@ int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel) | |||
1968 | * -- send new set of gain settings to NIC | 1976 | * -- send new set of gain settings to NIC |
1969 | * NOTE: This should continue working, even when we're not associated, | 1977 | * NOTE: This should continue working, even when we're not associated, |
1970 | * so we can keep our internal table of scan powers current. */ | 1978 | * so we can keep our internal table of scan powers current. */ |
1971 | void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv) | 1979 | void iwl3945_reg_txpower_periodic(struct iwl_priv *priv) |
1972 | { | 1980 | { |
1973 | /* This will kick in the "brute force" | 1981 | /* This will kick in the "brute force" |
1974 | * iwl3945_hw_reg_comp_txpower_temp() below */ | 1982 | * iwl3945_hw_reg_comp_txpower_temp() below */ |
@@ -1987,7 +1995,7 @@ void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv) | |||
1987 | 1995 | ||
1988 | static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work) | 1996 | static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work) |
1989 | { | 1997 | { |
1990 | struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, | 1998 | struct iwl_priv *priv = container_of(work, struct iwl_priv, |
1991 | thermal_periodic.work); | 1999 | thermal_periodic.work); |
1992 | 2000 | ||
1993 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | 2001 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
@@ -2009,10 +2017,11 @@ static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work) | |||
2009 | * on A-band, EEPROM's "group frequency" entries represent the top | 2017 | * on A-band, EEPROM's "group frequency" entries represent the top |
2010 | * channel in each group 1-4. Group 5 All B/G channels are in group 0. | 2018 | * channel in each group 1-4. Group 5 All B/G channels are in group 0. |
2011 | */ | 2019 | */ |
2012 | static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv, | 2020 | static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl_priv *priv, |
2013 | const struct iwl3945_channel_info *ch_info) | 2021 | const struct iwl_channel_info *ch_info) |
2014 | { | 2022 | { |
2015 | struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0]; | 2023 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; |
2024 | struct iwl3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0]; | ||
2016 | u8 group; | 2025 | u8 group; |
2017 | u16 group_index = 0; /* based on factory calib frequencies */ | 2026 | u16 group_index = 0; /* based on factory calib frequencies */ |
2018 | u8 grp_channel; | 2027 | u8 grp_channel; |
@@ -2043,11 +2052,12 @@ static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv, | |||
2043 | * Interpolate to get nominal (i.e. at factory calibration temperature) index | 2052 | * Interpolate to get nominal (i.e. at factory calibration temperature) index |
2044 | * into radio/DSP gain settings table for requested power. | 2053 | * into radio/DSP gain settings table for requested power. |
2045 | */ | 2054 | */ |
2046 | static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv, | 2055 | static int iwl3945_hw_reg_get_matched_power_index(struct iwl_priv *priv, |
2047 | s8 requested_power, | 2056 | s8 requested_power, |
2048 | s32 setting_index, s32 *new_index) | 2057 | s32 setting_index, s32 *new_index) |
2049 | { | 2058 | { |
2050 | const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL; | 2059 | const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL; |
2060 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; | ||
2051 | s32 index0, index1; | 2061 | s32 index0, index1; |
2052 | s32 power = 2 * requested_power; | 2062 | s32 power = 2 * requested_power; |
2053 | s32 i; | 2063 | s32 i; |
@@ -2056,7 +2066,7 @@ static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv, | |||
2056 | s32 res; | 2066 | s32 res; |
2057 | s32 denominator; | 2067 | s32 denominator; |
2058 | 2068 | ||
2059 | chnl_grp = &priv->eeprom.groups[setting_index]; | 2069 | chnl_grp = &eeprom->groups[setting_index]; |
2060 | samples = chnl_grp->samples; | 2070 | samples = chnl_grp->samples; |
2061 | for (i = 0; i < 5; i++) { | 2071 | for (i = 0; i < 5; i++) { |
2062 | if (power == samples[i].power) { | 2072 | if (power == samples[i].power) { |
@@ -2091,10 +2101,11 @@ static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv, | |||
2091 | return 0; | 2101 | return 0; |
2092 | } | 2102 | } |
2093 | 2103 | ||
2094 | static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv) | 2104 | static void iwl3945_hw_reg_init_channel_groups(struct iwl_priv *priv) |
2095 | { | 2105 | { |
2096 | u32 i; | 2106 | u32 i; |
2097 | s32 rate_index; | 2107 | s32 rate_index; |
2108 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; | ||
2098 | const struct iwl3945_eeprom_txpower_group *group; | 2109 | const struct iwl3945_eeprom_txpower_group *group; |
2099 | 2110 | ||
2100 | IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n"); | 2111 | IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n"); |
@@ -2102,11 +2113,11 @@ static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv) | |||
2102 | for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) { | 2113 | for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) { |
2103 | s8 *clip_pwrs; /* table of power levels for each rate */ | 2114 | s8 *clip_pwrs; /* table of power levels for each rate */ |
2104 | s8 satur_pwr; /* saturation power for each chnl group */ | 2115 | s8 satur_pwr; /* saturation power for each chnl group */ |
2105 | group = &priv->eeprom.groups[i]; | 2116 | group = &eeprom->groups[i]; |
2106 | 2117 | ||
2107 | /* sanity check on factory saturation power value */ | 2118 | /* sanity check on factory saturation power value */ |
2108 | if (group->saturation_power < 40) { | 2119 | if (group->saturation_power < 40) { |
2109 | IWL_WARNING("Error: saturation power is %d, " | 2120 | IWL_WARN(priv, "Error: saturation power is %d, " |
2110 | "less than minimum expected 40\n", | 2121 | "less than minimum expected 40\n", |
2111 | group->saturation_power); | 2122 | group->saturation_power); |
2112 | return; | 2123 | return; |
@@ -2121,7 +2132,7 @@ static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv) | |||
2121 | * power peaks, without too much distortion (clipping). | 2132 | * power peaks, without too much distortion (clipping). |
2122 | */ | 2133 | */ |
2123 | /* we'll fill in this array with h/w max power levels */ | 2134 | /* we'll fill in this array with h/w max power levels */ |
2124 | clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers; | 2135 | clip_pwrs = (s8 *) priv->clip39_groups[i].clip_powers; |
2125 | 2136 | ||
2126 | /* divide factory saturation power by 2 to find -3dB level */ | 2137 | /* divide factory saturation power by 2 to find -3dB level */ |
2127 | satur_pwr = (s8) (group->saturation_power >> 1); | 2138 | satur_pwr = (s8) (group->saturation_power >> 1); |
@@ -2171,10 +2182,11 @@ static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv) | |||
2171 | * | 2182 | * |
2172 | * This does *not* write values to NIC, just sets up our internal table. | 2183 | * This does *not* write values to NIC, just sets up our internal table. |
2173 | */ | 2184 | */ |
2174 | int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv) | 2185 | int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv) |
2175 | { | 2186 | { |
2176 | struct iwl3945_channel_info *ch_info = NULL; | 2187 | struct iwl_channel_info *ch_info = NULL; |
2177 | struct iwl3945_channel_power_info *pwr_info; | 2188 | struct iwl3945_channel_power_info *pwr_info; |
2189 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; | ||
2178 | int delta_index; | 2190 | int delta_index; |
2179 | u8 rate_index; | 2191 | u8 rate_index; |
2180 | u8 scan_tbl_index; | 2192 | u8 scan_tbl_index; |
@@ -2204,12 +2216,12 @@ int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv) | |||
2204 | iwl3945_hw_reg_get_ch_grp_index(priv, ch_info); | 2216 | iwl3945_hw_reg_get_ch_grp_index(priv, ch_info); |
2205 | 2217 | ||
2206 | /* Get this chnlgrp's rate->max/clip-powers table */ | 2218 | /* Get this chnlgrp's rate->max/clip-powers table */ |
2207 | clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers; | 2219 | clip_pwrs = priv->clip39_groups[ch_info->group_index].clip_powers; |
2208 | 2220 | ||
2209 | /* calculate power index *adjustment* value according to | 2221 | /* calculate power index *adjustment* value according to |
2210 | * diff between current temperature and factory temperature */ | 2222 | * diff between current temperature and factory temperature */ |
2211 | delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature, | 2223 | delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature, |
2212 | priv->eeprom.groups[ch_info->group_index]. | 2224 | eeprom->groups[ch_info->group_index]. |
2213 | temperature); | 2225 | temperature); |
2214 | 2226 | ||
2215 | IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n", | 2227 | IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n", |
@@ -2235,7 +2247,7 @@ int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv) | |||
2235 | ch_info->group_index, | 2247 | ch_info->group_index, |
2236 | &power_idx); | 2248 | &power_idx); |
2237 | if (rc) { | 2249 | if (rc) { |
2238 | IWL_ERROR("Invalid power index\n"); | 2250 | IWL_ERR(priv, "Invalid power index\n"); |
2239 | return rc; | 2251 | return rc; |
2240 | } | 2252 | } |
2241 | pwr_info->base_power_index = (u8) power_idx; | 2253 | pwr_info->base_power_index = (u8) power_idx; |
@@ -2295,75 +2307,88 @@ int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv) | |||
2295 | return 0; | 2307 | return 0; |
2296 | } | 2308 | } |
2297 | 2309 | ||
2298 | int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv) | 2310 | int iwl3945_hw_rxq_stop(struct iwl_priv *priv) |
2299 | { | 2311 | { |
2300 | int rc; | 2312 | int rc; |
2301 | unsigned long flags; | 2313 | unsigned long flags; |
2302 | 2314 | ||
2303 | spin_lock_irqsave(&priv->lock, flags); | 2315 | spin_lock_irqsave(&priv->lock, flags); |
2304 | rc = iwl3945_grab_nic_access(priv); | 2316 | rc = iwl_grab_nic_access(priv); |
2305 | if (rc) { | 2317 | if (rc) { |
2306 | spin_unlock_irqrestore(&priv->lock, flags); | 2318 | spin_unlock_irqrestore(&priv->lock, flags); |
2307 | return rc; | 2319 | return rc; |
2308 | } | 2320 | } |
2309 | 2321 | ||
2310 | iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0); | 2322 | iwl_write_direct32(priv, FH39_RCSR_CONFIG(0), 0); |
2311 | rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, | 2323 | rc = iwl_poll_direct_bit(priv, FH39_RSSR_STATUS, |
2312 | FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000); | 2324 | FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000); |
2313 | if (rc < 0) | 2325 | if (rc < 0) |
2314 | IWL_ERROR("Can't stop Rx DMA.\n"); | 2326 | IWL_ERR(priv, "Can't stop Rx DMA.\n"); |
2315 | 2327 | ||
2316 | iwl3945_release_nic_access(priv); | 2328 | iwl_release_nic_access(priv); |
2317 | spin_unlock_irqrestore(&priv->lock, flags); | 2329 | spin_unlock_irqrestore(&priv->lock, flags); |
2318 | 2330 | ||
2319 | return 0; | 2331 | return 0; |
2320 | } | 2332 | } |
2321 | 2333 | ||
2322 | int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq) | 2334 | int iwl3945_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq) |
2323 | { | 2335 | { |
2324 | int rc; | 2336 | int rc; |
2325 | unsigned long flags; | 2337 | unsigned long flags; |
2326 | int txq_id = txq->q.id; | 2338 | int txq_id = txq->q.id; |
2327 | 2339 | ||
2328 | struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt; | 2340 | struct iwl3945_shared *shared_data = priv->shared_virt; |
2329 | 2341 | ||
2330 | shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr); | 2342 | shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr); |
2331 | 2343 | ||
2332 | spin_lock_irqsave(&priv->lock, flags); | 2344 | spin_lock_irqsave(&priv->lock, flags); |
2333 | rc = iwl3945_grab_nic_access(priv); | 2345 | rc = iwl_grab_nic_access(priv); |
2334 | if (rc) { | 2346 | if (rc) { |
2335 | spin_unlock_irqrestore(&priv->lock, flags); | 2347 | spin_unlock_irqrestore(&priv->lock, flags); |
2336 | return rc; | 2348 | return rc; |
2337 | } | 2349 | } |
2338 | iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0); | 2350 | iwl_write_direct32(priv, FH39_CBCC_CTRL(txq_id), 0); |
2339 | iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0); | 2351 | iwl_write_direct32(priv, FH39_CBCC_BASE(txq_id), 0); |
2340 | 2352 | ||
2341 | iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id), | 2353 | iwl_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), |
2342 | ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT | | 2354 | FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT | |
2343 | ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF | | 2355 | FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF | |
2344 | ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD | | 2356 | FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD | |
2345 | ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL | | 2357 | FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL | |
2346 | ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE); | 2358 | FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE); |
2347 | iwl3945_release_nic_access(priv); | 2359 | iwl_release_nic_access(priv); |
2348 | 2360 | ||
2349 | /* fake read to flush all prev. writes */ | 2361 | /* fake read to flush all prev. writes */ |
2350 | iwl3945_read32(priv, FH_TSSR_CBB_BASE); | 2362 | iwl_read32(priv, FH39_TSSR_CBB_BASE); |
2351 | spin_unlock_irqrestore(&priv->lock, flags); | 2363 | spin_unlock_irqrestore(&priv->lock, flags); |
2352 | 2364 | ||
2353 | return 0; | 2365 | return 0; |
2354 | } | 2366 | } |
2355 | 2367 | ||
2356 | int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv) | 2368 | /* |
2369 | * HCMD utils | ||
2370 | */ | ||
2371 | static u16 iwl3945_get_hcmd_size(u8 cmd_id, u16 len) | ||
2357 | { | 2372 | { |
2358 | struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt; | 2373 | switch (cmd_id) { |
2374 | case REPLY_RXON: | ||
2375 | return (u16) sizeof(struct iwl3945_rxon_cmd); | ||
2376 | default: | ||
2377 | return len; | ||
2378 | } | ||
2379 | } | ||
2359 | 2380 | ||
2360 | return le32_to_cpu(shared_data->rx_read_ptr[0]); | 2381 | static u16 iwl3945_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data) |
2382 | { | ||
2383 | u16 size = (u16)sizeof(struct iwl3945_addsta_cmd); | ||
2384 | memcpy(data, cmd, size); | ||
2385 | return size; | ||
2361 | } | 2386 | } |
2362 | 2387 | ||
2363 | /** | 2388 | /** |
2364 | * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table | 2389 | * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table |
2365 | */ | 2390 | */ |
2366 | int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv) | 2391 | int iwl3945_init_hw_rate_table(struct iwl_priv *priv) |
2367 | { | 2392 | { |
2368 | int rc, i, index, prev_index; | 2393 | int rc, i, index, prev_index; |
2369 | struct iwl3945_rate_scaling_cmd rate_cmd = { | 2394 | struct iwl3945_rate_scaling_cmd rate_cmd = { |
@@ -2428,47 +2453,48 @@ int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv) | |||
2428 | 2453 | ||
2429 | /* Update the rate scaling for control frame Tx */ | 2454 | /* Update the rate scaling for control frame Tx */ |
2430 | rate_cmd.table_id = 0; | 2455 | rate_cmd.table_id = 0; |
2431 | rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd), | 2456 | rc = iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd), |
2432 | &rate_cmd); | 2457 | &rate_cmd); |
2433 | if (rc) | 2458 | if (rc) |
2434 | return rc; | 2459 | return rc; |
2435 | 2460 | ||
2436 | /* Update the rate scaling for data frame Tx */ | 2461 | /* Update the rate scaling for data frame Tx */ |
2437 | rate_cmd.table_id = 1; | 2462 | rate_cmd.table_id = 1; |
2438 | return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd), | 2463 | return iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd), |
2439 | &rate_cmd); | 2464 | &rate_cmd); |
2440 | } | 2465 | } |
2441 | 2466 | ||
2442 | /* Called when initializing driver */ | 2467 | /* Called when initializing driver */ |
2443 | int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv) | 2468 | int iwl3945_hw_set_hw_params(struct iwl_priv *priv) |
2444 | { | 2469 | { |
2445 | memset((void *)&priv->hw_setting, 0, | 2470 | memset((void *)&priv->hw_params, 0, |
2446 | sizeof(struct iwl3945_driver_hw_info)); | 2471 | sizeof(struct iwl_hw_params)); |
2447 | 2472 | ||
2448 | priv->hw_setting.shared_virt = | 2473 | priv->shared_virt = |
2449 | pci_alloc_consistent(priv->pci_dev, | 2474 | pci_alloc_consistent(priv->pci_dev, |
2450 | sizeof(struct iwl3945_shared), | 2475 | sizeof(struct iwl3945_shared), |
2451 | &priv->hw_setting.shared_phys); | 2476 | &priv->shared_phys); |
2452 | 2477 | ||
2453 | if (!priv->hw_setting.shared_virt) { | 2478 | if (!priv->shared_virt) { |
2454 | IWL_ERROR("failed to allocate pci memory\n"); | 2479 | IWL_ERR(priv, "failed to allocate pci memory\n"); |
2455 | mutex_unlock(&priv->mutex); | 2480 | mutex_unlock(&priv->mutex); |
2456 | return -ENOMEM; | 2481 | return -ENOMEM; |
2457 | } | 2482 | } |
2458 | 2483 | ||
2459 | priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE; | 2484 | priv->hw_params.tfd_size = sizeof(struct iwl3945_tfd); |
2460 | priv->hw_setting.max_pkt_size = 2342; | 2485 | priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_3K; |
2461 | priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd); | 2486 | priv->hw_params.max_pkt_size = 2342; |
2462 | priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE; | 2487 | priv->hw_params.max_rxq_size = RX_QUEUE_SIZE; |
2463 | priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG; | 2488 | priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; |
2464 | priv->hw_setting.max_stations = IWL3945_STATION_COUNT; | 2489 | priv->hw_params.max_stations = IWL3945_STATION_COUNT; |
2465 | priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID; | 2490 | priv->hw_params.bcast_sta_id = IWL3945_BROADCAST_ID; |
2491 | |||
2492 | priv->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR; | ||
2466 | 2493 | ||
2467 | priv->hw_setting.tx_ant_num = 2; | ||
2468 | return 0; | 2494 | return 0; |
2469 | } | 2495 | } |
2470 | 2496 | ||
2471 | unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv, | 2497 | unsigned int iwl3945_hw_get_beacon_cmd(struct iwl_priv *priv, |
2472 | struct iwl3945_frame *frame, u8 rate) | 2498 | struct iwl3945_frame *frame, u8 rate) |
2473 | { | 2499 | { |
2474 | struct iwl3945_tx_beacon_cmd *tx_beacon_cmd; | 2500 | struct iwl3945_tx_beacon_cmd *tx_beacon_cmd; |
@@ -2477,7 +2503,7 @@ unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv, | |||
2477 | tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u; | 2503 | tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u; |
2478 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | 2504 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); |
2479 | 2505 | ||
2480 | tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id; | 2506 | tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; |
2481 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | 2507 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
2482 | 2508 | ||
2483 | frame_size = iwl3945_fill_beacon_frame(priv, | 2509 | frame_size = iwl3945_fill_beacon_frame(priv, |
@@ -2501,37 +2527,261 @@ unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv, | |||
2501 | return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size; | 2527 | return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size; |
2502 | } | 2528 | } |
2503 | 2529 | ||
2504 | void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv) | 2530 | void iwl3945_hw_rx_handler_setup(struct iwl_priv *priv) |
2505 | { | 2531 | { |
2506 | priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx; | 2532 | priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx; |
2507 | priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx; | 2533 | priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx; |
2508 | } | 2534 | } |
2509 | 2535 | ||
2510 | void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv) | 2536 | void iwl3945_hw_setup_deferred_work(struct iwl_priv *priv) |
2511 | { | 2537 | { |
2512 | INIT_DELAYED_WORK(&priv->thermal_periodic, | 2538 | INIT_DELAYED_WORK(&priv->thermal_periodic, |
2513 | iwl3945_bg_reg_txpower_periodic); | 2539 | iwl3945_bg_reg_txpower_periodic); |
2514 | } | 2540 | } |
2515 | 2541 | ||
2516 | void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv) | 2542 | void iwl3945_hw_cancel_deferred_work(struct iwl_priv *priv) |
2517 | { | 2543 | { |
2518 | cancel_delayed_work(&priv->thermal_periodic); | 2544 | cancel_delayed_work(&priv->thermal_periodic); |
2519 | } | 2545 | } |
2520 | 2546 | ||
2521 | static struct iwl_3945_cfg iwl3945_bg_cfg = { | 2547 | /* check contents of special bootstrap uCode SRAM */ |
2548 | static int iwl3945_verify_bsm(struct iwl_priv *priv) | ||
2549 | { | ||
2550 | __le32 *image = priv->ucode_boot.v_addr; | ||
2551 | u32 len = priv->ucode_boot.len; | ||
2552 | u32 reg; | ||
2553 | u32 val; | ||
2554 | |||
2555 | IWL_DEBUG_INFO("Begin verify bsm\n"); | ||
2556 | |||
2557 | /* verify BSM SRAM contents */ | ||
2558 | val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG); | ||
2559 | for (reg = BSM_SRAM_LOWER_BOUND; | ||
2560 | reg < BSM_SRAM_LOWER_BOUND + len; | ||
2561 | reg += sizeof(u32), image++) { | ||
2562 | val = iwl_read_prph(priv, reg); | ||
2563 | if (val != le32_to_cpu(*image)) { | ||
2564 | IWL_ERR(priv, "BSM uCode verification failed at " | ||
2565 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", | ||
2566 | BSM_SRAM_LOWER_BOUND, | ||
2567 | reg - BSM_SRAM_LOWER_BOUND, len, | ||
2568 | val, le32_to_cpu(*image)); | ||
2569 | return -EIO; | ||
2570 | } | ||
2571 | } | ||
2572 | |||
2573 | IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n"); | ||
2574 | |||
2575 | return 0; | ||
2576 | } | ||
2577 | |||
2578 | |||
2579 | /****************************************************************************** | ||
2580 | * | ||
2581 | * EEPROM related functions | ||
2582 | * | ||
2583 | ******************************************************************************/ | ||
2584 | |||
2585 | /* | ||
2586 | * Clear the OWNER_MSK, to establish driver (instead of uCode running on | ||
2587 | * embedded controller) as EEPROM reader; each read is a series of pulses | ||
2588 | * to/from the EEPROM chip, not a single event, so even reads could conflict | ||
2589 | * if they weren't arbitrated by some ownership mechanism. Here, the driver | ||
2590 | * simply claims ownership, which should be safe when this function is called | ||
2591 | * (i.e. before loading uCode!). | ||
2592 | */ | ||
2593 | static int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv) | ||
2594 | { | ||
2595 | _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK); | ||
2596 | return 0; | ||
2597 | } | ||
2598 | |||
2599 | |||
2600 | static void iwl3945_eeprom_release_semaphore(struct iwl_priv *priv) | ||
2601 | { | ||
2602 | return; | ||
2603 | } | ||
2604 | |||
2605 | /** | ||
2606 | * iwl3945_load_bsm - Load bootstrap instructions | ||
2607 | * | ||
2608 | * BSM operation: | ||
2609 | * | ||
2610 | * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program | ||
2611 | * in special SRAM that does not power down during RFKILL. When powering back | ||
2612 | * up after power-saving sleeps (or during initial uCode load), the BSM loads | ||
2613 | * the bootstrap program into the on-board processor, and starts it. | ||
2614 | * | ||
2615 | * The bootstrap program loads (via DMA) instructions and data for a new | ||
2616 | * program from host DRAM locations indicated by the host driver in the | ||
2617 | * BSM_DRAM_* registers. Once the new program is loaded, it starts | ||
2618 | * automatically. | ||
2619 | * | ||
2620 | * When initializing the NIC, the host driver points the BSM to the | ||
2621 | * "initialize" uCode image. This uCode sets up some internal data, then | ||
2622 | * notifies host via "initialize alive" that it is complete. | ||
2623 | * | ||
2624 | * The host then replaces the BSM_DRAM_* pointer values to point to the | ||
2625 | * normal runtime uCode instructions and a backup uCode data cache buffer | ||
2626 | * (filled initially with starting data values for the on-board processor), | ||
2627 | * then triggers the "initialize" uCode to load and launch the runtime uCode, | ||
2628 | * which begins normal operation. | ||
2629 | * | ||
2630 | * When doing a power-save shutdown, runtime uCode saves data SRAM into | ||
2631 | * the backup data cache in DRAM before SRAM is powered down. | ||
2632 | * | ||
2633 | * When powering back up, the BSM loads the bootstrap program. This reloads | ||
2634 | * the runtime uCode instructions and the backup data cache into SRAM, | ||
2635 | * and re-launches the runtime uCode from where it left off. | ||
2636 | */ | ||
2637 | static int iwl3945_load_bsm(struct iwl_priv *priv) | ||
2638 | { | ||
2639 | __le32 *image = priv->ucode_boot.v_addr; | ||
2640 | u32 len = priv->ucode_boot.len; | ||
2641 | dma_addr_t pinst; | ||
2642 | dma_addr_t pdata; | ||
2643 | u32 inst_len; | ||
2644 | u32 data_len; | ||
2645 | int rc; | ||
2646 | int i; | ||
2647 | u32 done; | ||
2648 | u32 reg_offset; | ||
2649 | |||
2650 | IWL_DEBUG_INFO("Begin load bsm\n"); | ||
2651 | |||
2652 | /* make sure bootstrap program is no larger than BSM's SRAM size */ | ||
2653 | if (len > IWL39_MAX_BSM_SIZE) | ||
2654 | return -EINVAL; | ||
2655 | |||
2656 | /* Tell bootstrap uCode where to find the "Initialize" uCode | ||
2657 | * in host DRAM ... host DRAM physical address bits 31:0 for 3945. | ||
2658 | * NOTE: iwl3945_initialize_alive_start() will replace these values, | ||
2659 | * after the "initialize" uCode has run, to point to | ||
2660 | * runtime/protocol instructions and backup data cache. */ | ||
2661 | pinst = priv->ucode_init.p_addr; | ||
2662 | pdata = priv->ucode_init_data.p_addr; | ||
2663 | inst_len = priv->ucode_init.len; | ||
2664 | data_len = priv->ucode_init_data.len; | ||
2665 | |||
2666 | rc = iwl_grab_nic_access(priv); | ||
2667 | if (rc) | ||
2668 | return rc; | ||
2669 | |||
2670 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); | ||
2671 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | ||
2672 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); | ||
2673 | iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); | ||
2674 | |||
2675 | /* Fill BSM memory with bootstrap instructions */ | ||
2676 | for (reg_offset = BSM_SRAM_LOWER_BOUND; | ||
2677 | reg_offset < BSM_SRAM_LOWER_BOUND + len; | ||
2678 | reg_offset += sizeof(u32), image++) | ||
2679 | _iwl_write_prph(priv, reg_offset, | ||
2680 | le32_to_cpu(*image)); | ||
2681 | |||
2682 | rc = iwl3945_verify_bsm(priv); | ||
2683 | if (rc) { | ||
2684 | iwl_release_nic_access(priv); | ||
2685 | return rc; | ||
2686 | } | ||
2687 | |||
2688 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ | ||
2689 | iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); | ||
2690 | iwl_write_prph(priv, BSM_WR_MEM_DST_REG, | ||
2691 | IWL39_RTC_INST_LOWER_BOUND); | ||
2692 | iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); | ||
2693 | |||
2694 | /* Load bootstrap code into instruction SRAM now, | ||
2695 | * to prepare to load "initialize" uCode */ | ||
2696 | iwl_write_prph(priv, BSM_WR_CTRL_REG, | ||
2697 | BSM_WR_CTRL_REG_BIT_START); | ||
2698 | |||
2699 | /* Wait for load of bootstrap uCode to finish */ | ||
2700 | for (i = 0; i < 100; i++) { | ||
2701 | done = iwl_read_prph(priv, BSM_WR_CTRL_REG); | ||
2702 | if (!(done & BSM_WR_CTRL_REG_BIT_START)) | ||
2703 | break; | ||
2704 | udelay(10); | ||
2705 | } | ||
2706 | if (i < 100) | ||
2707 | IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i); | ||
2708 | else { | ||
2709 | IWL_ERR(priv, "BSM write did not complete!\n"); | ||
2710 | return -EIO; | ||
2711 | } | ||
2712 | |||
2713 | /* Enable future boot loads whenever power management unit triggers it | ||
2714 | * (e.g. when powering back up after power-save shutdown) */ | ||
2715 | iwl_write_prph(priv, BSM_WR_CTRL_REG, | ||
2716 | BSM_WR_CTRL_REG_BIT_START_EN); | ||
2717 | |||
2718 | iwl_release_nic_access(priv); | ||
2719 | |||
2720 | return 0; | ||
2721 | } | ||
2722 | |||
2723 | static struct iwl_lib_ops iwl3945_lib = { | ||
2724 | .txq_attach_buf_to_tfd = iwl3945_hw_txq_attach_buf_to_tfd, | ||
2725 | .txq_free_tfd = iwl3945_hw_txq_free_tfd, | ||
2726 | .txq_init = iwl3945_hw_tx_queue_init, | ||
2727 | .load_ucode = iwl3945_load_bsm, | ||
2728 | .apm_ops = { | ||
2729 | .init = iwl3945_apm_init, | ||
2730 | .reset = iwl3945_apm_reset, | ||
2731 | .stop = iwl3945_apm_stop, | ||
2732 | .config = iwl3945_nic_config, | ||
2733 | .set_pwr_src = iwl3945_set_pwr_src, | ||
2734 | }, | ||
2735 | .eeprom_ops = { | ||
2736 | .regulatory_bands = { | ||
2737 | EEPROM_REGULATORY_BAND_1_CHANNELS, | ||
2738 | EEPROM_REGULATORY_BAND_2_CHANNELS, | ||
2739 | EEPROM_REGULATORY_BAND_3_CHANNELS, | ||
2740 | EEPROM_REGULATORY_BAND_4_CHANNELS, | ||
2741 | EEPROM_REGULATORY_BAND_5_CHANNELS, | ||
2742 | IWL3945_EEPROM_IMG_SIZE, | ||
2743 | IWL3945_EEPROM_IMG_SIZE, | ||
2744 | }, | ||
2745 | .verify_signature = iwlcore_eeprom_verify_signature, | ||
2746 | .acquire_semaphore = iwl3945_eeprom_acquire_semaphore, | ||
2747 | .release_semaphore = iwl3945_eeprom_release_semaphore, | ||
2748 | .query_addr = iwlcore_eeprom_query_addr, | ||
2749 | }, | ||
2750 | .send_tx_power = iwl3945_send_tx_power, | ||
2751 | }; | ||
2752 | |||
2753 | static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils = { | ||
2754 | .get_hcmd_size = iwl3945_get_hcmd_size, | ||
2755 | .build_addsta_hcmd = iwl3945_build_addsta_hcmd, | ||
2756 | }; | ||
2757 | |||
2758 | static struct iwl_ops iwl3945_ops = { | ||
2759 | .lib = &iwl3945_lib, | ||
2760 | .utils = &iwl3945_hcmd_utils, | ||
2761 | }; | ||
2762 | |||
2763 | static struct iwl_cfg iwl3945_bg_cfg = { | ||
2522 | .name = "3945BG", | 2764 | .name = "3945BG", |
2523 | .fw_name_pre = IWL3945_FW_PRE, | 2765 | .fw_name_pre = IWL3945_FW_PRE, |
2524 | .ucode_api_max = IWL3945_UCODE_API_MAX, | 2766 | .ucode_api_max = IWL3945_UCODE_API_MAX, |
2525 | .ucode_api_min = IWL3945_UCODE_API_MIN, | 2767 | .ucode_api_min = IWL3945_UCODE_API_MIN, |
2526 | .sku = IWL_SKU_G, | 2768 | .sku = IWL_SKU_G, |
2769 | .eeprom_size = IWL3945_EEPROM_IMG_SIZE, | ||
2770 | .eeprom_ver = EEPROM_3945_EEPROM_VERSION, | ||
2771 | .ops = &iwl3945_ops, | ||
2772 | .mod_params = &iwl3945_mod_params | ||
2527 | }; | 2773 | }; |
2528 | 2774 | ||
2529 | static struct iwl_3945_cfg iwl3945_abg_cfg = { | 2775 | static struct iwl_cfg iwl3945_abg_cfg = { |
2530 | .name = "3945ABG", | 2776 | .name = "3945ABG", |
2531 | .fw_name_pre = IWL3945_FW_PRE, | 2777 | .fw_name_pre = IWL3945_FW_PRE, |
2532 | .ucode_api_max = IWL3945_UCODE_API_MAX, | 2778 | .ucode_api_max = IWL3945_UCODE_API_MAX, |
2533 | .ucode_api_min = IWL3945_UCODE_API_MIN, | 2779 | .ucode_api_min = IWL3945_UCODE_API_MIN, |
2534 | .sku = IWL_SKU_A|IWL_SKU_G, | 2780 | .sku = IWL_SKU_A|IWL_SKU_G, |
2781 | .eeprom_size = IWL3945_EEPROM_IMG_SIZE, | ||
2782 | .eeprom_ver = EEPROM_3945_EEPROM_VERSION, | ||
2783 | .ops = &iwl3945_ops, | ||
2784 | .mod_params = &iwl3945_mod_params | ||
2535 | }; | 2785 | }; |
2536 | 2786 | ||
2537 | struct pci_device_id iwl3945_hw_card_ids[] = { | 2787 | struct pci_device_id iwl3945_hw_card_ids[] = { |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.h b/drivers/net/wireless/iwlwifi/iwl-3945.h index 2c0ddc5110c6..fef54e9cf8a8 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945.h +++ b/drivers/net/wireless/iwlwifi/iwl-3945.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -43,11 +43,13 @@ | |||
43 | /* Hardware specific file defines the PCI IDs table for that hardware module */ | 43 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
44 | extern struct pci_device_id iwl3945_hw_card_ids[]; | 44 | extern struct pci_device_id iwl3945_hw_card_ids[]; |
45 | 45 | ||
46 | #define DRV_NAME "iwl3945" | ||
47 | #include "iwl-csr.h" | 46 | #include "iwl-csr.h" |
48 | #include "iwl-prph.h" | 47 | #include "iwl-prph.h" |
48 | #include "iwl-fh.h" | ||
49 | #include "iwl-3945-hw.h" | 49 | #include "iwl-3945-hw.h" |
50 | #include "iwl-3945-debug.h" | 50 | #include "iwl-debug.h" |
51 | #include "iwl-power.h" | ||
52 | #include "iwl-dev.h" | ||
51 | #include "iwl-3945-led.h" | 53 | #include "iwl-3945-led.h" |
52 | 54 | ||
53 | /* Highest firmware API version supported */ | 55 | /* Highest firmware API version supported */ |
@@ -74,8 +76,7 @@ extern struct pci_device_id iwl3945_hw_card_ids[]; | |||
74 | #define IWL_NOISE_MEAS_NOT_AVAILABLE (-127) | 76 | #define IWL_NOISE_MEAS_NOT_AVAILABLE (-127) |
75 | 77 | ||
76 | /* Module parameters accessible from iwl-*.c */ | 78 | /* Module parameters accessible from iwl-*.c */ |
77 | extern int iwl3945_param_hwcrypto; | 79 | extern struct iwl_mod_params iwl3945_mod_params; |
78 | extern int iwl3945_param_queues_num; | ||
79 | 80 | ||
80 | struct iwl3945_sta_priv { | 81 | struct iwl3945_sta_priv { |
81 | struct iwl3945_rs_sta *rs_sta; | 82 | struct iwl3945_rs_sta *rs_sta; |
@@ -95,7 +96,6 @@ enum iwl3945_antenna { | |||
95 | * else RTS for data/management frames where MPDU is larger | 96 | * else RTS for data/management frames where MPDU is larger |
96 | * than RTS value. | 97 | * than RTS value. |
97 | */ | 98 | */ |
98 | #define IWL_RX_BUF_SIZE 3000U | ||
99 | #define DEFAULT_RTS_THRESHOLD 2347U | 99 | #define DEFAULT_RTS_THRESHOLD 2347U |
100 | #define MIN_RTS_THRESHOLD 0U | 100 | #define MIN_RTS_THRESHOLD 0U |
101 | #define MAX_RTS_THRESHOLD 2347U | 101 | #define MAX_RTS_THRESHOLD 2347U |
@@ -105,136 +105,7 @@ enum iwl3945_antenna { | |||
105 | #define DEFAULT_SHORT_RETRY_LIMIT 7U | 105 | #define DEFAULT_SHORT_RETRY_LIMIT 7U |
106 | #define DEFAULT_LONG_RETRY_LIMIT 4U | 106 | #define DEFAULT_LONG_RETRY_LIMIT 4U |
107 | 107 | ||
108 | struct iwl3945_rx_mem_buffer { | 108 | #include "iwl-agn-rs.h" |
109 | dma_addr_t dma_addr; | ||
110 | struct sk_buff *skb; | ||
111 | struct list_head list; | ||
112 | }; | ||
113 | |||
114 | /* | ||
115 | * Generic queue structure | ||
116 | * | ||
117 | * Contains common data for Rx and Tx queues | ||
118 | */ | ||
119 | struct iwl3945_queue { | ||
120 | int n_bd; /* number of BDs in this queue */ | ||
121 | int write_ptr; /* 1-st empty entry (index) host_w*/ | ||
122 | int read_ptr; /* last used entry (index) host_r*/ | ||
123 | dma_addr_t dma_addr; /* physical addr for BD's */ | ||
124 | int n_window; /* safe queue window */ | ||
125 | u32 id; | ||
126 | int low_mark; /* low watermark, resume queue if free | ||
127 | * space more than this */ | ||
128 | int high_mark; /* high watermark, stop queue if free | ||
129 | * space less than this */ | ||
130 | } __attribute__ ((packed)); | ||
131 | |||
132 | int iwl3945_queue_space(const struct iwl3945_queue *q); | ||
133 | int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i); | ||
134 | |||
135 | #define MAX_NUM_OF_TBS (20) | ||
136 | |||
137 | /* One for each TFD */ | ||
138 | struct iwl3945_tx_info { | ||
139 | struct sk_buff *skb[MAX_NUM_OF_TBS]; | ||
140 | }; | ||
141 | |||
142 | /** | ||
143 | * struct iwl3945_tx_queue - Tx Queue for DMA | ||
144 | * @q: generic Rx/Tx queue descriptor | ||
145 | * @bd: base of circular buffer of TFDs | ||
146 | * @cmd: array of command/Tx buffers | ||
147 | * @dma_addr_cmd: physical address of cmd/tx buffer array | ||
148 | * @txb: array of per-TFD driver data | ||
149 | * @need_update: indicates need to update read/write index | ||
150 | * | ||
151 | * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame | ||
152 | * descriptors) and required locking structures. | ||
153 | */ | ||
154 | struct iwl3945_tx_queue { | ||
155 | struct iwl3945_queue q; | ||
156 | struct iwl3945_tfd_frame *bd; | ||
157 | struct iwl3945_cmd *cmd; | ||
158 | dma_addr_t dma_addr_cmd; | ||
159 | struct iwl3945_tx_info *txb; | ||
160 | int need_update; | ||
161 | int active; | ||
162 | }; | ||
163 | |||
164 | #define IWL_NUM_SCAN_RATES (2) | ||
165 | |||
166 | struct iwl3945_channel_tgd_info { | ||
167 | u8 type; | ||
168 | s8 max_power; | ||
169 | }; | ||
170 | |||
171 | struct iwl3945_channel_tgh_info { | ||
172 | s64 last_radar_time; | ||
173 | }; | ||
174 | |||
175 | /* current Tx power values to use, one for each rate for each channel. | ||
176 | * requested power is limited by: | ||
177 | * -- regulatory EEPROM limits for this channel | ||
178 | * -- hardware capabilities (clip-powers) | ||
179 | * -- spectrum management | ||
180 | * -- user preference (e.g. iwconfig) | ||
181 | * when requested power is set, base power index must also be set. */ | ||
182 | struct iwl3945_channel_power_info { | ||
183 | struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ | ||
184 | s8 power_table_index; /* actual (compenst'd) index into gain table */ | ||
185 | s8 base_power_index; /* gain index for power at factory temp. */ | ||
186 | s8 requested_power; /* power (dBm) requested for this chnl/rate */ | ||
187 | }; | ||
188 | |||
189 | /* current scan Tx power values to use, one for each scan rate for each | ||
190 | * channel. */ | ||
191 | struct iwl3945_scan_power_info { | ||
192 | struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ | ||
193 | s8 power_table_index; /* actual (compenst'd) index into gain table */ | ||
194 | s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */ | ||
195 | }; | ||
196 | |||
197 | /* | ||
198 | * One for each channel, holds all channel setup data | ||
199 | * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant | ||
200 | * with one another! | ||
201 | */ | ||
202 | #define IWL4965_MAX_RATE (33) | ||
203 | |||
204 | struct iwl3945_channel_info { | ||
205 | struct iwl3945_channel_tgd_info tgd; | ||
206 | struct iwl3945_channel_tgh_info tgh; | ||
207 | struct iwl3945_eeprom_channel eeprom; /* EEPROM regulatory limit */ | ||
208 | struct iwl3945_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for | ||
209 | * FAT channel */ | ||
210 | |||
211 | u8 channel; /* channel number */ | ||
212 | u8 flags; /* flags copied from EEPROM */ | ||
213 | s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ | ||
214 | s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */ | ||
215 | s8 min_power; /* always 0 */ | ||
216 | s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ | ||
217 | |||
218 | u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */ | ||
219 | u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */ | ||
220 | enum ieee80211_band band; | ||
221 | |||
222 | /* Radio/DSP gain settings for each "normal" data Tx rate. | ||
223 | * These include, in addition to RF and DSP gain, a few fields for | ||
224 | * remembering/modifying gain settings (indexes). */ | ||
225 | struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE]; | ||
226 | |||
227 | /* Radio/DSP gain settings for each scan rate, for directed scans. */ | ||
228 | struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES]; | ||
229 | }; | ||
230 | |||
231 | struct iwl3945_clip_group { | ||
232 | /* maximum power level to prevent clipping for each rate, derived by | ||
233 | * us from this band's saturation power in EEPROM */ | ||
234 | const s8 clip_powers[IWL_MAX_RATES]; | ||
235 | }; | ||
236 | |||
237 | #include "iwl-3945-rs.h" | ||
238 | 109 | ||
239 | #define IWL_TX_FIFO_AC0 0 | 110 | #define IWL_TX_FIFO_AC0 0 |
240 | #define IWL_TX_FIFO_AC1 1 | 111 | #define IWL_TX_FIFO_AC1 1 |
@@ -247,33 +118,6 @@ struct iwl3945_clip_group { | |||
247 | /* Minimum number of queues. MAX_NUM is defined in hw specific files */ | 118 | /* Minimum number of queues. MAX_NUM is defined in hw specific files */ |
248 | #define IWL_MIN_NUM_QUEUES 4 | 119 | #define IWL_MIN_NUM_QUEUES 4 |
249 | 120 | ||
250 | /* Power management (not Tx power) structures */ | ||
251 | |||
252 | struct iwl3945_power_vec_entry { | ||
253 | struct iwl3945_powertable_cmd cmd; | ||
254 | u8 no_dtim; | ||
255 | }; | ||
256 | #define IWL_POWER_RANGE_0 (0) | ||
257 | #define IWL_POWER_RANGE_1 (1) | ||
258 | |||
259 | #define IWL_POWER_MODE_CAM 0x00 /* Continuously Aware Mode, always on */ | ||
260 | #define IWL_POWER_INDEX_3 0x03 | ||
261 | #define IWL_POWER_INDEX_5 0x05 | ||
262 | #define IWL_POWER_AC 0x06 | ||
263 | #define IWL_POWER_BATTERY 0x07 | ||
264 | #define IWL_POWER_LIMIT 0x07 | ||
265 | #define IWL_POWER_MASK 0x0F | ||
266 | #define IWL_POWER_ENABLED 0x10 | ||
267 | #define IWL_POWER_LEVEL(x) ((x) & IWL_POWER_MASK) | ||
268 | |||
269 | struct iwl3945_power_mgr { | ||
270 | spinlock_t lock; | ||
271 | struct iwl3945_power_vec_entry pwr_range_0[IWL_POWER_AC]; | ||
272 | struct iwl3945_power_vec_entry pwr_range_1[IWL_POWER_AC]; | ||
273 | u8 active_index; | ||
274 | u32 dtim_val; | ||
275 | }; | ||
276 | |||
277 | #define IEEE80211_DATA_LEN 2304 | 121 | #define IEEE80211_DATA_LEN 2304 |
278 | #define IEEE80211_4ADDR_LEN 30 | 122 | #define IEEE80211_4ADDR_LEN 30 |
279 | #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) | 123 | #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) |
@@ -289,81 +133,10 @@ struct iwl3945_frame { | |||
289 | struct list_head list; | 133 | struct list_head list; |
290 | }; | 134 | }; |
291 | 135 | ||
292 | #define SEQ_TO_QUEUE(x) ((x >> 8) & 0xbf) | ||
293 | #define QUEUE_TO_SEQ(x) ((x & 0xbf) << 8) | ||
294 | #define SEQ_TO_INDEX(x) ((u8)(x & 0xff)) | ||
295 | #define INDEX_TO_SEQ(x) ((u8)(x & 0xff)) | ||
296 | #define SEQ_HUGE_FRAME (0x4000) | ||
297 | #define SEQ_RX_FRAME __constant_cpu_to_le16(0x8000) | ||
298 | #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) | 136 | #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) |
299 | #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) | 137 | #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) |
300 | #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) | 138 | #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) |
301 | 139 | ||
302 | enum { | ||
303 | /* CMD_SIZE_NORMAL = 0, */ | ||
304 | CMD_SIZE_HUGE = (1 << 0), | ||
305 | /* CMD_SYNC = 0, */ | ||
306 | CMD_ASYNC = (1 << 1), | ||
307 | /* CMD_NO_SKB = 0, */ | ||
308 | CMD_WANT_SKB = (1 << 2), | ||
309 | }; | ||
310 | |||
311 | struct iwl3945_cmd; | ||
312 | struct iwl3945_priv; | ||
313 | |||
314 | struct iwl3945_cmd_meta { | ||
315 | struct iwl3945_cmd_meta *source; | ||
316 | union { | ||
317 | struct sk_buff *skb; | ||
318 | int (*callback)(struct iwl3945_priv *priv, | ||
319 | struct iwl3945_cmd *cmd, struct sk_buff *skb); | ||
320 | } __attribute__ ((packed)) u; | ||
321 | |||
322 | /* The CMD_SIZE_HUGE flag bit indicates that the command | ||
323 | * structure is stored at the end of the shared queue memory. */ | ||
324 | u32 flags; | ||
325 | |||
326 | } __attribute__ ((packed)); | ||
327 | |||
328 | /** | ||
329 | * struct iwl3945_cmd | ||
330 | * | ||
331 | * For allocation of the command and tx queues, this establishes the overall | ||
332 | * size of the largest command we send to uCode, except for a scan command | ||
333 | * (which is relatively huge; space is allocated separately). | ||
334 | */ | ||
335 | struct iwl3945_cmd { | ||
336 | struct iwl3945_cmd_meta meta; | ||
337 | struct iwl3945_cmd_header hdr; | ||
338 | union { | ||
339 | struct iwl3945_addsta_cmd addsta; | ||
340 | struct iwl3945_led_cmd led; | ||
341 | u32 flags; | ||
342 | u8 val8; | ||
343 | u16 val16; | ||
344 | u32 val32; | ||
345 | struct iwl3945_bt_cmd bt; | ||
346 | struct iwl3945_rxon_time_cmd rxon_time; | ||
347 | struct iwl3945_powertable_cmd powertable; | ||
348 | struct iwl3945_qosparam_cmd qosparam; | ||
349 | struct iwl3945_tx_cmd tx; | ||
350 | struct iwl3945_tx_beacon_cmd tx_beacon; | ||
351 | struct iwl3945_rxon_assoc_cmd rxon_assoc; | ||
352 | u8 *indirect; | ||
353 | u8 payload[360]; | ||
354 | } __attribute__ ((packed)) cmd; | ||
355 | } __attribute__ ((packed)); | ||
356 | |||
357 | struct iwl3945_host_cmd { | ||
358 | u8 id; | ||
359 | u16 len; | ||
360 | struct iwl3945_cmd_meta meta; | ||
361 | const void *data; | ||
362 | }; | ||
363 | |||
364 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl3945_cmd) - \ | ||
365 | sizeof(struct iwl3945_cmd_meta)) | ||
366 | |||
367 | /* | 140 | /* |
368 | * RX related structures and functions | 141 | * RX related structures and functions |
369 | */ | 142 | */ |
@@ -374,33 +147,6 @@ struct iwl3945_host_cmd { | |||
374 | #define SUP_RATE_11B_MAX_NUM_CHANNELS 4 | 147 | #define SUP_RATE_11B_MAX_NUM_CHANNELS 4 |
375 | #define SUP_RATE_11G_MAX_NUM_CHANNELS 12 | 148 | #define SUP_RATE_11G_MAX_NUM_CHANNELS 12 |
376 | 149 | ||
377 | /** | ||
378 | * struct iwl3945_rx_queue - Rx queue | ||
379 | * @processed: Internal index to last handled Rx packet | ||
380 | * @read: Shared index to newest available Rx buffer | ||
381 | * @write: Shared index to oldest written Rx packet | ||
382 | * @free_count: Number of pre-allocated buffers in rx_free | ||
383 | * @rx_free: list of free SKBs for use | ||
384 | * @rx_used: List of Rx buffers with no SKB | ||
385 | * @need_update: flag to indicate we need to update read/write index | ||
386 | * | ||
387 | * NOTE: rx_free and rx_used are used as a FIFO for iwl3945_rx_mem_buffers | ||
388 | */ | ||
389 | struct iwl3945_rx_queue { | ||
390 | __le32 *bd; | ||
391 | dma_addr_t dma_addr; | ||
392 | struct iwl3945_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; | ||
393 | struct iwl3945_rx_mem_buffer *queue[RX_QUEUE_SIZE]; | ||
394 | u32 processed; | ||
395 | u32 read; | ||
396 | u32 write; | ||
397 | u32 free_count; | ||
398 | struct list_head rx_free; | ||
399 | struct list_head rx_used; | ||
400 | int need_update; | ||
401 | spinlock_t lock; | ||
402 | }; | ||
403 | |||
404 | #define IWL_SUPPORTED_RATES_IE_LEN 8 | 150 | #define IWL_SUPPORTED_RATES_IE_LEN 8 |
405 | 151 | ||
406 | #define SCAN_INTERVAL 100 | 152 | #define SCAN_INTERVAL 100 |
@@ -430,87 +176,9 @@ struct iwl3945_rx_queue { | |||
430 | #define IWL_INVALID_RATE 0xFF | 176 | #define IWL_INVALID_RATE 0xFF |
431 | #define IWL_INVALID_VALUE -1 | 177 | #define IWL_INVALID_VALUE -1 |
432 | 178 | ||
433 | struct iwl3945_tid_data { | ||
434 | u16 seq_number; | ||
435 | }; | ||
436 | |||
437 | struct iwl3945_hw_key { | ||
438 | enum ieee80211_key_alg alg; | ||
439 | int keylen; | ||
440 | u8 key[32]; | ||
441 | }; | ||
442 | |||
443 | union iwl3945_ht_rate_supp { | ||
444 | u16 rates; | ||
445 | struct { | ||
446 | u8 siso_rate; | ||
447 | u8 mimo_rate; | ||
448 | }; | ||
449 | }; | ||
450 | |||
451 | union iwl3945_qos_capabity { | ||
452 | struct { | ||
453 | u8 edca_count:4; /* bit 0-3 */ | ||
454 | u8 q_ack:1; /* bit 4 */ | ||
455 | u8 queue_request:1; /* bit 5 */ | ||
456 | u8 txop_request:1; /* bit 6 */ | ||
457 | u8 reserved:1; /* bit 7 */ | ||
458 | } q_AP; | ||
459 | struct { | ||
460 | u8 acvo_APSD:1; /* bit 0 */ | ||
461 | u8 acvi_APSD:1; /* bit 1 */ | ||
462 | u8 ac_bk_APSD:1; /* bit 2 */ | ||
463 | u8 ac_be_APSD:1; /* bit 3 */ | ||
464 | u8 q_ack:1; /* bit 4 */ | ||
465 | u8 max_len:2; /* bit 5-6 */ | ||
466 | u8 more_data_ack:1; /* bit 7 */ | ||
467 | } q_STA; | ||
468 | u8 val; | ||
469 | }; | ||
470 | |||
471 | /* QoS structures */ | ||
472 | struct iwl3945_qos_info { | ||
473 | int qos_active; | ||
474 | union iwl3945_qos_capabity qos_cap; | ||
475 | struct iwl3945_qosparam_cmd def_qos_parm; | ||
476 | }; | ||
477 | |||
478 | #define STA_PS_STATUS_WAKE 0 | 179 | #define STA_PS_STATUS_WAKE 0 |
479 | #define STA_PS_STATUS_SLEEP 1 | 180 | #define STA_PS_STATUS_SLEEP 1 |
480 | 181 | ||
481 | struct iwl3945_station_entry { | ||
482 | struct iwl3945_addsta_cmd sta; | ||
483 | struct iwl3945_tid_data tid[MAX_TID_COUNT]; | ||
484 | union { | ||
485 | struct { | ||
486 | u8 rate; | ||
487 | u8 flags; | ||
488 | } s; | ||
489 | u16 rate_n_flags; | ||
490 | } current_rate; | ||
491 | u8 used; | ||
492 | u8 ps_status; | ||
493 | struct iwl3945_hw_key keyinfo; | ||
494 | }; | ||
495 | |||
496 | /* one for each uCode image (inst/data, boot/init/runtime) */ | ||
497 | struct fw_desc { | ||
498 | void *v_addr; /* access by driver */ | ||
499 | dma_addr_t p_addr; /* access by card's busmaster DMA */ | ||
500 | u32 len; /* bytes */ | ||
501 | }; | ||
502 | |||
503 | /* uCode file layout */ | ||
504 | struct iwl3945_ucode { | ||
505 | __le32 ver; /* major/minor/API/serial */ | ||
506 | __le32 inst_size; /* bytes of runtime instructions */ | ||
507 | __le32 data_size; /* bytes of runtime data */ | ||
508 | __le32 init_size; /* bytes of initialization instructions */ | ||
509 | __le32 init_data_size; /* bytes of initialization data */ | ||
510 | __le32 boot_size; /* bytes of bootstrap instructions */ | ||
511 | u8 data[0]; /* data in same order as "size" elements */ | ||
512 | }; | ||
513 | |||
514 | struct iwl3945_ibss_seq { | 182 | struct iwl3945_ibss_seq { |
515 | u8 mac[ETH_ALEN]; | 183 | u8 mac[ETH_ALEN]; |
516 | u16 seq_num; | 184 | u16 seq_num; |
@@ -519,34 +187,6 @@ struct iwl3945_ibss_seq { | |||
519 | struct list_head list; | 187 | struct list_head list; |
520 | }; | 188 | }; |
521 | 189 | ||
522 | /** | ||
523 | * struct iwl3945_driver_hw_info | ||
524 | * @max_txq_num: Max # Tx queues supported | ||
525 | * @tx_cmd_len: Size of Tx command (but not including frame itself) | ||
526 | * @tx_ant_num: Number of TX antennas | ||
527 | * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2) | ||
528 | * @rx_buf_size: | ||
529 | * @max_pkt_size: | ||
530 | * @max_rxq_log: Log-base-2 of max_rxq_size | ||
531 | * @max_stations: | ||
532 | * @bcast_sta_id: | ||
533 | * @shared_virt: Pointer to driver/uCode shared Tx Byte Counts and Rx status | ||
534 | * @shared_phys: Physical Pointer to Tx Byte Counts and Rx status | ||
535 | */ | ||
536 | struct iwl3945_driver_hw_info { | ||
537 | u16 max_txq_num; | ||
538 | u16 tx_cmd_len; | ||
539 | u16 tx_ant_num; | ||
540 | u16 max_rxq_size; | ||
541 | u32 rx_buf_size; | ||
542 | u32 max_pkt_size; | ||
543 | u16 max_rxq_log; | ||
544 | u8 max_stations; | ||
545 | u8 bcast_sta_id; | ||
546 | void *shared_virt; | ||
547 | dma_addr_t shared_phys; | ||
548 | }; | ||
549 | |||
550 | #define IWL_RX_HDR(x) ((struct iwl3945_rx_frame_hdr *)(\ | 190 | #define IWL_RX_HDR(x) ((struct iwl3945_rx_frame_hdr *)(\ |
551 | x->u.rx_frame.stats.payload + \ | 191 | x->u.rx_frame.stats.payload + \ |
552 | x->u.rx_frame.stats.phy_count)) | 192 | x->u.rx_frame.stats.phy_count)) |
@@ -564,40 +204,33 @@ struct iwl3945_driver_hw_info { | |||
564 | * | 204 | * |
565 | *****************************************************************************/ | 205 | *****************************************************************************/ |
566 | struct iwl3945_addsta_cmd; | 206 | struct iwl3945_addsta_cmd; |
567 | extern int iwl3945_send_add_station(struct iwl3945_priv *priv, | 207 | extern int iwl3945_send_add_station(struct iwl_priv *priv, |
568 | struct iwl3945_addsta_cmd *sta, u8 flags); | 208 | struct iwl3945_addsta_cmd *sta, u8 flags); |
569 | extern u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *bssid, | 209 | extern u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *bssid, |
570 | int is_ap, u8 flags); | 210 | int is_ap, u8 flags); |
571 | extern int iwl3945_power_init_handle(struct iwl3945_priv *priv); | 211 | extern int iwl3945_power_init_handle(struct iwl_priv *priv); |
572 | extern int iwl3945_eeprom_init(struct iwl3945_priv *priv); | 212 | extern int iwl3945_eeprom_init(struct iwl_priv *priv); |
573 | extern int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv); | ||
574 | extern void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, | ||
575 | struct iwl3945_rx_queue *rxq); | ||
576 | extern int iwl3945_calc_db_from_ratio(int sig_ratio); | 213 | extern int iwl3945_calc_db_from_ratio(int sig_ratio); |
577 | extern int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm); | 214 | extern int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm); |
578 | extern int iwl3945_tx_queue_init(struct iwl3945_priv *priv, | 215 | extern int iwl3945_tx_queue_init(struct iwl_priv *priv, |
579 | struct iwl3945_tx_queue *txq, int count, u32 id); | 216 | struct iwl_tx_queue *txq, int count, u32 id); |
580 | extern void iwl3945_rx_replenish(void *data); | 217 | extern void iwl3945_rx_replenish(void *data); |
581 | extern void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq); | 218 | extern void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq); |
582 | extern int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, | 219 | extern int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, |
583 | const void *data); | 220 | const void *data); |
584 | extern int __must_check iwl3945_send_cmd(struct iwl3945_priv *priv, | 221 | extern int __must_check iwl3945_send_cmd(struct iwl_priv *priv, |
585 | struct iwl3945_host_cmd *cmd); | 222 | struct iwl_host_cmd *cmd); |
586 | extern unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv, | 223 | extern unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv, |
587 | struct ieee80211_hdr *hdr,int left); | 224 | struct ieee80211_hdr *hdr,int left); |
588 | extern int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, | 225 | extern void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb, |
589 | struct iwl3945_rx_queue *q); | ||
590 | extern int iwl3945_send_statistics_request(struct iwl3945_priv *priv); | ||
591 | extern void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb, | ||
592 | u32 decrypt_res, | 226 | u32 decrypt_res, |
593 | struct ieee80211_rx_status *stats); | 227 | struct ieee80211_rx_status *stats); |
594 | extern const u8 iwl3945_broadcast_addr[ETH_ALEN]; | ||
595 | 228 | ||
596 | /* | 229 | /* |
597 | * Currently used by iwl-3945-rs... look at restructuring so that it doesn't | 230 | * Currently used by iwl-3945-rs... look at restructuring so that it doesn't |
598 | * call this... todo... fix that. | 231 | * call this... todo... fix that. |
599 | */ | 232 | */ |
600 | extern u8 iwl3945_sync_station(struct iwl3945_priv *priv, int sta_id, | 233 | extern u8 iwl3945_sync_station(struct iwl_priv *priv, int sta_id, |
601 | u16 tx_rate, u8 flags); | 234 | u16 tx_rate, u8 flags); |
602 | 235 | ||
603 | /****************************************************************************** | 236 | /****************************************************************************** |
@@ -616,36 +249,37 @@ extern u8 iwl3945_sync_station(struct iwl3945_priv *priv, int sta_id, | |||
616 | * iwl3945_mac_ <-- mac80211 callback | 249 | * iwl3945_mac_ <-- mac80211 callback |
617 | * | 250 | * |
618 | ****************************************************************************/ | 251 | ****************************************************************************/ |
619 | extern void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv); | 252 | extern void iwl3945_hw_rx_handler_setup(struct iwl_priv *priv); |
620 | extern void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv); | 253 | extern void iwl3945_hw_setup_deferred_work(struct iwl_priv *priv); |
621 | extern void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv); | 254 | extern void iwl3945_hw_cancel_deferred_work(struct iwl_priv *priv); |
622 | extern int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv); | 255 | extern int iwl3945_hw_rxq_stop(struct iwl_priv *priv); |
623 | extern int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv); | 256 | extern int iwl3945_hw_set_hw_params(struct iwl_priv *priv); |
624 | extern int iwl3945_hw_nic_init(struct iwl3945_priv *priv); | 257 | extern int iwl3945_hw_nic_init(struct iwl_priv *priv); |
625 | extern int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv); | 258 | extern int iwl3945_hw_nic_stop_master(struct iwl_priv *priv); |
626 | extern void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv); | 259 | extern void iwl3945_hw_txq_ctx_free(struct iwl_priv *priv); |
627 | extern void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv); | 260 | extern void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv); |
628 | extern int iwl3945_hw_nic_reset(struct iwl3945_priv *priv); | 261 | extern int iwl3945_hw_nic_reset(struct iwl_priv *priv); |
629 | extern int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *tfd, | 262 | extern int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, |
630 | dma_addr_t addr, u16 len); | 263 | struct iwl_tx_queue *txq, |
631 | extern int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq); | 264 | dma_addr_t addr, u16 len, |
632 | extern int iwl3945_hw_get_temperature(struct iwl3945_priv *priv); | 265 | u8 reset, u8 pad); |
633 | extern int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, | 266 | extern void iwl3945_hw_txq_free_tfd(struct iwl_priv *priv, |
634 | struct iwl3945_tx_queue *txq); | 267 | struct iwl_tx_queue *txq); |
635 | extern unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv, | 268 | extern int iwl3945_hw_get_temperature(struct iwl_priv *priv); |
269 | extern int iwl3945_hw_tx_queue_init(struct iwl_priv *priv, | ||
270 | struct iwl_tx_queue *txq); | ||
271 | extern unsigned int iwl3945_hw_get_beacon_cmd(struct iwl_priv *priv, | ||
636 | struct iwl3945_frame *frame, u8 rate); | 272 | struct iwl3945_frame *frame, u8 rate); |
637 | extern int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv); | 273 | void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv *priv, struct iwl_cmd *cmd, |
638 | extern void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv, | ||
639 | struct iwl3945_cmd *cmd, | ||
640 | struct ieee80211_tx_info *info, | 274 | struct ieee80211_tx_info *info, |
641 | struct ieee80211_hdr *hdr, | 275 | struct ieee80211_hdr *hdr, |
642 | int sta_id, int tx_id); | 276 | int sta_id, int tx_id); |
643 | extern int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv); | 277 | extern int iwl3945_hw_reg_send_txpower(struct iwl_priv *priv); |
644 | extern int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power); | 278 | extern int iwl3945_hw_reg_set_txpower(struct iwl_priv *priv, s8 power); |
645 | extern void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, | 279 | extern void iwl3945_hw_rx_statistics(struct iwl_priv *priv, |
646 | struct iwl3945_rx_mem_buffer *rxb); | 280 | struct iwl_rx_mem_buffer *rxb); |
647 | extern void iwl3945_disable_events(struct iwl3945_priv *priv); | 281 | extern void iwl3945_disable_events(struct iwl_priv *priv); |
648 | extern int iwl4965_get_temperature(const struct iwl3945_priv *priv); | 282 | extern int iwl4965_get_temperature(const struct iwl_priv *priv); |
649 | 283 | ||
650 | /** | 284 | /** |
651 | * iwl3945_hw_find_station - Find station id for a given BSSID | 285 | * iwl3945_hw_find_station - Find station id for a given BSSID |
@@ -655,302 +289,31 @@ extern int iwl4965_get_temperature(const struct iwl3945_priv *priv); | |||
655 | * not yet been merged into a single common layer for managing the | 289 | * not yet been merged into a single common layer for managing the |
656 | * station tables. | 290 | * station tables. |
657 | */ | 291 | */ |
658 | extern u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *bssid); | 292 | extern u8 iwl3945_hw_find_station(struct iwl_priv *priv, const u8 *bssid); |
659 | 293 | ||
660 | extern int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel); | 294 | extern int iwl3945_hw_channel_switch(struct iwl_priv *priv, u16 channel); |
661 | 295 | ||
662 | /* | 296 | /* |
663 | * Forward declare iwl-3945.c functions for iwl-base.c | 297 | * Forward declare iwl-3945.c functions for iwl-base.c |
664 | */ | 298 | */ |
665 | extern __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv); | 299 | extern __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv); |
666 | extern int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv); | 300 | extern int iwl3945_init_hw_rate_table(struct iwl_priv *priv); |
667 | extern void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv); | 301 | extern void iwl3945_reg_txpower_periodic(struct iwl_priv *priv); |
668 | extern int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv); | 302 | extern int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv); |
669 | extern u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, | 303 | extern u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, |
670 | u16 tx_rate, u8 flags); | 304 | u16 tx_rate, u8 flags); |
671 | 305 | ||
672 | 306 | static inline int iwl3945_is_associated(struct iwl_priv *priv) | |
673 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT | ||
674 | |||
675 | enum { | ||
676 | MEASUREMENT_READY = (1 << 0), | ||
677 | MEASUREMENT_ACTIVE = (1 << 1), | ||
678 | }; | ||
679 | |||
680 | #endif | ||
681 | |||
682 | #ifdef CONFIG_IWL3945_RFKILL | ||
683 | struct iwl3945_priv; | ||
684 | |||
685 | void iwl3945_rfkill_set_hw_state(struct iwl3945_priv *priv); | ||
686 | void iwl3945_rfkill_unregister(struct iwl3945_priv *priv); | ||
687 | int iwl3945_rfkill_init(struct iwl3945_priv *priv); | ||
688 | #else | ||
689 | static inline void iwl3945_rfkill_set_hw_state(struct iwl3945_priv *priv) {} | ||
690 | static inline void iwl3945_rfkill_unregister(struct iwl3945_priv *priv) {} | ||
691 | static inline int iwl3945_rfkill_init(struct iwl3945_priv *priv) { return 0; } | ||
692 | #endif | ||
693 | |||
694 | #define IWL_MAX_NUM_QUEUES IWL39_MAX_NUM_QUEUES | ||
695 | |||
696 | struct iwl3945_priv { | ||
697 | |||
698 | /* ieee device used by generic ieee processing code */ | ||
699 | struct ieee80211_hw *hw; | ||
700 | struct ieee80211_channel *ieee_channels; | ||
701 | struct ieee80211_rate *ieee_rates; | ||
702 | struct iwl_3945_cfg *cfg; /* device configuration */ | ||
703 | |||
704 | /* temporary frame storage list */ | ||
705 | struct list_head free_frames; | ||
706 | int frames_count; | ||
707 | |||
708 | enum ieee80211_band band; | ||
709 | int alloc_rxb_skb; | ||
710 | |||
711 | void (*rx_handlers[REPLY_MAX])(struct iwl3945_priv *priv, | ||
712 | struct iwl3945_rx_mem_buffer *rxb); | ||
713 | |||
714 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; | ||
715 | |||
716 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT | ||
717 | /* spectrum measurement report caching */ | ||
718 | struct iwl3945_spectrum_notification measure_report; | ||
719 | u8 measurement_status; | ||
720 | #endif | ||
721 | /* ucode beacon time */ | ||
722 | u32 ucode_beacon_time; | ||
723 | |||
724 | /* we allocate array of iwl3945_channel_info for NIC's valid channels. | ||
725 | * Access via channel # using indirect index array */ | ||
726 | struct iwl3945_channel_info *channel_info; /* channel info array */ | ||
727 | u8 channel_count; /* # of channels */ | ||
728 | |||
729 | /* each calibration channel group in the EEPROM has a derived | ||
730 | * clip setting for each rate. */ | ||
731 | const struct iwl3945_clip_group clip_groups[5]; | ||
732 | |||
733 | /* thermal calibration */ | ||
734 | s32 temperature; /* degrees Kelvin */ | ||
735 | s32 last_temperature; | ||
736 | |||
737 | /* Scan related variables */ | ||
738 | unsigned long last_scan_jiffies; | ||
739 | unsigned long next_scan_jiffies; | ||
740 | unsigned long scan_start; | ||
741 | unsigned long scan_pass_start; | ||
742 | unsigned long scan_start_tsf; | ||
743 | int scan_bands; | ||
744 | int one_direct_scan; | ||
745 | u8 direct_ssid_len; | ||
746 | u8 direct_ssid[IW_ESSID_MAX_SIZE]; | ||
747 | struct iwl3945_scan_cmd *scan; | ||
748 | |||
749 | /* spinlock */ | ||
750 | spinlock_t lock; /* protect general shared data */ | ||
751 | spinlock_t hcmd_lock; /* protect hcmd */ | ||
752 | struct mutex mutex; | ||
753 | |||
754 | /* basic pci-network driver stuff */ | ||
755 | struct pci_dev *pci_dev; | ||
756 | |||
757 | /* pci hardware address support */ | ||
758 | void __iomem *hw_base; | ||
759 | |||
760 | /* uCode images, save to reload in case of failure */ | ||
761 | u32 ucode_ver; /* ucode version, copy of | ||
762 | iwl3945_ucode.ver */ | ||
763 | struct fw_desc ucode_code; /* runtime inst */ | ||
764 | struct fw_desc ucode_data; /* runtime data original */ | ||
765 | struct fw_desc ucode_data_backup; /* runtime data save/restore */ | ||
766 | struct fw_desc ucode_init; /* initialization inst */ | ||
767 | struct fw_desc ucode_init_data; /* initialization data */ | ||
768 | struct fw_desc ucode_boot; /* bootstrap inst */ | ||
769 | |||
770 | |||
771 | struct iwl3945_rxon_time_cmd rxon_timing; | ||
772 | |||
773 | /* We declare this const so it can only be | ||
774 | * changed via explicit cast within the | ||
775 | * routines that actually update the physical | ||
776 | * hardware */ | ||
777 | const struct iwl3945_rxon_cmd active_rxon; | ||
778 | struct iwl3945_rxon_cmd staging_rxon; | ||
779 | |||
780 | int error_recovering; | ||
781 | struct iwl3945_rxon_cmd recovery_rxon; | ||
782 | |||
783 | /* 1st responses from initialize and runtime uCode images. | ||
784 | * 4965's initialize alive response contains some calibration data. */ | ||
785 | struct iwl3945_init_alive_resp card_alive_init; | ||
786 | struct iwl3945_alive_resp card_alive; | ||
787 | |||
788 | #ifdef CONFIG_IWL3945_RFKILL | ||
789 | struct rfkill *rfkill; | ||
790 | #endif | ||
791 | |||
792 | #ifdef CONFIG_IWL3945_LEDS | ||
793 | struct iwl3945_led led[IWL_LED_TRG_MAX]; | ||
794 | unsigned long last_blink_time; | ||
795 | u8 last_blink_rate; | ||
796 | u8 allow_blinking; | ||
797 | unsigned int rxtxpackets; | ||
798 | u64 led_tpt; | ||
799 | #endif | ||
800 | |||
801 | |||
802 | u16 active_rate; | ||
803 | u16 active_rate_basic; | ||
804 | |||
805 | u32 sta_supp_rates; | ||
806 | |||
807 | u8 call_post_assoc_from_beacon; | ||
808 | /* Rate scaling data */ | ||
809 | s8 data_retry_limit; | ||
810 | u8 retry_rate; | ||
811 | |||
812 | wait_queue_head_t wait_command_queue; | ||
813 | |||
814 | int activity_timer_active; | ||
815 | |||
816 | /* Rx and Tx DMA processing queues */ | ||
817 | struct iwl3945_rx_queue rxq; | ||
818 | struct iwl3945_tx_queue txq[IWL_MAX_NUM_QUEUES]; | ||
819 | |||
820 | unsigned long status; | ||
821 | |||
822 | int last_rx_rssi; /* From Rx packet statisitics */ | ||
823 | int last_rx_noise; /* From beacon statistics */ | ||
824 | |||
825 | struct iwl3945_power_mgr power_data; | ||
826 | |||
827 | struct iwl3945_notif_statistics statistics; | ||
828 | unsigned long last_statistics_time; | ||
829 | |||
830 | /* context information */ | ||
831 | u16 rates_mask; | ||
832 | |||
833 | u32 power_mode; | ||
834 | u32 antenna; | ||
835 | u8 bssid[ETH_ALEN]; | ||
836 | u16 rts_threshold; | ||
837 | u8 mac_addr[ETH_ALEN]; | ||
838 | |||
839 | /*station table variables */ | ||
840 | spinlock_t sta_lock; | ||
841 | int num_stations; | ||
842 | struct iwl3945_station_entry stations[IWL_STATION_COUNT]; | ||
843 | |||
844 | /* Indication if ieee80211_ops->open has been called */ | ||
845 | u8 is_open; | ||
846 | |||
847 | u8 mac80211_registered; | ||
848 | |||
849 | /* Rx'd packet timing information */ | ||
850 | u32 last_beacon_time; | ||
851 | u64 last_tsf; | ||
852 | |||
853 | /* eeprom */ | ||
854 | struct iwl3945_eeprom eeprom; | ||
855 | |||
856 | enum nl80211_iftype iw_mode; | ||
857 | |||
858 | struct sk_buff *ibss_beacon; | ||
859 | |||
860 | /* Last Rx'd beacon timestamp */ | ||
861 | u32 timestamp0; | ||
862 | u32 timestamp1; | ||
863 | u16 beacon_int; | ||
864 | struct iwl3945_driver_hw_info hw_setting; | ||
865 | struct ieee80211_vif *vif; | ||
866 | |||
867 | /* Current association information needed to configure the | ||
868 | * hardware */ | ||
869 | u16 assoc_id; | ||
870 | u16 assoc_capability; | ||
871 | u8 ps_mode; | ||
872 | |||
873 | struct iwl3945_qos_info qos_data; | ||
874 | |||
875 | struct workqueue_struct *workqueue; | ||
876 | |||
877 | struct work_struct up; | ||
878 | struct work_struct restart; | ||
879 | struct work_struct calibrated_work; | ||
880 | struct work_struct scan_completed; | ||
881 | struct work_struct rx_replenish; | ||
882 | struct work_struct rf_kill; | ||
883 | struct work_struct abort_scan; | ||
884 | struct work_struct update_link_led; | ||
885 | struct work_struct auth_work; | ||
886 | struct work_struct report_work; | ||
887 | struct work_struct request_scan; | ||
888 | struct work_struct beacon_update; | ||
889 | |||
890 | struct tasklet_struct irq_tasklet; | ||
891 | |||
892 | struct delayed_work init_alive_start; | ||
893 | struct delayed_work alive_start; | ||
894 | struct delayed_work activity_timer; | ||
895 | struct delayed_work thermal_periodic; | ||
896 | struct delayed_work gather_stats; | ||
897 | struct delayed_work scan_check; | ||
898 | |||
899 | #define IWL_DEFAULT_TX_POWER 0x0F | ||
900 | s8 user_txpower_limit; | ||
901 | s8 max_channel_txpower_limit; | ||
902 | |||
903 | |||
904 | #ifdef CONFIG_IWL3945_DEBUG | ||
905 | /* debugging info */ | ||
906 | u32 framecnt_to_us; | ||
907 | atomic_t restrict_refcnt; | ||
908 | #endif | ||
909 | }; /*iwl3945_priv */ | ||
910 | |||
911 | static inline int iwl3945_is_associated(struct iwl3945_priv *priv) | ||
912 | { | ||
913 | return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; | ||
914 | } | ||
915 | |||
916 | static inline int is_channel_valid(const struct iwl3945_channel_info *ch_info) | ||
917 | { | ||
918 | if (ch_info == NULL) | ||
919 | return 0; | ||
920 | return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; | ||
921 | } | ||
922 | |||
923 | static inline int is_channel_radar(const struct iwl3945_channel_info *ch_info) | ||
924 | { | ||
925 | return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; | ||
926 | } | ||
927 | |||
928 | static inline u8 is_channel_a_band(const struct iwl3945_channel_info *ch_info) | ||
929 | { | ||
930 | return ch_info->band == IEEE80211_BAND_5GHZ; | ||
931 | } | ||
932 | |||
933 | static inline u8 is_channel_bg_band(const struct iwl3945_channel_info *ch_info) | ||
934 | { | ||
935 | return ch_info->band == IEEE80211_BAND_2GHZ; | ||
936 | } | ||
937 | |||
938 | static inline int is_channel_passive(const struct iwl3945_channel_info *ch) | ||
939 | { | ||
940 | return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0; | ||
941 | } | ||
942 | |||
943 | static inline int is_channel_ibss(const struct iwl3945_channel_info *ch) | ||
944 | { | 307 | { |
945 | return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0; | 308 | return (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; |
946 | } | 309 | } |
947 | 310 | ||
948 | extern const struct iwl3945_channel_info *iwl3945_get_channel_info( | 311 | extern const struct iwl_channel_info *iwl3945_get_channel_info( |
949 | const struct iwl3945_priv *priv, enum ieee80211_band band, u16 channel); | 312 | const struct iwl_priv *priv, enum ieee80211_band band, u16 channel); |
950 | 313 | ||
951 | extern int iwl3945_rs_next_rate(struct iwl3945_priv *priv, int rate); | 314 | extern int iwl3945_rs_next_rate(struct iwl_priv *priv, int rate); |
952 | 315 | ||
953 | /* Requires full declaration of iwl3945_priv before including */ | 316 | /* Requires full declaration of iwl_priv before including */ |
954 | #include "iwl-3945-io.h" | 317 | #include "iwl-io.h" |
955 | 318 | ||
956 | #endif | 319 | #endif |
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965-hw.h b/drivers/net/wireless/iwlwifi/iwl-4965-hw.h index 6649f7b55650..af4c1bb0de14 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965-hw.h +++ b/drivers/net/wireless/iwlwifi/iwl-4965-hw.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -89,7 +89,7 @@ | |||
89 | #define LONG_SLOT_TIME 20 | 89 | #define LONG_SLOT_TIME 20 |
90 | 90 | ||
91 | /* RSSI to dBm */ | 91 | /* RSSI to dBm */ |
92 | #define IWL_RSSI_OFFSET 44 | 92 | #define IWL49_RSSI_OFFSET 44 |
93 | 93 | ||
94 | 94 | ||
95 | 95 | ||
@@ -110,43 +110,29 @@ | |||
110 | 110 | ||
111 | #define IWL_DEFAULT_TX_RETRY 15 | 111 | #define IWL_DEFAULT_TX_RETRY 15 |
112 | 112 | ||
113 | #define RX_QUEUE_SIZE 256 | ||
114 | #define RX_QUEUE_MASK 255 | ||
115 | #define RX_QUEUE_SIZE_LOG 8 | ||
116 | |||
117 | #define TFD_TX_CMD_SLOTS 256 | ||
118 | #define TFD_CMD_SLOTS 32 | ||
119 | |||
120 | /* | ||
121 | * RX related structures and functions | ||
122 | */ | ||
123 | #define RX_FREE_BUFFERS 64 | ||
124 | #define RX_LOW_WATERMARK 8 | ||
125 | |||
126 | /* Size of one Rx buffer in host DRAM */ | ||
127 | #define IWL_RX_BUF_SIZE_4K (4 * 1024) | ||
128 | #define IWL_RX_BUF_SIZE_8K (8 * 1024) | ||
129 | 113 | ||
130 | /* Sizes and addresses for instruction and data memory (SRAM) in | 114 | /* Sizes and addresses for instruction and data memory (SRAM) in |
131 | * 4965's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */ | 115 | * 4965's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */ |
132 | #define RTC_INST_LOWER_BOUND (0x000000) | 116 | #define IWL49_RTC_INST_LOWER_BOUND (0x000000) |
133 | #define IWL49_RTC_INST_UPPER_BOUND (0x018000) | 117 | #define IWL49_RTC_INST_UPPER_BOUND (0x018000) |
134 | 118 | ||
135 | #define RTC_DATA_LOWER_BOUND (0x800000) | 119 | #define IWL49_RTC_DATA_LOWER_BOUND (0x800000) |
136 | #define IWL49_RTC_DATA_UPPER_BOUND (0x80A000) | 120 | #define IWL49_RTC_DATA_UPPER_BOUND (0x80A000) |
137 | 121 | ||
138 | #define IWL49_RTC_INST_SIZE (IWL49_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND) | 122 | #define IWL49_RTC_INST_SIZE (IWL49_RTC_INST_UPPER_BOUND - \ |
139 | #define IWL49_RTC_DATA_SIZE (IWL49_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND) | 123 | IWL49_RTC_INST_LOWER_BOUND) |
124 | #define IWL49_RTC_DATA_SIZE (IWL49_RTC_DATA_UPPER_BOUND - \ | ||
125 | IWL49_RTC_DATA_LOWER_BOUND) | ||
140 | 126 | ||
141 | #define IWL_MAX_INST_SIZE IWL49_RTC_INST_SIZE | 127 | #define IWL49_MAX_INST_SIZE IWL49_RTC_INST_SIZE |
142 | #define IWL_MAX_DATA_SIZE IWL49_RTC_DATA_SIZE | 128 | #define IWL49_MAX_DATA_SIZE IWL49_RTC_DATA_SIZE |
143 | 129 | ||
144 | /* Size of uCode instruction memory in bootstrap state machine */ | 130 | /* Size of uCode instruction memory in bootstrap state machine */ |
145 | #define IWL_MAX_BSM_SIZE BSM_SRAM_SIZE | 131 | #define IWL49_MAX_BSM_SIZE BSM_SRAM_SIZE |
146 | 132 | ||
147 | static inline int iwl4965_hw_valid_rtc_data_addr(u32 addr) | 133 | static inline int iwl4965_hw_valid_rtc_data_addr(u32 addr) |
148 | { | 134 | { |
149 | return (addr >= RTC_DATA_LOWER_BOUND) && | 135 | return (addr >= IWL49_RTC_DATA_LOWER_BOUND) && |
150 | (addr < IWL49_RTC_DATA_UPPER_BOUND); | 136 | (addr < IWL49_RTC_DATA_UPPER_BOUND); |
151 | } | 137 | } |
152 | 138 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c index 5a72bc0377de..d7d956db19d1 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965.c +++ b/drivers/net/wireless/iwlwifi/iwl-4965.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -85,7 +85,7 @@ static int iwl4965_verify_bsm(struct iwl_priv *priv) | |||
85 | reg += sizeof(u32), image++) { | 85 | reg += sizeof(u32), image++) { |
86 | val = iwl_read_prph(priv, reg); | 86 | val = iwl_read_prph(priv, reg); |
87 | if (val != le32_to_cpu(*image)) { | 87 | if (val != le32_to_cpu(*image)) { |
88 | IWL_ERROR("BSM uCode verification failed at " | 88 | IWL_ERR(priv, "BSM uCode verification failed at " |
89 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", | 89 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", |
90 | BSM_SRAM_LOWER_BOUND, | 90 | BSM_SRAM_LOWER_BOUND, |
91 | reg - BSM_SRAM_LOWER_BOUND, len, | 91 | reg - BSM_SRAM_LOWER_BOUND, len, |
@@ -149,7 +149,7 @@ static int iwl4965_load_bsm(struct iwl_priv *priv) | |||
149 | priv->ucode_type = UCODE_RT; | 149 | priv->ucode_type = UCODE_RT; |
150 | 150 | ||
151 | /* make sure bootstrap program is no larger than BSM's SRAM size */ | 151 | /* make sure bootstrap program is no larger than BSM's SRAM size */ |
152 | if (len > IWL_MAX_BSM_SIZE) | 152 | if (len > IWL49_MAX_BSM_SIZE) |
153 | return -EINVAL; | 153 | return -EINVAL; |
154 | 154 | ||
155 | /* Tell bootstrap uCode where to find the "Initialize" uCode | 155 | /* Tell bootstrap uCode where to find the "Initialize" uCode |
@@ -186,7 +186,7 @@ static int iwl4965_load_bsm(struct iwl_priv *priv) | |||
186 | 186 | ||
187 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ | 187 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ |
188 | iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); | 188 | iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); |
189 | iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND); | 189 | iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND); |
190 | iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); | 190 | iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); |
191 | 191 | ||
192 | /* Load bootstrap code into instruction SRAM now, | 192 | /* Load bootstrap code into instruction SRAM now, |
@@ -203,7 +203,7 @@ static int iwl4965_load_bsm(struct iwl_priv *priv) | |||
203 | if (i < 100) | 203 | if (i < 100) |
204 | IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i); | 204 | IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i); |
205 | else { | 205 | else { |
206 | IWL_ERROR("BSM write did not complete!\n"); | 206 | IWL_ERR(priv, "BSM write did not complete!\n"); |
207 | return -EIO; | 207 | return -EIO; |
208 | } | 208 | } |
209 | 209 | ||
@@ -523,7 +523,8 @@ static void iwl4965_chain_noise_reset(struct iwl_priv *priv) | |||
523 | cmd.diff_gain_c = 0; | 523 | cmd.diff_gain_c = 0; |
524 | if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, | 524 | if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, |
525 | sizeof(cmd), &cmd)) | 525 | sizeof(cmd), &cmd)) |
526 | IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n"); | 526 | IWL_ERR(priv, |
527 | "Could not send REPLY_PHY_CALIBRATION_CMD\n"); | ||
527 | data->state = IWL_CHAIN_NOISE_ACCUMULATE; | 528 | data->state = IWL_CHAIN_NOISE_ACCUMULATE; |
528 | IWL_DEBUG_CALIB("Run chain_noise_calibrate\n"); | 529 | IWL_DEBUG_CALIB("Run chain_noise_calibrate\n"); |
529 | } | 530 | } |
@@ -804,8 +805,9 @@ static int iwl4965_hw_set_hw_params(struct iwl_priv *priv) | |||
804 | 805 | ||
805 | if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) || | 806 | if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) || |
806 | (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) { | 807 | (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) { |
807 | IWL_ERROR("invalid queues_num, should be between %d and %d\n", | 808 | IWL_ERR(priv, |
808 | IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES); | 809 | "invalid queues_num, should be between %d and %d\n", |
810 | IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES); | ||
809 | return -EINVAL; | 811 | return -EINVAL; |
810 | } | 812 | } |
811 | 813 | ||
@@ -813,6 +815,7 @@ static int iwl4965_hw_set_hw_params(struct iwl_priv *priv) | |||
813 | priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM; | 815 | priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM; |
814 | priv->hw_params.scd_bc_tbls_size = | 816 | priv->hw_params.scd_bc_tbls_size = |
815 | IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl); | 817 | IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl); |
818 | priv->hw_params.tfd_size = sizeof(struct iwl_tfd); | ||
816 | priv->hw_params.max_stations = IWL4965_STATION_COUNT; | 819 | priv->hw_params.max_stations = IWL4965_STATION_COUNT; |
817 | priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID; | 820 | priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID; |
818 | priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE; | 821 | priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE; |
@@ -820,6 +823,8 @@ static int iwl4965_hw_set_hw_params(struct iwl_priv *priv) | |||
820 | priv->hw_params.max_bsm_size = BSM_SRAM_SIZE; | 823 | priv->hw_params.max_bsm_size = BSM_SRAM_SIZE; |
821 | priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ); | 824 | priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ); |
822 | 825 | ||
826 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; | ||
827 | |||
823 | priv->hw_params.tx_chains_num = 2; | 828 | priv->hw_params.tx_chains_num = 2; |
824 | priv->hw_params.rx_chains_num = 2; | 829 | priv->hw_params.rx_chains_num = 2; |
825 | priv->hw_params.valid_tx_ant = ANT_A | ANT_B; | 830 | priv->hw_params.valid_tx_ant = ANT_A | ANT_B; |
@@ -902,7 +907,6 @@ static s32 iwl4965_get_tx_atten_grp(u16 channel) | |||
902 | channel <= CALIB_IWL_TX_ATTEN_GR4_LCH) | 907 | channel <= CALIB_IWL_TX_ATTEN_GR4_LCH) |
903 | return CALIB_CH_GROUP_4; | 908 | return CALIB_CH_GROUP_4; |
904 | 909 | ||
905 | IWL_ERROR("Can't find txatten group for channel %d.\n", channel); | ||
906 | return -1; | 910 | return -1; |
907 | } | 911 | } |
908 | 912 | ||
@@ -956,7 +960,7 @@ static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel, | |||
956 | 960 | ||
957 | s = iwl4965_get_sub_band(priv, channel); | 961 | s = iwl4965_get_sub_band(priv, channel); |
958 | if (s >= EEPROM_TX_POWER_BANDS) { | 962 | if (s >= EEPROM_TX_POWER_BANDS) { |
959 | IWL_ERROR("Tx Power can not find channel %d\n", channel); | 963 | IWL_ERR(priv, "Tx Power can not find channel %d\n", channel); |
960 | return -1; | 964 | return -1; |
961 | } | 965 | } |
962 | 966 | ||
@@ -1303,7 +1307,7 @@ static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel, | |||
1303 | s32 factory_actual_pwr[2]; | 1307 | s32 factory_actual_pwr[2]; |
1304 | s32 power_index; | 1308 | s32 power_index; |
1305 | 1309 | ||
1306 | /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units | 1310 | /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units |
1307 | * are used for indexing into txpower table) */ | 1311 | * are used for indexing into txpower table) */ |
1308 | user_target_power = 2 * priv->tx_power_user_lmt; | 1312 | user_target_power = 2 * priv->tx_power_user_lmt; |
1309 | 1313 | ||
@@ -1319,8 +1323,11 @@ static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel, | |||
1319 | /* get txatten group, used to select 1) thermal txpower adjustment | 1323 | /* get txatten group, used to select 1) thermal txpower adjustment |
1320 | * and 2) mimo txpower balance between Tx chains. */ | 1324 | * and 2) mimo txpower balance between Tx chains. */ |
1321 | txatten_grp = iwl4965_get_tx_atten_grp(channel); | 1325 | txatten_grp = iwl4965_get_tx_atten_grp(channel); |
1322 | if (txatten_grp < 0) | 1326 | if (txatten_grp < 0) { |
1327 | IWL_ERR(priv, "Can't find txatten group for channel %d.\n", | ||
1328 | channel); | ||
1323 | return -EINVAL; | 1329 | return -EINVAL; |
1330 | } | ||
1324 | 1331 | ||
1325 | IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n", | 1332 | IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n", |
1326 | channel, txatten_grp); | 1333 | channel, txatten_grp); |
@@ -1483,12 +1490,12 @@ static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel, | |||
1483 | 1490 | ||
1484 | /* stay within the table! */ | 1491 | /* stay within the table! */ |
1485 | if (power_index > 107) { | 1492 | if (power_index > 107) { |
1486 | IWL_WARNING("txpower index %d > 107\n", | 1493 | IWL_WARN(priv, "txpower index %d > 107\n", |
1487 | power_index); | 1494 | power_index); |
1488 | power_index = 107; | 1495 | power_index = 107; |
1489 | } | 1496 | } |
1490 | if (power_index < 0) { | 1497 | if (power_index < 0) { |
1491 | IWL_WARNING("txpower index %d < 0\n", | 1498 | IWL_WARN(priv, "txpower index %d < 0\n", |
1492 | power_index); | 1499 | power_index); |
1493 | power_index = 0; | 1500 | power_index = 0; |
1494 | } | 1501 | } |
@@ -1531,7 +1538,7 @@ static int iwl4965_send_tx_power(struct iwl_priv *priv) | |||
1531 | /* If this gets hit a lot, switch it to a BUG() and catch | 1538 | /* If this gets hit a lot, switch it to a BUG() and catch |
1532 | * the stack trace to find out who is calling this during | 1539 | * the stack trace to find out who is calling this during |
1533 | * a scan. */ | 1540 | * a scan. */ |
1534 | IWL_WARNING("TX Power requested while scanning!\n"); | 1541 | IWL_WARN(priv, "TX Power requested while scanning!\n"); |
1535 | return -EAGAIN; | 1542 | return -EAGAIN; |
1536 | } | 1543 | } |
1537 | 1544 | ||
@@ -1725,7 +1732,7 @@ static int iwl4965_hw_get_temperature(const struct iwl_priv *priv) | |||
1725 | IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt); | 1732 | IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt); |
1726 | 1733 | ||
1727 | if (R3 == R1) { | 1734 | if (R3 == R1) { |
1728 | IWL_ERROR("Calibration conflict R1 == R3\n"); | 1735 | IWL_ERR(priv, "Calibration conflict R1 == R3\n"); |
1729 | return -1; | 1736 | return -1; |
1730 | } | 1737 | } |
1731 | 1738 | ||
@@ -1837,7 +1844,8 @@ static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, | |||
1837 | 1844 | ||
1838 | if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || | 1845 | if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || |
1839 | (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) { | 1846 | (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) { |
1840 | IWL_WARNING("queue number out of range: %d, must be %d to %d\n", | 1847 | IWL_WARN(priv, |
1848 | "queue number out of range: %d, must be %d to %d\n", | ||
1841 | txq_id, IWL49_FIRST_AMPDU_QUEUE, | 1849 | txq_id, IWL49_FIRST_AMPDU_QUEUE, |
1842 | IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1); | 1850 | IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1); |
1843 | return -EINVAL; | 1851 | return -EINVAL; |
@@ -1908,7 +1916,8 @@ static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id, | |||
1908 | 1916 | ||
1909 | if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || | 1917 | if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || |
1910 | (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) { | 1918 | (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) { |
1911 | IWL_WARNING("queue number out of range: %d, must be %d to %d\n", | 1919 | IWL_WARN(priv, |
1920 | "queue number out of range: %d, must be %d to %d\n", | ||
1912 | txq_id, IWL49_FIRST_AMPDU_QUEUE, | 1921 | txq_id, IWL49_FIRST_AMPDU_QUEUE, |
1913 | IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1); | 1922 | IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1); |
1914 | return -EINVAL; | 1923 | return -EINVAL; |
@@ -2067,10 +2076,10 @@ static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv, | |||
2067 | 2076 | ||
2068 | sc = le16_to_cpu(hdr->seq_ctrl); | 2077 | sc = le16_to_cpu(hdr->seq_ctrl); |
2069 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { | 2078 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { |
2070 | IWL_ERROR("BUG_ON idx doesn't match seq control" | 2079 | IWL_ERR(priv, |
2071 | " idx=%d, seq_idx=%d, seq=%d\n", | 2080 | "BUG_ON idx doesn't match seq control" |
2072 | idx, SEQ_TO_SN(sc), | 2081 | " idx=%d, seq_idx=%d, seq=%d\n", |
2073 | hdr->seq_ctrl); | 2082 | idx, SEQ_TO_SN(sc), hdr->seq_ctrl); |
2074 | return -1; | 2083 | return -1; |
2075 | } | 2084 | } |
2076 | 2085 | ||
@@ -2129,7 +2138,7 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2129 | u8 *qc = NULL; | 2138 | u8 *qc = NULL; |
2130 | 2139 | ||
2131 | if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) { | 2140 | if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) { |
2132 | IWL_ERROR("Read index for DMA queue txq_id (%d) index %d " | 2141 | IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d " |
2133 | "is out of range [0-%d] %d %d\n", txq_id, | 2142 | "is out of range [0-%d] %d %d\n", txq_id, |
2134 | index, txq->q.n_bd, txq->q.write_ptr, | 2143 | index, txq->q.n_bd, txq->q.write_ptr, |
2135 | txq->q.read_ptr); | 2144 | txq->q.read_ptr); |
@@ -2147,7 +2156,7 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2147 | 2156 | ||
2148 | sta_id = iwl_get_ra_sta_id(priv, hdr); | 2157 | sta_id = iwl_get_ra_sta_id(priv, hdr); |
2149 | if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) { | 2158 | if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) { |
2150 | IWL_ERROR("Station not known\n"); | 2159 | IWL_ERR(priv, "Station not known\n"); |
2151 | return; | 2160 | return; |
2152 | } | 2161 | } |
2153 | 2162 | ||
@@ -2210,7 +2219,7 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2210 | iwl_txq_check_empty(priv, sta_id, tid, txq_id); | 2219 | iwl_txq_check_empty(priv, sta_id, tid, txq_id); |
2211 | 2220 | ||
2212 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) | 2221 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) |
2213 | IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n"); | 2222 | IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n"); |
2214 | } | 2223 | } |
2215 | 2224 | ||
2216 | static int iwl4965_calc_rssi(struct iwl_priv *priv, | 2225 | static int iwl4965_calc_rssi(struct iwl_priv *priv, |
@@ -2244,7 +2253,7 @@ static int iwl4965_calc_rssi(struct iwl_priv *priv, | |||
2244 | 2253 | ||
2245 | /* dBm = max_rssi dB - agc dB - constant. | 2254 | /* dBm = max_rssi dB - agc dB - constant. |
2246 | * Higher AGC (higher radio gain) means lower signal. */ | 2255 | * Higher AGC (higher radio gain) means lower signal. */ |
2247 | return max_rssi - agc - IWL_RSSI_OFFSET; | 2256 | return max_rssi - agc - IWL49_RSSI_OFFSET; |
2248 | } | 2257 | } |
2249 | 2258 | ||
2250 | 2259 | ||
@@ -2287,6 +2296,9 @@ static struct iwl_lib_ops iwl4965_lib = { | |||
2287 | .txq_set_sched = iwl4965_txq_set_sched, | 2296 | .txq_set_sched = iwl4965_txq_set_sched, |
2288 | .txq_agg_enable = iwl4965_txq_agg_enable, | 2297 | .txq_agg_enable = iwl4965_txq_agg_enable, |
2289 | .txq_agg_disable = iwl4965_txq_agg_disable, | 2298 | .txq_agg_disable = iwl4965_txq_agg_disable, |
2299 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, | ||
2300 | .txq_free_tfd = iwl_hw_txq_free_tfd, | ||
2301 | .txq_init = iwl_hw_tx_queue_init, | ||
2290 | .rx_handler_setup = iwl4965_rx_handler_setup, | 2302 | .rx_handler_setup = iwl4965_rx_handler_setup, |
2291 | .setup_deferred_work = iwl4965_setup_deferred_work, | 2303 | .setup_deferred_work = iwl4965_setup_deferred_work, |
2292 | .cancel_deferred_work = iwl4965_cancel_deferred_work, | 2304 | .cancel_deferred_work = iwl4965_cancel_deferred_work, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h index 82c3859ce0f8..15cac70e36e2 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h +++ b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2007 - 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -68,10 +68,16 @@ | |||
68 | #ifndef __iwl_5000_hw_h__ | 68 | #ifndef __iwl_5000_hw_h__ |
69 | #define __iwl_5000_hw_h__ | 69 | #define __iwl_5000_hw_h__ |
70 | 70 | ||
71 | #define IWL50_RTC_INST_LOWER_BOUND (0x000000) | ||
71 | #define IWL50_RTC_INST_UPPER_BOUND (0x020000) | 72 | #define IWL50_RTC_INST_UPPER_BOUND (0x020000) |
73 | |||
74 | #define IWL50_RTC_DATA_LOWER_BOUND (0x800000) | ||
72 | #define IWL50_RTC_DATA_UPPER_BOUND (0x80C000) | 75 | #define IWL50_RTC_DATA_UPPER_BOUND (0x80C000) |
73 | #define IWL50_RTC_INST_SIZE (IWL50_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND) | 76 | |
74 | #define IWL50_RTC_DATA_SIZE (IWL50_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND) | 77 | #define IWL50_RTC_INST_SIZE (IWL50_RTC_INST_UPPER_BOUND - \ |
78 | IWL50_RTC_INST_LOWER_BOUND) | ||
79 | #define IWL50_RTC_DATA_SIZE (IWL50_RTC_DATA_UPPER_BOUND - \ | ||
80 | IWL50_RTC_DATA_LOWER_BOUND) | ||
75 | 81 | ||
76 | /* EEPROM */ | 82 | /* EEPROM */ |
77 | #define IWL_5000_EEPROM_IMG_SIZE 2048 | 83 | #define IWL_5000_EEPROM_IMG_SIZE 2048 |
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c index 66d053d28a74..89d92a8ca157 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000.c +++ b/drivers/net/wireless/iwlwifi/iwl-5000.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2007-2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -289,7 +289,7 @@ static u32 eeprom_indirect_address(const struct iwl_priv *priv, u32 address) | |||
289 | offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_OTHERS); | 289 | offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_OTHERS); |
290 | break; | 290 | break; |
291 | default: | 291 | default: |
292 | IWL_ERROR("illegal indirect type: 0x%X\n", | 292 | IWL_ERR(priv, "illegal indirect type: 0x%X\n", |
293 | address & INDIRECT_TYPE_MSK); | 293 | address & INDIRECT_TYPE_MSK); |
294 | break; | 294 | break; |
295 | } | 295 | } |
@@ -384,7 +384,8 @@ static void iwl5000_chain_noise_reset(struct iwl_priv *priv) | |||
384 | ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, | 384 | ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, |
385 | sizeof(cmd), &cmd); | 385 | sizeof(cmd), &cmd); |
386 | if (ret) | 386 | if (ret) |
387 | IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n"); | 387 | IWL_ERR(priv, |
388 | "Could not send REPLY_PHY_CALIBRATION_CMD\n"); | ||
388 | data->state = IWL_CHAIN_NOISE_ACCUMULATE; | 389 | data->state = IWL_CHAIN_NOISE_ACCUMULATE; |
389 | IWL_DEBUG_CALIB("Run chain_noise_calibrate\n"); | 390 | IWL_DEBUG_CALIB("Run chain_noise_calibrate\n"); |
390 | } | 391 | } |
@@ -507,7 +508,7 @@ static void iwl5000_rx_calib_result(struct iwl_priv *priv, | |||
507 | index = IWL_CALIB_BASE_BAND; | 508 | index = IWL_CALIB_BASE_BAND; |
508 | break; | 509 | break; |
509 | default: | 510 | default: |
510 | IWL_ERROR("Unknown calibration notification %d\n", | 511 | IWL_ERR(priv, "Unknown calibration notification %d\n", |
511 | hdr->op_code); | 512 | hdr->op_code); |
512 | return; | 513 | return; |
513 | } | 514 | } |
@@ -580,7 +581,8 @@ static int iwl5000_load_given_ucode(struct iwl_priv *priv, | |||
580 | { | 581 | { |
581 | int ret = 0; | 582 | int ret = 0; |
582 | 583 | ||
583 | ret = iwl5000_load_section(priv, inst_image, RTC_INST_LOWER_BOUND); | 584 | ret = iwl5000_load_section(priv, inst_image, |
585 | IWL50_RTC_INST_LOWER_BOUND); | ||
584 | if (ret) | 586 | if (ret) |
585 | return ret; | 587 | return ret; |
586 | 588 | ||
@@ -588,19 +590,19 @@ static int iwl5000_load_given_ucode(struct iwl_priv *priv, | |||
588 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | 590 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, |
589 | priv->ucode_write_complete, 5 * HZ); | 591 | priv->ucode_write_complete, 5 * HZ); |
590 | if (ret == -ERESTARTSYS) { | 592 | if (ret == -ERESTARTSYS) { |
591 | IWL_ERROR("Could not load the INST uCode section due " | 593 | IWL_ERR(priv, "Could not load the INST uCode section due " |
592 | "to interrupt\n"); | 594 | "to interrupt\n"); |
593 | return ret; | 595 | return ret; |
594 | } | 596 | } |
595 | if (!ret) { | 597 | if (!ret) { |
596 | IWL_ERROR("Could not load the INST uCode section\n"); | 598 | IWL_ERR(priv, "Could not load the INST uCode section\n"); |
597 | return -ETIMEDOUT; | 599 | return -ETIMEDOUT; |
598 | } | 600 | } |
599 | 601 | ||
600 | priv->ucode_write_complete = 0; | 602 | priv->ucode_write_complete = 0; |
601 | 603 | ||
602 | ret = iwl5000_load_section( | 604 | ret = iwl5000_load_section( |
603 | priv, data_image, RTC_DATA_LOWER_BOUND); | 605 | priv, data_image, IWL50_RTC_DATA_LOWER_BOUND); |
604 | if (ret) | 606 | if (ret) |
605 | return ret; | 607 | return ret; |
606 | 608 | ||
@@ -609,11 +611,11 @@ static int iwl5000_load_given_ucode(struct iwl_priv *priv, | |||
609 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | 611 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, |
610 | priv->ucode_write_complete, 5 * HZ); | 612 | priv->ucode_write_complete, 5 * HZ); |
611 | if (ret == -ERESTARTSYS) { | 613 | if (ret == -ERESTARTSYS) { |
612 | IWL_ERROR("Could not load the INST uCode section due " | 614 | IWL_ERR(priv, "Could not load the INST uCode section due " |
613 | "to interrupt\n"); | 615 | "to interrupt\n"); |
614 | return ret; | 616 | return ret; |
615 | } else if (!ret) { | 617 | } else if (!ret) { |
616 | IWL_ERROR("Could not load the DATA uCode section\n"); | 618 | IWL_ERR(priv, "Could not load the DATA uCode section\n"); |
617 | return -ETIMEDOUT; | 619 | return -ETIMEDOUT; |
618 | } else | 620 | } else |
619 | ret = 0; | 621 | ret = 0; |
@@ -675,7 +677,8 @@ static void iwl5000_init_alive_start(struct iwl_priv *priv) | |||
675 | iwl_clear_stations_table(priv); | 677 | iwl_clear_stations_table(priv); |
676 | ret = priv->cfg->ops->lib->alive_notify(priv); | 678 | ret = priv->cfg->ops->lib->alive_notify(priv); |
677 | if (ret) { | 679 | if (ret) { |
678 | IWL_WARNING("Could not complete ALIVE transition: %d\n", ret); | 680 | IWL_WARN(priv, |
681 | "Could not complete ALIVE transition: %d\n", ret); | ||
679 | goto restart; | 682 | goto restart; |
680 | } | 683 | } |
681 | 684 | ||
@@ -824,8 +827,9 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv) | |||
824 | { | 827 | { |
825 | if ((priv->cfg->mod_params->num_of_queues > IWL50_NUM_QUEUES) || | 828 | if ((priv->cfg->mod_params->num_of_queues > IWL50_NUM_QUEUES) || |
826 | (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) { | 829 | (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) { |
827 | IWL_ERROR("invalid queues_num, should be between %d and %d\n", | 830 | IWL_ERR(priv, |
828 | IWL_MIN_NUM_QUEUES, IWL50_NUM_QUEUES); | 831 | "invalid queues_num, should be between %d and %d\n", |
832 | IWL_MIN_NUM_QUEUES, IWL50_NUM_QUEUES); | ||
829 | return -EINVAL; | 833 | return -EINVAL; |
830 | } | 834 | } |
831 | 835 | ||
@@ -833,6 +837,7 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv) | |||
833 | priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM; | 837 | priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM; |
834 | priv->hw_params.scd_bc_tbls_size = | 838 | priv->hw_params.scd_bc_tbls_size = |
835 | IWL50_NUM_QUEUES * sizeof(struct iwl5000_scd_bc_tbl); | 839 | IWL50_NUM_QUEUES * sizeof(struct iwl5000_scd_bc_tbl); |
840 | priv->hw_params.tfd_size = sizeof(struct iwl_tfd); | ||
836 | priv->hw_params.max_stations = IWL5000_STATION_COUNT; | 841 | priv->hw_params.max_stations = IWL5000_STATION_COUNT; |
837 | priv->hw_params.bcast_sta_id = IWL5000_BROADCAST_ID; | 842 | priv->hw_params.bcast_sta_id = IWL5000_BROADCAST_ID; |
838 | priv->hw_params.max_data_size = IWL50_RTC_DATA_SIZE; | 843 | priv->hw_params.max_data_size = IWL50_RTC_DATA_SIZE; |
@@ -840,6 +845,8 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv) | |||
840 | priv->hw_params.max_bsm_size = 0; | 845 | priv->hw_params.max_bsm_size = 0; |
841 | priv->hw_params.fat_channel = BIT(IEEE80211_BAND_2GHZ) | | 846 | priv->hw_params.fat_channel = BIT(IEEE80211_BAND_2GHZ) | |
842 | BIT(IEEE80211_BAND_5GHZ); | 847 | BIT(IEEE80211_BAND_5GHZ); |
848 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; | ||
849 | |||
843 | priv->hw_params.sens = &iwl5000_sensitivity; | 850 | priv->hw_params.sens = &iwl5000_sensitivity; |
844 | 851 | ||
845 | switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { | 852 | switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { |
@@ -1011,7 +1018,8 @@ static int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id, | |||
1011 | 1018 | ||
1012 | if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) || | 1019 | if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) || |
1013 | (IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES <= txq_id)) { | 1020 | (IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES <= txq_id)) { |
1014 | IWL_WARNING("queue number out of range: %d, must be %d to %d\n", | 1021 | IWL_WARN(priv, |
1022 | "queue number out of range: %d, must be %d to %d\n", | ||
1015 | txq_id, IWL50_FIRST_AMPDU_QUEUE, | 1023 | txq_id, IWL50_FIRST_AMPDU_QUEUE, |
1016 | IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES - 1); | 1024 | IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES - 1); |
1017 | return -EINVAL; | 1025 | return -EINVAL; |
@@ -1076,7 +1084,8 @@ static int iwl5000_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, | |||
1076 | 1084 | ||
1077 | if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) || | 1085 | if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) || |
1078 | (IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES <= txq_id)) { | 1086 | (IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES <= txq_id)) { |
1079 | IWL_WARNING("queue number out of range: %d, must be %d to %d\n", | 1087 | IWL_WARN(priv, |
1088 | "queue number out of range: %d, must be %d to %d\n", | ||
1080 | txq_id, IWL50_FIRST_AMPDU_QUEUE, | 1089 | txq_id, IWL50_FIRST_AMPDU_QUEUE, |
1081 | IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES - 1); | 1090 | IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES - 1); |
1082 | return -EINVAL; | 1091 | return -EINVAL; |
@@ -1197,8 +1206,9 @@ static int iwl5000_tx_status_reply_tx(struct iwl_priv *priv, | |||
1197 | 1206 | ||
1198 | sc = le16_to_cpu(hdr->seq_ctrl); | 1207 | sc = le16_to_cpu(hdr->seq_ctrl); |
1199 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { | 1208 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { |
1200 | IWL_ERROR("BUG_ON idx doesn't match seq control" | 1209 | IWL_ERR(priv, |
1201 | " idx=%d, seq_idx=%d, seq=%d\n", | 1210 | "BUG_ON idx doesn't match seq control" |
1211 | " idx=%d, seq_idx=%d, seq=%d\n", | ||
1202 | idx, SEQ_TO_SN(sc), | 1212 | idx, SEQ_TO_SN(sc), |
1203 | hdr->seq_ctrl); | 1213 | hdr->seq_ctrl); |
1204 | return -1; | 1214 | return -1; |
@@ -1254,7 +1264,7 @@ static void iwl5000_rx_reply_tx(struct iwl_priv *priv, | |||
1254 | int freed; | 1264 | int freed; |
1255 | 1265 | ||
1256 | if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) { | 1266 | if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) { |
1257 | IWL_ERROR("Read index for DMA queue txq_id (%d) index %d " | 1267 | IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d " |
1258 | "is out of range [0-%d] %d %d\n", txq_id, | 1268 | "is out of range [0-%d] %d %d\n", txq_id, |
1259 | index, txq->q.n_bd, txq->q.write_ptr, | 1269 | index, txq->q.n_bd, txq->q.write_ptr, |
1260 | txq->q.read_ptr); | 1270 | txq->q.read_ptr); |
@@ -1328,7 +1338,7 @@ static void iwl5000_rx_reply_tx(struct iwl_priv *priv, | |||
1328 | iwl_txq_check_empty(priv, sta_id, tid, txq_id); | 1338 | iwl_txq_check_empty(priv, sta_id, tid, txq_id); |
1329 | 1339 | ||
1330 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) | 1340 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) |
1331 | IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n"); | 1341 | IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n"); |
1332 | } | 1342 | } |
1333 | 1343 | ||
1334 | /* Currently 5000 is the superset of everything */ | 1344 | /* Currently 5000 is the superset of everything */ |
@@ -1356,7 +1366,7 @@ static void iwl5000_rx_handler_setup(struct iwl_priv *priv) | |||
1356 | 1366 | ||
1357 | static int iwl5000_hw_valid_rtc_data_addr(u32 addr) | 1367 | static int iwl5000_hw_valid_rtc_data_addr(u32 addr) |
1358 | { | 1368 | { |
1359 | return (addr >= RTC_DATA_LOWER_BOUND) && | 1369 | return (addr >= IWL50_RTC_DATA_LOWER_BOUND) && |
1360 | (addr < IWL50_RTC_DATA_UPPER_BOUND); | 1370 | (addr < IWL50_RTC_DATA_UPPER_BOUND); |
1361 | } | 1371 | } |
1362 | 1372 | ||
@@ -1460,7 +1470,7 @@ static int iwl5000_calc_rssi(struct iwl_priv *priv, | |||
1460 | 1470 | ||
1461 | /* dBm = max_rssi dB - agc dB - constant. | 1471 | /* dBm = max_rssi dB - agc dB - constant. |
1462 | * Higher AGC (higher radio gain) means lower signal. */ | 1472 | * Higher AGC (higher radio gain) means lower signal. */ |
1463 | return max_rssi - agc - IWL_RSSI_OFFSET; | 1473 | return max_rssi - agc - IWL49_RSSI_OFFSET; |
1464 | } | 1474 | } |
1465 | 1475 | ||
1466 | static struct iwl_hcmd_ops iwl5000_hcmd = { | 1476 | static struct iwl_hcmd_ops iwl5000_hcmd = { |
@@ -1483,6 +1493,9 @@ static struct iwl_lib_ops iwl5000_lib = { | |||
1483 | .txq_set_sched = iwl5000_txq_set_sched, | 1493 | .txq_set_sched = iwl5000_txq_set_sched, |
1484 | .txq_agg_enable = iwl5000_txq_agg_enable, | 1494 | .txq_agg_enable = iwl5000_txq_agg_enable, |
1485 | .txq_agg_disable = iwl5000_txq_agg_disable, | 1495 | .txq_agg_disable = iwl5000_txq_agg_disable, |
1496 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, | ||
1497 | .txq_free_tfd = iwl_hw_txq_free_tfd, | ||
1498 | .txq_init = iwl_hw_tx_queue_init, | ||
1486 | .rx_handler_setup = iwl5000_rx_handler_setup, | 1499 | .rx_handler_setup = iwl5000_rx_handler_setup, |
1487 | .setup_deferred_work = iwl5000_setup_deferred_work, | 1500 | .setup_deferred_work = iwl5000_setup_deferred_work, |
1488 | .is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr, | 1501 | .is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr, |
@@ -1517,13 +1530,13 @@ static struct iwl_lib_ops iwl5000_lib = { | |||
1517 | }, | 1530 | }, |
1518 | }; | 1531 | }; |
1519 | 1532 | ||
1520 | static struct iwl_ops iwl5000_ops = { | 1533 | struct iwl_ops iwl5000_ops = { |
1521 | .lib = &iwl5000_lib, | 1534 | .lib = &iwl5000_lib, |
1522 | .hcmd = &iwl5000_hcmd, | 1535 | .hcmd = &iwl5000_hcmd, |
1523 | .utils = &iwl5000_hcmd_utils, | 1536 | .utils = &iwl5000_hcmd_utils, |
1524 | }; | 1537 | }; |
1525 | 1538 | ||
1526 | static struct iwl_mod_params iwl50_mod_params = { | 1539 | struct iwl_mod_params iwl50_mod_params = { |
1527 | .num_of_queues = IWL50_NUM_QUEUES, | 1540 | .num_of_queues = IWL50_NUM_QUEUES, |
1528 | .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES, | 1541 | .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES, |
1529 | .amsdu_size_8K = 1, | 1542 | .amsdu_size_8K = 1, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-core.h b/drivers/net/wireless/iwlwifi/iwl-6000-hw.h index 6f463555402c..90185777d98b 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945-core.h +++ b/drivers/net/wireless/iwlwifi/iwl-6000-hw.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -58,47 +58,24 @@ | |||
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | 58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | 59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
61 | * | ||
61 | *****************************************************************************/ | 62 | *****************************************************************************/ |
63 | /* | ||
64 | * Please use this file (iwl-6000-hw.h) only for hardware-related definitions. | ||
65 | * Use iwl-5000-commands.h for uCode API definitions. | ||
66 | */ | ||
62 | 67 | ||
63 | #ifndef __iwl_3945_dev_h__ | 68 | #ifndef __iwl_6000_hw_h__ |
64 | #define __iwl_3945_dev_h__ | 69 | #define __iwl_6000_hw_h__ |
65 | |||
66 | #define IWL_PCI_DEVICE(dev, subdev, cfg) \ | ||
67 | .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \ | ||
68 | .subvendor = PCI_ANY_ID, .subdevice = (subdev), \ | ||
69 | .driver_data = (kernel_ulong_t)&(cfg) | ||
70 | 70 | ||
71 | #define IWL_SKU_G 0x1 | 71 | #define IWL60_RTC_INST_LOWER_BOUND (0x000000) |
72 | #define IWL_SKU_A 0x2 | 72 | #define IWL60_RTC_INST_UPPER_BOUND (0x040000) |
73 | #define IWL60_RTC_DATA_LOWER_BOUND (0x800000) | ||
74 | #define IWL60_RTC_DATA_UPPER_BOUND (0x814000) | ||
75 | #define IWL60_RTC_INST_SIZE \ | ||
76 | (IWL60_RTC_INST_UPPER_BOUND - IWL60_RTC_INST_LOWER_BOUND) | ||
77 | #define IWL60_RTC_DATA_SIZE \ | ||
78 | (IWL60_RTC_DATA_UPPER_BOUND - IWL60_RTC_DATA_LOWER_BOUND) | ||
73 | 79 | ||
74 | /** | 80 | #endif /* __iwl_6000_hw_h__ */ |
75 | * struct iwl_3945_cfg | ||
76 | * @fw_name_pre: Firmware filename prefix. The api version and extension | ||
77 | * (.ucode) will be added to filename before loading from disk. The | ||
78 | * filename is constructed as fw_name_pre<api>.ucode. | ||
79 | * @ucode_api_max: Highest version of uCode API supported by driver. | ||
80 | * @ucode_api_min: Lowest version of uCode API supported by driver. | ||
81 | * | ||
82 | * We enable the driver to be backward compatible wrt API version. The | ||
83 | * driver specifies which APIs it supports (with @ucode_api_max being the | ||
84 | * highest and @ucode_api_min the lowest). Firmware will only be loaded if | ||
85 | * it has a supported API version. The firmware's API version will be | ||
86 | * stored in @iwl_priv, enabling the driver to make runtime changes based | ||
87 | * on firmware version used. | ||
88 | * | ||
89 | * For example, | ||
90 | * if (IWL_UCODE_API(priv->ucode_ver) >= 2) { | ||
91 | * Driver interacts with Firmware API version >= 2. | ||
92 | * } else { | ||
93 | * Driver interacts with Firmware API version 1. | ||
94 | * } | ||
95 | */ | ||
96 | struct iwl_3945_cfg { | ||
97 | const char *name; | ||
98 | const char *fw_name_pre; | ||
99 | const unsigned int ucode_api_max; | ||
100 | const unsigned int ucode_api_min; | ||
101 | unsigned int sku; | ||
102 | }; | ||
103 | 81 | ||
104 | #endif /* __iwl_dev_h__ */ | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c new file mode 100644 index 000000000000..4515a6053dd0 --- /dev/null +++ b/drivers/net/wireless/iwlwifi/iwl-6000.c | |||
@@ -0,0 +1,130 @@ | |||
1 | /****************************************************************************** | ||
2 | * | ||
3 | * Copyright(c) 2008-2009 Intel Corporation. All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of version 2 of the GNU General Public License as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
12 | * more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along with | ||
15 | * this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | ||
17 | * | ||
18 | * The full GNU General Public License is included in this distribution in the | ||
19 | * file called LICENSE. | ||
20 | * | ||
21 | * Contact Information: | ||
22 | * Intel Linux Wireless <ilw@linux.intel.com> | ||
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
24 | * | ||
25 | *****************************************************************************/ | ||
26 | |||
27 | #include <linux/kernel.h> | ||
28 | #include <linux/module.h> | ||
29 | #include <linux/init.h> | ||
30 | #include <linux/pci.h> | ||
31 | #include <linux/dma-mapping.h> | ||
32 | #include <linux/delay.h> | ||
33 | #include <linux/skbuff.h> | ||
34 | #include <linux/netdevice.h> | ||
35 | #include <linux/wireless.h> | ||
36 | #include <net/mac80211.h> | ||
37 | #include <linux/etherdevice.h> | ||
38 | #include <asm/unaligned.h> | ||
39 | |||
40 | #include "iwl-eeprom.h" | ||
41 | #include "iwl-dev.h" | ||
42 | #include "iwl-core.h" | ||
43 | #include "iwl-io.h" | ||
44 | #include "iwl-sta.h" | ||
45 | #include "iwl-helpers.h" | ||
46 | #include "iwl-5000-hw.h" | ||
47 | |||
48 | /* Highest firmware API version supported */ | ||
49 | #define IWL6000_UCODE_API_MAX 1 | ||
50 | #define IWL6050_UCODE_API_MAX 1 | ||
51 | |||
52 | /* Lowest firmware API version supported */ | ||
53 | #define IWL6000_UCODE_API_MIN 1 | ||
54 | #define IWL6050_UCODE_API_MIN 1 | ||
55 | |||
56 | #define IWL6000_FW_PRE "iwlwifi-6000-" | ||
57 | #define _IWL6000_MODULE_FIRMWARE(api) IWL6000_FW_PRE #api ".ucode" | ||
58 | #define IWL6000_MODULE_FIRMWARE(api) _IWL6000_MODULE_FIRMWARE(api) | ||
59 | |||
60 | #define IWL6050_FW_PRE "iwlwifi-6050-" | ||
61 | #define _IWL6050_MODULE_FIRMWARE(api) IWL6050_FW_PRE #api ".ucode" | ||
62 | #define IWL6050_MODULE_FIRMWARE(api) _IWL6050_MODULE_FIRMWARE(api) | ||
63 | |||
64 | struct iwl_cfg iwl6000_2ag_cfg = { | ||
65 | .name = "6000 Series 2x2 AG", | ||
66 | .fw_name_pre = IWL6000_FW_PRE, | ||
67 | .ucode_api_max = IWL6000_UCODE_API_MAX, | ||
68 | .ucode_api_min = IWL6000_UCODE_API_MIN, | ||
69 | .sku = IWL_SKU_A|IWL_SKU_G, | ||
70 | .ops = &iwl5000_ops, | ||
71 | .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, | ||
72 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, | ||
73 | .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, | ||
74 | .mod_params = &iwl50_mod_params, | ||
75 | }; | ||
76 | |||
77 | struct iwl_cfg iwl6000_2agn_cfg = { | ||
78 | .name = "6000 Series 2x2 AGN", | ||
79 | .fw_name_pre = IWL6000_FW_PRE, | ||
80 | .ucode_api_max = IWL6000_UCODE_API_MAX, | ||
81 | .ucode_api_min = IWL6000_UCODE_API_MIN, | ||
82 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
83 | .ops = &iwl5000_ops, | ||
84 | .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, | ||
85 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, | ||
86 | .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, | ||
87 | .mod_params = &iwl50_mod_params, | ||
88 | }; | ||
89 | |||
90 | struct iwl_cfg iwl6050_2agn_cfg = { | ||
91 | .name = "6050 Series 2x2 AGN", | ||
92 | .fw_name_pre = IWL6050_FW_PRE, | ||
93 | .ucode_api_max = IWL6050_UCODE_API_MAX, | ||
94 | .ucode_api_min = IWL6050_UCODE_API_MIN, | ||
95 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
96 | .ops = &iwl5000_ops, | ||
97 | .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, | ||
98 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, | ||
99 | .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, | ||
100 | .mod_params = &iwl50_mod_params, | ||
101 | }; | ||
102 | |||
103 | struct iwl_cfg iwl6000_3agn_cfg = { | ||
104 | .name = "6000 Series 3x3 AGN", | ||
105 | .fw_name_pre = IWL6000_FW_PRE, | ||
106 | .ucode_api_max = IWL6000_UCODE_API_MAX, | ||
107 | .ucode_api_min = IWL6000_UCODE_API_MIN, | ||
108 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
109 | .ops = &iwl5000_ops, | ||
110 | .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, | ||
111 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, | ||
112 | .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, | ||
113 | .mod_params = &iwl50_mod_params, | ||
114 | }; | ||
115 | |||
116 | struct iwl_cfg iwl6050_3agn_cfg = { | ||
117 | .name = "6050 Series 3x3 AGN", | ||
118 | .fw_name_pre = IWL6050_FW_PRE, | ||
119 | .ucode_api_max = IWL6050_UCODE_API_MAX, | ||
120 | .ucode_api_min = IWL6050_UCODE_API_MIN, | ||
121 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
122 | .ops = &iwl5000_ops, | ||
123 | .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, | ||
124 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, | ||
125 | .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, | ||
126 | .mod_params = &iwl50_mod_params, | ||
127 | }; | ||
128 | |||
129 | MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX)); | ||
130 | MODULE_FIRMWARE(IWL6050_MODULE_FIRMWARE(IWL6050_UCODE_API_MAX)); | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd-check.c b/drivers/net/wireless/iwlwifi/iwl-agn-hcmd-check.c index b8137eeae1db..1217a1da88f5 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd-check.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-hcmd-check.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -40,67 +40,68 @@ | |||
40 | * be #ifdef'd out once the driver is stable and folks aren't actively | 40 | * be #ifdef'd out once the driver is stable and folks aren't actively |
41 | * making changes | 41 | * making changes |
42 | */ | 42 | */ |
43 | int iwl_agn_check_rxon_cmd(struct iwl_rxon_cmd *rxon) | 43 | int iwl_agn_check_rxon_cmd(struct iwl_priv *priv) |
44 | { | 44 | { |
45 | int error = 0; | 45 | int error = 0; |
46 | int counter = 1; | 46 | int counter = 1; |
47 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; | ||
47 | 48 | ||
48 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | 49 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { |
49 | error |= le32_to_cpu(rxon->flags & | 50 | error |= le32_to_cpu(rxon->flags & |
50 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | 51 | (RXON_FLG_TGJ_NARROW_BAND_MSK | |
51 | RXON_FLG_RADAR_DETECT_MSK)); | 52 | RXON_FLG_RADAR_DETECT_MSK)); |
52 | if (error) | 53 | if (error) |
53 | IWL_WARNING("check 24G fields %d | %d\n", | 54 | IWL_WARN(priv, "check 24G fields %d | %d\n", |
54 | counter++, error); | 55 | counter++, error); |
55 | } else { | 56 | } else { |
56 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | 57 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? |
57 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | 58 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); |
58 | if (error) | 59 | if (error) |
59 | IWL_WARNING("check 52 fields %d | %d\n", | 60 | IWL_WARN(priv, "check 52 fields %d | %d\n", |
60 | counter++, error); | 61 | counter++, error); |
61 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | 62 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); |
62 | if (error) | 63 | if (error) |
63 | IWL_WARNING("check 52 CCK %d | %d\n", | 64 | IWL_WARN(priv, "check 52 CCK %d | %d\n", |
64 | counter++, error); | 65 | counter++, error); |
65 | } | 66 | } |
66 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | 67 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; |
67 | if (error) | 68 | if (error) |
68 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | 69 | IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error); |
69 | 70 | ||
70 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | 71 | /* make sure basic rates 6Mbps and 1Mbps are supported */ |
71 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | 72 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && |
72 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | 73 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); |
73 | if (error) | 74 | if (error) |
74 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | 75 | IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error); |
75 | 76 | ||
76 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | 77 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); |
77 | if (error) | 78 | if (error) |
78 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | 79 | IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error); |
79 | 80 | ||
80 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | 81 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) |
81 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | 82 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); |
82 | if (error) | 83 | if (error) |
83 | IWL_WARNING("check CCK and short slot %d | %d\n", | 84 | IWL_WARN(priv, "check CCK and short slot %d | %d\n", |
84 | counter++, error); | 85 | counter++, error); |
85 | 86 | ||
86 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | 87 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) |
87 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | 88 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); |
88 | if (error) | 89 | if (error) |
89 | IWL_WARNING("check CCK & auto detect %d | %d\n", | 90 | IWL_WARN(priv, "check CCK & auto detect %d | %d\n", |
90 | counter++, error); | 91 | counter++, error); |
91 | 92 | ||
92 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | 93 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | |
93 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | 94 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); |
94 | if (error) | 95 | if (error) |
95 | IWL_WARNING("check TGG and auto detect %d | %d\n", | 96 | IWL_WARN(priv, "check TGG and auto detect %d | %d\n", |
96 | counter++, error); | 97 | counter++, error); |
97 | 98 | ||
98 | if (error) | 99 | if (error) |
99 | IWL_WARNING("Tuning to channel %d\n", | 100 | IWL_WARN(priv, "Tuning to channel %d\n", |
100 | le16_to_cpu(rxon->channel)); | 101 | le16_to_cpu(rxon->channel)); |
101 | 102 | ||
102 | if (error) { | 103 | if (error) { |
103 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); | 104 | IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n"); |
104 | return -1; | 105 | return -1; |
105 | } | 106 | } |
106 | return 0; | 107 | return 0; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c index 27f50471aed8..13039a024473 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -49,6 +49,8 @@ | |||
49 | #define IWL_RATE_MIN_FAILURE_TH 6 /* min failures to calc tpt */ | 49 | #define IWL_RATE_MIN_FAILURE_TH 6 /* min failures to calc tpt */ |
50 | #define IWL_RATE_MIN_SUCCESS_TH 8 /* min successes to calc tpt */ | 50 | #define IWL_RATE_MIN_SUCCESS_TH 8 /* min successes to calc tpt */ |
51 | 51 | ||
52 | /* max allowed rate miss before sync LQ cmd */ | ||
53 | #define IWL_MISSED_RATE_MAX 15 | ||
52 | /* max time to accum history 2 seconds */ | 54 | /* max time to accum history 2 seconds */ |
53 | #define IWL_RATE_SCALE_FLUSH_INTVL (2*HZ) | 55 | #define IWL_RATE_SCALE_FLUSH_INTVL (2*HZ) |
54 | 56 | ||
@@ -148,6 +150,8 @@ struct iwl_lq_sta { | |||
148 | u16 active_mimo2_rate; | 150 | u16 active_mimo2_rate; |
149 | u16 active_mimo3_rate; | 151 | u16 active_mimo3_rate; |
150 | u16 active_rate_basic; | 152 | u16 active_rate_basic; |
153 | s8 max_rate_idx; /* Max rate set by user */ | ||
154 | u8 missed_rate_counter; | ||
151 | 155 | ||
152 | struct iwl_link_quality_cmd lq; | 156 | struct iwl_link_quality_cmd lq; |
153 | struct iwl_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */ | 157 | struct iwl_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */ |
@@ -463,8 +467,9 @@ static int rs_collect_tx_data(struct iwl_rate_scale_data *windows, | |||
463 | * Fill uCode API rate_n_flags field, based on "search" or "active" table. | 467 | * Fill uCode API rate_n_flags field, based on "search" or "active" table. |
464 | */ | 468 | */ |
465 | /* FIXME:RS:remove this function and put the flags statically in the table */ | 469 | /* FIXME:RS:remove this function and put the flags statically in the table */ |
466 | static u32 rate_n_flags_from_tbl(struct iwl_scale_tbl_info *tbl, | 470 | static u32 rate_n_flags_from_tbl(struct iwl_priv *priv, |
467 | int index, u8 use_green) | 471 | struct iwl_scale_tbl_info *tbl, |
472 | int index, u8 use_green) | ||
468 | { | 473 | { |
469 | u32 rate_n_flags = 0; | 474 | u32 rate_n_flags = 0; |
470 | 475 | ||
@@ -475,7 +480,7 @@ static u32 rate_n_flags_from_tbl(struct iwl_scale_tbl_info *tbl, | |||
475 | 480 | ||
476 | } else if (is_Ht(tbl->lq_type)) { | 481 | } else if (is_Ht(tbl->lq_type)) { |
477 | if (index > IWL_LAST_OFDM_RATE) { | 482 | if (index > IWL_LAST_OFDM_RATE) { |
478 | IWL_ERROR("invalid HT rate index %d\n", index); | 483 | IWL_ERR(priv, "Invalid HT rate index %d\n", index); |
479 | index = IWL_LAST_OFDM_RATE; | 484 | index = IWL_LAST_OFDM_RATE; |
480 | } | 485 | } |
481 | rate_n_flags = RATE_MCS_HT_MSK; | 486 | rate_n_flags = RATE_MCS_HT_MSK; |
@@ -487,7 +492,7 @@ static u32 rate_n_flags_from_tbl(struct iwl_scale_tbl_info *tbl, | |||
487 | else | 492 | else |
488 | rate_n_flags |= iwl_rates[index].plcp_mimo3; | 493 | rate_n_flags |= iwl_rates[index].plcp_mimo3; |
489 | } else { | 494 | } else { |
490 | IWL_ERROR("Invalid tbl->lq_type %d\n", tbl->lq_type); | 495 | IWL_ERR(priv, "Invalid tbl->lq_type %d\n", tbl->lq_type); |
491 | } | 496 | } |
492 | 497 | ||
493 | rate_n_flags |= ((tbl->ant_type << RATE_MCS_ANT_POS) & | 498 | rate_n_flags |= ((tbl->ant_type << RATE_MCS_ANT_POS) & |
@@ -507,7 +512,7 @@ static u32 rate_n_flags_from_tbl(struct iwl_scale_tbl_info *tbl, | |||
507 | rate_n_flags |= RATE_MCS_GF_MSK; | 512 | rate_n_flags |= RATE_MCS_GF_MSK; |
508 | if (is_siso(tbl->lq_type) && tbl->is_SGI) { | 513 | if (is_siso(tbl->lq_type) && tbl->is_SGI) { |
509 | rate_n_flags &= ~RATE_MCS_SGI_MSK; | 514 | rate_n_flags &= ~RATE_MCS_SGI_MSK; |
510 | IWL_ERROR("GF was set with SGI:SISO\n"); | 515 | IWL_ERR(priv, "GF was set with SGI:SISO\n"); |
511 | } | 516 | } |
512 | } | 517 | } |
513 | } | 518 | } |
@@ -758,7 +763,7 @@ static u32 rs_get_lower_rate(struct iwl_lq_sta *lq_sta, | |||
758 | low = scale_index; | 763 | low = scale_index; |
759 | 764 | ||
760 | out: | 765 | out: |
761 | return rate_n_flags_from_tbl(tbl, low, is_green); | 766 | return rate_n_flags_from_tbl(lq_sta->drv, tbl, low, is_green); |
762 | } | 767 | } |
763 | 768 | ||
764 | /* | 769 | /* |
@@ -839,10 +844,15 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband, | |||
839 | /* the last LQ command could failed so the LQ in ucode not | 844 | /* the last LQ command could failed so the LQ in ucode not |
840 | * the same in driver sync up | 845 | * the same in driver sync up |
841 | */ | 846 | */ |
842 | iwl_send_lq_cmd(priv, &lq_sta->lq, CMD_ASYNC); | 847 | lq_sta->missed_rate_counter++; |
848 | if (lq_sta->missed_rate_counter > IWL_MISSED_RATE_MAX) { | ||
849 | lq_sta->missed_rate_counter = 0; | ||
850 | iwl_send_lq_cmd(priv, &lq_sta->lq, CMD_ASYNC); | ||
851 | } | ||
843 | goto out; | 852 | goto out; |
844 | } | 853 | } |
845 | 854 | ||
855 | lq_sta->missed_rate_counter = 0; | ||
846 | /* Update frame history window with "failure" for each Tx retry. */ | 856 | /* Update frame history window with "failure" for each Tx retry. */ |
847 | while (retries) { | 857 | while (retries) { |
848 | /* Look up the rate and other info used for each tx attempt. | 858 | /* Look up the rate and other info used for each tx attempt. |
@@ -1129,7 +1139,7 @@ static int rs_switch_to_mimo2(struct iwl_priv *priv, | |||
1129 | s32 rate; | 1139 | s32 rate; |
1130 | s8 is_green = lq_sta->is_green; | 1140 | s8 is_green = lq_sta->is_green; |
1131 | 1141 | ||
1132 | if (!conf->ht.enabled || !sta->ht_cap.ht_supported) | 1142 | if (!conf_is_ht(conf) || !sta->ht_cap.ht_supported) |
1133 | return -1; | 1143 | return -1; |
1134 | 1144 | ||
1135 | if (((sta->ht_cap.cap & IEEE80211_HT_CAP_SM_PS) >> 2) | 1145 | if (((sta->ht_cap.cap & IEEE80211_HT_CAP_SM_PS) >> 2) |
@@ -1176,7 +1186,7 @@ static int rs_switch_to_mimo2(struct iwl_priv *priv, | |||
1176 | rate, rate_mask); | 1186 | rate, rate_mask); |
1177 | return -1; | 1187 | return -1; |
1178 | } | 1188 | } |
1179 | tbl->current_rate = rate_n_flags_from_tbl(tbl, rate, is_green); | 1189 | tbl->current_rate = rate_n_flags_from_tbl(priv, tbl, rate, is_green); |
1180 | 1190 | ||
1181 | IWL_DEBUG_RATE("LQ: Switch to new mcs %X index is green %X\n", | 1191 | IWL_DEBUG_RATE("LQ: Switch to new mcs %X index is green %X\n", |
1182 | tbl->current_rate, is_green); | 1192 | tbl->current_rate, is_green); |
@@ -1196,7 +1206,7 @@ static int rs_switch_to_siso(struct iwl_priv *priv, | |||
1196 | u8 is_green = lq_sta->is_green; | 1206 | u8 is_green = lq_sta->is_green; |
1197 | s32 rate; | 1207 | s32 rate; |
1198 | 1208 | ||
1199 | if (!conf->ht.enabled || !sta->ht_cap.ht_supported) | 1209 | if (!conf_is_ht(conf) || !sta->ht_cap.ht_supported) |
1200 | return -1; | 1210 | return -1; |
1201 | 1211 | ||
1202 | IWL_DEBUG_RATE("LQ: try to switch to SISO\n"); | 1212 | IWL_DEBUG_RATE("LQ: try to switch to SISO\n"); |
@@ -1236,7 +1246,7 @@ static int rs_switch_to_siso(struct iwl_priv *priv, | |||
1236 | rate, rate_mask); | 1246 | rate, rate_mask); |
1237 | return -1; | 1247 | return -1; |
1238 | } | 1248 | } |
1239 | tbl->current_rate = rate_n_flags_from_tbl(tbl, rate, is_green); | 1249 | tbl->current_rate = rate_n_flags_from_tbl(priv, tbl, rate, is_green); |
1240 | IWL_DEBUG_RATE("LQ: Switch to new mcs %X index is green %X\n", | 1250 | IWL_DEBUG_RATE("LQ: Switch to new mcs %X index is green %X\n", |
1241 | tbl->current_rate, is_green); | 1251 | tbl->current_rate, is_green); |
1242 | return 0; | 1252 | return 0; |
@@ -1430,7 +1440,8 @@ static int rs_move_siso_to_other(struct iwl_priv *priv, | |||
1430 | if (!tbl->is_SGI) | 1440 | if (!tbl->is_SGI) |
1431 | break; | 1441 | break; |
1432 | else | 1442 | else |
1433 | IWL_ERROR("SGI was set in GF+SISO\n"); | 1443 | IWL_ERR(priv, |
1444 | "SGI was set in GF+SISO\n"); | ||
1434 | } | 1445 | } |
1435 | search_tbl->is_SGI = !tbl->is_SGI; | 1446 | search_tbl->is_SGI = !tbl->is_SGI; |
1436 | rs_set_expected_tpt_table(lq_sta, search_tbl); | 1447 | rs_set_expected_tpt_table(lq_sta, search_tbl); |
@@ -1439,8 +1450,9 @@ static int rs_move_siso_to_other(struct iwl_priv *priv, | |||
1439 | if (tpt >= search_tbl->expected_tpt[index]) | 1450 | if (tpt >= search_tbl->expected_tpt[index]) |
1440 | break; | 1451 | break; |
1441 | } | 1452 | } |
1442 | search_tbl->current_rate = rate_n_flags_from_tbl( | 1453 | search_tbl->current_rate = |
1443 | search_tbl, index, is_green); | 1454 | rate_n_flags_from_tbl(priv, search_tbl, |
1455 | index, is_green); | ||
1444 | goto out; | 1456 | goto out; |
1445 | } | 1457 | } |
1446 | tbl->action++; | 1458 | tbl->action++; |
@@ -1551,8 +1563,9 @@ static int rs_move_mimo_to_other(struct iwl_priv *priv, | |||
1551 | if (tpt >= search_tbl->expected_tpt[index]) | 1563 | if (tpt >= search_tbl->expected_tpt[index]) |
1552 | break; | 1564 | break; |
1553 | } | 1565 | } |
1554 | search_tbl->current_rate = rate_n_flags_from_tbl( | 1566 | search_tbl->current_rate = |
1555 | search_tbl, index, is_green); | 1567 | rate_n_flags_from_tbl(priv, search_tbl, |
1568 | index, is_green); | ||
1556 | goto out; | 1569 | goto out; |
1557 | 1570 | ||
1558 | } | 1571 | } |
@@ -1745,16 +1758,25 @@ static void rs_rate_scale_perform(struct iwl_priv *priv, | |||
1745 | rate_scale_index_msk = rate_mask; | 1758 | rate_scale_index_msk = rate_mask; |
1746 | 1759 | ||
1747 | if (!((1 << index) & rate_scale_index_msk)) { | 1760 | if (!((1 << index) & rate_scale_index_msk)) { |
1748 | IWL_ERROR("Current Rate is not valid\n"); | 1761 | IWL_ERR(priv, "Current Rate is not valid\n"); |
1749 | return; | 1762 | return; |
1750 | } | 1763 | } |
1751 | 1764 | ||
1752 | /* Get expected throughput table and history window for current rate */ | 1765 | /* Get expected throughput table and history window for current rate */ |
1753 | if (!tbl->expected_tpt) { | 1766 | if (!tbl->expected_tpt) { |
1754 | IWL_ERROR("tbl->expected_tpt is NULL\n"); | 1767 | IWL_ERR(priv, "tbl->expected_tpt is NULL\n"); |
1755 | return; | 1768 | return; |
1756 | } | 1769 | } |
1757 | 1770 | ||
1771 | /* force user max rate if set by user */ | ||
1772 | if ((lq_sta->max_rate_idx != -1) && | ||
1773 | (lq_sta->max_rate_idx < index)) { | ||
1774 | index = lq_sta->max_rate_idx; | ||
1775 | update_lq = 1; | ||
1776 | window = &(tbl->win[index]); | ||
1777 | goto lq_update; | ||
1778 | } | ||
1779 | |||
1758 | window = &(tbl->win[index]); | 1780 | window = &(tbl->win[index]); |
1759 | 1781 | ||
1760 | /* | 1782 | /* |
@@ -1846,6 +1868,11 @@ static void rs_rate_scale_perform(struct iwl_priv *priv, | |||
1846 | low = high_low & 0xff; | 1868 | low = high_low & 0xff; |
1847 | high = (high_low >> 8) & 0xff; | 1869 | high = (high_low >> 8) & 0xff; |
1848 | 1870 | ||
1871 | /* If user set max rate, dont allow higher than user constrain */ | ||
1872 | if ((lq_sta->max_rate_idx != -1) && | ||
1873 | (lq_sta->max_rate_idx < high)) | ||
1874 | high = IWL_RATE_INVALID; | ||
1875 | |||
1849 | sr = window->success_ratio; | 1876 | sr = window->success_ratio; |
1850 | 1877 | ||
1851 | /* Collect measured throughputs for current and adjacent rates */ | 1878 | /* Collect measured throughputs for current and adjacent rates */ |
@@ -1944,7 +1971,7 @@ static void rs_rate_scale_perform(struct iwl_priv *priv, | |||
1944 | lq_update: | 1971 | lq_update: |
1945 | /* Replace uCode's rate table for the destination station. */ | 1972 | /* Replace uCode's rate table for the destination station. */ |
1946 | if (update_lq) { | 1973 | if (update_lq) { |
1947 | rate = rate_n_flags_from_tbl(tbl, index, is_green); | 1974 | rate = rate_n_flags_from_tbl(priv, tbl, index, is_green); |
1948 | rs_fill_link_cmd(priv, lq_sta, rate); | 1975 | rs_fill_link_cmd(priv, lq_sta, rate); |
1949 | iwl_send_lq_cmd(priv, &lq_sta->lq, CMD_ASYNC); | 1976 | iwl_send_lq_cmd(priv, &lq_sta->lq, CMD_ASYNC); |
1950 | } | 1977 | } |
@@ -1993,7 +2020,7 @@ lq_update: | |||
1993 | * stay with best antenna legacy modulation for a while | 2020 | * stay with best antenna legacy modulation for a while |
1994 | * before next round of mode comparisons. */ | 2021 | * before next round of mode comparisons. */ |
1995 | tbl1 = &(lq_sta->lq_info[lq_sta->active_tbl]); | 2022 | tbl1 = &(lq_sta->lq_info[lq_sta->active_tbl]); |
1996 | if (is_legacy(tbl1->lq_type) && !conf->ht.enabled && | 2023 | if (is_legacy(tbl1->lq_type) && !conf_is_ht(conf) && |
1997 | lq_sta->action_counter >= 1) { | 2024 | lq_sta->action_counter >= 1) { |
1998 | lq_sta->action_counter = 0; | 2025 | lq_sta->action_counter = 0; |
1999 | IWL_DEBUG_RATE("LQ: STAY in legacy table\n"); | 2026 | IWL_DEBUG_RATE("LQ: STAY in legacy table\n"); |
@@ -2028,7 +2055,7 @@ lq_update: | |||
2028 | } | 2055 | } |
2029 | 2056 | ||
2030 | out: | 2057 | out: |
2031 | tbl->current_rate = rate_n_flags_from_tbl(tbl, index, is_green); | 2058 | tbl->current_rate = rate_n_flags_from_tbl(priv, tbl, index, is_green); |
2032 | i = index; | 2059 | i = index; |
2033 | lq_sta->last_txrate_idx = i; | 2060 | lq_sta->last_txrate_idx = i; |
2034 | 2061 | ||
@@ -2081,7 +2108,7 @@ static void rs_initialize_lq(struct iwl_priv *priv, | |||
2081 | if (!rs_is_valid_ant(valid_tx_ant, tbl->ant_type)) | 2108 | if (!rs_is_valid_ant(valid_tx_ant, tbl->ant_type)) |
2082 | rs_toggle_antenna(valid_tx_ant, &rate, tbl); | 2109 | rs_toggle_antenna(valid_tx_ant, &rate, tbl); |
2083 | 2110 | ||
2084 | rate = rate_n_flags_from_tbl(tbl, rate_idx, use_green); | 2111 | rate = rate_n_flags_from_tbl(priv, tbl, rate_idx, use_green); |
2085 | tbl->current_rate = rate; | 2112 | tbl->current_rate = rate; |
2086 | rs_set_expected_tpt_table(lq_sta, tbl); | 2113 | rs_set_expected_tpt_table(lq_sta, tbl); |
2087 | rs_fill_link_cmd(NULL, lq_sta, rate); | 2114 | rs_fill_link_cmd(NULL, lq_sta, rate); |
@@ -2106,6 +2133,17 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta, void *priv_sta, | |||
2106 | 2133 | ||
2107 | IWL_DEBUG_RATE_LIMIT("rate scale calculate new rate for skb\n"); | 2134 | IWL_DEBUG_RATE_LIMIT("rate scale calculate new rate for skb\n"); |
2108 | 2135 | ||
2136 | /* Get max rate if user set max rate */ | ||
2137 | if (lq_sta) { | ||
2138 | lq_sta->max_rate_idx = txrc->max_rate_idx; | ||
2139 | if ((sband->band == IEEE80211_BAND_5GHZ) && | ||
2140 | (lq_sta->max_rate_idx != -1)) | ||
2141 | lq_sta->max_rate_idx += IWL_FIRST_OFDM_RATE; | ||
2142 | if ((lq_sta->max_rate_idx < 0) || | ||
2143 | (lq_sta->max_rate_idx >= IWL_RATE_COUNT)) | ||
2144 | lq_sta->max_rate_idx = -1; | ||
2145 | } | ||
2146 | |||
2109 | if (sta) | 2147 | if (sta) |
2110 | mask_bit = sta->supp_rates[sband->band]; | 2148 | mask_bit = sta->supp_rates[sband->band]; |
2111 | 2149 | ||
@@ -2182,6 +2220,8 @@ static void rs_rate_init(void *priv_r, struct ieee80211_supported_band *sband, | |||
2182 | struct ieee80211_conf *conf = &priv->hw->conf; | 2220 | struct ieee80211_conf *conf = &priv->hw->conf; |
2183 | struct iwl_lq_sta *lq_sta = priv_sta; | 2221 | struct iwl_lq_sta *lq_sta = priv_sta; |
2184 | u16 mask_bit = 0; | 2222 | u16 mask_bit = 0; |
2223 | int count; | ||
2224 | int start_rate = 0; | ||
2185 | 2225 | ||
2186 | lq_sta->flush_timer = 0; | 2226 | lq_sta->flush_timer = 0; |
2187 | lq_sta->supp_rates = sta->supp_rates[sband->band]; | 2227 | lq_sta->supp_rates = sta->supp_rates[sband->band]; |
@@ -2216,6 +2256,8 @@ static void rs_rate_init(void *priv_r, struct ieee80211_supported_band *sband, | |||
2216 | } | 2256 | } |
2217 | 2257 | ||
2218 | lq_sta->is_dup = 0; | 2258 | lq_sta->is_dup = 0; |
2259 | lq_sta->max_rate_idx = -1; | ||
2260 | lq_sta->missed_rate_counter = IWL_MISSED_RATE_MAX; | ||
2219 | lq_sta->is_green = rs_use_green(priv, conf); | 2261 | lq_sta->is_green = rs_use_green(priv, conf); |
2220 | lq_sta->active_legacy_rate = priv->active_rate & ~(0x1000); | 2262 | lq_sta->active_legacy_rate = priv->active_rate & ~(0x1000); |
2221 | lq_sta->active_rate_basic = priv->active_rate_basic; | 2263 | lq_sta->active_rate_basic = priv->active_rate_basic; |
@@ -2254,16 +2296,20 @@ static void rs_rate_init(void *priv_r, struct ieee80211_supported_band *sband, | |||
2254 | lq_sta->drv = priv; | 2296 | lq_sta->drv = priv; |
2255 | 2297 | ||
2256 | /* Find highest tx rate supported by hardware and destination station */ | 2298 | /* Find highest tx rate supported by hardware and destination station */ |
2257 | mask_bit = sta->supp_rates[sband->band] & lq_sta->active_legacy_rate; | 2299 | mask_bit = sta->supp_rates[sband->band]; |
2258 | lq_sta->last_txrate_idx = 3; | 2300 | count = sband->n_bitrates; |
2259 | for (i = 0; i < sband->n_bitrates; i++) | 2301 | if (sband->band == IEEE80211_BAND_5GHZ) { |
2302 | count += IWL_FIRST_OFDM_RATE; | ||
2303 | start_rate = IWL_FIRST_OFDM_RATE; | ||
2304 | mask_bit <<= IWL_FIRST_OFDM_RATE; | ||
2305 | } | ||
2306 | |||
2307 | mask_bit = mask_bit & lq_sta->active_legacy_rate; | ||
2308 | lq_sta->last_txrate_idx = 4; | ||
2309 | for (i = start_rate; i < count; i++) | ||
2260 | if (mask_bit & BIT(i)) | 2310 | if (mask_bit & BIT(i)) |
2261 | lq_sta->last_txrate_idx = i; | 2311 | lq_sta->last_txrate_idx = i; |
2262 | 2312 | ||
2263 | /* For MODE_IEEE80211A, skip over cck rates in global rate table */ | ||
2264 | if (sband->band == IEEE80211_BAND_5GHZ) | ||
2265 | lq_sta->last_txrate_idx += IWL_FIRST_OFDM_RATE; | ||
2266 | |||
2267 | rs_initialize_lq(priv, conf, sta, lq_sta); | 2313 | rs_initialize_lq(priv, conf, sta, lq_sta); |
2268 | } | 2314 | } |
2269 | 2315 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.h b/drivers/net/wireless/iwlwifi/iwl-agn-rs.h index 78ee83adf742..345806dd8870 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.h +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -27,8 +27,6 @@ | |||
27 | #ifndef __iwl_agn_rs_h__ | 27 | #ifndef __iwl_agn_rs_h__ |
28 | #define __iwl_agn_rs_h__ | 28 | #define __iwl_agn_rs_h__ |
29 | 29 | ||
30 | #include "iwl-dev.h" | ||
31 | |||
32 | struct iwl_rate_info { | 30 | struct iwl_rate_info { |
33 | u8 plcp; /* uCode API: IWL_RATE_6M_PLCP, etc. */ | 31 | u8 plcp; /* uCode API: IWL_RATE_6M_PLCP, etc. */ |
34 | u8 plcp_siso; /* uCode API: IWL_RATE_SISO_6M_PLCP, etc. */ | 32 | u8 plcp_siso; /* uCode API: IWL_RATE_SISO_6M_PLCP, etc. */ |
@@ -43,6 +41,19 @@ struct iwl_rate_info { | |||
43 | u8 next_rs_tgg; /* next rate used in TGG rs algo */ | 41 | u8 next_rs_tgg; /* next rate used in TGG rs algo */ |
44 | }; | 42 | }; |
45 | 43 | ||
44 | struct iwl3945_rate_info { | ||
45 | u8 plcp; /* uCode API: IWL_RATE_6M_PLCP, etc. */ | ||
46 | u8 ieee; /* MAC header: IWL_RATE_6M_IEEE, etc. */ | ||
47 | u8 prev_ieee; /* previous rate in IEEE speeds */ | ||
48 | u8 next_ieee; /* next rate in IEEE speeds */ | ||
49 | u8 prev_rs; /* previous rate used in rs algo */ | ||
50 | u8 next_rs; /* next rate used in rs algo */ | ||
51 | u8 prev_rs_tgg; /* previous rate used in TGG rs algo */ | ||
52 | u8 next_rs_tgg; /* next rate used in TGG rs algo */ | ||
53 | u8 table_rs_index; /* index in rate scale table cmd */ | ||
54 | u8 prev_table_rs; /* prev in rate table cmd */ | ||
55 | }; | ||
56 | |||
46 | /* | 57 | /* |
47 | * These serve as indexes into | 58 | * These serve as indexes into |
48 | * struct iwl_rate_info iwl_rates[IWL_RATE_COUNT]; | 59 | * struct iwl_rate_info iwl_rates[IWL_RATE_COUNT]; |
@@ -62,12 +73,30 @@ enum { | |||
62 | IWL_RATE_54M_INDEX, | 73 | IWL_RATE_54M_INDEX, |
63 | IWL_RATE_60M_INDEX, | 74 | IWL_RATE_60M_INDEX, |
64 | IWL_RATE_COUNT, /*FIXME:RS:change to IWL_RATE_INDEX_COUNT,*/ | 75 | IWL_RATE_COUNT, /*FIXME:RS:change to IWL_RATE_INDEX_COUNT,*/ |
76 | IWL_RATE_COUNT_3945 = IWL_RATE_COUNT - 1, | ||
65 | IWL_RATE_INVM_INDEX = IWL_RATE_COUNT, | 77 | IWL_RATE_INVM_INDEX = IWL_RATE_COUNT, |
66 | IWL_RATE_INVALID = IWL_RATE_COUNT, | 78 | IWL_RATE_INVALID = IWL_RATE_COUNT, |
67 | }; | 79 | }; |
68 | 80 | ||
69 | enum { | 81 | enum { |
82 | IWL_RATE_6M_INDEX_TABLE = 0, | ||
83 | IWL_RATE_9M_INDEX_TABLE, | ||
84 | IWL_RATE_12M_INDEX_TABLE, | ||
85 | IWL_RATE_18M_INDEX_TABLE, | ||
86 | IWL_RATE_24M_INDEX_TABLE, | ||
87 | IWL_RATE_36M_INDEX_TABLE, | ||
88 | IWL_RATE_48M_INDEX_TABLE, | ||
89 | IWL_RATE_54M_INDEX_TABLE, | ||
90 | IWL_RATE_1M_INDEX_TABLE, | ||
91 | IWL_RATE_2M_INDEX_TABLE, | ||
92 | IWL_RATE_5M_INDEX_TABLE, | ||
93 | IWL_RATE_11M_INDEX_TABLE, | ||
94 | IWL_RATE_INVM_INDEX_TABLE = IWL_RATE_INVM_INDEX - 1, | ||
95 | }; | ||
96 | |||
97 | enum { | ||
70 | IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX, | 98 | IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX, |
99 | IWL39_LAST_OFDM_RATE = IWL_RATE_54M_INDEX, | ||
71 | IWL_LAST_OFDM_RATE = IWL_RATE_60M_INDEX, | 100 | IWL_LAST_OFDM_RATE = IWL_RATE_60M_INDEX, |
72 | IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX, | 101 | IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX, |
73 | IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX, | 102 | IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX, |
@@ -248,6 +277,7 @@ enum { | |||
248 | #define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y)) | 277 | #define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y)) |
249 | 278 | ||
250 | extern const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT]; | 279 | extern const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT]; |
280 | extern const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT_3945]; | ||
251 | 281 | ||
252 | enum iwl_table_type { | 282 | enum iwl_table_type { |
253 | LQ_NONE, | 283 | LQ_NONE, |
@@ -303,6 +333,23 @@ static inline u8 iwl_get_prev_ieee_rate(u8 rate_index) | |||
303 | return rate; | 333 | return rate; |
304 | } | 334 | } |
305 | 335 | ||
336 | static inline u8 iwl3945_get_prev_ieee_rate(u8 rate_index) | ||
337 | { | ||
338 | u8 rate = iwl3945_rates[rate_index].prev_ieee; | ||
339 | |||
340 | if (rate == IWL_RATE_INVALID) | ||
341 | rate = rate_index; | ||
342 | return rate; | ||
343 | } | ||
344 | |||
345 | /** | ||
346 | * iwl3945_rate_scale_init - Initialize the rate scale table based on assoc info | ||
347 | * | ||
348 | * The specific throughput table used is based on the type of network | ||
349 | * the associated with, including A, B, G, and G w/ TGG protection | ||
350 | */ | ||
351 | extern void iwl3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id); | ||
352 | |||
306 | /** | 353 | /** |
307 | * iwl_rate_control_register - Register the rate control algorithm callbacks | 354 | * iwl_rate_control_register - Register the rate control algorithm callbacks |
308 | * | 355 | * |
@@ -314,6 +361,7 @@ static inline u8 iwl_get_prev_ieee_rate(u8 rate_index) | |||
314 | * | 361 | * |
315 | */ | 362 | */ |
316 | extern int iwlagn_rate_control_register(void); | 363 | extern int iwlagn_rate_control_register(void); |
364 | extern int iwl3945_rate_control_register(void); | ||
317 | 365 | ||
318 | /** | 366 | /** |
319 | * iwl_rate_control_unregister - Unregister the rate control callbacks | 367 | * iwl_rate_control_unregister - Unregister the rate control callbacks |
@@ -322,5 +370,6 @@ extern int iwlagn_rate_control_register(void); | |||
322 | * the driver is unloaded. | 370 | * the driver is unloaded. |
323 | */ | 371 | */ |
324 | extern void iwlagn_rate_control_unregister(void); | 372 | extern void iwlagn_rate_control_unregister(void); |
373 | extern void iwl3945_rate_control_unregister(void); | ||
325 | 374 | ||
326 | #endif /* __iwl_agn__rs__ */ | 375 | #endif /* __iwl_agn__rs__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index b35c8813bef4..6b7120a41ab2 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -44,6 +44,8 @@ | |||
44 | 44 | ||
45 | #include <asm/div64.h> | 45 | #include <asm/div64.h> |
46 | 46 | ||
47 | #define DRV_NAME "iwlagn" | ||
48 | |||
47 | #include "iwl-eeprom.h" | 49 | #include "iwl-eeprom.h" |
48 | #include "iwl-dev.h" | 50 | #include "iwl-dev.h" |
49 | #include "iwl-core.h" | 51 | #include "iwl-core.h" |
@@ -61,9 +63,7 @@ | |||
61 | 63 | ||
62 | /* | 64 | /* |
63 | * module name, copyright, version, etc. | 65 | * module name, copyright, version, etc. |
64 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | ||
65 | */ | 66 | */ |
66 | |||
67 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" | 67 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" |
68 | 68 | ||
69 | #ifdef CONFIG_IWLWIFI_DEBUG | 69 | #ifdef CONFIG_IWLWIFI_DEBUG |
@@ -179,9 +179,9 @@ static int iwl_commit_rxon(struct iwl_priv *priv) | |||
179 | * 5000, but will not damage 4965 */ | 179 | * 5000, but will not damage 4965 */ |
180 | priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; | 180 | priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; |
181 | 181 | ||
182 | ret = iwl_agn_check_rxon_cmd(&priv->staging_rxon); | 182 | ret = iwl_agn_check_rxon_cmd(priv); |
183 | if (ret) { | 183 | if (ret) { |
184 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); | 184 | IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n"); |
185 | return -EINVAL; | 185 | return -EINVAL; |
186 | } | 186 | } |
187 | 187 | ||
@@ -191,7 +191,7 @@ static int iwl_commit_rxon(struct iwl_priv *priv) | |||
191 | if (!iwl_full_rxon_required(priv)) { | 191 | if (!iwl_full_rxon_required(priv)) { |
192 | ret = iwl_send_rxon_assoc(priv); | 192 | ret = iwl_send_rxon_assoc(priv); |
193 | if (ret) { | 193 | if (ret) { |
194 | IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret); | 194 | IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret); |
195 | return ret; | 195 | return ret; |
196 | } | 196 | } |
197 | 197 | ||
@@ -218,7 +218,7 @@ static int iwl_commit_rxon(struct iwl_priv *priv) | |||
218 | * active_rxon back to what it was previously */ | 218 | * active_rxon back to what it was previously */ |
219 | if (ret) { | 219 | if (ret) { |
220 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | 220 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; |
221 | IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret); | 221 | IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret); |
222 | return ret; | 222 | return ret; |
223 | } | 223 | } |
224 | } | 224 | } |
@@ -242,7 +242,7 @@ static int iwl_commit_rxon(struct iwl_priv *priv) | |||
242 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | 242 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, |
243 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); | 243 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); |
244 | if (ret) { | 244 | if (ret) { |
245 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | 245 | IWL_ERR(priv, "Error setting new RXON (%d)\n", ret); |
246 | return ret; | 246 | return ret; |
247 | } | 247 | } |
248 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | 248 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); |
@@ -256,7 +256,7 @@ static int iwl_commit_rxon(struct iwl_priv *priv) | |||
256 | /* Add the broadcast address so we can send broadcast frames */ | 256 | /* Add the broadcast address so we can send broadcast frames */ |
257 | if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == | 257 | if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == |
258 | IWL_INVALID_STATION) { | 258 | IWL_INVALID_STATION) { |
259 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); | 259 | IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n"); |
260 | return -EIO; | 260 | return -EIO; |
261 | } | 261 | } |
262 | 262 | ||
@@ -267,13 +267,15 @@ static int iwl_commit_rxon(struct iwl_priv *priv) | |||
267 | ret = iwl_rxon_add_station(priv, | 267 | ret = iwl_rxon_add_station(priv, |
268 | priv->active_rxon.bssid_addr, 1); | 268 | priv->active_rxon.bssid_addr, 1); |
269 | if (ret == IWL_INVALID_STATION) { | 269 | if (ret == IWL_INVALID_STATION) { |
270 | IWL_ERROR("Error adding AP address for TX.\n"); | 270 | IWL_ERR(priv, |
271 | "Error adding AP address for TX.\n"); | ||
271 | return -EIO; | 272 | return -EIO; |
272 | } | 273 | } |
273 | priv->assoc_station_added = 1; | 274 | priv->assoc_station_added = 1; |
274 | if (priv->default_wep_key && | 275 | if (priv->default_wep_key && |
275 | iwl_send_static_wepkey_cmd(priv, 0)) | 276 | iwl_send_static_wepkey_cmd(priv, 0)) |
276 | IWL_ERROR("Could not send WEP static key.\n"); | 277 | IWL_ERR(priv, |
278 | "Could not send WEP static key.\n"); | ||
277 | } | 279 | } |
278 | 280 | ||
279 | /* Apply the new configuration | 281 | /* Apply the new configuration |
@@ -282,7 +284,7 @@ static int iwl_commit_rxon(struct iwl_priv *priv) | |||
282 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | 284 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, |
283 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); | 285 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); |
284 | if (ret) { | 286 | if (ret) { |
285 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | 287 | IWL_ERR(priv, "Error setting new RXON (%d)\n", ret); |
286 | return ret; | 288 | return ret; |
287 | } | 289 | } |
288 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | 290 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); |
@@ -294,7 +296,7 @@ static int iwl_commit_rxon(struct iwl_priv *priv) | |||
294 | * send a new TXPOWER command or we won't be able to Tx any frames */ | 296 | * send a new TXPOWER command or we won't be able to Tx any frames */ |
295 | ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); | 297 | ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); |
296 | if (ret) { | 298 | if (ret) { |
297 | IWL_ERROR("Error sending TX power (%d)\n", ret); | 299 | IWL_ERR(priv, "Error sending TX power (%d)\n", ret); |
298 | return ret; | 300 | return ret; |
299 | } | 301 | } |
300 | 302 | ||
@@ -308,20 +310,6 @@ void iwl_update_chain_flags(struct iwl_priv *priv) | |||
308 | iwl_commit_rxon(priv); | 310 | iwl_commit_rxon(priv); |
309 | } | 311 | } |
310 | 312 | ||
311 | static int iwl_send_bt_config(struct iwl_priv *priv) | ||
312 | { | ||
313 | struct iwl_bt_cmd bt_cmd = { | ||
314 | .flags = 3, | ||
315 | .lead_time = 0xAA, | ||
316 | .max_kill = 1, | ||
317 | .kill_ack_mask = 0, | ||
318 | .kill_cts_mask = 0, | ||
319 | }; | ||
320 | |||
321 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, | ||
322 | sizeof(struct iwl_bt_cmd), &bt_cmd); | ||
323 | } | ||
324 | |||
325 | static void iwl_clear_free_frames(struct iwl_priv *priv) | 313 | static void iwl_clear_free_frames(struct iwl_priv *priv) |
326 | { | 314 | { |
327 | struct list_head *element; | 315 | struct list_head *element; |
@@ -337,7 +325,7 @@ static void iwl_clear_free_frames(struct iwl_priv *priv) | |||
337 | } | 325 | } |
338 | 326 | ||
339 | if (priv->frames_count) { | 327 | if (priv->frames_count) { |
340 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | 328 | IWL_WARN(priv, "%d frames still in use. Did we lose one?\n", |
341 | priv->frames_count); | 329 | priv->frames_count); |
342 | priv->frames_count = 0; | 330 | priv->frames_count = 0; |
343 | } | 331 | } |
@@ -350,7 +338,7 @@ static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv) | |||
350 | if (list_empty(&priv->free_frames)) { | 338 | if (list_empty(&priv->free_frames)) { |
351 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | 339 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); |
352 | if (!frame) { | 340 | if (!frame) { |
353 | IWL_ERROR("Could not allocate frame!\n"); | 341 | IWL_ERR(priv, "Could not allocate frame!\n"); |
354 | return NULL; | 342 | return NULL; |
355 | } | 343 | } |
356 | 344 | ||
@@ -452,7 +440,7 @@ static int iwl_send_beacon_cmd(struct iwl_priv *priv) | |||
452 | frame = iwl_get_free_frame(priv); | 440 | frame = iwl_get_free_frame(priv); |
453 | 441 | ||
454 | if (!frame) { | 442 | if (!frame) { |
455 | IWL_ERROR("Could not obtain free frame buffer for beacon " | 443 | IWL_ERR(priv, "Could not obtain free frame buffer for beacon " |
456 | "command.\n"); | 444 | "command.\n"); |
457 | return -ENOMEM; | 445 | return -ENOMEM; |
458 | } | 446 | } |
@@ -469,6 +457,159 @@ static int iwl_send_beacon_cmd(struct iwl_priv *priv) | |||
469 | return rc; | 457 | return rc; |
470 | } | 458 | } |
471 | 459 | ||
460 | static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx) | ||
461 | { | ||
462 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; | ||
463 | |||
464 | dma_addr_t addr = get_unaligned_le32(&tb->lo); | ||
465 | if (sizeof(dma_addr_t) > sizeof(u32)) | ||
466 | addr |= | ||
467 | ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16; | ||
468 | |||
469 | return addr; | ||
470 | } | ||
471 | |||
472 | static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx) | ||
473 | { | ||
474 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; | ||
475 | |||
476 | return le16_to_cpu(tb->hi_n_len) >> 4; | ||
477 | } | ||
478 | |||
479 | static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx, | ||
480 | dma_addr_t addr, u16 len) | ||
481 | { | ||
482 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; | ||
483 | u16 hi_n_len = len << 4; | ||
484 | |||
485 | put_unaligned_le32(addr, &tb->lo); | ||
486 | if (sizeof(dma_addr_t) > sizeof(u32)) | ||
487 | hi_n_len |= ((addr >> 16) >> 16) & 0xF; | ||
488 | |||
489 | tb->hi_n_len = cpu_to_le16(hi_n_len); | ||
490 | |||
491 | tfd->num_tbs = idx + 1; | ||
492 | } | ||
493 | |||
494 | static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd) | ||
495 | { | ||
496 | return tfd->num_tbs & 0x1f; | ||
497 | } | ||
498 | |||
499 | /** | ||
500 | * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr] | ||
501 | * @priv - driver private data | ||
502 | * @txq - tx queue | ||
503 | * | ||
504 | * Does NOT advance any TFD circular buffer read/write indexes | ||
505 | * Does NOT free the TFD itself (which is within circular buffer) | ||
506 | */ | ||
507 | void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq) | ||
508 | { | ||
509 | struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds; | ||
510 | struct iwl_tfd *tfd; | ||
511 | struct pci_dev *dev = priv->pci_dev; | ||
512 | int index = txq->q.read_ptr; | ||
513 | int i; | ||
514 | int num_tbs; | ||
515 | |||
516 | tfd = &tfd_tmp[index]; | ||
517 | |||
518 | /* Sanity check on number of chunks */ | ||
519 | num_tbs = iwl_tfd_get_num_tbs(tfd); | ||
520 | |||
521 | if (num_tbs >= IWL_NUM_OF_TBS) { | ||
522 | IWL_ERR(priv, "Too many chunks: %i\n", num_tbs); | ||
523 | /* @todo issue fatal error, it is quite serious situation */ | ||
524 | return; | ||
525 | } | ||
526 | |||
527 | /* Unmap tx_cmd */ | ||
528 | if (num_tbs) | ||
529 | pci_unmap_single(dev, | ||
530 | pci_unmap_addr(&txq->cmd[index]->meta, mapping), | ||
531 | pci_unmap_len(&txq->cmd[index]->meta, len), | ||
532 | PCI_DMA_TODEVICE); | ||
533 | |||
534 | /* Unmap chunks, if any. */ | ||
535 | for (i = 1; i < num_tbs; i++) { | ||
536 | pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i), | ||
537 | iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE); | ||
538 | |||
539 | if (txq->txb) { | ||
540 | dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]); | ||
541 | txq->txb[txq->q.read_ptr].skb[i - 1] = NULL; | ||
542 | } | ||
543 | } | ||
544 | } | ||
545 | |||
546 | int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, | ||
547 | struct iwl_tx_queue *txq, | ||
548 | dma_addr_t addr, u16 len, | ||
549 | u8 reset, u8 pad) | ||
550 | { | ||
551 | struct iwl_queue *q; | ||
552 | struct iwl_tfd *tfd, *tfd_tmp; | ||
553 | u32 num_tbs; | ||
554 | |||
555 | q = &txq->q; | ||
556 | tfd_tmp = (struct iwl_tfd *)txq->tfds; | ||
557 | tfd = &tfd_tmp[q->write_ptr]; | ||
558 | |||
559 | if (reset) | ||
560 | memset(tfd, 0, sizeof(*tfd)); | ||
561 | |||
562 | num_tbs = iwl_tfd_get_num_tbs(tfd); | ||
563 | |||
564 | /* Each TFD can point to a maximum 20 Tx buffers */ | ||
565 | if (num_tbs >= IWL_NUM_OF_TBS) { | ||
566 | IWL_ERR(priv, "Error can not send more than %d chunks\n", | ||
567 | IWL_NUM_OF_TBS); | ||
568 | return -EINVAL; | ||
569 | } | ||
570 | |||
571 | BUG_ON(addr & ~DMA_BIT_MASK(36)); | ||
572 | if (unlikely(addr & ~IWL_TX_DMA_MASK)) | ||
573 | IWL_ERR(priv, "Unaligned address = %llx\n", | ||
574 | (unsigned long long)addr); | ||
575 | |||
576 | iwl_tfd_set_tb(tfd, num_tbs, addr, len); | ||
577 | |||
578 | return 0; | ||
579 | } | ||
580 | |||
581 | /* | ||
582 | * Tell nic where to find circular buffer of Tx Frame Descriptors for | ||
583 | * given Tx queue, and enable the DMA channel used for that queue. | ||
584 | * | ||
585 | * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA | ||
586 | * channels supported in hardware. | ||
587 | */ | ||
588 | int iwl_hw_tx_queue_init(struct iwl_priv *priv, | ||
589 | struct iwl_tx_queue *txq) | ||
590 | { | ||
591 | int ret; | ||
592 | unsigned long flags; | ||
593 | int txq_id = txq->q.id; | ||
594 | |||
595 | spin_lock_irqsave(&priv->lock, flags); | ||
596 | ret = iwl_grab_nic_access(priv); | ||
597 | if (ret) { | ||
598 | spin_unlock_irqrestore(&priv->lock, flags); | ||
599 | return ret; | ||
600 | } | ||
601 | |||
602 | /* Circular buffer (TFD queue in DRAM) physical base address */ | ||
603 | iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id), | ||
604 | txq->q.dma_addr >> 8); | ||
605 | |||
606 | iwl_release_nic_access(priv); | ||
607 | spin_unlock_irqrestore(&priv->lock, flags); | ||
608 | |||
609 | return 0; | ||
610 | } | ||
611 | |||
612 | |||
472 | /****************************************************************************** | 613 | /****************************************************************************** |
473 | * | 614 | * |
474 | * Misc. internal state and helper functions | 615 | * Misc. internal state and helper functions |
@@ -520,9 +661,9 @@ static void iwl_ht_conf(struct iwl_priv *priv, | |||
520 | */ | 661 | */ |
521 | 662 | ||
522 | iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE; | 663 | iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE; |
523 | if (priv->hw->conf.ht.channel_type == NL80211_CHAN_HT40MINUS) | 664 | if (conf_is_ht40_minus(&priv->hw->conf)) |
524 | iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW; | 665 | iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW; |
525 | else if(priv->hw->conf.ht.channel_type == NL80211_CHAN_HT40PLUS) | 666 | else if (conf_is_ht40_plus(&priv->hw->conf)) |
526 | iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE; | 667 | iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE; |
527 | 668 | ||
528 | /* If no above or below channel supplied disable FAT channel */ | 669 | /* If no above or below channel supplied disable FAT channel */ |
@@ -686,7 +827,7 @@ static void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode) | |||
686 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | 827 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; |
687 | break; | 828 | break; |
688 | default: | 829 | default: |
689 | IWL_ERROR("Unsupported interface type %d\n", mode); | 830 | IWL_ERR(priv, "Unsupported interface type %d\n", mode); |
690 | break; | 831 | break; |
691 | } | 832 | } |
692 | 833 | ||
@@ -745,7 +886,7 @@ static int iwl_set_mode(struct iwl_priv *priv, int mode) | |||
745 | 886 | ||
746 | cancel_delayed_work(&priv->scan_check); | 887 | cancel_delayed_work(&priv->scan_check); |
747 | if (iwl_scan_cancel_timeout(priv, 100)) { | 888 | if (iwl_scan_cancel_timeout(priv, 100)) { |
748 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); | 889 | IWL_WARN(priv, "Aborted scan still in progress after 100ms\n"); |
749 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | 890 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); |
750 | return -EAGAIN; | 891 | return -EAGAIN; |
751 | } | 892 | } |
@@ -763,7 +904,7 @@ static void iwl_set_rate(struct iwl_priv *priv) | |||
763 | 904 | ||
764 | hw = iwl_get_hw_mode(priv, priv->band); | 905 | hw = iwl_get_hw_mode(priv, priv->band); |
765 | if (!hw) { | 906 | if (!hw) { |
766 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | 907 | IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n"); |
767 | return; | 908 | return; |
768 | } | 909 | } |
769 | 910 | ||
@@ -841,7 +982,7 @@ static void iwl_rx_reply_alive(struct iwl_priv *priv, | |||
841 | queue_delayed_work(priv->workqueue, pwork, | 982 | queue_delayed_work(priv->workqueue, pwork, |
842 | msecs_to_jiffies(5)); | 983 | msecs_to_jiffies(5)); |
843 | else | 984 | else |
844 | IWL_WARNING("uCode did not respond OK.\n"); | 985 | IWL_WARN(priv, "uCode did not respond OK.\n"); |
845 | } | 986 | } |
846 | 987 | ||
847 | static void iwl_rx_reply_error(struct iwl_priv *priv, | 988 | static void iwl_rx_reply_error(struct iwl_priv *priv, |
@@ -849,7 +990,7 @@ static void iwl_rx_reply_error(struct iwl_priv *priv, | |||
849 | { | 990 | { |
850 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; | 991 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
851 | 992 | ||
852 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | 993 | IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) " |
853 | "seq 0x%04X ser 0x%08X\n", | 994 | "seq 0x%04X ser 0x%08X\n", |
854 | le32_to_cpu(pkt->u.err_resp.error_type), | 995 | le32_to_cpu(pkt->u.err_resp.error_type), |
855 | get_cmd_string(pkt->u.err_resp.cmd_id), | 996 | get_cmd_string(pkt->u.err_resp.cmd_id), |
@@ -902,7 +1043,7 @@ static void iwl_bg_beacon_update(struct work_struct *work) | |||
902 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); | 1043 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); |
903 | 1044 | ||
904 | if (!beacon) { | 1045 | if (!beacon) { |
905 | IWL_ERROR("update beacon failed\n"); | 1046 | IWL_ERR(priv, "update beacon failed\n"); |
906 | return; | 1047 | return; |
907 | } | 1048 | } |
908 | 1049 | ||
@@ -1193,7 +1334,7 @@ void iwl_rx_handle(struct iwl_priv *priv) | |||
1193 | if (rxb && rxb->skb) | 1334 | if (rxb && rxb->skb) |
1194 | iwl_tx_cmd_complete(priv, rxb); | 1335 | iwl_tx_cmd_complete(priv, rxb); |
1195 | else | 1336 | else |
1196 | IWL_WARNING("Claim null rxb?\n"); | 1337 | IWL_WARN(priv, "Claim null rxb?\n"); |
1197 | } | 1338 | } |
1198 | 1339 | ||
1199 | /* For now we just don't re-use anything. We can tweak this | 1340 | /* For now we just don't re-use anything. We can tweak this |
@@ -1357,7 +1498,7 @@ static void iwl_irq_tasklet(struct iwl_priv *priv) | |||
1357 | 1498 | ||
1358 | /* Now service all interrupt bits discovered above. */ | 1499 | /* Now service all interrupt bits discovered above. */ |
1359 | if (inta & CSR_INT_BIT_HW_ERR) { | 1500 | if (inta & CSR_INT_BIT_HW_ERR) { |
1360 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | 1501 | IWL_ERR(priv, "Microcode HW error detected. Restarting.\n"); |
1361 | 1502 | ||
1362 | /* Tell the device to stop sending interrupts */ | 1503 | /* Tell the device to stop sending interrupts */ |
1363 | iwl_disable_interrupts(priv); | 1504 | iwl_disable_interrupts(priv); |
@@ -1397,13 +1538,16 @@ static void iwl_irq_tasklet(struct iwl_priv *priv) | |||
1397 | hw_rf_kill ? "disable radio" : "enable radio"); | 1538 | hw_rf_kill ? "disable radio" : "enable radio"); |
1398 | 1539 | ||
1399 | /* driver only loads ucode once setting the interface up. | 1540 | /* driver only loads ucode once setting the interface up. |
1400 | * the driver as well won't allow loading if RFKILL is set | 1541 | * the driver allows loading the ucode even if the radio |
1401 | * therefore no need to restart the driver from this handler | 1542 | * is killed. Hence update the killswitch state here. The |
1543 | * rfkill handler will care about restarting if needed. | ||
1402 | */ | 1544 | */ |
1403 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) { | 1545 | if (!test_bit(STATUS_ALIVE, &priv->status)) { |
1404 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | 1546 | if (hw_rf_kill) |
1405 | if (priv->is_open && !iwl_is_rfkill(priv)) | 1547 | set_bit(STATUS_RF_KILL_HW, &priv->status); |
1406 | queue_work(priv->workqueue, &priv->up); | 1548 | else |
1549 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | ||
1550 | queue_work(priv->workqueue, &priv->rf_kill); | ||
1407 | } | 1551 | } |
1408 | 1552 | ||
1409 | handled |= CSR_INT_BIT_RF_KILL; | 1553 | handled |= CSR_INT_BIT_RF_KILL; |
@@ -1411,14 +1555,14 @@ static void iwl_irq_tasklet(struct iwl_priv *priv) | |||
1411 | 1555 | ||
1412 | /* Chip got too hot and stopped itself */ | 1556 | /* Chip got too hot and stopped itself */ |
1413 | if (inta & CSR_INT_BIT_CT_KILL) { | 1557 | if (inta & CSR_INT_BIT_CT_KILL) { |
1414 | IWL_ERROR("Microcode CT kill error detected.\n"); | 1558 | IWL_ERR(priv, "Microcode CT kill error detected.\n"); |
1415 | handled |= CSR_INT_BIT_CT_KILL; | 1559 | handled |= CSR_INT_BIT_CT_KILL; |
1416 | } | 1560 | } |
1417 | 1561 | ||
1418 | /* Error detected by uCode */ | 1562 | /* Error detected by uCode */ |
1419 | if (inta & CSR_INT_BIT_SW_ERR) { | 1563 | if (inta & CSR_INT_BIT_SW_ERR) { |
1420 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | 1564 | IWL_ERR(priv, "Microcode SW error detected. " |
1421 | inta); | 1565 | " Restarting 0x%X.\n", inta); |
1422 | iwl_irq_handle_error(priv); | 1566 | iwl_irq_handle_error(priv); |
1423 | handled |= CSR_INT_BIT_SW_ERR; | 1567 | handled |= CSR_INT_BIT_SW_ERR; |
1424 | } | 1568 | } |
@@ -1454,12 +1598,12 @@ static void iwl_irq_tasklet(struct iwl_priv *priv) | |||
1454 | } | 1598 | } |
1455 | 1599 | ||
1456 | if (inta & ~handled) | 1600 | if (inta & ~handled) |
1457 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | 1601 | IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled); |
1458 | 1602 | ||
1459 | if (inta & ~CSR_INI_SET_MASK) { | 1603 | if (inta & ~CSR_INI_SET_MASK) { |
1460 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | 1604 | IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n", |
1461 | inta & ~CSR_INI_SET_MASK); | 1605 | inta & ~CSR_INI_SET_MASK); |
1462 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | 1606 | IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh); |
1463 | } | 1607 | } |
1464 | 1608 | ||
1465 | /* Re-enable all interrupts */ | 1609 | /* Re-enable all interrupts */ |
@@ -1511,7 +1655,7 @@ static irqreturn_t iwl_isr(int irq, void *data) | |||
1511 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | 1655 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { |
1512 | /* Hardware disappeared. It might have already raised | 1656 | /* Hardware disappeared. It might have already raised |
1513 | * an interrupt */ | 1657 | * an interrupt */ |
1514 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta); | 1658 | IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta); |
1515 | goto unplugged; | 1659 | goto unplugged; |
1516 | } | 1660 | } |
1517 | 1661 | ||
@@ -1584,7 +1728,7 @@ static int iwl_read_ucode(struct iwl_priv *priv) | |||
1584 | sprintf(buf, "%s%d%s", name_pre, index, ".ucode"); | 1728 | sprintf(buf, "%s%d%s", name_pre, index, ".ucode"); |
1585 | ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev); | 1729 | ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev); |
1586 | if (ret < 0) { | 1730 | if (ret < 0) { |
1587 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | 1731 | IWL_ERR(priv, "%s firmware file req failed: %d\n", |
1588 | buf, ret); | 1732 | buf, ret); |
1589 | if (ret == -ENOENT) | 1733 | if (ret == -ENOENT) |
1590 | continue; | 1734 | continue; |
@@ -1592,8 +1736,11 @@ static int iwl_read_ucode(struct iwl_priv *priv) | |||
1592 | goto error; | 1736 | goto error; |
1593 | } else { | 1737 | } else { |
1594 | if (index < api_max) | 1738 | if (index < api_max) |
1595 | IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n", | 1739 | IWL_ERR(priv, "Loaded firmware %s, " |
1740 | "which is deprecated. " | ||
1741 | "Please use API v%u instead.\n", | ||
1596 | buf, api_max); | 1742 | buf, api_max); |
1743 | |||
1597 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | 1744 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", |
1598 | buf, ucode_raw->size); | 1745 | buf, ucode_raw->size); |
1599 | break; | 1746 | break; |
@@ -1605,7 +1752,7 @@ static int iwl_read_ucode(struct iwl_priv *priv) | |||
1605 | 1752 | ||
1606 | /* Make sure that we got at least our header! */ | 1753 | /* Make sure that we got at least our header! */ |
1607 | if (ucode_raw->size < sizeof(*ucode)) { | 1754 | if (ucode_raw->size < sizeof(*ucode)) { |
1608 | IWL_ERROR("File size way too small!\n"); | 1755 | IWL_ERR(priv, "File size way too small!\n"); |
1609 | ret = -EINVAL; | 1756 | ret = -EINVAL; |
1610 | goto err_release; | 1757 | goto err_release; |
1611 | } | 1758 | } |
@@ -1626,7 +1773,7 @@ static int iwl_read_ucode(struct iwl_priv *priv) | |||
1626 | * on the API version read from firware header from here on forward */ | 1773 | * on the API version read from firware header from here on forward */ |
1627 | 1774 | ||
1628 | if (api_ver < api_min || api_ver > api_max) { | 1775 | if (api_ver < api_min || api_ver > api_max) { |
1629 | IWL_ERROR("Driver unable to support your firmware API. " | 1776 | IWL_ERR(priv, "Driver unable to support your firmware API. " |
1630 | "Driver supports v%u, firmware is v%u.\n", | 1777 | "Driver supports v%u, firmware is v%u.\n", |
1631 | api_max, api_ver); | 1778 | api_max, api_ver); |
1632 | priv->ucode_ver = 0; | 1779 | priv->ucode_ver = 0; |
@@ -1634,16 +1781,16 @@ static int iwl_read_ucode(struct iwl_priv *priv) | |||
1634 | goto err_release; | 1781 | goto err_release; |
1635 | } | 1782 | } |
1636 | if (api_ver != api_max) | 1783 | if (api_ver != api_max) |
1637 | IWL_ERROR("Firmware has old API version. Expected v%u, " | 1784 | IWL_ERR(priv, "Firmware has old API version. Expected v%u, " |
1638 | "got v%u. New firmware can be obtained " | 1785 | "got v%u. New firmware can be obtained " |
1639 | "from http://www.intellinuxwireless.org.\n", | 1786 | "from http://www.intellinuxwireless.org.\n", |
1640 | api_max, api_ver); | 1787 | api_max, api_ver); |
1641 | 1788 | ||
1642 | printk(KERN_INFO DRV_NAME " loaded firmware version %u.%u.%u.%u\n", | 1789 | IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n", |
1643 | IWL_UCODE_MAJOR(priv->ucode_ver), | 1790 | IWL_UCODE_MAJOR(priv->ucode_ver), |
1644 | IWL_UCODE_MINOR(priv->ucode_ver), | 1791 | IWL_UCODE_MINOR(priv->ucode_ver), |
1645 | IWL_UCODE_API(priv->ucode_ver), | 1792 | IWL_UCODE_API(priv->ucode_ver), |
1646 | IWL_UCODE_SERIAL(priv->ucode_ver)); | 1793 | IWL_UCODE_SERIAL(priv->ucode_ver)); |
1647 | 1794 | ||
1648 | IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n", | 1795 | IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n", |
1649 | priv->ucode_ver); | 1796 | priv->ucode_ver); |
@@ -1791,7 +1938,7 @@ static int iwl_read_ucode(struct iwl_priv *priv) | |||
1791 | return 0; | 1938 | return 0; |
1792 | 1939 | ||
1793 | err_pci_alloc: | 1940 | err_pci_alloc: |
1794 | IWL_ERROR("failed to allocate pci memory\n"); | 1941 | IWL_ERR(priv, "failed to allocate pci memory\n"); |
1795 | ret = -ENOMEM; | 1942 | ret = -ENOMEM; |
1796 | iwl_dealloc_ucode_pci(priv); | 1943 | iwl_dealloc_ucode_pci(priv); |
1797 | 1944 | ||
@@ -1837,8 +1984,8 @@ static void iwl_alive_start(struct iwl_priv *priv) | |||
1837 | iwl_clear_stations_table(priv); | 1984 | iwl_clear_stations_table(priv); |
1838 | ret = priv->cfg->ops->lib->alive_notify(priv); | 1985 | ret = priv->cfg->ops->lib->alive_notify(priv); |
1839 | if (ret) { | 1986 | if (ret) { |
1840 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", | 1987 | IWL_WARN(priv, |
1841 | ret); | 1988 | "Could not complete ALIVE transition [ntf]: %d\n", ret); |
1842 | goto restart; | 1989 | goto restart; |
1843 | } | 1990 | } |
1844 | 1991 | ||
@@ -2024,12 +2171,12 @@ static int __iwl_up(struct iwl_priv *priv) | |||
2024 | int ret; | 2171 | int ret; |
2025 | 2172 | ||
2026 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | 2173 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { |
2027 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | 2174 | IWL_WARN(priv, "Exit pending; will not bring the NIC up\n"); |
2028 | return -EIO; | 2175 | return -EIO; |
2029 | } | 2176 | } |
2030 | 2177 | ||
2031 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { | 2178 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
2032 | IWL_ERROR("ucode not available for device bringup\n"); | 2179 | IWL_ERR(priv, "ucode not available for device bringup\n"); |
2033 | return -EIO; | 2180 | return -EIO; |
2034 | } | 2181 | } |
2035 | 2182 | ||
@@ -2041,7 +2188,7 @@ static int __iwl_up(struct iwl_priv *priv) | |||
2041 | 2188 | ||
2042 | if (iwl_is_rfkill(priv)) { | 2189 | if (iwl_is_rfkill(priv)) { |
2043 | iwl_enable_interrupts(priv); | 2190 | iwl_enable_interrupts(priv); |
2044 | IWL_WARNING("Radio disabled by %s RF Kill switch\n", | 2191 | IWL_WARN(priv, "Radio disabled by %s RF Kill switch\n", |
2045 | test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW"); | 2192 | test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW"); |
2046 | return 0; | 2193 | return 0; |
2047 | } | 2194 | } |
@@ -2050,7 +2197,7 @@ static int __iwl_up(struct iwl_priv *priv) | |||
2050 | 2197 | ||
2051 | ret = iwl_hw_nic_init(priv); | 2198 | ret = iwl_hw_nic_init(priv); |
2052 | if (ret) { | 2199 | if (ret) { |
2053 | IWL_ERROR("Unable to init nic\n"); | 2200 | IWL_ERR(priv, "Unable to init nic\n"); |
2054 | return ret; | 2201 | return ret; |
2055 | } | 2202 | } |
2056 | 2203 | ||
@@ -2083,7 +2230,8 @@ static int __iwl_up(struct iwl_priv *priv) | |||
2083 | ret = priv->cfg->ops->lib->load_ucode(priv); | 2230 | ret = priv->cfg->ops->lib->load_ucode(priv); |
2084 | 2231 | ||
2085 | if (ret) { | 2232 | if (ret) { |
2086 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | 2233 | IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n", |
2234 | ret); | ||
2087 | continue; | 2235 | continue; |
2088 | } | 2236 | } |
2089 | 2237 | ||
@@ -2104,7 +2252,7 @@ static int __iwl_up(struct iwl_priv *priv) | |||
2104 | 2252 | ||
2105 | /* tried to restart and config the device for as long as our | 2253 | /* tried to restart and config the device for as long as our |
2106 | * patience could withstand */ | 2254 | * patience could withstand */ |
2107 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | 2255 | IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i); |
2108 | return -EIO; | 2256 | return -EIO; |
2109 | } | 2257 | } |
2110 | 2258 | ||
@@ -2141,40 +2289,6 @@ static void iwl_bg_alive_start(struct work_struct *data) | |||
2141 | mutex_unlock(&priv->mutex); | 2289 | mutex_unlock(&priv->mutex); |
2142 | } | 2290 | } |
2143 | 2291 | ||
2144 | static void iwl_bg_rf_kill(struct work_struct *work) | ||
2145 | { | ||
2146 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); | ||
2147 | |||
2148 | wake_up_interruptible(&priv->wait_command_queue); | ||
2149 | |||
2150 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
2151 | return; | ||
2152 | |||
2153 | mutex_lock(&priv->mutex); | ||
2154 | |||
2155 | if (!iwl_is_rfkill(priv)) { | ||
2156 | IWL_DEBUG(IWL_DL_RF_KILL, | ||
2157 | "HW and/or SW RF Kill no longer active, restarting " | ||
2158 | "device\n"); | ||
2159 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
2160 | queue_work(priv->workqueue, &priv->restart); | ||
2161 | } else { | ||
2162 | /* make sure mac80211 stop sending Tx frame */ | ||
2163 | if (priv->mac80211_registered) | ||
2164 | ieee80211_stop_queues(priv->hw); | ||
2165 | |||
2166 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | ||
2167 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | ||
2168 | "disabled by SW switch\n"); | ||
2169 | else | ||
2170 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | ||
2171 | "Kill switch must be turned off for " | ||
2172 | "wireless networking to work.\n"); | ||
2173 | } | ||
2174 | mutex_unlock(&priv->mutex); | ||
2175 | iwl_rfkill_set_hw_state(priv); | ||
2176 | } | ||
2177 | |||
2178 | static void iwl_bg_run_time_calib_work(struct work_struct *work) | 2292 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
2179 | { | 2293 | { |
2180 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | 2294 | struct iwl_priv *priv = container_of(work, struct iwl_priv, |
@@ -2244,7 +2358,7 @@ static void iwl_post_associate(struct iwl_priv *priv) | |||
2244 | unsigned long flags; | 2358 | unsigned long flags; |
2245 | 2359 | ||
2246 | if (priv->iw_mode == NL80211_IFTYPE_AP) { | 2360 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
2247 | IWL_ERROR("%s Should not be called in AP mode\n", __func__); | 2361 | IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__); |
2248 | return; | 2362 | return; |
2249 | } | 2363 | } |
2250 | 2364 | ||
@@ -2271,7 +2385,7 @@ static void iwl_post_associate(struct iwl_priv *priv) | |||
2271 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, | 2385 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
2272 | sizeof(priv->rxon_timing), &priv->rxon_timing); | 2386 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
2273 | if (ret) | 2387 | if (ret) |
2274 | IWL_WARNING("REPLY_RXON_TIMING failed - " | 2388 | IWL_WARN(priv, "REPLY_RXON_TIMING failed - " |
2275 | "Attempting to continue.\n"); | 2389 | "Attempting to continue.\n"); |
2276 | 2390 | ||
2277 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | 2391 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; |
@@ -2317,7 +2431,7 @@ static void iwl_post_associate(struct iwl_priv *priv) | |||
2317 | break; | 2431 | break; |
2318 | 2432 | ||
2319 | default: | 2433 | default: |
2320 | IWL_ERROR("%s Should not be called in %d mode\n", | 2434 | IWL_ERR(priv, "%s Should not be called in %d mode\n", |
2321 | __func__, priv->iw_mode); | 2435 | __func__, priv->iw_mode); |
2322 | break; | 2436 | break; |
2323 | } | 2437 | } |
@@ -2353,31 +2467,9 @@ static int iwl_mac_start(struct ieee80211_hw *hw) | |||
2353 | { | 2467 | { |
2354 | struct iwl_priv *priv = hw->priv; | 2468 | struct iwl_priv *priv = hw->priv; |
2355 | int ret; | 2469 | int ret; |
2356 | u16 pci_cmd; | ||
2357 | 2470 | ||
2358 | IWL_DEBUG_MAC80211("enter\n"); | 2471 | IWL_DEBUG_MAC80211("enter\n"); |
2359 | 2472 | ||
2360 | if (pci_enable_device(priv->pci_dev)) { | ||
2361 | IWL_ERROR("Fail to pci_enable_device\n"); | ||
2362 | return -ENODEV; | ||
2363 | } | ||
2364 | pci_restore_state(priv->pci_dev); | ||
2365 | pci_enable_msi(priv->pci_dev); | ||
2366 | |||
2367 | /* enable interrupts if needed: hw bug w/a */ | ||
2368 | pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd); | ||
2369 | if (pci_cmd & PCI_COMMAND_INTX_DISABLE) { | ||
2370 | pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; | ||
2371 | pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd); | ||
2372 | } | ||
2373 | |||
2374 | ret = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED, | ||
2375 | DRV_NAME, priv); | ||
2376 | if (ret) { | ||
2377 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | ||
2378 | goto out_disable_msi; | ||
2379 | } | ||
2380 | |||
2381 | /* we should be verifying the device is ready to be opened */ | 2473 | /* we should be verifying the device is ready to be opened */ |
2382 | mutex_lock(&priv->mutex); | 2474 | mutex_lock(&priv->mutex); |
2383 | 2475 | ||
@@ -2388,9 +2480,9 @@ static int iwl_mac_start(struct ieee80211_hw *hw) | |||
2388 | if (!priv->ucode_code.len) { | 2480 | if (!priv->ucode_code.len) { |
2389 | ret = iwl_read_ucode(priv); | 2481 | ret = iwl_read_ucode(priv); |
2390 | if (ret) { | 2482 | if (ret) { |
2391 | IWL_ERROR("Could not read microcode: %d\n", ret); | 2483 | IWL_ERR(priv, "Could not read microcode: %d\n", ret); |
2392 | mutex_unlock(&priv->mutex); | 2484 | mutex_unlock(&priv->mutex); |
2393 | goto out_release_irq; | 2485 | return ret; |
2394 | } | 2486 | } |
2395 | } | 2487 | } |
2396 | 2488 | ||
@@ -2401,7 +2493,7 @@ static int iwl_mac_start(struct ieee80211_hw *hw) | |||
2401 | iwl_rfkill_set_hw_state(priv); | 2493 | iwl_rfkill_set_hw_state(priv); |
2402 | 2494 | ||
2403 | if (ret) | 2495 | if (ret) |
2404 | goto out_release_irq; | 2496 | return ret; |
2405 | 2497 | ||
2406 | if (iwl_is_rfkill(priv)) | 2498 | if (iwl_is_rfkill(priv)) |
2407 | goto out; | 2499 | goto out; |
@@ -2418,10 +2510,9 @@ static int iwl_mac_start(struct ieee80211_hw *hw) | |||
2418 | UCODE_READY_TIMEOUT); | 2510 | UCODE_READY_TIMEOUT); |
2419 | if (!ret) { | 2511 | if (!ret) { |
2420 | if (!test_bit(STATUS_READY, &priv->status)) { | 2512 | if (!test_bit(STATUS_READY, &priv->status)) { |
2421 | IWL_ERROR("START_ALIVE timeout after %dms.\n", | 2513 | IWL_ERR(priv, "START_ALIVE timeout after %dms.\n", |
2422 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | 2514 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); |
2423 | ret = -ETIMEDOUT; | 2515 | return -ETIMEDOUT; |
2424 | goto out_release_irq; | ||
2425 | } | 2516 | } |
2426 | } | 2517 | } |
2427 | 2518 | ||
@@ -2429,15 +2520,6 @@ out: | |||
2429 | priv->is_open = 1; | 2520 | priv->is_open = 1; |
2430 | IWL_DEBUG_MAC80211("leave\n"); | 2521 | IWL_DEBUG_MAC80211("leave\n"); |
2431 | return 0; | 2522 | return 0; |
2432 | |||
2433 | out_release_irq: | ||
2434 | free_irq(priv->pci_dev->irq, priv); | ||
2435 | out_disable_msi: | ||
2436 | pci_disable_msi(priv->pci_dev); | ||
2437 | pci_disable_device(priv->pci_dev); | ||
2438 | priv->is_open = 0; | ||
2439 | IWL_DEBUG_MAC80211("leave - failed\n"); | ||
2440 | return ret; | ||
2441 | } | 2523 | } |
2442 | 2524 | ||
2443 | static void iwl_mac_stop(struct ieee80211_hw *hw) | 2525 | static void iwl_mac_stop(struct ieee80211_hw *hw) |
@@ -2465,10 +2547,10 @@ static void iwl_mac_stop(struct ieee80211_hw *hw) | |||
2465 | iwl_down(priv); | 2547 | iwl_down(priv); |
2466 | 2548 | ||
2467 | flush_workqueue(priv->workqueue); | 2549 | flush_workqueue(priv->workqueue); |
2468 | free_irq(priv->pci_dev->irq, priv); | 2550 | |
2469 | pci_disable_msi(priv->pci_dev); | 2551 | /* enable interrupts again in order to receive rfkill changes */ |
2470 | pci_save_state(priv->pci_dev); | 2552 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
2471 | pci_disable_device(priv->pci_dev); | 2553 | iwl_enable_interrupts(priv); |
2472 | 2554 | ||
2473 | IWL_DEBUG_MAC80211("leave\n"); | 2555 | IWL_DEBUG_MAC80211("leave\n"); |
2474 | } | 2556 | } |
@@ -2544,7 +2626,7 @@ static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
2544 | mutex_lock(&priv->mutex); | 2626 | mutex_lock(&priv->mutex); |
2545 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); | 2627 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
2546 | 2628 | ||
2547 | priv->current_ht_config.is_ht = conf->ht.enabled; | 2629 | priv->current_ht_config.is_ht = conf_is_ht(conf); |
2548 | 2630 | ||
2549 | if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) { | 2631 | if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) { |
2550 | IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n"); | 2632 | IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n"); |
@@ -2577,7 +2659,7 @@ static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
2577 | 2659 | ||
2578 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC && | 2660 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC && |
2579 | !is_channel_ibss(ch_info)) { | 2661 | !is_channel_ibss(ch_info)) { |
2580 | IWL_ERROR("channel %d in band %d not IBSS channel\n", | 2662 | IWL_ERR(priv, "channel %d in band %d not IBSS channel\n", |
2581 | conf->channel->hw_value, conf->channel->band); | 2663 | conf->channel->hw_value, conf->channel->band); |
2582 | ret = -EINVAL; | 2664 | ret = -EINVAL; |
2583 | goto out; | 2665 | goto out; |
@@ -2639,6 +2721,9 @@ static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
2639 | 2721 | ||
2640 | iwl_set_rate(priv); | 2722 | iwl_set_rate(priv); |
2641 | 2723 | ||
2724 | /* call to ensure that 4965 rx_chain is set properly in monitor mode */ | ||
2725 | iwl_set_rxon_chain(priv); | ||
2726 | |||
2642 | if (memcmp(&priv->active_rxon, | 2727 | if (memcmp(&priv->active_rxon, |
2643 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | 2728 | &priv->staging_rxon, sizeof(priv->staging_rxon))) |
2644 | iwl_commit_rxon(priv); | 2729 | iwl_commit_rxon(priv); |
@@ -2672,7 +2757,7 @@ static void iwl_config_ap(struct iwl_priv *priv) | |||
2672 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, | 2757 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
2673 | sizeof(priv->rxon_timing), &priv->rxon_timing); | 2758 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
2674 | if (ret) | 2759 | if (ret) |
2675 | IWL_WARNING("REPLY_RXON_TIMING failed - " | 2760 | IWL_WARN(priv, "REPLY_RXON_TIMING failed - " |
2676 | "Attempting to continue.\n"); | 2761 | "Attempting to continue.\n"); |
2677 | 2762 | ||
2678 | iwl_set_rxon_chain(priv); | 2763 | iwl_set_rxon_chain(priv); |
@@ -2778,7 +2863,7 @@ static int iwl_mac_config_interface(struct ieee80211_hw *hw, | |||
2778 | /* If there is currently a HW scan going on in the background | 2863 | /* If there is currently a HW scan going on in the background |
2779 | * then we need to cancel it else the RXON below will fail. */ | 2864 | * then we need to cancel it else the RXON below will fail. */ |
2780 | if (iwl_scan_cancel_timeout(priv, 100)) { | 2865 | if (iwl_scan_cancel_timeout(priv, 100)) { |
2781 | IWL_WARNING("Aborted scan still in progress " | 2866 | IWL_WARN(priv, "Aborted scan still in progress " |
2782 | "after 100ms\n"); | 2867 | "after 100ms\n"); |
2783 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | 2868 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); |
2784 | mutex_unlock(&priv->mutex); | 2869 | mutex_unlock(&priv->mutex); |
@@ -3019,13 +3104,15 @@ static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw, | |||
3019 | } | 3104 | } |
3020 | 3105 | ||
3021 | static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | 3106 | static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
3022 | const u8 *local_addr, const u8 *addr, | 3107 | struct ieee80211_vif *vif, |
3108 | struct ieee80211_sta *sta, | ||
3023 | struct ieee80211_key_conf *key) | 3109 | struct ieee80211_key_conf *key) |
3024 | { | 3110 | { |
3025 | struct iwl_priv *priv = hw->priv; | 3111 | struct iwl_priv *priv = hw->priv; |
3026 | int ret = 0; | 3112 | const u8 *addr; |
3027 | u8 sta_id = IWL_INVALID_STATION; | 3113 | int ret; |
3028 | u8 is_default_wep_key = 0; | 3114 | u8 sta_id; |
3115 | bool is_default_wep_key = false; | ||
3029 | 3116 | ||
3030 | IWL_DEBUG_MAC80211("enter\n"); | 3117 | IWL_DEBUG_MAC80211("enter\n"); |
3031 | 3118 | ||
@@ -3033,11 +3120,7 @@ static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
3033 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); | 3120 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
3034 | return -EOPNOTSUPP; | 3121 | return -EOPNOTSUPP; |
3035 | } | 3122 | } |
3036 | 3123 | addr = sta ? sta->addr : iwl_bcast_addr; | |
3037 | if (is_zero_ether_addr(addr)) | ||
3038 | /* only support pairwise keys */ | ||
3039 | return -EOPNOTSUPP; | ||
3040 | |||
3041 | sta_id = iwl_find_station(priv, addr); | 3124 | sta_id = iwl_find_station(priv, addr); |
3042 | if (sta_id == IWL_INVALID_STATION) { | 3125 | if (sta_id == IWL_INVALID_STATION) { |
3043 | IWL_DEBUG_MAC80211("leave - %pM not in station map.\n", | 3126 | IWL_DEBUG_MAC80211("leave - %pM not in station map.\n", |
@@ -3359,8 +3442,7 @@ static ssize_t store_debug_level(struct device *d, | |||
3359 | 3442 | ||
3360 | ret = strict_strtoul(buf, 0, &val); | 3443 | ret = strict_strtoul(buf, 0, &val); |
3361 | if (ret) | 3444 | if (ret) |
3362 | printk(KERN_INFO DRV_NAME | 3445 | IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf); |
3363 | ": %s is not in hex or decimal form.\n", buf); | ||
3364 | else | 3446 | else |
3365 | priv->debug_level = val; | 3447 | priv->debug_level = val; |
3366 | 3448 | ||
@@ -3439,8 +3521,7 @@ static ssize_t store_tx_power(struct device *d, | |||
3439 | 3521 | ||
3440 | ret = strict_strtoul(buf, 10, &val); | 3522 | ret = strict_strtoul(buf, 10, &val); |
3441 | if (ret) | 3523 | if (ret) |
3442 | printk(KERN_INFO DRV_NAME | 3524 | IWL_INFO(priv, "%s is not in decimal form.\n", buf); |
3443 | ": %s is not in decimal form.\n", buf); | ||
3444 | else | 3525 | else |
3445 | iwl_set_tx_power(priv, val, false); | 3526 | iwl_set_tx_power(priv, val, false); |
3446 | 3527 | ||
@@ -3473,7 +3554,7 @@ static ssize_t store_flags(struct device *d, | |||
3473 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | 3554 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { |
3474 | /* Cancel any currently running scans... */ | 3555 | /* Cancel any currently running scans... */ |
3475 | if (iwl_scan_cancel_timeout(priv, 100)) | 3556 | if (iwl_scan_cancel_timeout(priv, 100)) |
3476 | IWL_WARNING("Could not cancel scan.\n"); | 3557 | IWL_WARN(priv, "Could not cancel scan.\n"); |
3477 | else { | 3558 | else { |
3478 | IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags); | 3559 | IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags); |
3479 | priv->staging_rxon.flags = cpu_to_le32(flags); | 3560 | priv->staging_rxon.flags = cpu_to_le32(flags); |
@@ -3512,7 +3593,7 @@ static ssize_t store_filter_flags(struct device *d, | |||
3512 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | 3593 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { |
3513 | /* Cancel any currently running scans... */ | 3594 | /* Cancel any currently running scans... */ |
3514 | if (iwl_scan_cancel_timeout(priv, 100)) | 3595 | if (iwl_scan_cancel_timeout(priv, 100)) |
3515 | IWL_WARNING("Could not cancel scan.\n"); | 3596 | IWL_WARN(priv, "Could not cancel scan.\n"); |
3516 | else { | 3597 | else { |
3517 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | 3598 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " |
3518 | "0x%04X\n", filter_flags); | 3599 | "0x%04X\n", filter_flags); |
@@ -3529,31 +3610,6 @@ static ssize_t store_filter_flags(struct device *d, | |||
3529 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | 3610 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, |
3530 | store_filter_flags); | 3611 | store_filter_flags); |
3531 | 3612 | ||
3532 | static ssize_t store_retry_rate(struct device *d, | ||
3533 | struct device_attribute *attr, | ||
3534 | const char *buf, size_t count) | ||
3535 | { | ||
3536 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3537 | long val; | ||
3538 | int ret = strict_strtol(buf, 10, &val); | ||
3539 | if (!ret) | ||
3540 | return ret; | ||
3541 | |||
3542 | priv->retry_rate = (val > 0) ? val : 1; | ||
3543 | |||
3544 | return count; | ||
3545 | } | ||
3546 | |||
3547 | static ssize_t show_retry_rate(struct device *d, | ||
3548 | struct device_attribute *attr, char *buf) | ||
3549 | { | ||
3550 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3551 | return sprintf(buf, "%d", priv->retry_rate); | ||
3552 | } | ||
3553 | |||
3554 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | ||
3555 | store_retry_rate); | ||
3556 | |||
3557 | static ssize_t store_power_level(struct device *d, | 3613 | static ssize_t store_power_level(struct device *d, |
3558 | struct device_attribute *attr, | 3614 | struct device_attribute *attr, |
3559 | const char *buf, size_t count) | 3615 | const char *buf, size_t count) |
@@ -3656,16 +3712,6 @@ static ssize_t show_statistics(struct device *d, | |||
3656 | 3712 | ||
3657 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | 3713 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); |
3658 | 3714 | ||
3659 | static ssize_t show_status(struct device *d, | ||
3660 | struct device_attribute *attr, char *buf) | ||
3661 | { | ||
3662 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; | ||
3663 | if (!iwl_is_alive(priv)) | ||
3664 | return -EAGAIN; | ||
3665 | return sprintf(buf, "0x%08x\n", (int)priv->status); | ||
3666 | } | ||
3667 | |||
3668 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | ||
3669 | 3715 | ||
3670 | /***************************************************************************** | 3716 | /***************************************************************************** |
3671 | * | 3717 | * |
@@ -3719,9 +3765,7 @@ static struct attribute *iwl_sysfs_entries[] = { | |||
3719 | &dev_attr_flags.attr, | 3765 | &dev_attr_flags.attr, |
3720 | &dev_attr_filter_flags.attr, | 3766 | &dev_attr_filter_flags.attr, |
3721 | &dev_attr_power_level.attr, | 3767 | &dev_attr_power_level.attr, |
3722 | &dev_attr_retry_rate.attr, | ||
3723 | &dev_attr_statistics.attr, | 3768 | &dev_attr_statistics.attr, |
3724 | &dev_attr_status.attr, | ||
3725 | &dev_attr_temperature.attr, | 3769 | &dev_attr_temperature.attr, |
3726 | &dev_attr_tx_power.attr, | 3770 | &dev_attr_tx_power.attr, |
3727 | #ifdef CONFIG_IWLWIFI_DEBUG | 3771 | #ifdef CONFIG_IWLWIFI_DEBUG |
@@ -3764,6 +3808,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3764 | struct ieee80211_hw *hw; | 3808 | struct ieee80211_hw *hw; |
3765 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); | 3809 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
3766 | unsigned long flags; | 3810 | unsigned long flags; |
3811 | u16 pci_cmd; | ||
3767 | 3812 | ||
3768 | /************************ | 3813 | /************************ |
3769 | * 1. Allocating HW data | 3814 | * 1. Allocating HW data |
@@ -3816,8 +3861,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3816 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | 3861 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
3817 | /* both attempts failed: */ | 3862 | /* both attempts failed: */ |
3818 | if (err) { | 3863 | if (err) { |
3819 | printk(KERN_WARNING "%s: No suitable DMA available.\n", | 3864 | IWL_WARN(priv, "No suitable DMA available.\n"); |
3820 | DRV_NAME); | ||
3821 | goto out_pci_disable_device; | 3865 | goto out_pci_disable_device; |
3822 | } | 3866 | } |
3823 | } | 3867 | } |
@@ -3843,8 +3887,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3843 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | 3887 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); |
3844 | 3888 | ||
3845 | iwl_hw_detect(priv); | 3889 | iwl_hw_detect(priv); |
3846 | printk(KERN_INFO DRV_NAME | 3890 | IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n", |
3847 | ": Detected Intel Wireless WiFi Link %s REV=0x%X\n", | ||
3848 | priv->cfg->name, priv->hw_rev); | 3891 | priv->cfg->name, priv->hw_rev); |
3849 | 3892 | ||
3850 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | 3893 | /* We disable the RETRY_TIMEOUT register (0x41) to keep |
@@ -3863,7 +3906,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3863 | /* Read the EEPROM */ | 3906 | /* Read the EEPROM */ |
3864 | err = iwl_eeprom_init(priv); | 3907 | err = iwl_eeprom_init(priv); |
3865 | if (err) { | 3908 | if (err) { |
3866 | IWL_ERROR("Unable to init EEPROM\n"); | 3909 | IWL_ERR(priv, "Unable to init EEPROM\n"); |
3867 | goto out_iounmap; | 3910 | goto out_iounmap; |
3868 | } | 3911 | } |
3869 | err = iwl_eeprom_check_version(priv); | 3912 | err = iwl_eeprom_check_version(priv); |
@@ -3879,7 +3922,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3879 | * 5. Setup HW constants | 3922 | * 5. Setup HW constants |
3880 | ************************/ | 3923 | ************************/ |
3881 | if (iwl_set_hw_params(priv)) { | 3924 | if (iwl_set_hw_params(priv)) { |
3882 | IWL_ERROR("failed to set hw parameters\n"); | 3925 | IWL_ERR(priv, "failed to set hw parameters\n"); |
3883 | goto out_free_eeprom; | 3926 | goto out_free_eeprom; |
3884 | } | 3927 | } |
3885 | 3928 | ||
@@ -3909,43 +3952,65 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3909 | iwl_disable_interrupts(priv); | 3952 | iwl_disable_interrupts(priv); |
3910 | spin_unlock_irqrestore(&priv->lock, flags); | 3953 | spin_unlock_irqrestore(&priv->lock, flags); |
3911 | 3954 | ||
3955 | pci_enable_msi(priv->pci_dev); | ||
3956 | |||
3957 | err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED, | ||
3958 | DRV_NAME, priv); | ||
3959 | if (err) { | ||
3960 | IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq); | ||
3961 | goto out_disable_msi; | ||
3962 | } | ||
3912 | err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group); | 3963 | err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group); |
3913 | if (err) { | 3964 | if (err) { |
3914 | IWL_ERROR("failed to create sysfs device attributes\n"); | 3965 | IWL_ERR(priv, "failed to create sysfs device attributes\n"); |
3915 | goto out_uninit_drv; | 3966 | goto out_uninit_drv; |
3916 | } | 3967 | } |
3917 | 3968 | ||
3918 | |||
3919 | iwl_setup_deferred_work(priv); | 3969 | iwl_setup_deferred_work(priv); |
3920 | iwl_setup_rx_handlers(priv); | 3970 | iwl_setup_rx_handlers(priv); |
3921 | 3971 | ||
3922 | /******************** | ||
3923 | * 9. Conclude | ||
3924 | ********************/ | ||
3925 | pci_save_state(pdev); | ||
3926 | pci_disable_device(pdev); | ||
3927 | |||
3928 | /********************************** | 3972 | /********************************** |
3929 | * 10. Setup and register mac80211 | 3973 | * 9. Setup and register mac80211 |
3930 | **********************************/ | 3974 | **********************************/ |
3931 | 3975 | ||
3976 | /* enable interrupts if needed: hw bug w/a */ | ||
3977 | pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd); | ||
3978 | if (pci_cmd & PCI_COMMAND_INTX_DISABLE) { | ||
3979 | pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; | ||
3980 | pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd); | ||
3981 | } | ||
3982 | |||
3983 | iwl_enable_interrupts(priv); | ||
3984 | |||
3932 | err = iwl_setup_mac(priv); | 3985 | err = iwl_setup_mac(priv); |
3933 | if (err) | 3986 | if (err) |
3934 | goto out_remove_sysfs; | 3987 | goto out_remove_sysfs; |
3935 | 3988 | ||
3936 | err = iwl_dbgfs_register(priv, DRV_NAME); | 3989 | err = iwl_dbgfs_register(priv, DRV_NAME); |
3937 | if (err) | 3990 | if (err) |
3938 | IWL_ERROR("failed to create debugfs files\n"); | 3991 | IWL_ERR(priv, "failed to create debugfs files\n"); |
3992 | |||
3993 | /* If platform's RF_KILL switch is NOT set to KILL */ | ||
3994 | if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) | ||
3995 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | ||
3996 | else | ||
3997 | set_bit(STATUS_RF_KILL_HW, &priv->status); | ||
3939 | 3998 | ||
3940 | err = iwl_rfkill_init(priv); | 3999 | err = iwl_rfkill_init(priv); |
3941 | if (err) | 4000 | if (err) |
3942 | IWL_ERROR("Unable to initialize RFKILL system. " | 4001 | IWL_ERR(priv, "Unable to initialize RFKILL system. " |
3943 | "Ignoring error: %d\n", err); | 4002 | "Ignoring error: %d\n", err); |
4003 | else | ||
4004 | iwl_rfkill_set_hw_state(priv); | ||
4005 | |||
3944 | iwl_power_initialize(priv); | 4006 | iwl_power_initialize(priv); |
3945 | return 0; | 4007 | return 0; |
3946 | 4008 | ||
3947 | out_remove_sysfs: | 4009 | out_remove_sysfs: |
3948 | sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group); | 4010 | sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group); |
4011 | out_disable_msi: | ||
4012 | pci_disable_msi(priv->pci_dev); | ||
4013 | pci_disable_device(priv->pci_dev); | ||
3949 | out_uninit_drv: | 4014 | out_uninit_drv: |
3950 | iwl_uninit_drv(priv); | 4015 | iwl_uninit_drv(priv); |
3951 | out_free_eeprom: | 4016 | out_free_eeprom: |
@@ -4017,6 +4082,8 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev) | |||
4017 | destroy_workqueue(priv->workqueue); | 4082 | destroy_workqueue(priv->workqueue); |
4018 | priv->workqueue = NULL; | 4083 | priv->workqueue = NULL; |
4019 | 4084 | ||
4085 | free_irq(priv->pci_dev->irq, priv); | ||
4086 | pci_disable_msi(priv->pci_dev); | ||
4020 | pci_iounmap(pdev, priv->hw_base); | 4087 | pci_iounmap(pdev, priv->hw_base); |
4021 | pci_release_regions(pdev); | 4088 | pci_release_regions(pdev); |
4022 | pci_disable_device(pdev); | 4089 | pci_disable_device(pdev); |
@@ -4042,6 +4109,8 @@ static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state) | |||
4042 | priv->is_open = 1; | 4109 | priv->is_open = 1; |
4043 | } | 4110 | } |
4044 | 4111 | ||
4112 | pci_save_state(pdev); | ||
4113 | pci_disable_device(pdev); | ||
4045 | pci_set_power_state(pdev, PCI_D3hot); | 4114 | pci_set_power_state(pdev, PCI_D3hot); |
4046 | 4115 | ||
4047 | return 0; | 4116 | return 0; |
@@ -4052,6 +4121,9 @@ static int iwl_pci_resume(struct pci_dev *pdev) | |||
4052 | struct iwl_priv *priv = pci_get_drvdata(pdev); | 4121 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
4053 | 4122 | ||
4054 | pci_set_power_state(pdev, PCI_D0); | 4123 | pci_set_power_state(pdev, PCI_D0); |
4124 | pci_enable_device(pdev); | ||
4125 | pci_restore_state(pdev); | ||
4126 | iwl_enable_interrupts(priv); | ||
4055 | 4127 | ||
4056 | if (priv->is_open) | 4128 | if (priv->is_open) |
4057 | iwl_mac_start(priv->hw); | 4129 | iwl_mac_start(priv->hw); |
@@ -4092,6 +4164,21 @@ static struct pci_device_id iwl_hw_card_ids[] = { | |||
4092 | /* 5150 Wifi/WiMax */ | 4164 | /* 5150 Wifi/WiMax */ |
4093 | {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)}, | 4165 | {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)}, |
4094 | {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)}, | 4166 | {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)}, |
4167 | /* 6000/6050 Series */ | ||
4168 | {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)}, | ||
4169 | {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)}, | ||
4170 | {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)}, | ||
4171 | {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)}, | ||
4172 | {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)}, | ||
4173 | {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)}, | ||
4174 | {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)}, | ||
4175 | {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)}, | ||
4176 | {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)}, | ||
4177 | {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)}, | ||
4178 | {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)}, | ||
4179 | /* 100 Series WiFi */ | ||
4180 | {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl100_bgn_cfg)}, | ||
4181 | {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl100_bgn_cfg)}, | ||
4095 | #endif /* CONFIG_IWL5000 */ | 4182 | #endif /* CONFIG_IWL5000 */ |
4096 | 4183 | ||
4097 | {0} | 4184 | {0} |
@@ -4118,13 +4205,14 @@ static int __init iwl_init(void) | |||
4118 | 4205 | ||
4119 | ret = iwlagn_rate_control_register(); | 4206 | ret = iwlagn_rate_control_register(); |
4120 | if (ret) { | 4207 | if (ret) { |
4121 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | 4208 | printk(KERN_ERR DRV_NAME |
4209 | "Unable to register rate control algorithm: %d\n", ret); | ||
4122 | return ret; | 4210 | return ret; |
4123 | } | 4211 | } |
4124 | 4212 | ||
4125 | ret = pci_register_driver(&iwl_driver); | 4213 | ret = pci_register_driver(&iwl_driver); |
4126 | if (ret) { | 4214 | if (ret) { |
4127 | IWL_ERROR("Unable to initialize PCI module\n"); | 4215 | printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n"); |
4128 | goto error_register; | 4216 | goto error_register; |
4129 | } | 4217 | } |
4130 | 4218 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-calib.c b/drivers/net/wireless/iwlwifi/iwl-calib.c index f836ecc55758..8e5e6663be35 100644 --- a/drivers/net/wireless/iwlwifi/iwl-calib.c +++ b/drivers/net/wireless/iwlwifi/iwl-calib.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -102,7 +102,7 @@ int iwl_send_calib_results(struct iwl_priv *priv) | |||
102 | 102 | ||
103 | return 0; | 103 | return 0; |
104 | err: | 104 | err: |
105 | IWL_ERROR("Error %d iteration %d\n", ret, i); | 105 | IWL_ERR(priv, "Error %d iteration %d\n", ret, i); |
106 | return ret; | 106 | return ret; |
107 | } | 107 | } |
108 | EXPORT_SYMBOL(iwl_send_calib_results); | 108 | EXPORT_SYMBOL(iwl_send_calib_results); |
@@ -483,7 +483,7 @@ static int iwl_sensitivity_write(struct iwl_priv *priv) | |||
483 | 483 | ||
484 | ret = iwl_send_cmd(priv, &cmd_out); | 484 | ret = iwl_send_cmd(priv, &cmd_out); |
485 | if (ret) | 485 | if (ret) |
486 | IWL_ERROR("SENSITIVITY_CMD failed\n"); | 486 | IWL_ERR(priv, "SENSITIVITY_CMD failed\n"); |
487 | 487 | ||
488 | return ret; | 488 | return ret; |
489 | } | 489 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-calib.h b/drivers/net/wireless/iwlwifi/iwl-calib.h index 1abe84bb74ad..b6cef989a796 100644 --- a/drivers/net/wireless/iwlwifi/iwl-calib.h +++ b/drivers/net/wireless/iwlwifi/iwl-calib.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h index ba997204c8d4..e49415c7fb2a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-commands.h +++ b/drivers/net/wireless/iwlwifi/iwl-commands.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -69,12 +69,20 @@ | |||
69 | #ifndef __iwl_commands_h__ | 69 | #ifndef __iwl_commands_h__ |
70 | #define __iwl_commands_h__ | 70 | #define __iwl_commands_h__ |
71 | 71 | ||
72 | struct iwl_priv; | ||
73 | |||
72 | /* uCode version contains 4 values: Major/Minor/API/Serial */ | 74 | /* uCode version contains 4 values: Major/Minor/API/Serial */ |
73 | #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24) | 75 | #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24) |
74 | #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16) | 76 | #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16) |
75 | #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8) | 77 | #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8) |
76 | #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF) | 78 | #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF) |
77 | 79 | ||
80 | |||
81 | /* Tx rates */ | ||
82 | #define IWL_CCK_RATES 4 | ||
83 | #define IWL_OFDM_RATES 8 | ||
84 | #define IWL_MAX_RATES (IWL_CCK_RATES + IWL_OFDM_RATES) | ||
85 | |||
78 | enum { | 86 | enum { |
79 | REPLY_ALIVE = 0x1, | 87 | REPLY_ALIVE = 0x1, |
80 | REPLY_ERROR = 0x2, | 88 | REPLY_ERROR = 0x2, |
@@ -219,6 +227,37 @@ struct iwl_cmd_header { | |||
219 | u8 data[0]; | 227 | u8 data[0]; |
220 | } __attribute__ ((packed)); | 228 | } __attribute__ ((packed)); |
221 | 229 | ||
230 | |||
231 | /** | ||
232 | * struct iwl3945_tx_power | ||
233 | * | ||
234 | * Used in REPLY_TX_PWR_TABLE_CMD, REPLY_SCAN_CMD, REPLY_CHANNEL_SWITCH | ||
235 | * | ||
236 | * Each entry contains two values: | ||
237 | * 1) DSP gain (or sometimes called DSP attenuation). This is a fine-grained | ||
238 | * linear value that multiplies the output of the digital signal processor, | ||
239 | * before being sent to the analog radio. | ||
240 | * 2) Radio gain. This sets the analog gain of the radio Tx path. | ||
241 | * It is a coarser setting, and behaves in a logarithmic (dB) fashion. | ||
242 | * | ||
243 | * Driver obtains values from struct iwl3945_tx_power power_gain_table[][]. | ||
244 | */ | ||
245 | struct iwl3945_tx_power { | ||
246 | u8 tx_gain; /* gain for analog radio */ | ||
247 | u8 dsp_atten; /* gain for DSP */ | ||
248 | } __attribute__ ((packed)); | ||
249 | |||
250 | /** | ||
251 | * struct iwl3945_power_per_rate | ||
252 | * | ||
253 | * Used in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH | ||
254 | */ | ||
255 | struct iwl3945_power_per_rate { | ||
256 | u8 rate; /* plcp */ | ||
257 | struct iwl3945_tx_power tpc; | ||
258 | u8 reserved; | ||
259 | } __attribute__ ((packed)); | ||
260 | |||
222 | /** | 261 | /** |
223 | * iwlagn rate_n_flags bit fields | 262 | * iwlagn rate_n_flags bit fields |
224 | * | 263 | * |
@@ -300,11 +339,12 @@ struct iwl_cmd_header { | |||
300 | * 5350 has 3 transmitters | 339 | * 5350 has 3 transmitters |
301 | * bit14:16 | 340 | * bit14:16 |
302 | */ | 341 | */ |
303 | #define RATE_MCS_ANT_POS 14 | 342 | #define RATE_MCS_ANT_POS 14 |
304 | #define RATE_MCS_ANT_A_MSK 0x04000 | 343 | #define RATE_MCS_ANT_A_MSK 0x04000 |
305 | #define RATE_MCS_ANT_B_MSK 0x08000 | 344 | #define RATE_MCS_ANT_B_MSK 0x08000 |
306 | #define RATE_MCS_ANT_C_MSK 0x10000 | 345 | #define RATE_MCS_ANT_C_MSK 0x10000 |
307 | #define RATE_MCS_ANT_ABC_MSK 0x1C000 | 346 | #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK) |
347 | #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK) | ||
308 | #define RATE_ANT_NUM 3 | 348 | #define RATE_ANT_NUM 3 |
309 | 349 | ||
310 | #define POWER_TABLE_NUM_ENTRIES 33 | 350 | #define POWER_TABLE_NUM_ENTRIES 33 |
@@ -492,8 +532,6 @@ struct iwl_alive_resp { | |||
492 | __le32 is_valid; | 532 | __le32 is_valid; |
493 | } __attribute__ ((packed)); | 533 | } __attribute__ ((packed)); |
494 | 534 | ||
495 | |||
496 | |||
497 | /* | 535 | /* |
498 | * REPLY_ERROR = 0x2 (response only, not a command) | 536 | * REPLY_ERROR = 0x2 (response only, not a command) |
499 | */ | 537 | */ |
@@ -525,6 +563,7 @@ enum { | |||
525 | 563 | ||
526 | 564 | ||
527 | #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0) | 565 | #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0) |
566 | #define RXON_RX_CHAIN_DRIVER_FORCE_POS (0) | ||
528 | #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1) | 567 | #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1) |
529 | #define RXON_RX_CHAIN_VALID_POS (1) | 568 | #define RXON_RX_CHAIN_VALID_POS (1) |
530 | #define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4) | 569 | #define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4) |
@@ -611,6 +650,26 @@ enum { | |||
611 | * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10), | 650 | * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10), |
612 | * regardless of whether RXON_FILTER_ASSOC_MSK is set. | 651 | * regardless of whether RXON_FILTER_ASSOC_MSK is set. |
613 | */ | 652 | */ |
653 | |||
654 | struct iwl3945_rxon_cmd { | ||
655 | u8 node_addr[6]; | ||
656 | __le16 reserved1; | ||
657 | u8 bssid_addr[6]; | ||
658 | __le16 reserved2; | ||
659 | u8 wlap_bssid_addr[6]; | ||
660 | __le16 reserved3; | ||
661 | u8 dev_type; | ||
662 | u8 air_propagation; | ||
663 | __le16 reserved4; | ||
664 | u8 ofdm_basic_rates; | ||
665 | u8 cck_basic_rates; | ||
666 | __le16 assoc_id; | ||
667 | __le32 flags; | ||
668 | __le32 filter_flags; | ||
669 | __le16 channel; | ||
670 | __le16 reserved5; | ||
671 | } __attribute__ ((packed)); | ||
672 | |||
614 | struct iwl4965_rxon_cmd { | 673 | struct iwl4965_rxon_cmd { |
615 | u8 node_addr[6]; | 674 | u8 node_addr[6]; |
616 | __le16 reserved1; | 675 | __le16 reserved1; |
@@ -656,33 +715,41 @@ struct iwl_rxon_cmd { | |||
656 | __le16 reserved6; | 715 | __le16 reserved6; |
657 | } __attribute__ ((packed)); | 716 | } __attribute__ ((packed)); |
658 | 717 | ||
659 | struct iwl5000_rxon_assoc_cmd { | 718 | /* |
719 | * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) | ||
720 | */ | ||
721 | struct iwl3945_rxon_assoc_cmd { | ||
722 | __le32 flags; | ||
723 | __le32 filter_flags; | ||
724 | u8 ofdm_basic_rates; | ||
725 | u8 cck_basic_rates; | ||
726 | __le16 reserved; | ||
727 | } __attribute__ ((packed)); | ||
728 | |||
729 | struct iwl4965_rxon_assoc_cmd { | ||
660 | __le32 flags; | 730 | __le32 flags; |
661 | __le32 filter_flags; | 731 | __le32 filter_flags; |
662 | u8 ofdm_basic_rates; | 732 | u8 ofdm_basic_rates; |
663 | u8 cck_basic_rates; | 733 | u8 cck_basic_rates; |
664 | __le16 reserved1; | ||
665 | u8 ofdm_ht_single_stream_basic_rates; | 734 | u8 ofdm_ht_single_stream_basic_rates; |
666 | u8 ofdm_ht_dual_stream_basic_rates; | 735 | u8 ofdm_ht_dual_stream_basic_rates; |
667 | u8 ofdm_ht_triple_stream_basic_rates; | ||
668 | u8 reserved2; | ||
669 | __le16 rx_chain_select_flags; | 736 | __le16 rx_chain_select_flags; |
670 | __le16 acquisition_data; | 737 | __le16 reserved; |
671 | __le32 reserved3; | ||
672 | } __attribute__ ((packed)); | 738 | } __attribute__ ((packed)); |
673 | 739 | ||
674 | /* | 740 | struct iwl5000_rxon_assoc_cmd { |
675 | * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) | ||
676 | */ | ||
677 | struct iwl4965_rxon_assoc_cmd { | ||
678 | __le32 flags; | 741 | __le32 flags; |
679 | __le32 filter_flags; | 742 | __le32 filter_flags; |
680 | u8 ofdm_basic_rates; | 743 | u8 ofdm_basic_rates; |
681 | u8 cck_basic_rates; | 744 | u8 cck_basic_rates; |
745 | __le16 reserved1; | ||
682 | u8 ofdm_ht_single_stream_basic_rates; | 746 | u8 ofdm_ht_single_stream_basic_rates; |
683 | u8 ofdm_ht_dual_stream_basic_rates; | 747 | u8 ofdm_ht_dual_stream_basic_rates; |
748 | u8 ofdm_ht_triple_stream_basic_rates; | ||
749 | u8 reserved2; | ||
684 | __le16 rx_chain_select_flags; | 750 | __le16 rx_chain_select_flags; |
685 | __le16 reserved; | 751 | __le16 acquisition_data; |
752 | __le32 reserved3; | ||
686 | } __attribute__ ((packed)); | 753 | } __attribute__ ((packed)); |
687 | 754 | ||
688 | #define IWL_CONN_MAX_LISTEN_INTERVAL 10 | 755 | #define IWL_CONN_MAX_LISTEN_INTERVAL 10 |
@@ -702,6 +769,16 @@ struct iwl_rxon_time_cmd { | |||
702 | /* | 769 | /* |
703 | * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) | 770 | * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) |
704 | */ | 771 | */ |
772 | struct iwl3945_channel_switch_cmd { | ||
773 | u8 band; | ||
774 | u8 expect_beacon; | ||
775 | __le16 channel; | ||
776 | __le32 rxon_flags; | ||
777 | __le32 rxon_filter_flags; | ||
778 | __le32 switch_time; | ||
779 | struct iwl3945_power_per_rate power[IWL_MAX_RATES]; | ||
780 | } __attribute__ ((packed)); | ||
781 | |||
705 | struct iwl_channel_switch_cmd { | 782 | struct iwl_channel_switch_cmd { |
706 | u8 band; | 783 | u8 band; |
707 | u8 expect_beacon; | 784 | u8 expect_beacon; |
@@ -783,6 +860,8 @@ struct iwl_qosparam_cmd { | |||
783 | #define IWL_AP_ID 0 | 860 | #define IWL_AP_ID 0 |
784 | #define IWL_MULTICAST_ID 1 | 861 | #define IWL_MULTICAST_ID 1 |
785 | #define IWL_STA_ID 2 | 862 | #define IWL_STA_ID 2 |
863 | #define IWL3945_BROADCAST_ID 24 | ||
864 | #define IWL3945_STATION_COUNT 25 | ||
786 | #define IWL4965_BROADCAST_ID 31 | 865 | #define IWL4965_BROADCAST_ID 31 |
787 | #define IWL4965_STATION_COUNT 32 | 866 | #define IWL4965_STATION_COUNT 32 |
788 | #define IWL5000_BROADCAST_ID 15 | 867 | #define IWL5000_BROADCAST_ID 15 |
@@ -791,6 +870,8 @@ struct iwl_qosparam_cmd { | |||
791 | #define IWL_STATION_COUNT 32 /* MAX(3945,4965)*/ | 870 | #define IWL_STATION_COUNT 32 /* MAX(3945,4965)*/ |
792 | #define IWL_INVALID_STATION 255 | 871 | #define IWL_INVALID_STATION 255 |
793 | 872 | ||
873 | #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2); | ||
874 | #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8); | ||
794 | #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8); | 875 | #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8); |
795 | #define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17) | 876 | #define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17) |
796 | #define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18) | 877 | #define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18) |
@@ -901,6 +982,35 @@ struct sta_id_modify { | |||
901 | * used as AP, or in an IBSS network, driver must set up station table | 982 | * used as AP, or in an IBSS network, driver must set up station table |
902 | * entries for all STAs in network, starting with index IWL_STA_ID. | 983 | * entries for all STAs in network, starting with index IWL_STA_ID. |
903 | */ | 984 | */ |
985 | |||
986 | struct iwl3945_addsta_cmd { | ||
987 | u8 mode; /* 1: modify existing, 0: add new station */ | ||
988 | u8 reserved[3]; | ||
989 | struct sta_id_modify sta; | ||
990 | struct iwl4965_keyinfo key; | ||
991 | __le32 station_flags; /* STA_FLG_* */ | ||
992 | __le32 station_flags_msk; /* STA_FLG_* */ | ||
993 | |||
994 | /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) | ||
995 | * corresponding to bit (e.g. bit 5 controls TID 5). | ||
996 | * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ | ||
997 | __le16 tid_disable_tx; | ||
998 | |||
999 | __le16 rate_n_flags; | ||
1000 | |||
1001 | /* TID for which to add block-ack support. | ||
1002 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | ||
1003 | u8 add_immediate_ba_tid; | ||
1004 | |||
1005 | /* TID for which to remove block-ack support. | ||
1006 | * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */ | ||
1007 | u8 remove_immediate_ba_tid; | ||
1008 | |||
1009 | /* Starting Sequence Number for added block-ack support. | ||
1010 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | ||
1011 | __le16 add_immediate_ba_ssn; | ||
1012 | } __attribute__ ((packed)); | ||
1013 | |||
904 | struct iwl4965_addsta_cmd { | 1014 | struct iwl4965_addsta_cmd { |
905 | u8 mode; /* 1: modify existing, 0: add new station */ | 1015 | u8 mode; /* 1: modify existing, 0: add new station */ |
906 | u8 reserved[3]; | 1016 | u8 reserved[3]; |
@@ -1054,6 +1164,48 @@ struct iwl_wep_cmd { | |||
1054 | #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7) | 1164 | #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7) |
1055 | #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) | 1165 | #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) |
1056 | 1166 | ||
1167 | |||
1168 | struct iwl3945_rx_frame_stats { | ||
1169 | u8 phy_count; | ||
1170 | u8 id; | ||
1171 | u8 rssi; | ||
1172 | u8 agc; | ||
1173 | __le16 sig_avg; | ||
1174 | __le16 noise_diff; | ||
1175 | u8 payload[0]; | ||
1176 | } __attribute__ ((packed)); | ||
1177 | |||
1178 | struct iwl3945_rx_frame_hdr { | ||
1179 | __le16 channel; | ||
1180 | __le16 phy_flags; | ||
1181 | u8 reserved1; | ||
1182 | u8 rate; | ||
1183 | __le16 len; | ||
1184 | u8 payload[0]; | ||
1185 | } __attribute__ ((packed)); | ||
1186 | |||
1187 | struct iwl3945_rx_frame_end { | ||
1188 | __le32 status; | ||
1189 | __le64 timestamp; | ||
1190 | __le32 beacon_timestamp; | ||
1191 | } __attribute__ ((packed)); | ||
1192 | |||
1193 | /* | ||
1194 | * REPLY_3945_RX = 0x1b (response only, not a command) | ||
1195 | * | ||
1196 | * NOTE: DO NOT dereference from casts to this structure | ||
1197 | * It is provided only for calculating minimum data set size. | ||
1198 | * The actual offsets of the hdr and end are dynamic based on | ||
1199 | * stats.phy_count | ||
1200 | */ | ||
1201 | struct iwl3945_rx_frame { | ||
1202 | struct iwl3945_rx_frame_stats stats; | ||
1203 | struct iwl3945_rx_frame_hdr hdr; | ||
1204 | struct iwl3945_rx_frame_end end; | ||
1205 | } __attribute__ ((packed)); | ||
1206 | |||
1207 | #define IWL39_RX_FRAME_SIZE (4 + sizeof(struct iwl3945_rx_frame)) | ||
1208 | |||
1057 | /* Fixed (non-configurable) rx data from phy */ | 1209 | /* Fixed (non-configurable) rx data from phy */ |
1058 | 1210 | ||
1059 | #define IWL49_RX_RES_PHY_CNT 14 | 1211 | #define IWL49_RX_RES_PHY_CNT 14 |
@@ -1234,6 +1386,84 @@ struct iwl4965_rx_mpdu_res_start { | |||
1234 | #define TKIP_ICV_LEN 4 | 1386 | #define TKIP_ICV_LEN 4 |
1235 | 1387 | ||
1236 | /* | 1388 | /* |
1389 | * REPLY_TX = 0x1c (command) | ||
1390 | */ | ||
1391 | |||
1392 | struct iwl3945_tx_cmd { | ||
1393 | /* | ||
1394 | * MPDU byte count: | ||
1395 | * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size, | ||
1396 | * + 8 byte IV for CCM or TKIP (not used for WEP) | ||
1397 | * + Data payload | ||
1398 | * + 8-byte MIC (not used for CCM/WEP) | ||
1399 | * NOTE: Does not include Tx command bytes, post-MAC pad bytes, | ||
1400 | * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i | ||
1401 | * Range: 14-2342 bytes. | ||
1402 | */ | ||
1403 | __le16 len; | ||
1404 | |||
1405 | /* | ||
1406 | * MPDU or MSDU byte count for next frame. | ||
1407 | * Used for fragmentation and bursting, but not 11n aggregation. | ||
1408 | * Same as "len", but for next frame. Set to 0 if not applicable. | ||
1409 | */ | ||
1410 | __le16 next_frame_len; | ||
1411 | |||
1412 | __le32 tx_flags; /* TX_CMD_FLG_* */ | ||
1413 | |||
1414 | u8 rate; | ||
1415 | |||
1416 | /* Index of recipient station in uCode's station table */ | ||
1417 | u8 sta_id; | ||
1418 | u8 tid_tspec; | ||
1419 | u8 sec_ctl; | ||
1420 | u8 key[16]; | ||
1421 | union { | ||
1422 | u8 byte[8]; | ||
1423 | __le16 word[4]; | ||
1424 | __le32 dw[2]; | ||
1425 | } tkip_mic; | ||
1426 | __le32 next_frame_info; | ||
1427 | union { | ||
1428 | __le32 life_time; | ||
1429 | __le32 attempt; | ||
1430 | } stop_time; | ||
1431 | u8 supp_rates[2]; | ||
1432 | u8 rts_retry_limit; /*byte 50 */ | ||
1433 | u8 data_retry_limit; /*byte 51 */ | ||
1434 | union { | ||
1435 | __le16 pm_frame_timeout; | ||
1436 | __le16 attempt_duration; | ||
1437 | } timeout; | ||
1438 | |||
1439 | /* | ||
1440 | * Duration of EDCA burst Tx Opportunity, in 32-usec units. | ||
1441 | * Set this if txop time is not specified by HCCA protocol (e.g. by AP). | ||
1442 | */ | ||
1443 | __le16 driver_txop; | ||
1444 | |||
1445 | /* | ||
1446 | * MAC header goes here, followed by 2 bytes padding if MAC header | ||
1447 | * length is 26 or 30 bytes, followed by payload data | ||
1448 | */ | ||
1449 | u8 payload[0]; | ||
1450 | struct ieee80211_hdr hdr[0]; | ||
1451 | } __attribute__ ((packed)); | ||
1452 | |||
1453 | /* | ||
1454 | * REPLY_TX = 0x1c (response) | ||
1455 | */ | ||
1456 | struct iwl3945_tx_resp { | ||
1457 | u8 failure_rts; | ||
1458 | u8 failure_frame; | ||
1459 | u8 bt_kill_count; | ||
1460 | u8 rate; | ||
1461 | __le32 wireless_media_time; | ||
1462 | __le32 status; /* TX status */ | ||
1463 | } __attribute__ ((packed)); | ||
1464 | |||
1465 | |||
1466 | /* | ||
1237 | * 4965 uCode updates these Tx attempt count values in host DRAM. | 1467 | * 4965 uCode updates these Tx attempt count values in host DRAM. |
1238 | * Used for managing Tx retries when expecting block-acks. | 1468 | * Used for managing Tx retries when expecting block-acks. |
1239 | * Driver should set these fields to 0. | 1469 | * Driver should set these fields to 0. |
@@ -1244,9 +1474,6 @@ struct iwl_dram_scratch { | |||
1244 | __le16 reserved; | 1474 | __le16 reserved; |
1245 | } __attribute__ ((packed)); | 1475 | } __attribute__ ((packed)); |
1246 | 1476 | ||
1247 | /* | ||
1248 | * REPLY_TX = 0x1c (command) | ||
1249 | */ | ||
1250 | struct iwl_tx_cmd { | 1477 | struct iwl_tx_cmd { |
1251 | /* | 1478 | /* |
1252 | * MPDU byte count: | 1479 | * MPDU byte count: |
@@ -1584,6 +1811,14 @@ struct iwl_compressed_ba_resp { | |||
1584 | * | 1811 | * |
1585 | * See details under "TXPOWER" in iwl-4965-hw.h. | 1812 | * See details under "TXPOWER" in iwl-4965-hw.h. |
1586 | */ | 1813 | */ |
1814 | |||
1815 | struct iwl3945_txpowertable_cmd { | ||
1816 | u8 band; /* 0: 5 GHz, 1: 2.4 GHz */ | ||
1817 | u8 reserved; | ||
1818 | __le16 channel; | ||
1819 | struct iwl3945_power_per_rate power[IWL_MAX_RATES]; | ||
1820 | } __attribute__ ((packed)); | ||
1821 | |||
1587 | struct iwl4965_txpowertable_cmd { | 1822 | struct iwl4965_txpowertable_cmd { |
1588 | u8 band; /* 0: 5 GHz, 1: 2.4 GHz */ | 1823 | u8 band; /* 0: 5 GHz, 1: 2.4 GHz */ |
1589 | u8 reserved; | 1824 | u8 reserved; |
@@ -1591,6 +1826,35 @@ struct iwl4965_txpowertable_cmd { | |||
1591 | struct iwl4965_tx_power_db tx_power; | 1826 | struct iwl4965_tx_power_db tx_power; |
1592 | } __attribute__ ((packed)); | 1827 | } __attribute__ ((packed)); |
1593 | 1828 | ||
1829 | |||
1830 | /** | ||
1831 | * struct iwl3945_rate_scaling_cmd - Rate Scaling Command & Response | ||
1832 | * | ||
1833 | * REPLY_RATE_SCALE = 0x47 (command, has simple generic response) | ||
1834 | * | ||
1835 | * NOTE: The table of rates passed to the uCode via the | ||
1836 | * RATE_SCALE command sets up the corresponding order of | ||
1837 | * rates used for all related commands, including rate | ||
1838 | * masks, etc. | ||
1839 | * | ||
1840 | * For example, if you set 9MB (PLCP 0x0f) as the first | ||
1841 | * rate in the rate table, the bit mask for that rate | ||
1842 | * when passed through ofdm_basic_rates on the REPLY_RXON | ||
1843 | * command would be bit 0 (1 << 0) | ||
1844 | */ | ||
1845 | struct iwl3945_rate_scaling_info { | ||
1846 | __le16 rate_n_flags; | ||
1847 | u8 try_cnt; | ||
1848 | u8 next_rate_index; | ||
1849 | } __attribute__ ((packed)); | ||
1850 | |||
1851 | struct iwl3945_rate_scaling_cmd { | ||
1852 | u8 table_id; | ||
1853 | u8 reserved[3]; | ||
1854 | struct iwl3945_rate_scaling_info table[IWL_MAX_RATES]; | ||
1855 | } __attribute__ ((packed)); | ||
1856 | |||
1857 | |||
1594 | /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ | 1858 | /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ |
1595 | #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) | 1859 | #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) |
1596 | 1860 | ||
@@ -2044,15 +2308,23 @@ struct iwl_spectrum_notification { | |||
2044 | */ | 2308 | */ |
2045 | #define IWL_POWER_VEC_SIZE 5 | 2309 | #define IWL_POWER_VEC_SIZE 5 |
2046 | 2310 | ||
2047 | #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(1 << 0) | 2311 | #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0)) |
2048 | #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(1 << 2) | 2312 | #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2)) |
2049 | #define IWL_POWER_PCI_PM_MSK cpu_to_le16(1 << 3) | 2313 | #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3)) |
2050 | #define IWL_POWER_FAST_PD cpu_to_le16(1 << 4) | 2314 | #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4)) |
2315 | |||
2316 | struct iwl3945_powertable_cmd { | ||
2317 | __le16 flags; | ||
2318 | u8 reserved[2]; | ||
2319 | __le32 rx_data_timeout; | ||
2320 | __le32 tx_data_timeout; | ||
2321 | __le32 sleep_interval[IWL_POWER_VEC_SIZE]; | ||
2322 | } __attribute__ ((packed)); | ||
2051 | 2323 | ||
2052 | struct iwl_powertable_cmd { | 2324 | struct iwl_powertable_cmd { |
2053 | __le16 flags; | 2325 | __le16 flags; |
2054 | u8 keep_alive_seconds; | 2326 | u8 keep_alive_seconds; /* 3945 reserved */ |
2055 | u8 debug_flags; | 2327 | u8 debug_flags; /* 3945 reserved */ |
2056 | __le32 rx_data_timeout; | 2328 | __le32 rx_data_timeout; |
2057 | __le32 tx_data_timeout; | 2329 | __le32 tx_data_timeout; |
2058 | __le32 sleep_interval[IWL_POWER_VEC_SIZE]; | 2330 | __le32 sleep_interval[IWL_POWER_VEC_SIZE]; |
@@ -2143,6 +2415,26 @@ struct iwl_ct_kill_config { | |||
2143 | * passive_dwell < max_out_time | 2415 | * passive_dwell < max_out_time |
2144 | * active_dwell < max_out_time | 2416 | * active_dwell < max_out_time |
2145 | */ | 2417 | */ |
2418 | |||
2419 | /* FIXME: rename to AP1, remove tpc */ | ||
2420 | struct iwl3945_scan_channel { | ||
2421 | /* | ||
2422 | * type is defined as: | ||
2423 | * 0:0 1 = active, 0 = passive | ||
2424 | * 1:4 SSID direct bit map; if a bit is set, then corresponding | ||
2425 | * SSID IE is transmitted in probe request. | ||
2426 | * 5:7 reserved | ||
2427 | */ | ||
2428 | u8 type; | ||
2429 | u8 channel; /* band is selected by iwl3945_scan_cmd "flags" field */ | ||
2430 | struct iwl3945_tx_power tpc; | ||
2431 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ | ||
2432 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ | ||
2433 | } __attribute__ ((packed)); | ||
2434 | |||
2435 | /* set number of direct probes u8 type */ | ||
2436 | #define IWL39_SCAN_PROBE_MASK(n) ((BIT(n) | (BIT(n) - BIT(1)))) | ||
2437 | |||
2146 | struct iwl_scan_channel { | 2438 | struct iwl_scan_channel { |
2147 | /* | 2439 | /* |
2148 | * type is defined as: | 2440 | * type is defined as: |
@@ -2159,6 +2451,9 @@ struct iwl_scan_channel { | |||
2159 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ | 2451 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ |
2160 | } __attribute__ ((packed)); | 2452 | } __attribute__ ((packed)); |
2161 | 2453 | ||
2454 | /* set number of direct probes __le32 type */ | ||
2455 | #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1)))) | ||
2456 | |||
2162 | /** | 2457 | /** |
2163 | * struct iwl_ssid_ie - directed scan network information element | 2458 | * struct iwl_ssid_ie - directed scan network information element |
2164 | * | 2459 | * |
@@ -2172,6 +2467,7 @@ struct iwl_ssid_ie { | |||
2172 | u8 ssid[32]; | 2467 | u8 ssid[32]; |
2173 | } __attribute__ ((packed)); | 2468 | } __attribute__ ((packed)); |
2174 | 2469 | ||
2470 | #define PROBE_OPTION_MAX_API1 0x4 | ||
2175 | #define PROBE_OPTION_MAX 0x14 | 2471 | #define PROBE_OPTION_MAX 0x14 |
2176 | #define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF) | 2472 | #define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF) |
2177 | #define IWL_GOOD_CRC_TH cpu_to_le16(1) | 2473 | #define IWL_GOOD_CRC_TH cpu_to_le16(1) |
@@ -2229,6 +2525,51 @@ struct iwl_ssid_ie { | |||
2229 | * To avoid uCode errors, see timing restrictions described under | 2525 | * To avoid uCode errors, see timing restrictions described under |
2230 | * struct iwl_scan_channel. | 2526 | * struct iwl_scan_channel. |
2231 | */ | 2527 | */ |
2528 | |||
2529 | struct iwl3945_scan_cmd { | ||
2530 | __le16 len; | ||
2531 | u8 reserved0; | ||
2532 | u8 channel_count; /* # channels in channel list */ | ||
2533 | __le16 quiet_time; /* dwell only this # millisecs on quiet channel | ||
2534 | * (only for active scan) */ | ||
2535 | __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */ | ||
2536 | __le16 good_CRC_th; /* passive -> active promotion threshold */ | ||
2537 | __le16 reserved1; | ||
2538 | __le32 max_out_time; /* max usec to be away from associated (service) | ||
2539 | * channel */ | ||
2540 | __le32 suspend_time; /* pause scan this long (in "extended beacon | ||
2541 | * format") when returning to service channel: | ||
2542 | * 3945; 31:24 # beacons, 19:0 additional usec, | ||
2543 | * 4965; 31:22 # beacons, 21:0 additional usec. | ||
2544 | */ | ||
2545 | __le32 flags; /* RXON_FLG_* */ | ||
2546 | __le32 filter_flags; /* RXON_FILTER_* */ | ||
2547 | |||
2548 | /* For active scans (set to all-0s for passive scans). | ||
2549 | * Does not include payload. Must specify Tx rate; no rate scaling. */ | ||
2550 | struct iwl3945_tx_cmd tx_cmd; | ||
2551 | |||
2552 | /* For directed active scans (set to all-0s otherwise) */ | ||
2553 | struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX_API1]; | ||
2554 | |||
2555 | /* | ||
2556 | * Probe request frame, followed by channel list. | ||
2557 | * | ||
2558 | * Size of probe request frame is specified by byte count in tx_cmd. | ||
2559 | * Channel list follows immediately after probe request frame. | ||
2560 | * Number of channels in list is specified by channel_count. | ||
2561 | * Each channel in list is of type: | ||
2562 | * | ||
2563 | * struct iwl3945_scan_channel channels[0]; | ||
2564 | * | ||
2565 | * NOTE: Only one band of channels can be scanned per pass. You | ||
2566 | * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait | ||
2567 | * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION) | ||
2568 | * before requesting another scan. | ||
2569 | */ | ||
2570 | u8 data[0]; | ||
2571 | } __attribute__ ((packed)); | ||
2572 | |||
2232 | struct iwl_scan_cmd { | 2573 | struct iwl_scan_cmd { |
2233 | __le16 len; | 2574 | __le16 len; |
2234 | u8 reserved0; | 2575 | u8 reserved0; |
@@ -2336,6 +2677,14 @@ struct iwl_scancomplete_notification { | |||
2336 | /* | 2677 | /* |
2337 | * BEACON_NOTIFICATION = 0x90 (notification only, not a command) | 2678 | * BEACON_NOTIFICATION = 0x90 (notification only, not a command) |
2338 | */ | 2679 | */ |
2680 | |||
2681 | struct iwl3945_beacon_notif { | ||
2682 | struct iwl3945_tx_resp beacon_notify_hdr; | ||
2683 | __le32 low_tsf; | ||
2684 | __le32 high_tsf; | ||
2685 | __le32 ibss_mgr_status; | ||
2686 | } __attribute__ ((packed)); | ||
2687 | |||
2339 | struct iwl4965_beacon_notif { | 2688 | struct iwl4965_beacon_notif { |
2340 | struct iwl4965_tx_resp beacon_notify_hdr; | 2689 | struct iwl4965_tx_resp beacon_notify_hdr; |
2341 | __le32 low_tsf; | 2690 | __le32 low_tsf; |
@@ -2346,6 +2695,15 @@ struct iwl4965_beacon_notif { | |||
2346 | /* | 2695 | /* |
2347 | * REPLY_TX_BEACON = 0x91 (command, has simple generic response) | 2696 | * REPLY_TX_BEACON = 0x91 (command, has simple generic response) |
2348 | */ | 2697 | */ |
2698 | |||
2699 | struct iwl3945_tx_beacon_cmd { | ||
2700 | struct iwl3945_tx_cmd tx; | ||
2701 | __le16 tim_idx; | ||
2702 | u8 tim_size; | ||
2703 | u8 reserved1; | ||
2704 | struct ieee80211_hdr frame[0]; /* beacon frame */ | ||
2705 | } __attribute__ ((packed)); | ||
2706 | |||
2349 | struct iwl_tx_beacon_cmd { | 2707 | struct iwl_tx_beacon_cmd { |
2350 | struct iwl_tx_cmd tx; | 2708 | struct iwl_tx_cmd tx; |
2351 | __le16 tim_idx; | 2709 | __le16 tim_idx; |
@@ -2382,6 +2740,76 @@ struct rate_histogram { | |||
2382 | 2740 | ||
2383 | /* statistics command response */ | 2741 | /* statistics command response */ |
2384 | 2742 | ||
2743 | struct iwl39_statistics_rx_phy { | ||
2744 | __le32 ina_cnt; | ||
2745 | __le32 fina_cnt; | ||
2746 | __le32 plcp_err; | ||
2747 | __le32 crc32_err; | ||
2748 | __le32 overrun_err; | ||
2749 | __le32 early_overrun_err; | ||
2750 | __le32 crc32_good; | ||
2751 | __le32 false_alarm_cnt; | ||
2752 | __le32 fina_sync_err_cnt; | ||
2753 | __le32 sfd_timeout; | ||
2754 | __le32 fina_timeout; | ||
2755 | __le32 unresponded_rts; | ||
2756 | __le32 rxe_frame_limit_overrun; | ||
2757 | __le32 sent_ack_cnt; | ||
2758 | __le32 sent_cts_cnt; | ||
2759 | } __attribute__ ((packed)); | ||
2760 | |||
2761 | struct iwl39_statistics_rx_non_phy { | ||
2762 | __le32 bogus_cts; /* CTS received when not expecting CTS */ | ||
2763 | __le32 bogus_ack; /* ACK received when not expecting ACK */ | ||
2764 | __le32 non_bssid_frames; /* number of frames with BSSID that | ||
2765 | * doesn't belong to the STA BSSID */ | ||
2766 | __le32 filtered_frames; /* count frames that were dumped in the | ||
2767 | * filtering process */ | ||
2768 | __le32 non_channel_beacons; /* beacons with our bss id but not on | ||
2769 | * our serving channel */ | ||
2770 | } __attribute__ ((packed)); | ||
2771 | |||
2772 | struct iwl39_statistics_rx { | ||
2773 | struct iwl39_statistics_rx_phy ofdm; | ||
2774 | struct iwl39_statistics_rx_phy cck; | ||
2775 | struct iwl39_statistics_rx_non_phy general; | ||
2776 | } __attribute__ ((packed)); | ||
2777 | |||
2778 | struct iwl39_statistics_tx { | ||
2779 | __le32 preamble_cnt; | ||
2780 | __le32 rx_detected_cnt; | ||
2781 | __le32 bt_prio_defer_cnt; | ||
2782 | __le32 bt_prio_kill_cnt; | ||
2783 | __le32 few_bytes_cnt; | ||
2784 | __le32 cts_timeout; | ||
2785 | __le32 ack_timeout; | ||
2786 | __le32 expected_ack_cnt; | ||
2787 | __le32 actual_ack_cnt; | ||
2788 | } __attribute__ ((packed)); | ||
2789 | |||
2790 | struct statistics_dbg { | ||
2791 | __le32 burst_check; | ||
2792 | __le32 burst_count; | ||
2793 | __le32 reserved[4]; | ||
2794 | } __attribute__ ((packed)); | ||
2795 | |||
2796 | struct iwl39_statistics_div { | ||
2797 | __le32 tx_on_a; | ||
2798 | __le32 tx_on_b; | ||
2799 | __le32 exec_time; | ||
2800 | __le32 probe_time; | ||
2801 | } __attribute__ ((packed)); | ||
2802 | |||
2803 | struct iwl39_statistics_general { | ||
2804 | __le32 temperature; | ||
2805 | struct statistics_dbg dbg; | ||
2806 | __le32 sleep_time; | ||
2807 | __le32 slots_out; | ||
2808 | __le32 slots_idle; | ||
2809 | __le32 ttl_timestamp; | ||
2810 | struct iwl39_statistics_div div; | ||
2811 | } __attribute__ ((packed)); | ||
2812 | |||
2385 | struct statistics_rx_phy { | 2813 | struct statistics_rx_phy { |
2386 | __le32 ina_cnt; | 2814 | __le32 ina_cnt; |
2387 | __le32 fina_cnt; | 2815 | __le32 fina_cnt; |
@@ -2493,11 +2921,6 @@ struct statistics_tx { | |||
2493 | struct statistics_tx_non_phy_agg agg; | 2921 | struct statistics_tx_non_phy_agg agg; |
2494 | } __attribute__ ((packed)); | 2922 | } __attribute__ ((packed)); |
2495 | 2923 | ||
2496 | struct statistics_dbg { | ||
2497 | __le32 burst_check; | ||
2498 | __le32 burst_count; | ||
2499 | __le32 reserved[4]; | ||
2500 | } __attribute__ ((packed)); | ||
2501 | 2924 | ||
2502 | struct statistics_div { | 2925 | struct statistics_div { |
2503 | __le32 tx_on_a; | 2926 | __le32 tx_on_a; |
@@ -2561,6 +2984,14 @@ struct iwl_statistics_cmd { | |||
2561 | */ | 2984 | */ |
2562 | #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2) | 2985 | #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2) |
2563 | #define STATISTICS_REPLY_FLG_FAT_MODE_MSK cpu_to_le32(0x8) | 2986 | #define STATISTICS_REPLY_FLG_FAT_MODE_MSK cpu_to_le32(0x8) |
2987 | |||
2988 | struct iwl3945_notif_statistics { | ||
2989 | __le32 flag; | ||
2990 | struct iwl39_statistics_rx rx; | ||
2991 | struct iwl39_statistics_tx tx; | ||
2992 | struct iwl39_statistics_general general; | ||
2993 | } __attribute__ ((packed)); | ||
2994 | |||
2564 | struct iwl_notif_statistics { | 2995 | struct iwl_notif_statistics { |
2565 | __le32 flag; | 2996 | __le32 flag; |
2566 | struct statistics_rx rx; | 2997 | struct statistics_rx rx; |
@@ -3012,6 +3443,10 @@ struct iwl_rx_packet { | |||
3012 | __le32 len; | 3443 | __le32 len; |
3013 | struct iwl_cmd_header hdr; | 3444 | struct iwl_cmd_header hdr; |
3014 | union { | 3445 | union { |
3446 | struct iwl3945_rx_frame rx_frame; | ||
3447 | struct iwl3945_tx_resp tx_resp; | ||
3448 | struct iwl3945_beacon_notif beacon_status; | ||
3449 | |||
3015 | struct iwl_alive_resp alive_frame; | 3450 | struct iwl_alive_resp alive_frame; |
3016 | struct iwl_spectrum_notification spectrum_notif; | 3451 | struct iwl_spectrum_notification spectrum_notif; |
3017 | struct iwl_csa_notification csa_notif; | 3452 | struct iwl_csa_notification csa_notif; |
@@ -3029,6 +3464,6 @@ struct iwl_rx_packet { | |||
3029 | } u; | 3464 | } u; |
3030 | } __attribute__ ((packed)); | 3465 | } __attribute__ ((packed)); |
3031 | 3466 | ||
3032 | int iwl_agn_check_rxon_cmd(struct iwl_rxon_cmd *rxon); | 3467 | int iwl_agn_check_rxon_cmd(struct iwl_priv *priv); |
3033 | 3468 | ||
3034 | #endif /* __iwl_commands_h__ */ | 3469 | #endif /* __iwl_commands_h__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c index 73d7973707eb..21f386568c9c 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.c +++ b/drivers/net/wireless/iwlwifi/iwl-core.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -170,7 +170,8 @@ struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg, | |||
170 | struct ieee80211_hw *hw = | 170 | struct ieee80211_hw *hw = |
171 | ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops); | 171 | ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops); |
172 | if (hw == NULL) { | 172 | if (hw == NULL) { |
173 | IWL_ERROR("Can not allocate network device\n"); | 173 | printk(KERN_ERR "%s: Can not allocate network device\n", |
174 | cfg->name); | ||
174 | goto out; | 175 | goto out; |
175 | } | 176 | } |
176 | 177 | ||
@@ -210,7 +211,7 @@ int iwl_hw_nic_init(struct iwl_priv *priv) | |||
210 | if (!rxq->bd) { | 211 | if (!rxq->bd) { |
211 | ret = iwl_rx_queue_alloc(priv); | 212 | ret = iwl_rx_queue_alloc(priv); |
212 | if (ret) { | 213 | if (ret) { |
213 | IWL_ERROR("Unable to initialize Rx queue\n"); | 214 | IWL_ERR(priv, "Unable to initialize Rx queue\n"); |
214 | return -ENOMEM; | 215 | return -ENOMEM; |
215 | } | 216 | } |
216 | } else | 217 | } else |
@@ -405,7 +406,7 @@ static void iwlcore_init_hw_rates(struct iwl_priv *priv, | |||
405 | /** | 406 | /** |
406 | * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom | 407 | * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom |
407 | */ | 408 | */ |
408 | static int iwlcore_init_geos(struct iwl_priv *priv) | 409 | int iwlcore_init_geos(struct iwl_priv *priv) |
409 | { | 410 | { |
410 | struct iwl_channel_info *ch; | 411 | struct iwl_channel_info *ch; |
411 | struct ieee80211_supported_band *sband; | 412 | struct ieee80211_supported_band *sband; |
@@ -457,8 +458,6 @@ static int iwlcore_init_geos(struct iwl_priv *priv) | |||
457 | priv->ieee_channels = channels; | 458 | priv->ieee_channels = channels; |
458 | priv->ieee_rates = rates; | 459 | priv->ieee_rates = rates; |
459 | 460 | ||
460 | iwlcore_init_hw_rates(priv, rates); | ||
461 | |||
462 | for (i = 0; i < priv->channel_count; i++) { | 461 | for (i = 0; i < priv->channel_count; i++) { |
463 | ch = &priv->channel_info[i]; | 462 | ch = &priv->channel_info[i]; |
464 | 463 | ||
@@ -510,33 +509,33 @@ static int iwlcore_init_geos(struct iwl_priv *priv) | |||
510 | 509 | ||
511 | if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && | 510 | if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && |
512 | priv->cfg->sku & IWL_SKU_A) { | 511 | priv->cfg->sku & IWL_SKU_A) { |
513 | printk(KERN_INFO DRV_NAME | 512 | IWL_INFO(priv, "Incorrectly detected BG card as ABG. " |
514 | ": Incorrectly detected BG card as ABG. Please send " | 513 | "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n", |
515 | "your PCI ID 0x%04X:0x%04X to maintainer.\n", | 514 | priv->pci_dev->device, |
516 | priv->pci_dev->device, priv->pci_dev->subsystem_device); | 515 | priv->pci_dev->subsystem_device); |
517 | priv->cfg->sku &= ~IWL_SKU_A; | 516 | priv->cfg->sku &= ~IWL_SKU_A; |
518 | } | 517 | } |
519 | 518 | ||
520 | printk(KERN_INFO DRV_NAME | 519 | IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n", |
521 | ": Tunable channels: %d 802.11bg, %d 802.11a channels\n", | 520 | priv->bands[IEEE80211_BAND_2GHZ].n_channels, |
522 | priv->bands[IEEE80211_BAND_2GHZ].n_channels, | 521 | priv->bands[IEEE80211_BAND_5GHZ].n_channels); |
523 | priv->bands[IEEE80211_BAND_5GHZ].n_channels); | ||
524 | |||
525 | 522 | ||
526 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); | 523 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); |
527 | 524 | ||
528 | return 0; | 525 | return 0; |
529 | } | 526 | } |
527 | EXPORT_SYMBOL(iwlcore_init_geos); | ||
530 | 528 | ||
531 | /* | 529 | /* |
532 | * iwlcore_free_geos - undo allocations in iwlcore_init_geos | 530 | * iwlcore_free_geos - undo allocations in iwlcore_init_geos |
533 | */ | 531 | */ |
534 | static void iwlcore_free_geos(struct iwl_priv *priv) | 532 | void iwlcore_free_geos(struct iwl_priv *priv) |
535 | { | 533 | { |
536 | kfree(priv->ieee_channels); | 534 | kfree(priv->ieee_channels); |
537 | kfree(priv->ieee_rates); | 535 | kfree(priv->ieee_rates); |
538 | clear_bit(STATUS_GEO_CONFIGURED, &priv->status); | 536 | clear_bit(STATUS_GEO_CONFIGURED, &priv->status); |
539 | } | 537 | } |
538 | EXPORT_SYMBOL(iwlcore_free_geos); | ||
540 | 539 | ||
541 | static bool is_single_rx_stream(struct iwl_priv *priv) | 540 | static bool is_single_rx_stream(struct iwl_priv *priv) |
542 | { | 541 | { |
@@ -679,7 +678,7 @@ static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt) | |||
679 | break; | 678 | break; |
680 | case WLAN_HT_CAP_SM_PS_INVALID: | 679 | case WLAN_HT_CAP_SM_PS_INVALID: |
681 | default: | 680 | default: |
682 | IWL_ERROR("invalid mimo ps mode %d\n", | 681 | IWL_ERR(priv, "invalid mimo ps mode %d\n", |
683 | priv->current_ht_config.sm_ps); | 682 | priv->current_ht_config.sm_ps); |
684 | WARN_ON(1); | 683 | WARN_ON(1); |
685 | idle_cnt = -1; | 684 | idle_cnt = -1; |
@@ -700,6 +699,18 @@ static u8 iwl_count_chain_bitmap(u32 chain_bitmap) | |||
700 | } | 699 | } |
701 | 700 | ||
702 | /** | 701 | /** |
702 | * iwl_is_monitor_mode - Determine if interface in monitor mode | ||
703 | * | ||
704 | * priv->iw_mode is set in add_interface, but add_interface is | ||
705 | * never called for monitor mode. The only way mac80211 informs us about | ||
706 | * monitor mode is through configuring filters (call to configure_filter). | ||
707 | */ | ||
708 | static bool iwl_is_monitor_mode(struct iwl_priv *priv) | ||
709 | { | ||
710 | return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK); | ||
711 | } | ||
712 | |||
713 | /** | ||
703 | * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image | 714 | * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image |
704 | * | 715 | * |
705 | * Selects how many and which Rx receivers/antennas/chains to use. | 716 | * Selects how many and which Rx receivers/antennas/chains to use. |
@@ -742,6 +753,19 @@ void iwl_set_rxon_chain(struct iwl_priv *priv) | |||
742 | rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS; | 753 | rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS; |
743 | rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS; | 754 | rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS; |
744 | 755 | ||
756 | /* copied from 'iwl_bg_request_scan()' */ | ||
757 | /* Force use of chains B and C (0x6) for Rx for 4965 | ||
758 | * Avoid A (0x1) because of its off-channel reception on A-band. | ||
759 | * MIMO is not used here, but value is required */ | ||
760 | if (iwl_is_monitor_mode(priv) && | ||
761 | !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) && | ||
762 | ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) { | ||
763 | rx_chain = 0x07 << RXON_RX_CHAIN_VALID_POS; | ||
764 | rx_chain |= 0x06 << RXON_RX_CHAIN_FORCE_SEL_POS; | ||
765 | rx_chain |= 0x07 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS; | ||
766 | rx_chain |= 0x01 << RXON_RX_CHAIN_DRIVER_FORCE_POS; | ||
767 | } | ||
768 | |||
745 | priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain); | 769 | priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain); |
746 | 770 | ||
747 | if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam) | 771 | if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam) |
@@ -806,12 +830,13 @@ int iwl_setup_mac(struct iwl_priv *priv) | |||
806 | /* Tell mac80211 our characteristics */ | 830 | /* Tell mac80211 our characteristics */ |
807 | hw->flags = IEEE80211_HW_SIGNAL_DBM | | 831 | hw->flags = IEEE80211_HW_SIGNAL_DBM | |
808 | IEEE80211_HW_NOISE_DBM | | 832 | IEEE80211_HW_NOISE_DBM | |
809 | IEEE80211_HW_AMPDU_AGGREGATION; | 833 | IEEE80211_HW_AMPDU_AGGREGATION | |
834 | IEEE80211_HW_SUPPORTS_PS; | ||
810 | hw->wiphy->interface_modes = | 835 | hw->wiphy->interface_modes = |
811 | BIT(NL80211_IFTYPE_STATION) | | 836 | BIT(NL80211_IFTYPE_STATION) | |
812 | BIT(NL80211_IFTYPE_ADHOC); | 837 | BIT(NL80211_IFTYPE_ADHOC); |
813 | 838 | ||
814 | hw->wiphy->fw_handles_regulatory = true; | 839 | hw->wiphy->custom_regulatory = true; |
815 | 840 | ||
816 | /* Default value; 4 EDCA QOS priorities */ | 841 | /* Default value; 4 EDCA QOS priorities */ |
817 | hw->queues = 4; | 842 | hw->queues = 4; |
@@ -831,7 +856,7 @@ int iwl_setup_mac(struct iwl_priv *priv) | |||
831 | 856 | ||
832 | ret = ieee80211_register_hw(priv->hw); | 857 | ret = ieee80211_register_hw(priv->hw); |
833 | if (ret) { | 858 | if (ret) { |
834 | IWL_ERROR("Failed to register hw (error %d)\n", ret); | 859 | IWL_ERR(priv, "Failed to register hw (error %d)\n", ret); |
835 | return ret; | 860 | return ret; |
836 | } | 861 | } |
837 | priv->mac80211_registered = 1; | 862 | priv->mac80211_registered = 1; |
@@ -863,7 +888,6 @@ int iwl_init_drv(struct iwl_priv *priv) | |||
863 | { | 888 | { |
864 | int ret; | 889 | int ret; |
865 | 890 | ||
866 | priv->retry_rate = 1; | ||
867 | priv->ibss_beacon = NULL; | 891 | priv->ibss_beacon = NULL; |
868 | 892 | ||
869 | spin_lock_init(&priv->lock); | 893 | spin_lock_init(&priv->lock); |
@@ -903,15 +927,16 @@ int iwl_init_drv(struct iwl_priv *priv) | |||
903 | 927 | ||
904 | ret = iwl_init_channel_map(priv); | 928 | ret = iwl_init_channel_map(priv); |
905 | if (ret) { | 929 | if (ret) { |
906 | IWL_ERROR("initializing regulatory failed: %d\n", ret); | 930 | IWL_ERR(priv, "initializing regulatory failed: %d\n", ret); |
907 | goto err; | 931 | goto err; |
908 | } | 932 | } |
909 | 933 | ||
910 | ret = iwlcore_init_geos(priv); | 934 | ret = iwlcore_init_geos(priv); |
911 | if (ret) { | 935 | if (ret) { |
912 | IWL_ERROR("initializing geos failed: %d\n", ret); | 936 | IWL_ERR(priv, "initializing geos failed: %d\n", ret); |
913 | goto err_free_channel_map; | 937 | goto err_free_channel_map; |
914 | } | 938 | } |
939 | iwlcore_init_hw_rates(priv, priv->ieee_rates); | ||
915 | 940 | ||
916 | return 0; | 941 | return 0; |
917 | 942 | ||
@@ -926,13 +951,13 @@ int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force) | |||
926 | { | 951 | { |
927 | int ret = 0; | 952 | int ret = 0; |
928 | if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) { | 953 | if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) { |
929 | IWL_WARNING("Requested user TXPOWER %d below limit.\n", | 954 | IWL_WARN(priv, "Requested user TXPOWER %d below limit.\n", |
930 | priv->tx_power_user_lmt); | 955 | priv->tx_power_user_lmt); |
931 | return -EINVAL; | 956 | return -EINVAL; |
932 | } | 957 | } |
933 | 958 | ||
934 | if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) { | 959 | if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) { |
935 | IWL_WARNING("Requested user TXPOWER %d above limit.\n", | 960 | IWL_WARN(priv, "Requested user TXPOWER %d above limit.\n", |
936 | priv->tx_power_user_lmt); | 961 | priv->tx_power_user_lmt); |
937 | return -EINVAL; | 962 | return -EINVAL; |
938 | } | 963 | } |
@@ -982,6 +1007,21 @@ void iwl_enable_interrupts(struct iwl_priv *priv) | |||
982 | } | 1007 | } |
983 | EXPORT_SYMBOL(iwl_enable_interrupts); | 1008 | EXPORT_SYMBOL(iwl_enable_interrupts); |
984 | 1009 | ||
1010 | int iwl_send_bt_config(struct iwl_priv *priv) | ||
1011 | { | ||
1012 | struct iwl_bt_cmd bt_cmd = { | ||
1013 | .flags = 3, | ||
1014 | .lead_time = 0xAA, | ||
1015 | .max_kill = 1, | ||
1016 | .kill_ack_mask = 0, | ||
1017 | .kill_cts_mask = 0, | ||
1018 | }; | ||
1019 | |||
1020 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, | ||
1021 | sizeof(struct iwl_bt_cmd), &bt_cmd); | ||
1022 | } | ||
1023 | EXPORT_SYMBOL(iwl_send_bt_config); | ||
1024 | |||
985 | int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags) | 1025 | int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags) |
986 | { | 1026 | { |
987 | u32 stat_flags = 0; | 1027 | u32 stat_flags = 0; |
@@ -1018,7 +1058,7 @@ static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 | |||
1018 | /* NOTE: Use the debugless read so we don't flood kernel log | 1058 | /* NOTE: Use the debugless read so we don't flood kernel log |
1019 | * if IWL_DL_IO is set */ | 1059 | * if IWL_DL_IO is set */ |
1020 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, | 1060 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
1021 | i + RTC_INST_LOWER_BOUND); | 1061 | i + IWL49_RTC_INST_LOWER_BOUND); |
1022 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | 1062 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
1023 | if (val != le32_to_cpu(*image)) { | 1063 | if (val != le32_to_cpu(*image)) { |
1024 | ret = -EIO; | 1064 | ret = -EIO; |
@@ -1051,7 +1091,8 @@ static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image, | |||
1051 | if (ret) | 1091 | if (ret) |
1052 | return ret; | 1092 | return ret; |
1053 | 1093 | ||
1054 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND); | 1094 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
1095 | IWL49_RTC_INST_LOWER_BOUND); | ||
1055 | 1096 | ||
1056 | errcnt = 0; | 1097 | errcnt = 0; |
1057 | for (; len > 0; len -= sizeof(u32), image++) { | 1098 | for (; len > 0; len -= sizeof(u32), image++) { |
@@ -1060,7 +1101,7 @@ static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image, | |||
1060 | * if IWL_DL_IO is set */ | 1101 | * if IWL_DL_IO is set */ |
1061 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | 1102 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
1062 | if (val != le32_to_cpu(*image)) { | 1103 | if (val != le32_to_cpu(*image)) { |
1063 | IWL_ERROR("uCode INST section is invalid at " | 1104 | IWL_ERR(priv, "uCode INST section is invalid at " |
1064 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | 1105 | "offset 0x%x, is 0x%x, s/b 0x%x\n", |
1065 | save_len - len, val, le32_to_cpu(*image)); | 1106 | save_len - len, val, le32_to_cpu(*image)); |
1066 | ret = -EIO; | 1107 | ret = -EIO; |
@@ -1116,7 +1157,7 @@ int iwl_verify_ucode(struct iwl_priv *priv) | |||
1116 | return 0; | 1157 | return 0; |
1117 | } | 1158 | } |
1118 | 1159 | ||
1119 | IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); | 1160 | IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); |
1120 | 1161 | ||
1121 | /* Since nothing seems to match, show first several data entries in | 1162 | /* Since nothing seems to match, show first several data entries in |
1122 | * instruction SRAM, so maybe visual inspection will give a clue. | 1163 | * instruction SRAM, so maybe visual inspection will give a clue. |
@@ -1188,21 +1229,22 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv) | |||
1188 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); | 1229 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); |
1189 | 1230 | ||
1190 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { | 1231 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
1191 | IWL_ERROR("Not valid error log pointer 0x%08X\n", base); | 1232 | IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base); |
1192 | return; | 1233 | return; |
1193 | } | 1234 | } |
1194 | 1235 | ||
1195 | ret = iwl_grab_nic_access(priv); | 1236 | ret = iwl_grab_nic_access(priv); |
1196 | if (ret) { | 1237 | if (ret) { |
1197 | IWL_WARNING("Can not read from adapter at this time.\n"); | 1238 | IWL_WARN(priv, "Can not read from adapter at this time.\n"); |
1198 | return; | 1239 | return; |
1199 | } | 1240 | } |
1200 | 1241 | ||
1201 | count = iwl_read_targ_mem(priv, base); | 1242 | count = iwl_read_targ_mem(priv, base); |
1202 | 1243 | ||
1203 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | 1244 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { |
1204 | IWL_ERROR("Start IWL Error Log Dump:\n"); | 1245 | IWL_ERR(priv, "Start IWL Error Log Dump:\n"); |
1205 | IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count); | 1246 | IWL_ERR(priv, "Status: 0x%08lX, count: %d\n", |
1247 | priv->status, count); | ||
1206 | } | 1248 | } |
1207 | 1249 | ||
1208 | desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32)); | 1250 | desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32)); |
@@ -1215,12 +1257,12 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv) | |||
1215 | line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32)); | 1257 | line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32)); |
1216 | time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32)); | 1258 | time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32)); |
1217 | 1259 | ||
1218 | IWL_ERROR("Desc Time " | 1260 | IWL_ERR(priv, "Desc Time " |
1219 | "data1 data2 line\n"); | 1261 | "data1 data2 line\n"); |
1220 | IWL_ERROR("%-28s (#%02d) %010u 0x%08X 0x%08X %u\n", | 1262 | IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n", |
1221 | desc_lookup(desc), desc, time, data1, data2, line); | 1263 | desc_lookup(desc), desc, time, data1, data2, line); |
1222 | IWL_ERROR("blink1 blink2 ilink1 ilink2\n"); | 1264 | IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n"); |
1223 | IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2, | 1265 | IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2, |
1224 | ilink1, ilink2); | 1266 | ilink1, ilink2); |
1225 | 1267 | ||
1226 | iwl_release_nic_access(priv); | 1268 | iwl_release_nic_access(priv); |
@@ -1266,11 +1308,11 @@ static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx, | |||
1266 | ptr += sizeof(u32); | 1308 | ptr += sizeof(u32); |
1267 | if (mode == 0) { | 1309 | if (mode == 0) { |
1268 | /* data, ev */ | 1310 | /* data, ev */ |
1269 | IWL_ERROR("EVT_LOG:0x%08x:%04u\n", time, ev); | 1311 | IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev); |
1270 | } else { | 1312 | } else { |
1271 | data = iwl_read_targ_mem(priv, ptr); | 1313 | data = iwl_read_targ_mem(priv, ptr); |
1272 | ptr += sizeof(u32); | 1314 | ptr += sizeof(u32); |
1273 | IWL_ERROR("EVT_LOGT:%010u:0x%08x:%04u\n", | 1315 | IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n", |
1274 | time, data, ev); | 1316 | time, data, ev); |
1275 | } | 1317 | } |
1276 | } | 1318 | } |
@@ -1292,13 +1334,13 @@ void iwl_dump_nic_event_log(struct iwl_priv *priv) | |||
1292 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | 1334 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); |
1293 | 1335 | ||
1294 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { | 1336 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
1295 | IWL_ERROR("Invalid event log pointer 0x%08X\n", base); | 1337 | IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base); |
1296 | return; | 1338 | return; |
1297 | } | 1339 | } |
1298 | 1340 | ||
1299 | ret = iwl_grab_nic_access(priv); | 1341 | ret = iwl_grab_nic_access(priv); |
1300 | if (ret) { | 1342 | if (ret) { |
1301 | IWL_WARNING("Can not read from adapter at this time.\n"); | 1343 | IWL_WARN(priv, "Can not read from adapter at this time.\n"); |
1302 | return; | 1344 | return; |
1303 | } | 1345 | } |
1304 | 1346 | ||
@@ -1312,12 +1354,12 @@ void iwl_dump_nic_event_log(struct iwl_priv *priv) | |||
1312 | 1354 | ||
1313 | /* bail out if nothing in log */ | 1355 | /* bail out if nothing in log */ |
1314 | if (size == 0) { | 1356 | if (size == 0) { |
1315 | IWL_ERROR("Start IWL Event Log Dump: nothing in log\n"); | 1357 | IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n"); |
1316 | iwl_release_nic_access(priv); | 1358 | iwl_release_nic_access(priv); |
1317 | return; | 1359 | return; |
1318 | } | 1360 | } |
1319 | 1361 | ||
1320 | IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n", | 1362 | IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n", |
1321 | size, num_wraps); | 1363 | size, num_wraps); |
1322 | 1364 | ||
1323 | /* if uCode has wrapped back to top of log, start at the oldest entry, | 1365 | /* if uCode has wrapped back to top of log, start at the oldest entry, |
@@ -1349,7 +1391,7 @@ void iwl_rf_kill_ct_config(struct iwl_priv *priv) | |||
1349 | ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD, | 1391 | ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD, |
1350 | sizeof(cmd), &cmd); | 1392 | sizeof(cmd), &cmd); |
1351 | if (ret) | 1393 | if (ret) |
1352 | IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n"); | 1394 | IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n"); |
1353 | else | 1395 | else |
1354 | IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, " | 1396 | IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, " |
1355 | "critical temperature is %d\n", | 1397 | "critical temperature is %d\n", |
@@ -1368,7 +1410,7 @@ EXPORT_SYMBOL(iwl_rf_kill_ct_config); | |||
1368 | * When in the 'halt' state, the card is shut down and must be fully | 1410 | * When in the 'halt' state, the card is shut down and must be fully |
1369 | * restarted to come back on. | 1411 | * restarted to come back on. |
1370 | */ | 1412 | */ |
1371 | static int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag) | 1413 | int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag) |
1372 | { | 1414 | { |
1373 | struct iwl_host_cmd cmd = { | 1415 | struct iwl_host_cmd cmd = { |
1374 | .id = REPLY_CARD_STATE_CMD, | 1416 | .id = REPLY_CARD_STATE_CMD, |
@@ -1379,6 +1421,7 @@ static int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag) | |||
1379 | 1421 | ||
1380 | return iwl_send_cmd(priv, &cmd); | 1422 | return iwl_send_cmd(priv, &cmd); |
1381 | } | 1423 | } |
1424 | EXPORT_SYMBOL(iwl_send_card_state); | ||
1382 | 1425 | ||
1383 | void iwl_radio_kill_sw_disable_radio(struct iwl_priv *priv) | 1426 | void iwl_radio_kill_sw_disable_radio(struct iwl_priv *priv) |
1384 | { | 1427 | { |
@@ -1463,3 +1506,39 @@ int iwl_radio_kill_sw_enable_radio(struct iwl_priv *priv) | |||
1463 | return 1; | 1506 | return 1; |
1464 | } | 1507 | } |
1465 | EXPORT_SYMBOL(iwl_radio_kill_sw_enable_radio); | 1508 | EXPORT_SYMBOL(iwl_radio_kill_sw_enable_radio); |
1509 | |||
1510 | void iwl_bg_rf_kill(struct work_struct *work) | ||
1511 | { | ||
1512 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); | ||
1513 | |||
1514 | wake_up_interruptible(&priv->wait_command_queue); | ||
1515 | |||
1516 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
1517 | return; | ||
1518 | |||
1519 | mutex_lock(&priv->mutex); | ||
1520 | |||
1521 | if (!iwl_is_rfkill(priv)) { | ||
1522 | IWL_DEBUG(IWL_DL_RF_KILL, | ||
1523 | "HW and/or SW RF Kill no longer active, restarting " | ||
1524 | "device\n"); | ||
1525 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status) && | ||
1526 | test_bit(STATUS_ALIVE, &priv->status)) | ||
1527 | queue_work(priv->workqueue, &priv->restart); | ||
1528 | } else { | ||
1529 | /* make sure mac80211 stop sending Tx frame */ | ||
1530 | if (priv->mac80211_registered) | ||
1531 | ieee80211_stop_queues(priv->hw); | ||
1532 | |||
1533 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | ||
1534 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | ||
1535 | "disabled by SW switch\n"); | ||
1536 | else | ||
1537 | IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n" | ||
1538 | "Kill switch must be turned off for " | ||
1539 | "wireless networking to work.\n"); | ||
1540 | } | ||
1541 | mutex_unlock(&priv->mutex); | ||
1542 | iwl_rfkill_set_hw_state(priv); | ||
1543 | } | ||
1544 | EXPORT_SYMBOL(iwl_bg_rf_kill); | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h index 7c3a20a986bb..3c6a4b0c2c3b 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.h +++ b/drivers/net/wireless/iwlwifi/iwl-core.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -71,7 +71,7 @@ struct iwl_cmd; | |||
71 | 71 | ||
72 | 72 | ||
73 | #define IWLWIFI_VERSION "1.3.27k" | 73 | #define IWLWIFI_VERSION "1.3.27k" |
74 | #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation" | 74 | #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation" |
75 | #define DRV_AUTHOR "<ilw@linux.intel.com>" | 75 | #define DRV_AUTHOR "<ilw@linux.intel.com>" |
76 | 76 | ||
77 | #define IWL_PCI_DEVICE(dev, subdev, cfg) \ | 77 | #define IWL_PCI_DEVICE(dev, subdev, cfg) \ |
@@ -110,6 +110,14 @@ struct iwl_lib_ops { | |||
110 | void (*txq_inval_byte_cnt_tbl)(struct iwl_priv *priv, | 110 | void (*txq_inval_byte_cnt_tbl)(struct iwl_priv *priv, |
111 | struct iwl_tx_queue *txq); | 111 | struct iwl_tx_queue *txq); |
112 | void (*txq_set_sched)(struct iwl_priv *priv, u32 mask); | 112 | void (*txq_set_sched)(struct iwl_priv *priv, u32 mask); |
113 | int (*txq_attach_buf_to_tfd)(struct iwl_priv *priv, | ||
114 | struct iwl_tx_queue *txq, | ||
115 | dma_addr_t addr, | ||
116 | u16 len, u8 reset, u8 pad); | ||
117 | void (*txq_free_tfd)(struct iwl_priv *priv, | ||
118 | struct iwl_tx_queue *txq); | ||
119 | int (*txq_init)(struct iwl_priv *priv, | ||
120 | struct iwl_tx_queue *txq); | ||
113 | /* aggregations */ | 121 | /* aggregations */ |
114 | int (*txq_agg_enable)(struct iwl_priv *priv, int txq_id, int tx_fifo, | 122 | int (*txq_agg_enable)(struct iwl_priv *priv, int txq_id, int tx_fifo, |
115 | int sta_id, int tid, u16 ssn_idx); | 123 | int sta_id, int tid, u16 ssn_idx); |
@@ -252,9 +260,18 @@ void iwl_rx_statistics(struct iwl_priv *priv, | |||
252 | * TX | 260 | * TX |
253 | ******************************************************/ | 261 | ******************************************************/ |
254 | int iwl_txq_ctx_reset(struct iwl_priv *priv); | 262 | int iwl_txq_ctx_reset(struct iwl_priv *priv); |
263 | void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq); | ||
264 | int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, | ||
265 | struct iwl_tx_queue *txq, | ||
266 | dma_addr_t addr, u16 len, u8 reset, u8 pad); | ||
255 | int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb); | 267 | int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb); |
256 | void iwl_hw_txq_ctx_free(struct iwl_priv *priv); | 268 | void iwl_hw_txq_ctx_free(struct iwl_priv *priv); |
269 | int iwl_hw_tx_queue_init(struct iwl_priv *priv, | ||
270 | struct iwl_tx_queue *txq); | ||
257 | int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq); | 271 | int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq); |
272 | int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq, | ||
273 | int slots_num, u32 txq_id); | ||
274 | void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id); | ||
258 | int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn); | 275 | int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn); |
259 | int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid); | 276 | int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid); |
260 | int iwl_txq_check_empty(struct iwl_priv *priv, int sta_id, u8 tid, int txq_id); | 277 | int iwl_txq_check_empty(struct iwl_priv *priv, int sta_id, u8 tid, int txq_id); |
@@ -267,7 +284,7 @@ int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force); | |||
267 | * RF -Kill - here and not in iwl-rfkill.h to be available when | 284 | * RF -Kill - here and not in iwl-rfkill.h to be available when |
268 | * RF-kill subsystem is not compiled. | 285 | * RF-kill subsystem is not compiled. |
269 | ****************************************************/ | 286 | ****************************************************/ |
270 | void iwl_rf_kill(struct iwl_priv *priv); | 287 | void iwl_bg_rf_kill(struct work_struct *work); |
271 | void iwl_radio_kill_sw_disable_radio(struct iwl_priv *priv); | 288 | void iwl_radio_kill_sw_disable_radio(struct iwl_priv *priv); |
272 | int iwl_radio_kill_sw_enable_radio(struct iwl_priv *priv); | 289 | int iwl_radio_kill_sw_enable_radio(struct iwl_priv *priv); |
273 | 290 | ||
@@ -306,8 +323,29 @@ void iwl_init_scan_params(struct iwl_priv *priv); | |||
306 | int iwl_scan_cancel(struct iwl_priv *priv); | 323 | int iwl_scan_cancel(struct iwl_priv *priv); |
307 | int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms); | 324 | int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms); |
308 | int iwl_scan_initiate(struct iwl_priv *priv); | 325 | int iwl_scan_initiate(struct iwl_priv *priv); |
326 | u16 iwl_fill_probe_req(struct iwl_priv *priv, enum ieee80211_band band, | ||
327 | struct ieee80211_mgmt *frame, int left); | ||
309 | void iwl_setup_rx_scan_handlers(struct iwl_priv *priv); | 328 | void iwl_setup_rx_scan_handlers(struct iwl_priv *priv); |
329 | u16 iwl_get_active_dwell_time(struct iwl_priv *priv, | ||
330 | enum ieee80211_band band, | ||
331 | u8 n_probes); | ||
332 | u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, | ||
333 | enum ieee80211_band band); | ||
334 | void iwl_bg_scan_check(struct work_struct *data); | ||
335 | void iwl_bg_abort_scan(struct work_struct *work); | ||
336 | void iwl_bg_scan_completed(struct work_struct *work); | ||
310 | void iwl_setup_scan_deferred_work(struct iwl_priv *priv); | 337 | void iwl_setup_scan_deferred_work(struct iwl_priv *priv); |
338 | int iwl_send_scan_abort(struct iwl_priv *priv); | ||
339 | |||
340 | /* For faster active scanning, scan will move to the next channel if fewer than | ||
341 | * PLCP_QUIET_THRESH packets are heard on this channel within | ||
342 | * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell | ||
343 | * time if it's a quiet channel (nothing responded to our probe, and there's | ||
344 | * no other traffic). | ||
345 | * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */ | ||
346 | #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */ | ||
347 | #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */ | ||
348 | |||
311 | 349 | ||
312 | /******************************************************************************* | 350 | /******************************************************************************* |
313 | * Calibrations - implemented in iwl-calib.c | 351 | * Calibrations - implemented in iwl-calib.c |
@@ -342,6 +380,9 @@ int iwl_send_cmd_pdu_async(struct iwl_priv *priv, u8 id, u16 len, | |||
342 | 380 | ||
343 | int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd); | 381 | int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd); |
344 | 382 | ||
383 | int iwl_send_card_state(struct iwl_priv *priv, u32 flags, | ||
384 | u8 meta_flag); | ||
385 | |||
345 | /***************************************************** | 386 | /***************************************************** |
346 | * PCI * | 387 | * PCI * |
347 | *****************************************************/ | 388 | *****************************************************/ |
@@ -354,6 +395,11 @@ void iwl_enable_interrupts(struct iwl_priv *priv); | |||
354 | void iwl_dump_nic_error_log(struct iwl_priv *priv); | 395 | void iwl_dump_nic_error_log(struct iwl_priv *priv); |
355 | void iwl_dump_nic_event_log(struct iwl_priv *priv); | 396 | void iwl_dump_nic_event_log(struct iwl_priv *priv); |
356 | 397 | ||
398 | /***************************************************** | ||
399 | * GEOS | ||
400 | ******************************************************/ | ||
401 | int iwlcore_init_geos(struct iwl_priv *priv); | ||
402 | void iwlcore_free_geos(struct iwl_priv *priv); | ||
357 | 403 | ||
358 | /*************** DRIVER STATUS FUNCTIONS *****/ | 404 | /*************** DRIVER STATUS FUNCTIONS *****/ |
359 | 405 | ||
@@ -422,6 +468,7 @@ static inline int iwl_is_ready_rf(struct iwl_priv *priv) | |||
422 | } | 468 | } |
423 | 469 | ||
424 | extern void iwl_rf_kill_ct_config(struct iwl_priv *priv); | 470 | extern void iwl_rf_kill_ct_config(struct iwl_priv *priv); |
471 | extern int iwl_send_bt_config(struct iwl_priv *priv); | ||
425 | extern int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags); | 472 | extern int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags); |
426 | extern int iwl_verify_ucode(struct iwl_priv *priv); | 473 | extern int iwl_verify_ucode(struct iwl_priv *priv); |
427 | extern int iwl_send_lq_cmd(struct iwl_priv *priv, | 474 | extern int iwl_send_lq_cmd(struct iwl_priv *priv, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h index f34ede44ed10..74d3d43fa67d 100644 --- a/drivers/net/wireless/iwlwifi/iwl-csr.h +++ b/drivers/net/wireless/iwlwifi/iwl-csr.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
diff --git a/drivers/net/wireless/iwlwifi/iwl-debug.h b/drivers/net/wireless/iwlwifi/iwl-debug.h index 56c13b458de7..7192d3249caf 100644 --- a/drivers/net/wireless/iwlwifi/iwl-debug.h +++ b/drivers/net/wireless/iwlwifi/iwl-debug.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project. | 5 | * Portions of this file are derived from the ipw3945 project. |
6 | * | 6 | * |
@@ -29,16 +29,27 @@ | |||
29 | #ifndef __iwl_debug_h__ | 29 | #ifndef __iwl_debug_h__ |
30 | #define __iwl_debug_h__ | 30 | #define __iwl_debug_h__ |
31 | 31 | ||
32 | struct iwl_priv; | ||
33 | |||
34 | #define IWL_ERR(p, f, a...) dev_err(&((p)->pci_dev->dev), f, ## a) | ||
35 | #define IWL_WARN(p, f, a...) dev_warn(&((p)->pci_dev->dev), f, ## a) | ||
36 | #define IWL_INFO(p, f, a...) dev_info(&((p)->pci_dev->dev), f, ## a) | ||
37 | #define IWL_CRIT(p, f, a...) dev_crit(&((p)->pci_dev->dev), f, ## a) | ||
38 | |||
32 | #ifdef CONFIG_IWLWIFI_DEBUG | 39 | #ifdef CONFIG_IWLWIFI_DEBUG |
33 | #define IWL_DEBUG(level, fmt, args...) \ | 40 | #define IWL_DEBUG(level, fmt, args...) \ |
34 | do { if (priv->debug_level & (level)) \ | 41 | do { \ |
35 | dev_printk(KERN_ERR, &(priv->hw->wiphy->dev), "%c %s " fmt, \ | 42 | if (priv->debug_level & (level)) \ |
36 | in_interrupt() ? 'I' : 'U', __func__ , ## args); } while (0) | 43 | dev_printk(KERN_ERR, &(priv->hw->wiphy->dev), "%c %s " fmt, \ |
44 | in_interrupt() ? 'I' : 'U', __func__ , ## args); \ | ||
45 | } while (0) | ||
37 | 46 | ||
38 | #define IWL_DEBUG_LIMIT(level, fmt, args...) \ | 47 | #define IWL_DEBUG_LIMIT(level, fmt, args...) \ |
39 | do { if ((priv->debug_level & (level)) && net_ratelimit()) \ | 48 | do { \ |
40 | dev_printk(KERN_ERR, &(priv->hw->wiphy->dev), "%c %s " fmt, \ | 49 | if ((priv->debug_level & (level)) && net_ratelimit()) \ |
41 | in_interrupt() ? 'I' : 'U', __func__ , ## args); } while (0) | 50 | dev_printk(KERN_ERR, &(priv->hw->wiphy->dev), "%c %s " fmt, \ |
51 | in_interrupt() ? 'I' : 'U', __func__ , ## args); \ | ||
52 | } while (0) | ||
42 | 53 | ||
43 | #define iwl_print_hex_dump(priv, level, p, len) \ | 54 | #define iwl_print_hex_dump(priv, level, p, len) \ |
44 | do { \ | 55 | do { \ |
@@ -61,6 +72,7 @@ struct iwl_debugfs { | |||
61 | struct dentry *file_tx_statistics; | 72 | struct dentry *file_tx_statistics; |
62 | struct dentry *file_log_event; | 73 | struct dentry *file_log_event; |
63 | struct dentry *file_channels; | 74 | struct dentry *file_channels; |
75 | struct dentry *file_status; | ||
64 | } dbgfs_data_files; | 76 | } dbgfs_data_files; |
65 | struct dir_rf_files { | 77 | struct dir_rf_files { |
66 | struct dentry *file_disable_sensitivity; | 78 | struct dentry *file_disable_sensitivity; |
@@ -117,84 +129,82 @@ static inline void iwl_dbgfs_unregister(struct iwl_priv *priv) | |||
117 | * when CONFIG_IWLWIFI_DEBUG=y. | 129 | * when CONFIG_IWLWIFI_DEBUG=y. |
118 | */ | 130 | */ |
119 | 131 | ||
132 | /* 0x0000000F - 0x00000001 */ | ||
120 | #define IWL_DL_INFO (1 << 0) | 133 | #define IWL_DL_INFO (1 << 0) |
121 | #define IWL_DL_MAC80211 (1 << 1) | 134 | #define IWL_DL_MAC80211 (1 << 1) |
122 | #define IWL_DL_HCMD (1 << 2) | 135 | #define IWL_DL_HCMD (1 << 2) |
123 | #define IWL_DL_STATE (1 << 3) | 136 | #define IWL_DL_STATE (1 << 3) |
137 | /* 0x000000F0 - 0x00000010 */ | ||
124 | #define IWL_DL_MACDUMP (1 << 4) | 138 | #define IWL_DL_MACDUMP (1 << 4) |
125 | #define IWL_DL_HCMD_DUMP (1 << 5) | 139 | #define IWL_DL_HCMD_DUMP (1 << 5) |
126 | #define IWL_DL_RADIO (1 << 7) | 140 | #define IWL_DL_RADIO (1 << 7) |
127 | #define IWL_DL_POWER (1 << 8) | 141 | /* 0x00000F00 - 0x00000100 */ |
128 | #define IWL_DL_TEMP (1 << 9) | 142 | #define IWL_DL_POWER (1 << 8) |
129 | 143 | #define IWL_DL_TEMP (1 << 9) | |
130 | #define IWL_DL_NOTIF (1 << 10) | 144 | #define IWL_DL_NOTIF (1 << 10) |
131 | #define IWL_DL_SCAN (1 << 11) | 145 | #define IWL_DL_SCAN (1 << 11) |
132 | #define IWL_DL_ASSOC (1 << 12) | 146 | /* 0x0000F000 - 0x00001000 */ |
133 | #define IWL_DL_DROP (1 << 13) | 147 | #define IWL_DL_ASSOC (1 << 12) |
134 | 148 | #define IWL_DL_DROP (1 << 13) | |
135 | #define IWL_DL_TXPOWER (1 << 14) | 149 | #define IWL_DL_TXPOWER (1 << 14) |
136 | 150 | #define IWL_DL_AP (1 << 15) | |
137 | #define IWL_DL_AP (1 << 15) | 151 | /* 0x000F0000 - 0x00010000 */ |
138 | 152 | #define IWL_DL_FW (1 << 16) | |
139 | #define IWL_DL_FW (1 << 16) | 153 | #define IWL_DL_RF_KILL (1 << 17) |
140 | #define IWL_DL_RF_KILL (1 << 17) | 154 | #define IWL_DL_FW_ERRORS (1 << 18) |
141 | #define IWL_DL_FW_ERRORS (1 << 18) | 155 | #define IWL_DL_LED (1 << 19) |
142 | 156 | /* 0x00F00000 - 0x00100000 */ | |
143 | #define IWL_DL_LED (1 << 19) | 157 | #define IWL_DL_RATE (1 << 20) |
144 | 158 | #define IWL_DL_CALIB (1 << 21) | |
145 | #define IWL_DL_RATE (1 << 20) | 159 | #define IWL_DL_WEP (1 << 22) |
146 | 160 | #define IWL_DL_TX (1 << 23) | |
147 | #define IWL_DL_CALIB (1 << 21) | 161 | /* 0x0F000000 - 0x01000000 */ |
148 | #define IWL_DL_WEP (1 << 22) | 162 | #define IWL_DL_RX (1 << 24) |
149 | #define IWL_DL_TX (1 << 23) | 163 | #define IWL_DL_ISR (1 << 25) |
150 | #define IWL_DL_RX (1 << 24) | 164 | #define IWL_DL_HT (1 << 26) |
151 | #define IWL_DL_ISR (1 << 25) | 165 | #define IWL_DL_IO (1 << 27) |
152 | #define IWL_DL_HT (1 << 26) | 166 | /* 0xF0000000 - 0x10000000 */ |
153 | #define IWL_DL_IO (1 << 27) | 167 | #define IWL_DL_11H (1 << 28) |
154 | #define IWL_DL_11H (1 << 28) | 168 | #define IWL_DL_STATS (1 << 29) |
155 | 169 | #define IWL_DL_TX_REPLY (1 << 30) | |
156 | #define IWL_DL_STATS (1 << 29) | 170 | #define IWL_DL_QOS (1 << 31) |
157 | #define IWL_DL_TX_REPLY (1 << 30) | 171 | |
158 | #define IWL_DL_QOS (1 << 31) | 172 | #define IWL_DEBUG_INFO(f, a...) IWL_DEBUG(IWL_DL_INFO, f, ## a) |
159 | 173 | #define IWL_DEBUG_MAC80211(f, a...) IWL_DEBUG(IWL_DL_MAC80211, f, ## a) | |
160 | #define IWL_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a) | 174 | #define IWL_DEBUG_MACDUMP(f, a...) IWL_DEBUG(IWL_DL_MACDUMP, f, ## a) |
161 | #define IWL_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a) | 175 | #define IWL_DEBUG_TEMP(f, a...) IWL_DEBUG(IWL_DL_TEMP, f, ## a) |
162 | #define IWL_DEBUG_INFO(f, a...) IWL_DEBUG(IWL_DL_INFO, f, ## a) | 176 | #define IWL_DEBUG_SCAN(f, a...) IWL_DEBUG(IWL_DL_SCAN, f, ## a) |
163 | 177 | #define IWL_DEBUG_RX(f, a...) IWL_DEBUG(IWL_DL_RX, f, ## a) | |
164 | #define IWL_DEBUG_MAC80211(f, a...) IWL_DEBUG(IWL_DL_MAC80211, f, ## a) | 178 | #define IWL_DEBUG_TX(f, a...) IWL_DEBUG(IWL_DL_TX, f, ## a) |
165 | #define IWL_DEBUG_MACDUMP(f, a...) IWL_DEBUG(IWL_DL_MACDUMP, f, ## a) | 179 | #define IWL_DEBUG_ISR(f, a...) IWL_DEBUG(IWL_DL_ISR, f, ## a) |
166 | #define IWL_DEBUG_TEMP(f, a...) IWL_DEBUG(IWL_DL_TEMP, f, ## a) | 180 | #define IWL_DEBUG_LED(f, a...) IWL_DEBUG(IWL_DL_LED, f, ## a) |
167 | #define IWL_DEBUG_SCAN(f, a...) IWL_DEBUG(IWL_DL_SCAN, f, ## a) | 181 | #define IWL_DEBUG_WEP(f, a...) IWL_DEBUG(IWL_DL_WEP, f, ## a) |
168 | #define IWL_DEBUG_RX(f, a...) IWL_DEBUG(IWL_DL_RX, f, ## a) | 182 | #define IWL_DEBUG_HC(f, a...) IWL_DEBUG(IWL_DL_HCMD, f, ## a) |
169 | #define IWL_DEBUG_TX(f, a...) IWL_DEBUG(IWL_DL_TX, f, ## a) | 183 | #define IWL_DEBUG_HC_DUMP(f, a...) IWL_DEBUG(IWL_DL_HCMD_DUMP, f, ## a) |
170 | #define IWL_DEBUG_ISR(f, a...) IWL_DEBUG(IWL_DL_ISR, f, ## a) | 184 | #define IWL_DEBUG_CALIB(f, a...) IWL_DEBUG(IWL_DL_CALIB, f, ## a) |
171 | #define IWL_DEBUG_LED(f, a...) IWL_DEBUG(IWL_DL_LED, f, ## a) | 185 | #define IWL_DEBUG_FW(f, a...) IWL_DEBUG(IWL_DL_FW, f, ## a) |
172 | #define IWL_DEBUG_WEP(f, a...) IWL_DEBUG(IWL_DL_WEP, f, ## a) | 186 | #define IWL_DEBUG_RF_KILL(f, a...) IWL_DEBUG(IWL_DL_RF_KILL, f, ## a) |
173 | #define IWL_DEBUG_HC(f, a...) IWL_DEBUG(IWL_DL_HCMD, f, ## a) | 187 | #define IWL_DEBUG_DROP(f, a...) IWL_DEBUG(IWL_DL_DROP, f, ## a) |
174 | #define IWL_DEBUG_HC_DUMP(f, a...) IWL_DEBUG(IWL_DL_HCMD_DUMP, f, ## a) | 188 | #define IWL_DEBUG_DROP_LIMIT(f, a...) IWL_DEBUG_LIMIT(IWL_DL_DROP, f, ## a) |
175 | #define IWL_DEBUG_CALIB(f, a...) IWL_DEBUG(IWL_DL_CALIB, f, ## a) | 189 | #define IWL_DEBUG_AP(f, a...) IWL_DEBUG(IWL_DL_AP, f, ## a) |
176 | #define IWL_DEBUG_FW(f, a...) IWL_DEBUG(IWL_DL_FW, f, ## a) | 190 | #define IWL_DEBUG_TXPOWER(f, a...) IWL_DEBUG(IWL_DL_TXPOWER, f, ## a) |
177 | #define IWL_DEBUG_RF_KILL(f, a...) IWL_DEBUG(IWL_DL_RF_KILL, f, ## a) | 191 | #define IWL_DEBUG_IO(f, a...) IWL_DEBUG(IWL_DL_IO, f, ## a) |
178 | #define IWL_DEBUG_DROP(f, a...) IWL_DEBUG(IWL_DL_DROP, f, ## a) | 192 | #define IWL_DEBUG_RATE(f, a...) IWL_DEBUG(IWL_DL_RATE, f, ## a) |
179 | #define IWL_DEBUG_DROP_LIMIT(f, a...) IWL_DEBUG_LIMIT(IWL_DL_DROP, f, ## a) | 193 | #define IWL_DEBUG_RATE_LIMIT(f, a...) IWL_DEBUG_LIMIT(IWL_DL_RATE, f, ## a) |
180 | #define IWL_DEBUG_AP(f, a...) IWL_DEBUG(IWL_DL_AP, f, ## a) | 194 | #define IWL_DEBUG_NOTIF(f, a...) IWL_DEBUG(IWL_DL_NOTIF, f, ## a) |
181 | #define IWL_DEBUG_TXPOWER(f, a...) IWL_DEBUG(IWL_DL_TXPOWER, f, ## a) | 195 | #define IWL_DEBUG_ASSOC(f, a...) \ |
182 | #define IWL_DEBUG_IO(f, a...) IWL_DEBUG(IWL_DL_IO, f, ## a) | 196 | IWL_DEBUG(IWL_DL_ASSOC | IWL_DL_INFO, f, ## a) |
183 | #define IWL_DEBUG_RATE(f, a...) IWL_DEBUG(IWL_DL_RATE, f, ## a) | 197 | #define IWL_DEBUG_ASSOC_LIMIT(f, a...) \ |
184 | #define IWL_DEBUG_RATE_LIMIT(f, a...) IWL_DEBUG_LIMIT(IWL_DL_RATE, f, ## a) | 198 | IWL_DEBUG_LIMIT(IWL_DL_ASSOC | IWL_DL_INFO, f, ## a) |
185 | #define IWL_DEBUG_NOTIF(f, a...) IWL_DEBUG(IWL_DL_NOTIF, f, ## a) | 199 | #define IWL_DEBUG_HT(f, a...) IWL_DEBUG(IWL_DL_HT, f, ## a) |
186 | #define IWL_DEBUG_ASSOC(f, a...) IWL_DEBUG(IWL_DL_ASSOC | IWL_DL_INFO, f, ## a) | 200 | #define IWL_DEBUG_STATS(f, a...) IWL_DEBUG(IWL_DL_STATS, f, ## a) |
187 | #define IWL_DEBUG_ASSOC_LIMIT(f, a...) \ | 201 | #define IWL_DEBUG_STATS_LIMIT(f, a...) IWL_DEBUG_LIMIT(IWL_DL_STATS, f, ## a) |
188 | IWL_DEBUG_LIMIT(IWL_DL_ASSOC | IWL_DL_INFO, f, ## a) | 202 | #define IWL_DEBUG_TX_REPLY(f, a...) IWL_DEBUG(IWL_DL_TX_REPLY, f, ## a) |
189 | #define IWL_DEBUG_HT(f, a...) IWL_DEBUG(IWL_DL_HT, f, ## a) | ||
190 | #define IWL_DEBUG_STATS(f, a...) IWL_DEBUG(IWL_DL_STATS, f, ## a) | ||
191 | #define IWL_DEBUG_STATS_LIMIT(f, a...) IWL_DEBUG_LIMIT(IWL_DL_STATS, f, ## a) | ||
192 | #define IWL_DEBUG_TX_REPLY(f, a...) IWL_DEBUG(IWL_DL_TX_REPLY, f, ## a) | ||
193 | #define IWL_DEBUG_TX_REPLY_LIMIT(f, a...) \ | 203 | #define IWL_DEBUG_TX_REPLY_LIMIT(f, a...) \ |
194 | IWL_DEBUG_LIMIT(IWL_DL_TX_REPLY, f, ## a) | 204 | IWL_DEBUG_LIMIT(IWL_DL_TX_REPLY, f, ## a) |
195 | #define IWL_DEBUG_QOS(f, a...) IWL_DEBUG(IWL_DL_QOS, f, ## a) | 205 | #define IWL_DEBUG_QOS(f, a...) IWL_DEBUG(IWL_DL_QOS, f, ## a) |
196 | #define IWL_DEBUG_RADIO(f, a...) IWL_DEBUG(IWL_DL_RADIO, f, ## a) | 206 | #define IWL_DEBUG_RADIO(f, a...) IWL_DEBUG(IWL_DL_RADIO, f, ## a) |
197 | #define IWL_DEBUG_POWER(f, a...) IWL_DEBUG(IWL_DL_POWER, f, ## a) | 207 | #define IWL_DEBUG_POWER(f, a...) IWL_DEBUG(IWL_DL_POWER, f, ## a) |
198 | #define IWL_DEBUG_11H(f, a...) IWL_DEBUG(IWL_DL_11H, f, ## a) | 208 | #define IWL_DEBUG_11H(f, a...) IWL_DEBUG(IWL_DL_11H, f, ## a) |
199 | 209 | ||
200 | #endif | 210 | #endif |
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c index d5253a179dec..36cfeccfafbc 100644 --- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c +++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -63,6 +63,14 @@ | |||
63 | goto err; \ | 63 | goto err; \ |
64 | } while (0) | 64 | } while (0) |
65 | 65 | ||
66 | #define DEBUGFS_ADD_X32(name, parent, ptr) do { \ | ||
67 | dbgfs->dbgfs_##parent##_files.file_##name = \ | ||
68 | debugfs_create_x32(#name, 0444, dbgfs->dir_##parent, ptr); \ | ||
69 | if (IS_ERR(dbgfs->dbgfs_##parent##_files.file_##name) \ | ||
70 | || !dbgfs->dbgfs_##parent##_files.file_##name) \ | ||
71 | goto err; \ | ||
72 | } while (0) | ||
73 | |||
66 | #define DEBUGFS_REMOVE(name) do { \ | 74 | #define DEBUGFS_REMOVE(name) do { \ |
67 | debugfs_remove(name); \ | 75 | debugfs_remove(name); \ |
68 | name = NULL; \ | 76 | name = NULL; \ |
@@ -164,9 +172,6 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file, | |||
164 | struct iwl_priv *priv = (struct iwl_priv *)file->private_data; | 172 | struct iwl_priv *priv = (struct iwl_priv *)file->private_data; |
165 | const size_t bufsz = sizeof(buf); | 173 | const size_t bufsz = sizeof(buf); |
166 | 174 | ||
167 | printk(KERN_DEBUG "offset is: 0x%x\tlen is: 0x%x\n", | ||
168 | priv->dbgfs->sram_offset, priv->dbgfs->sram_len); | ||
169 | |||
170 | iwl_grab_nic_access(priv); | 175 | iwl_grab_nic_access(priv); |
171 | for (i = priv->dbgfs->sram_len; i > 0; i -= 4) { | 176 | for (i = priv->dbgfs->sram_len; i > 0; i -= 4) { |
172 | val = iwl_read_targ_mem(priv, priv->dbgfs->sram_offset + \ | 177 | val = iwl_read_targ_mem(priv, priv->dbgfs->sram_offset + \ |
@@ -301,14 +306,14 @@ static ssize_t iwl_dbgfs_eeprom_read(struct file *file, | |||
301 | buf_size = 4 * eeprom_len + 256; | 306 | buf_size = 4 * eeprom_len + 256; |
302 | 307 | ||
303 | if (eeprom_len % 16) { | 308 | if (eeprom_len % 16) { |
304 | IWL_ERROR("EEPROM size is not multiple of 16.\n"); | 309 | IWL_ERR(priv, "EEPROM size is not multiple of 16.\n"); |
305 | return -ENODATA; | 310 | return -ENODATA; |
306 | } | 311 | } |
307 | 312 | ||
308 | /* 4 characters for byte 0xYY */ | 313 | /* 4 characters for byte 0xYY */ |
309 | buf = kzalloc(buf_size, GFP_KERNEL); | 314 | buf = kzalloc(buf_size, GFP_KERNEL); |
310 | if (!buf) { | 315 | if (!buf) { |
311 | IWL_ERROR("Can not allocate Buffer\n"); | 316 | IWL_ERR(priv, "Can not allocate Buffer\n"); |
312 | return -ENOMEM; | 317 | return -ENOMEM; |
313 | } | 318 | } |
314 | 319 | ||
@@ -365,7 +370,7 @@ static ssize_t iwl_dbgfs_channels_read(struct file *file, char __user *user_buf, | |||
365 | 370 | ||
366 | buf = kzalloc(bufsz, GFP_KERNEL); | 371 | buf = kzalloc(bufsz, GFP_KERNEL); |
367 | if (!buf) { | 372 | if (!buf) { |
368 | IWL_ERROR("Can not allocate Buffer\n"); | 373 | IWL_ERR(priv, "Can not allocate Buffer\n"); |
369 | return -ENOMEM; | 374 | return -ENOMEM; |
370 | } | 375 | } |
371 | 376 | ||
@@ -420,7 +425,6 @@ static ssize_t iwl_dbgfs_channels_read(struct file *file, char __user *user_buf, | |||
420 | return ret; | 425 | return ret; |
421 | } | 426 | } |
422 | 427 | ||
423 | |||
424 | DEBUGFS_READ_WRITE_FILE_OPS(sram); | 428 | DEBUGFS_READ_WRITE_FILE_OPS(sram); |
425 | DEBUGFS_WRITE_FILE_OPS(log_event); | 429 | DEBUGFS_WRITE_FILE_OPS(log_event); |
426 | DEBUGFS_READ_FILE_OPS(eeprom); | 430 | DEBUGFS_READ_FILE_OPS(eeprom); |
@@ -462,6 +466,7 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name) | |||
462 | DEBUGFS_ADD_FILE(rx_statistics, data); | 466 | DEBUGFS_ADD_FILE(rx_statistics, data); |
463 | DEBUGFS_ADD_FILE(tx_statistics, data); | 467 | DEBUGFS_ADD_FILE(tx_statistics, data); |
464 | DEBUGFS_ADD_FILE(channels, data); | 468 | DEBUGFS_ADD_FILE(channels, data); |
469 | DEBUGFS_ADD_X32(status, data, (u32 *)&priv->status); | ||
465 | DEBUGFS_ADD_BOOL(disable_sensitivity, rf, &priv->disable_sens_cal); | 470 | DEBUGFS_ADD_BOOL(disable_sensitivity, rf, &priv->disable_sens_cal); |
466 | DEBUGFS_ADD_BOOL(disable_chain_noise, rf, | 471 | DEBUGFS_ADD_BOOL(disable_chain_noise, rf, |
467 | &priv->disable_chain_noise_cal); | 472 | &priv->disable_chain_noise_cal); |
@@ -469,7 +474,7 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name) | |||
469 | return 0; | 474 | return 0; |
470 | 475 | ||
471 | err: | 476 | err: |
472 | IWL_ERROR("Can't open the debugfs directory\n"); | 477 | IWL_ERR(priv, "Can't open the debugfs directory\n"); |
473 | iwl_dbgfs_unregister(priv); | 478 | iwl_dbgfs_unregister(priv); |
474 | return ret; | 479 | return ret; |
475 | } | 480 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h index 0468fcc1ea98..437c05b9a335 100644 --- a/drivers/net/wireless/iwlwifi/iwl-dev.h +++ b/drivers/net/wireless/iwlwifi/iwl-dev.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -36,13 +36,15 @@ | |||
36 | #include <linux/kernel.h> | 36 | #include <linux/kernel.h> |
37 | #include <net/ieee80211_radiotap.h> | 37 | #include <net/ieee80211_radiotap.h> |
38 | 38 | ||
39 | #define DRV_NAME "iwlagn" | ||
40 | #include "iwl-rfkill.h" | ||
41 | #include "iwl-eeprom.h" | 39 | #include "iwl-eeprom.h" |
42 | #include "iwl-4965-hw.h" | ||
43 | #include "iwl-csr.h" | 40 | #include "iwl-csr.h" |
44 | #include "iwl-prph.h" | 41 | #include "iwl-prph.h" |
42 | #include "iwl-fh.h" | ||
45 | #include "iwl-debug.h" | 43 | #include "iwl-debug.h" |
44 | #include "iwl-rfkill.h" | ||
45 | #include "iwl-4965-hw.h" | ||
46 | #include "iwl-3945-hw.h" | ||
47 | #include "iwl-3945-led.h" | ||
46 | #include "iwl-led.h" | 48 | #include "iwl-led.h" |
47 | #include "iwl-power.h" | 49 | #include "iwl-power.h" |
48 | #include "iwl-agn-rs.h" | 50 | #include "iwl-agn-rs.h" |
@@ -55,6 +57,16 @@ extern struct iwl_cfg iwl5350_agn_cfg; | |||
55 | extern struct iwl_cfg iwl5100_bg_cfg; | 57 | extern struct iwl_cfg iwl5100_bg_cfg; |
56 | extern struct iwl_cfg iwl5100_abg_cfg; | 58 | extern struct iwl_cfg iwl5100_abg_cfg; |
57 | extern struct iwl_cfg iwl5150_agn_cfg; | 59 | extern struct iwl_cfg iwl5150_agn_cfg; |
60 | extern struct iwl_cfg iwl6000_2ag_cfg; | ||
61 | extern struct iwl_cfg iwl6000_2agn_cfg; | ||
62 | extern struct iwl_cfg iwl6000_3agn_cfg; | ||
63 | extern struct iwl_cfg iwl6050_2agn_cfg; | ||
64 | extern struct iwl_cfg iwl6050_3agn_cfg; | ||
65 | extern struct iwl_cfg iwl100_bgn_cfg; | ||
66 | |||
67 | /* shared structures from iwl-5000.c */ | ||
68 | extern struct iwl_mod_params iwl50_mod_params; | ||
69 | extern struct iwl_ops iwl5000_ops; | ||
58 | 70 | ||
59 | /* CT-KILL constants */ | 71 | /* CT-KILL constants */ |
60 | #define CT_KILL_THRESHOLD 110 /* in Celsius */ | 72 | #define CT_KILL_THRESHOLD 110 /* in Celsius */ |
@@ -132,9 +144,12 @@ struct iwl_tx_info { | |||
132 | * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame | 144 | * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame |
133 | * descriptors) and required locking structures. | 145 | * descriptors) and required locking structures. |
134 | */ | 146 | */ |
147 | #define TFD_TX_CMD_SLOTS 256 | ||
148 | #define TFD_CMD_SLOTS 32 | ||
149 | |||
135 | struct iwl_tx_queue { | 150 | struct iwl_tx_queue { |
136 | struct iwl_queue q; | 151 | struct iwl_queue q; |
137 | struct iwl_tfd *tfds; | 152 | void *tfds; |
138 | struct iwl_cmd *cmd[TFD_TX_CMD_SLOTS]; | 153 | struct iwl_cmd *cmd[TFD_TX_CMD_SLOTS]; |
139 | struct iwl_tx_info *txb; | 154 | struct iwl_tx_info *txb; |
140 | u8 need_update; | 155 | u8 need_update; |
@@ -154,6 +169,36 @@ struct iwl4965_channel_tgh_info { | |||
154 | s64 last_radar_time; | 169 | s64 last_radar_time; |
155 | }; | 170 | }; |
156 | 171 | ||
172 | #define IWL4965_MAX_RATE (33) | ||
173 | |||
174 | struct iwl3945_clip_group { | ||
175 | /* maximum power level to prevent clipping for each rate, derived by | ||
176 | * us from this band's saturation power in EEPROM */ | ||
177 | const s8 clip_powers[IWL_MAX_RATES]; | ||
178 | }; | ||
179 | |||
180 | /* current Tx power values to use, one for each rate for each channel. | ||
181 | * requested power is limited by: | ||
182 | * -- regulatory EEPROM limits for this channel | ||
183 | * -- hardware capabilities (clip-powers) | ||
184 | * -- spectrum management | ||
185 | * -- user preference (e.g. iwconfig) | ||
186 | * when requested power is set, base power index must also be set. */ | ||
187 | struct iwl3945_channel_power_info { | ||
188 | struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ | ||
189 | s8 power_table_index; /* actual (compenst'd) index into gain table */ | ||
190 | s8 base_power_index; /* gain index for power at factory temp. */ | ||
191 | s8 requested_power; /* power (dBm) requested for this chnl/rate */ | ||
192 | }; | ||
193 | |||
194 | /* current scan Tx power values to use, one for each scan rate for each | ||
195 | * channel. */ | ||
196 | struct iwl3945_scan_power_info { | ||
197 | struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ | ||
198 | s8 power_table_index; /* actual (compenst'd) index into gain table */ | ||
199 | s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */ | ||
200 | }; | ||
201 | |||
157 | /* | 202 | /* |
158 | * One for each channel, holds all channel setup data | 203 | * One for each channel, holds all channel setup data |
159 | * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant | 204 | * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant |
@@ -184,8 +229,15 @@ struct iwl_channel_info { | |||
184 | s8 fat_scan_power; /* (dBm) eeprom, direct scans, any rate */ | 229 | s8 fat_scan_power; /* (dBm) eeprom, direct scans, any rate */ |
185 | u8 fat_flags; /* flags copied from EEPROM */ | 230 | u8 fat_flags; /* flags copied from EEPROM */ |
186 | u8 fat_extension_channel; /* HT_IE_EXT_CHANNEL_* */ | 231 | u8 fat_extension_channel; /* HT_IE_EXT_CHANNEL_* */ |
187 | }; | ||
188 | 232 | ||
233 | /* Radio/DSP gain settings for each "normal" data Tx rate. | ||
234 | * These include, in addition to RF and DSP gain, a few fields for | ||
235 | * remembering/modifying gain settings (indexes). */ | ||
236 | struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE]; | ||
237 | |||
238 | /* Radio/DSP gain settings for each scan rate, for directed scans. */ | ||
239 | struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES]; | ||
240 | }; | ||
189 | 241 | ||
190 | #define IWL_TX_FIFO_AC0 0 | 242 | #define IWL_TX_FIFO_AC0 0 |
191 | #define IWL_TX_FIFO_AC1 1 | 243 | #define IWL_TX_FIFO_AC1 1 |
@@ -370,7 +422,7 @@ struct iwl_hw_key { | |||
370 | u8 key[32]; | 422 | u8 key[32]; |
371 | }; | 423 | }; |
372 | 424 | ||
373 | union iwl4965_ht_rate_supp { | 425 | union iwl_ht_rate_supp { |
374 | u16 rates; | 426 | u16 rates; |
375 | struct { | 427 | struct { |
376 | u8 siso_rate; | 428 | u8 siso_rate; |
@@ -430,6 +482,24 @@ struct iwl_qos_info { | |||
430 | #define STA_PS_STATUS_WAKE 0 | 482 | #define STA_PS_STATUS_WAKE 0 |
431 | #define STA_PS_STATUS_SLEEP 1 | 483 | #define STA_PS_STATUS_SLEEP 1 |
432 | 484 | ||
485 | struct iwl3945_tid_data { | ||
486 | u16 seq_number; | ||
487 | }; | ||
488 | |||
489 | struct iwl3945_hw_key { | ||
490 | enum ieee80211_key_alg alg; | ||
491 | int keylen; | ||
492 | u8 key[32]; | ||
493 | }; | ||
494 | |||
495 | struct iwl3945_station_entry { | ||
496 | struct iwl3945_addsta_cmd sta; | ||
497 | struct iwl3945_tid_data tid[MAX_TID_COUNT]; | ||
498 | u8 used; | ||
499 | u8 ps_status; | ||
500 | struct iwl3945_hw_key keyinfo; | ||
501 | }; | ||
502 | |||
433 | struct iwl_station_entry { | 503 | struct iwl_station_entry { |
434 | struct iwl_addsta_cmd sta; | 504 | struct iwl_addsta_cmd sta; |
435 | struct iwl_tid_data tid[MAX_TID_COUNT]; | 505 | struct iwl_tid_data tid[MAX_TID_COUNT]; |
@@ -497,11 +567,13 @@ struct iwl_sensitivity_ranges { | |||
497 | * @max_txq_num: Max # Tx queues supported | 567 | * @max_txq_num: Max # Tx queues supported |
498 | * @dma_chnl_num: Number of Tx DMA/FIFO channels | 568 | * @dma_chnl_num: Number of Tx DMA/FIFO channels |
499 | * @scd_bc_tbls_size: size of scheduler byte count tables | 569 | * @scd_bc_tbls_size: size of scheduler byte count tables |
570 | * @tfd_size: TFD size | ||
500 | * @tx/rx_chains_num: Number of TX/RX chains | 571 | * @tx/rx_chains_num: Number of TX/RX chains |
501 | * @valid_tx/rx_ant: usable antennas | 572 | * @valid_tx/rx_ant: usable antennas |
502 | * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2) | 573 | * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2) |
503 | * @max_rxq_log: Log-base-2 of max_rxq_size | 574 | * @max_rxq_log: Log-base-2 of max_rxq_size |
504 | * @rx_buf_size: Rx buffer size | 575 | * @rx_buf_size: Rx buffer size |
576 | * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR | ||
505 | * @max_stations: | 577 | * @max_stations: |
506 | * @bcast_sta_id: | 578 | * @bcast_sta_id: |
507 | * @fat_channel: is 40MHz width possible in band 2.4 | 579 | * @fat_channel: is 40MHz width possible in band 2.4 |
@@ -516,6 +588,7 @@ struct iwl_hw_params { | |||
516 | u8 max_txq_num; | 588 | u8 max_txq_num; |
517 | u8 dma_chnl_num; | 589 | u8 dma_chnl_num; |
518 | u16 scd_bc_tbls_size; | 590 | u16 scd_bc_tbls_size; |
591 | u32 tfd_size; | ||
519 | u8 tx_chains_num; | 592 | u8 tx_chains_num; |
520 | u8 rx_chains_num; | 593 | u8 rx_chains_num; |
521 | u8 valid_tx_ant; | 594 | u8 valid_tx_ant; |
@@ -523,6 +596,7 @@ struct iwl_hw_params { | |||
523 | u16 max_rxq_size; | 596 | u16 max_rxq_size; |
524 | u16 max_rxq_log; | 597 | u16 max_rxq_log; |
525 | u32 rx_buf_size; | 598 | u32 rx_buf_size; |
599 | u32 rx_wrt_ptr_reg; | ||
526 | u32 max_pkt_size; | 600 | u32 max_pkt_size; |
527 | u8 max_stations; | 601 | u8 max_stations; |
528 | u8 bcast_sta_id; | 602 | u8 bcast_sta_id; |
@@ -755,7 +829,7 @@ struct iwl_priv { | |||
755 | 829 | ||
756 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; | 830 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; |
757 | 831 | ||
758 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT | 832 | #if defined(CONFIG_IWLAGN_SPECTRUM_MEASUREMENT) || defined(CONFIG_IWL3945_SPECTRUM_MEASUREMENT) |
759 | /* spectrum measurement report caching */ | 833 | /* spectrum measurement report caching */ |
760 | struct iwl_spectrum_notification measure_report; | 834 | struct iwl_spectrum_notification measure_report; |
761 | u8 measurement_status; | 835 | u8 measurement_status; |
@@ -768,6 +842,10 @@ struct iwl_priv { | |||
768 | struct iwl_channel_info *channel_info; /* channel info array */ | 842 | struct iwl_channel_info *channel_info; /* channel info array */ |
769 | u8 channel_count; /* # of channels */ | 843 | u8 channel_count; /* # of channels */ |
770 | 844 | ||
845 | /* each calibration channel group in the EEPROM has a derived | ||
846 | * clip setting for each rate. 3945 only.*/ | ||
847 | const struct iwl3945_clip_group clip39_groups[5]; | ||
848 | |||
771 | /* thermal calibration */ | 849 | /* thermal calibration */ |
772 | s32 temperature; /* degrees Kelvin */ | 850 | s32 temperature; /* degrees Kelvin */ |
773 | s32 last_temperature; | 851 | s32 last_temperature; |
@@ -781,7 +859,7 @@ struct iwl_priv { | |||
781 | unsigned long scan_start; | 859 | unsigned long scan_start; |
782 | unsigned long scan_pass_start; | 860 | unsigned long scan_pass_start; |
783 | unsigned long scan_start_tsf; | 861 | unsigned long scan_start_tsf; |
784 | struct iwl_scan_cmd *scan; | 862 | void *scan; |
785 | int scan_bands; | 863 | int scan_bands; |
786 | int one_direct_scan; | 864 | int one_direct_scan; |
787 | u8 direct_ssid_len; | 865 | u8 direct_ssid_len; |
@@ -832,18 +910,25 @@ struct iwl_priv { | |||
832 | * 4965's initialize alive response contains some calibration data. */ | 910 | * 4965's initialize alive response contains some calibration data. */ |
833 | struct iwl_init_alive_resp card_alive_init; | 911 | struct iwl_init_alive_resp card_alive_init; |
834 | struct iwl_alive_resp card_alive; | 912 | struct iwl_alive_resp card_alive; |
835 | #ifdef CONFIG_IWLWIFI_RFKILL | 913 | #if defined(CONFIG_IWLWIFI_RFKILL) || defined(CONFIG_IWL3945_RFKILL) |
836 | struct rfkill *rfkill; | 914 | struct rfkill *rfkill; |
837 | #endif | 915 | #endif |
838 | 916 | ||
839 | #ifdef CONFIG_IWLWIFI_LEDS | 917 | #if defined(CONFIG_IWLWIFI_LEDS) || defined(CONFIG_IWL3945_LEDS) |
840 | struct iwl_led led[IWL_LED_TRG_MAX]; | ||
841 | unsigned long last_blink_time; | 918 | unsigned long last_blink_time; |
842 | u8 last_blink_rate; | 919 | u8 last_blink_rate; |
843 | u8 allow_blinking; | 920 | u8 allow_blinking; |
844 | u64 led_tpt; | 921 | u64 led_tpt; |
845 | #endif | 922 | #endif |
846 | 923 | ||
924 | #ifdef CONFIG_IWLWIFI_LEDS | ||
925 | struct iwl_led led[IWL_LED_TRG_MAX]; | ||
926 | #endif | ||
927 | |||
928 | #ifdef CONFIG_IWL3945_LEDS | ||
929 | struct iwl3945_led led39[IWL_LED_TRG_MAX]; | ||
930 | unsigned int rxtxpackets; | ||
931 | #endif | ||
847 | u16 active_rate; | 932 | u16 active_rate; |
848 | u16 active_rate_basic; | 933 | u16 active_rate_basic; |
849 | 934 | ||
@@ -893,7 +978,6 @@ struct iwl_priv { | |||
893 | u16 rates_mask; | 978 | u16 rates_mask; |
894 | 979 | ||
895 | u32 power_mode; | 980 | u32 power_mode; |
896 | u32 antenna; | ||
897 | u8 bssid[ETH_ALEN]; | 981 | u8 bssid[ETH_ALEN]; |
898 | u16 rts_threshold; | 982 | u16 rts_threshold; |
899 | u8 mac_addr[ETH_ALEN]; | 983 | u8 mac_addr[ETH_ALEN]; |
@@ -929,6 +1013,10 @@ struct iwl_priv { | |||
929 | u16 beacon_int; | 1013 | u16 beacon_int; |
930 | struct ieee80211_vif *vif; | 1014 | struct ieee80211_vif *vif; |
931 | 1015 | ||
1016 | /*Added for 3945 */ | ||
1017 | void *shared_virt; | ||
1018 | dma_addr_t shared_phys; | ||
1019 | /*End*/ | ||
932 | struct iwl_hw_params hw_params; | 1020 | struct iwl_hw_params hw_params; |
933 | 1021 | ||
934 | 1022 | ||
@@ -960,6 +1048,11 @@ struct iwl_priv { | |||
960 | struct delayed_work init_alive_start; | 1048 | struct delayed_work init_alive_start; |
961 | struct delayed_work alive_start; | 1049 | struct delayed_work alive_start; |
962 | struct delayed_work scan_check; | 1050 | struct delayed_work scan_check; |
1051 | |||
1052 | /*For 3945 only*/ | ||
1053 | struct delayed_work thermal_periodic; | ||
1054 | struct delayed_work rfkill_poll; | ||
1055 | |||
963 | /* TX Power */ | 1056 | /* TX Power */ |
964 | s8 tx_power_user_lmt; | 1057 | s8 tx_power_user_lmt; |
965 | s8 tx_power_channel_lmt; | 1058 | s8 tx_power_channel_lmt; |
@@ -982,6 +1075,22 @@ struct iwl_priv { | |||
982 | u32 disable_tx_power_cal; | 1075 | u32 disable_tx_power_cal; |
983 | struct work_struct run_time_calib_work; | 1076 | struct work_struct run_time_calib_work; |
984 | struct timer_list statistics_periodic; | 1077 | struct timer_list statistics_periodic; |
1078 | |||
1079 | /*For 3945*/ | ||
1080 | #define IWL_DEFAULT_TX_POWER 0x0F | ||
1081 | /* We declare this const so it can only be | ||
1082 | * changed via explicit cast within the | ||
1083 | * routines that actually update the physical | ||
1084 | * hardware */ | ||
1085 | const struct iwl3945_rxon_cmd active39_rxon; | ||
1086 | struct iwl3945_rxon_cmd staging39_rxon; | ||
1087 | struct iwl3945_rxon_cmd recovery39_rxon; | ||
1088 | |||
1089 | struct iwl3945_notif_statistics statistics_39; | ||
1090 | |||
1091 | struct iwl3945_station_entry stations_39[IWL_STATION_COUNT]; | ||
1092 | |||
1093 | u32 sta_supp_rates; | ||
985 | }; /*iwl_priv */ | 1094 | }; /*iwl_priv */ |
986 | 1095 | ||
987 | static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id) | 1096 | static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id) |
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c index ce2f47306cea..eaa658f9e54c 100644 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -145,7 +145,7 @@ int iwlcore_eeprom_verify_signature(struct iwl_priv *priv) | |||
145 | { | 145 | { |
146 | u32 gp = iwl_read32(priv, CSR_EEPROM_GP); | 146 | u32 gp = iwl_read32(priv, CSR_EEPROM_GP); |
147 | if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) { | 147 | if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) { |
148 | IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp); | 148 | IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp); |
149 | return -ENOENT; | 149 | return -ENOENT; |
150 | } | 150 | } |
151 | return 0; | 151 | return 0; |
@@ -223,7 +223,7 @@ int iwl_eeprom_init(struct iwl_priv *priv) | |||
223 | 223 | ||
224 | ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv); | 224 | ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv); |
225 | if (ret < 0) { | 225 | if (ret < 0) { |
226 | IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp); | 226 | IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp); |
227 | ret = -ENOENT; | 227 | ret = -ENOENT; |
228 | goto err; | 228 | goto err; |
229 | } | 229 | } |
@@ -231,7 +231,7 @@ int iwl_eeprom_init(struct iwl_priv *priv) | |||
231 | /* Make sure driver (instead of uCode) is allowed to read EEPROM */ | 231 | /* Make sure driver (instead of uCode) is allowed to read EEPROM */ |
232 | ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv); | 232 | ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv); |
233 | if (ret < 0) { | 233 | if (ret < 0) { |
234 | IWL_ERROR("Failed to acquire EEPROM semaphore.\n"); | 234 | IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n"); |
235 | ret = -ENOENT; | 235 | ret = -ENOENT; |
236 | goto err; | 236 | goto err; |
237 | } | 237 | } |
@@ -247,7 +247,7 @@ int iwl_eeprom_init(struct iwl_priv *priv) | |||
247 | CSR_EEPROM_REG_READ_VALID_MSK, | 247 | CSR_EEPROM_REG_READ_VALID_MSK, |
248 | IWL_EEPROM_ACCESS_TIMEOUT); | 248 | IWL_EEPROM_ACCESS_TIMEOUT); |
249 | if (ret < 0) { | 249 | if (ret < 0) { |
250 | IWL_ERROR("Time out reading EEPROM[%d]\n", addr); | 250 | IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr); |
251 | goto done; | 251 | goto done; |
252 | } | 252 | } |
253 | r = _iwl_read_direct32(priv, CSR_EEPROM_REG); | 253 | r = _iwl_read_direct32(priv, CSR_EEPROM_REG); |
@@ -285,7 +285,7 @@ int iwl_eeprom_check_version(struct iwl_priv *priv) | |||
285 | 285 | ||
286 | return 0; | 286 | return 0; |
287 | err: | 287 | err: |
288 | IWL_ERROR("Unsupported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n", | 288 | IWL_ERR(priv, "Unsupported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n", |
289 | eeprom_ver, priv->cfg->eeprom_ver, | 289 | eeprom_ver, priv->cfg->eeprom_ver, |
290 | calib_ver, priv->cfg->eeprom_calib_ver); | 290 | calib_ver, priv->cfg->eeprom_calib_ver); |
291 | return -EINVAL; | 291 | return -EINVAL; |
@@ -450,7 +450,7 @@ int iwl_init_channel_map(struct iwl_priv *priv) | |||
450 | priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) * | 450 | priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) * |
451 | priv->channel_count, GFP_KERNEL); | 451 | priv->channel_count, GFP_KERNEL); |
452 | if (!priv->channel_info) { | 452 | if (!priv->channel_info) { |
453 | IWL_ERROR("Could not allocate channel_info\n"); | 453 | IWL_ERR(priv, "Could not allocate channel_info\n"); |
454 | priv->channel_count = 0; | 454 | priv->channel_count = 0; |
455 | return -ENOMEM; | 455 | return -ENOMEM; |
456 | } | 456 | } |
@@ -520,7 +520,7 @@ int iwl_init_channel_map(struct iwl_priv *priv) | |||
520 | flags & EEPROM_CHANNEL_RADAR)) | 520 | flags & EEPROM_CHANNEL_RADAR)) |
521 | ? "" : "not "); | 521 | ? "" : "not "); |
522 | 522 | ||
523 | /* Set the user_txpower_limit to the highest power | 523 | /* Set the tx_power_user_lmt to the highest power |
524 | * supported by any channel */ | 524 | * supported by any channel */ |
525 | if (eeprom_ch_info[ch].max_power_avg > | 525 | if (eeprom_ch_info[ch].max_power_avg > |
526 | priv->tx_power_user_lmt) | 526 | priv->tx_power_user_lmt) |
@@ -531,6 +531,13 @@ int iwl_init_channel_map(struct iwl_priv *priv) | |||
531 | } | 531 | } |
532 | } | 532 | } |
533 | 533 | ||
534 | /* Check if we do have FAT channels */ | ||
535 | if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] >= | ||
536 | priv->cfg->eeprom_size && | ||
537 | priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] >= | ||
538 | priv->cfg->eeprom_size) | ||
539 | return 0; | ||
540 | |||
534 | /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */ | 541 | /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */ |
535 | for (band = 6; band <= 7; band++) { | 542 | for (band = 6; band <= 7; band++) { |
536 | enum ieee80211_band ieeeband; | 543 | enum ieee80211_band ieeeband; |
@@ -582,6 +589,7 @@ void iwl_free_channel_map(struct iwl_priv *priv) | |||
582 | kfree(priv->channel_info); | 589 | kfree(priv->channel_info); |
583 | priv->channel_count = 0; | 590 | priv->channel_count = 0; |
584 | } | 591 | } |
592 | EXPORT_SYMBOL(iwl_free_channel_map); | ||
585 | 593 | ||
586 | /** | 594 | /** |
587 | * iwl_get_channel_info - Find driver's private channel info | 595 | * iwl_get_channel_info - Find driver's private channel info |
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h index 603c84bed630..17fed49f9d96 100644 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -118,6 +118,9 @@ struct iwl_eeprom_channel { | |||
118 | s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */ | 118 | s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */ |
119 | } __attribute__ ((packed)); | 119 | } __attribute__ ((packed)); |
120 | 120 | ||
121 | /* 3945 Specific */ | ||
122 | #define EEPROM_3945_EEPROM_VERSION (0x2f) | ||
123 | |||
121 | /* 4965 has two radio transmitters (and 3 radio receivers) */ | 124 | /* 4965 has two radio transmitters (and 3 radio receivers) */ |
122 | #define EEPROM_TX_POWER_TX_CHAINS (2) | 125 | #define EEPROM_TX_POWER_TX_CHAINS (2) |
123 | 126 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-fh.h b/drivers/net/wireless/iwlwifi/iwl-fh.h index d7da19864550..65fa8a69fd5a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-fh.h +++ b/drivers/net/wireless/iwlwifi/iwl-fh.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -399,6 +399,21 @@ | |||
399 | */ | 399 | */ |
400 | #define FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN (0x00000002) | 400 | #define FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN (0x00000002) |
401 | 401 | ||
402 | #define RX_QUEUE_SIZE 256 | ||
403 | #define RX_QUEUE_MASK 255 | ||
404 | #define RX_QUEUE_SIZE_LOG 8 | ||
405 | |||
406 | /* | ||
407 | * RX related structures and functions | ||
408 | */ | ||
409 | #define RX_FREE_BUFFERS 64 | ||
410 | #define RX_LOW_WATERMARK 8 | ||
411 | |||
412 | /* Size of one Rx buffer in host DRAM */ | ||
413 | #define IWL_RX_BUF_SIZE_3K (3 * 1000) /* 3945 only */ | ||
414 | #define IWL_RX_BUF_SIZE_4K (4 * 1024) | ||
415 | #define IWL_RX_BUF_SIZE_8K (8 * 1024) | ||
416 | |||
402 | /** | 417 | /** |
403 | * struct iwl_rb_status - reseve buffer status | 418 | * struct iwl_rb_status - reseve buffer status |
404 | * host memory mapped FH registers | 419 | * host memory mapped FH registers |
@@ -414,6 +429,7 @@ struct iwl_rb_status { | |||
414 | __le16 closed_fr_num; | 429 | __le16 closed_fr_num; |
415 | __le16 finished_rb_num; | 430 | __le16 finished_rb_num; |
416 | __le16 finished_fr_nam; | 431 | __le16 finished_fr_nam; |
432 | __le32 __unused; /* 3945 only */ | ||
417 | } __attribute__ ((packed)); | 433 | } __attribute__ ((packed)); |
418 | 434 | ||
419 | 435 | ||
@@ -477,7 +493,6 @@ struct iwl_tfd { | |||
477 | __le32 __pad; | 493 | __le32 __pad; |
478 | } __attribute__ ((packed)); | 494 | } __attribute__ ((packed)); |
479 | 495 | ||
480 | |||
481 | /* Keep Warm Size */ | 496 | /* Keep Warm Size */ |
482 | #define IWL_KW_SIZE 0x1000 /* 4k */ | 497 | #define IWL_KW_SIZE 0x1000 /* 4k */ |
483 | 498 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-hcmd.c index 4b35b30e493e..65ae2af61c8d 100644 --- a/drivers/net/wireless/iwlwifi/iwl-hcmd.c +++ b/drivers/net/wireless/iwlwifi/iwl-hcmd.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -109,14 +109,14 @@ static int iwl_generic_cmd_callback(struct iwl_priv *priv, | |||
109 | struct iwl_rx_packet *pkt = NULL; | 109 | struct iwl_rx_packet *pkt = NULL; |
110 | 110 | ||
111 | if (!skb) { | 111 | if (!skb) { |
112 | IWL_ERROR("Error: Response NULL in %s.\n", | 112 | IWL_ERR(priv, "Error: Response NULL in %s.\n", |
113 | get_cmd_string(cmd->hdr.cmd)); | 113 | get_cmd_string(cmd->hdr.cmd)); |
114 | return 1; | 114 | return 1; |
115 | } | 115 | } |
116 | 116 | ||
117 | pkt = (struct iwl_rx_packet *)skb->data; | 117 | pkt = (struct iwl_rx_packet *)skb->data; |
118 | if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) { | 118 | if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) { |
119 | IWL_ERROR("Bad return from %s (0x%08X)\n", | 119 | IWL_ERR(priv, "Bad return from %s (0x%08X)\n", |
120 | get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags); | 120 | get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags); |
121 | return 1; | 121 | return 1; |
122 | } | 122 | } |
@@ -156,7 +156,7 @@ static int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
156 | 156 | ||
157 | ret = iwl_enqueue_hcmd(priv, cmd); | 157 | ret = iwl_enqueue_hcmd(priv, cmd); |
158 | if (ret < 0) { | 158 | if (ret < 0) { |
159 | IWL_ERROR("Error sending %s: enqueue_hcmd failed: %d\n", | 159 | IWL_ERR(priv, "Error sending %s: enqueue_hcmd failed: %d\n", |
160 | get_cmd_string(cmd->id), ret); | 160 | get_cmd_string(cmd->id), ret); |
161 | return ret; | 161 | return ret; |
162 | } | 162 | } |
@@ -174,8 +174,9 @@ int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
174 | BUG_ON(cmd->meta.u.callback != NULL); | 174 | BUG_ON(cmd->meta.u.callback != NULL); |
175 | 175 | ||
176 | if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) { | 176 | if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) { |
177 | IWL_ERROR("Error sending %s: Already sending a host command\n", | 177 | IWL_ERR(priv, |
178 | get_cmd_string(cmd->id)); | 178 | "Error sending %s: Already sending a host command\n", |
179 | get_cmd_string(cmd->id)); | ||
179 | ret = -EBUSY; | 180 | ret = -EBUSY; |
180 | goto out; | 181 | goto out; |
181 | } | 182 | } |
@@ -188,7 +189,7 @@ int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
188 | cmd_idx = iwl_enqueue_hcmd(priv, cmd); | 189 | cmd_idx = iwl_enqueue_hcmd(priv, cmd); |
189 | if (cmd_idx < 0) { | 190 | if (cmd_idx < 0) { |
190 | ret = cmd_idx; | 191 | ret = cmd_idx; |
191 | IWL_ERROR("Error sending %s: enqueue_hcmd failed: %d\n", | 192 | IWL_ERR(priv, "Error sending %s: enqueue_hcmd failed: %d\n", |
192 | get_cmd_string(cmd->id), ret); | 193 | get_cmd_string(cmd->id), ret); |
193 | goto out; | 194 | goto out; |
194 | } | 195 | } |
@@ -198,9 +199,10 @@ int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
198 | HOST_COMPLETE_TIMEOUT); | 199 | HOST_COMPLETE_TIMEOUT); |
199 | if (!ret) { | 200 | if (!ret) { |
200 | if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) { | 201 | if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) { |
201 | IWL_ERROR("Error sending %s: time out after %dms.\n", | 202 | IWL_ERR(priv, |
202 | get_cmd_string(cmd->id), | 203 | "Error sending %s: time out after %dms.\n", |
203 | jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); | 204 | get_cmd_string(cmd->id), |
205 | jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); | ||
204 | 206 | ||
205 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | 207 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); |
206 | ret = -ETIMEDOUT; | 208 | ret = -ETIMEDOUT; |
@@ -221,7 +223,7 @@ int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
221 | goto fail; | 223 | goto fail; |
222 | } | 224 | } |
223 | if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) { | 225 | if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) { |
224 | IWL_ERROR("Error: Response NULL in '%s'\n", | 226 | IWL_ERR(priv, "Error: Response NULL in '%s'\n", |
225 | get_cmd_string(cmd->id)); | 227 | get_cmd_string(cmd->id)); |
226 | ret = -EIO; | 228 | ret = -EIO; |
227 | goto cancel; | 229 | goto cancel; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-helpers.h b/drivers/net/wireless/iwlwifi/iwl-helpers.h index ca4f638ab9d0..fb64d297dd4e 100644 --- a/drivers/net/wireless/iwlwifi/iwl-helpers.h +++ b/drivers/net/wireless/iwlwifi/iwl-helpers.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
diff --git a/drivers/net/wireless/iwlwifi/iwl-io.h b/drivers/net/wireless/iwlwifi/iwl-io.h index 0a92e7431ada..7341a2da8431 100644 --- a/drivers/net/wireless/iwlwifi/iwl-io.h +++ b/drivers/net/wireless/iwlwifi/iwl-io.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project. | 5 | * Portions of this file are derived from the ipw3945 project. |
6 | * | 6 | * |
@@ -165,9 +165,9 @@ static inline int _iwl_grab_nic_access(struct iwl_priv *priv) | |||
165 | ret = _iwl_poll_bit(priv, CSR_GP_CNTRL, | 165 | ret = _iwl_poll_bit(priv, CSR_GP_CNTRL, |
166 | CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, | 166 | CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, |
167 | (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | | 167 | (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | |
168 | CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 50); | 168 | CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000); |
169 | if (ret < 0) { | 169 | if (ret < 0) { |
170 | IWL_ERROR("MAC is in deep sleep!\n"); | 170 | IWL_ERR(priv, "MAC is in deep sleep!\n"); |
171 | return -EIO; | 171 | return -EIO; |
172 | } | 172 | } |
173 | 173 | ||
@@ -182,7 +182,7 @@ static inline int __iwl_grab_nic_access(const char *f, u32 l, | |||
182 | struct iwl_priv *priv) | 182 | struct iwl_priv *priv) |
183 | { | 183 | { |
184 | if (atomic_read(&priv->restrict_refcnt)) | 184 | if (atomic_read(&priv->restrict_refcnt)) |
185 | IWL_ERROR("Grabbing access while already held %s %d.\n", f, l); | 185 | IWL_ERR(priv, "Grabbing access while already held %s %d.\n", f, l); |
186 | 186 | ||
187 | IWL_DEBUG_IO("grabbing nic access - %s %d\n", f, l); | 187 | IWL_DEBUG_IO("grabbing nic access - %s %d\n", f, l); |
188 | return _iwl_grab_nic_access(priv); | 188 | return _iwl_grab_nic_access(priv); |
@@ -207,7 +207,7 @@ static inline void __iwl_release_nic_access(const char *f, u32 l, | |||
207 | struct iwl_priv *priv) | 207 | struct iwl_priv *priv) |
208 | { | 208 | { |
209 | if (atomic_read(&priv->restrict_refcnt) <= 0) | 209 | if (atomic_read(&priv->restrict_refcnt) <= 0) |
210 | IWL_ERROR("Release unheld nic access at line %s %d.\n", f, l); | 210 | IWL_ERR(priv, "Release unheld nic access at line %s %d.\n", f, l); |
211 | 211 | ||
212 | IWL_DEBUG_IO("releasing nic access - %s %d\n", f, l); | 212 | IWL_DEBUG_IO("releasing nic access - %s %d\n", f, l); |
213 | _iwl_release_nic_access(priv); | 213 | _iwl_release_nic_access(priv); |
@@ -229,7 +229,7 @@ static inline u32 __iwl_read_direct32(const char *f, u32 l, | |||
229 | { | 229 | { |
230 | u32 value = _iwl_read_direct32(priv, reg); | 230 | u32 value = _iwl_read_direct32(priv, reg); |
231 | if (!atomic_read(&priv->restrict_refcnt)) | 231 | if (!atomic_read(&priv->restrict_refcnt)) |
232 | IWL_ERROR("Nic access not held from %s %d\n", f, l); | 232 | IWL_ERR(priv, "Nic access not held from %s %d\n", f, l); |
233 | IWL_DEBUG_IO("read_direct32(0x%4X) = 0x%08x - %s %d \n", reg, value, | 233 | IWL_DEBUG_IO("read_direct32(0x%4X) = 0x%08x - %s %d \n", reg, value, |
234 | f, l); | 234 | f, l); |
235 | return value; | 235 | return value; |
@@ -250,7 +250,7 @@ static void __iwl_write_direct32(const char *f , u32 line, | |||
250 | struct iwl_priv *priv, u32 reg, u32 value) | 250 | struct iwl_priv *priv, u32 reg, u32 value) |
251 | { | 251 | { |
252 | if (!atomic_read(&priv->restrict_refcnt)) | 252 | if (!atomic_read(&priv->restrict_refcnt)) |
253 | IWL_ERROR("Nic access not held from %s line %d\n", f, line); | 253 | IWL_ERR(priv, "Nic access not held from %s line %d\n", f, line); |
254 | _iwl_write_direct32(priv, reg, value); | 254 | _iwl_write_direct32(priv, reg, value); |
255 | } | 255 | } |
256 | #define iwl_write_direct32(priv, reg, value) \ | 256 | #define iwl_write_direct32(priv, reg, value) \ |
@@ -308,7 +308,7 @@ static inline u32 __iwl_read_prph(const char *f, u32 line, | |||
308 | struct iwl_priv *priv, u32 reg) | 308 | struct iwl_priv *priv, u32 reg) |
309 | { | 309 | { |
310 | if (!atomic_read(&priv->restrict_refcnt)) | 310 | if (!atomic_read(&priv->restrict_refcnt)) |
311 | IWL_ERROR("Nic access not held from %s line %d\n", f, line); | 311 | IWL_ERR(priv, "Nic access not held from %s line %d\n", f, line); |
312 | return _iwl_read_prph(priv, reg); | 312 | return _iwl_read_prph(priv, reg); |
313 | } | 313 | } |
314 | 314 | ||
@@ -331,7 +331,7 @@ static inline void __iwl_write_prph(const char *f, u32 line, | |||
331 | struct iwl_priv *priv, u32 addr, u32 val) | 331 | struct iwl_priv *priv, u32 addr, u32 val) |
332 | { | 332 | { |
333 | if (!atomic_read(&priv->restrict_refcnt)) | 333 | if (!atomic_read(&priv->restrict_refcnt)) |
334 | IWL_ERROR("Nic access not held from %s line %d\n", f, line); | 334 | IWL_ERR(priv, "Nic access not held from %s line %d\n", f, line); |
335 | _iwl_write_prph(priv, addr, val); | 335 | _iwl_write_prph(priv, addr, val); |
336 | } | 336 | } |
337 | 337 | ||
@@ -349,7 +349,7 @@ static inline void __iwl_set_bits_prph(const char *f, u32 line, | |||
349 | u32 reg, u32 mask) | 349 | u32 reg, u32 mask) |
350 | { | 350 | { |
351 | if (!atomic_read(&priv->restrict_refcnt)) | 351 | if (!atomic_read(&priv->restrict_refcnt)) |
352 | IWL_ERROR("Nic access not held from %s line %d\n", f, line); | 352 | IWL_ERR(priv, "Nic access not held from %s line %d\n", f, line); |
353 | 353 | ||
354 | _iwl_set_bits_prph(priv, reg, mask); | 354 | _iwl_set_bits_prph(priv, reg, mask); |
355 | } | 355 | } |
@@ -367,7 +367,7 @@ static inline void __iwl_set_bits_mask_prph(const char *f, u32 line, | |||
367 | struct iwl_priv *priv, u32 reg, u32 bits, u32 mask) | 367 | struct iwl_priv *priv, u32 reg, u32 bits, u32 mask) |
368 | { | 368 | { |
369 | if (!atomic_read(&priv->restrict_refcnt)) | 369 | if (!atomic_read(&priv->restrict_refcnt)) |
370 | IWL_ERROR("Nic access not held from %s line %d\n", f, line); | 370 | IWL_ERR(priv, "Nic access not held from %s line %d\n", f, line); |
371 | _iwl_set_bits_mask_prph(priv, reg, bits, mask); | 371 | _iwl_set_bits_mask_prph(priv, reg, bits, mask); |
372 | } | 372 | } |
373 | #define iwl_set_bits_mask_prph(priv, reg, bits, mask) \ | 373 | #define iwl_set_bits_mask_prph(priv, reg, bits, mask) \ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.c b/drivers/net/wireless/iwlwifi/iwl-led.c index 11eccd7d268c..501cffeff5f2 100644 --- a/drivers/net/wireless/iwlwifi/iwl-led.c +++ b/drivers/net/wireless/iwlwifi/iwl-led.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -254,7 +254,7 @@ static int iwl_leds_register_led(struct iwl_priv *priv, struct iwl_led *led, | |||
254 | 254 | ||
255 | ret = led_classdev_register(device, &led->led_dev); | 255 | ret = led_classdev_register(device, &led->led_dev); |
256 | if (ret) { | 256 | if (ret) { |
257 | IWL_ERROR("Error: failed to register led handler.\n"); | 257 | IWL_ERR(priv, "Error: failed to register led handler.\n"); |
258 | return ret; | 258 | return ret; |
259 | } | 259 | } |
260 | 260 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.h b/drivers/net/wireless/iwlwifi/iwl-led.h index 021e00bcd1be..1d798d086695 100644 --- a/drivers/net/wireless/iwlwifi/iwl-led.h +++ b/drivers/net/wireless/iwlwifi/iwl-led.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | 30 | ||
31 | struct iwl_priv; | 31 | struct iwl_priv; |
32 | 32 | ||
33 | #ifdef CONFIG_IWLWIFI_LEDS | 33 | #if defined(CONFIG_IWLWIFI_LEDS) || defined(CONFIG_IWL3945_LEDS) |
34 | #include <linux/leds.h> | 34 | #include <linux/leds.h> |
35 | 35 | ||
36 | #define IWL_LED_SOLID 11 | 36 | #define IWL_LED_SOLID 11 |
@@ -47,7 +47,9 @@ enum led_type { | |||
47 | IWL_LED_TRG_RADIO, | 47 | IWL_LED_TRG_RADIO, |
48 | IWL_LED_TRG_MAX, | 48 | IWL_LED_TRG_MAX, |
49 | }; | 49 | }; |
50 | #endif | ||
50 | 51 | ||
52 | #ifdef CONFIG_IWLWIFI_LEDS | ||
51 | 53 | ||
52 | struct iwl_led { | 54 | struct iwl_led { |
53 | struct iwl_priv *priv; | 55 | struct iwl_priv *priv; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.c b/drivers/net/wireless/iwlwifi/iwl-power.c index 75ca6a542174..a4634595c59f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-power.c +++ b/drivers/net/wireless/iwlwifi/iwl-power.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2007 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -60,14 +60,6 @@ | |||
60 | #define IWL_POWER_RANGE_1_MAX (10) | 60 | #define IWL_POWER_RANGE_1_MAX (10) |
61 | 61 | ||
62 | 62 | ||
63 | #define NOSLP __constant_cpu_to_le16(0), 0, 0 | ||
64 | #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0 | ||
65 | #define SLP_TOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC) | ||
66 | #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \ | ||
67 | __constant_cpu_to_le32(X1), \ | ||
68 | __constant_cpu_to_le32(X2), \ | ||
69 | __constant_cpu_to_le32(X3), \ | ||
70 | __constant_cpu_to_le32(X4)} | ||
71 | 63 | ||
72 | #define IWL_POWER_ON_BATTERY IWL_POWER_INDEX_5 | 64 | #define IWL_POWER_ON_BATTERY IWL_POWER_INDEX_5 |
73 | #define IWL_POWER_ON_AC_DISASSOC IWL_POWER_MODE_CAM | 65 | #define IWL_POWER_ON_AC_DISASSOC IWL_POWER_MODE_CAM |
@@ -149,7 +141,7 @@ static u16 iwl_get_auto_power_mode(struct iwl_priv *priv) | |||
149 | } | 141 | } |
150 | 142 | ||
151 | /* initialize to default */ | 143 | /* initialize to default */ |
152 | static int iwl_power_init_handle(struct iwl_priv *priv) | 144 | static void iwl_power_init_handle(struct iwl_priv *priv) |
153 | { | 145 | { |
154 | struct iwl_power_mgr *pow_data; | 146 | struct iwl_power_mgr *pow_data; |
155 | int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX; | 147 | int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX; |
@@ -159,7 +151,7 @@ static int iwl_power_init_handle(struct iwl_priv *priv) | |||
159 | 151 | ||
160 | IWL_DEBUG_POWER("Initialize power \n"); | 152 | IWL_DEBUG_POWER("Initialize power \n"); |
161 | 153 | ||
162 | pow_data = &(priv->power_data); | 154 | pow_data = &priv->power_data; |
163 | 155 | ||
164 | memset(pow_data, 0, sizeof(*pow_data)); | 156 | memset(pow_data, 0, sizeof(*pow_data)); |
165 | 157 | ||
@@ -179,26 +171,25 @@ static int iwl_power_init_handle(struct iwl_priv *priv) | |||
179 | else | 171 | else |
180 | cmd->flags |= IWL_POWER_PCI_PM_MSK; | 172 | cmd->flags |= IWL_POWER_PCI_PM_MSK; |
181 | } | 173 | } |
182 | return 0; | ||
183 | } | 174 | } |
184 | 175 | ||
185 | /* adjust power command according to DTIM period and power level*/ | 176 | /* adjust power command according to DTIM period and power level*/ |
186 | static int iwl_update_power_command(struct iwl_priv *priv, | 177 | static int iwl_update_power_cmd(struct iwl_priv *priv, |
187 | struct iwl_powertable_cmd *cmd, | 178 | struct iwl_powertable_cmd *cmd, u16 mode) |
188 | u16 mode) | ||
189 | { | 179 | { |
190 | int ret = 0, i; | ||
191 | u8 skip; | ||
192 | u32 max_sleep = 0; | ||
193 | struct iwl_power_vec_entry *range; | 180 | struct iwl_power_vec_entry *range; |
194 | u8 period = 0; | ||
195 | struct iwl_power_mgr *pow_data; | 181 | struct iwl_power_mgr *pow_data; |
182 | int i; | ||
183 | u32 max_sleep = 0; | ||
184 | u8 period; | ||
185 | bool skip; | ||
196 | 186 | ||
197 | if (mode > IWL_POWER_INDEX_5) { | 187 | if (mode > IWL_POWER_INDEX_5) { |
198 | IWL_DEBUG_POWER("Error invalid power mode \n"); | 188 | IWL_DEBUG_POWER("Error invalid power mode \n"); |
199 | return -1; | 189 | return -EINVAL; |
200 | } | 190 | } |
201 | pow_data = &(priv->power_data); | 191 | |
192 | pow_data = &priv->power_data; | ||
202 | 193 | ||
203 | if (pow_data->dtim_period <= IWL_POWER_RANGE_0_MAX) | 194 | if (pow_data->dtim_period <= IWL_POWER_RANGE_0_MAX) |
204 | range = &pow_data->pwr_range_0[0]; | 195 | range = &pow_data->pwr_range_0[0]; |
@@ -212,14 +203,12 @@ static int iwl_update_power_command(struct iwl_priv *priv, | |||
212 | 203 | ||
213 | if (period == 0) { | 204 | if (period == 0) { |
214 | period = 1; | 205 | period = 1; |
215 | skip = 0; | 206 | skip = false; |
216 | } else | ||
217 | skip = range[mode].no_dtim; | ||
218 | |||
219 | if (skip == 0) { | ||
220 | max_sleep = period; | ||
221 | cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK; | ||
222 | } else { | 207 | } else { |
208 | skip = !!range[mode].no_dtim; | ||
209 | } | ||
210 | |||
211 | if (skip) { | ||
223 | __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]; | 212 | __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]; |
224 | max_sleep = le32_to_cpu(slp_itrvl); | 213 | max_sleep = le32_to_cpu(slp_itrvl); |
225 | if (max_sleep == 0xFF) | 214 | if (max_sleep == 0xFF) |
@@ -227,12 +216,14 @@ static int iwl_update_power_command(struct iwl_priv *priv, | |||
227 | else if (max_sleep > period) | 216 | else if (max_sleep > period) |
228 | max_sleep = (le32_to_cpu(slp_itrvl) / period) * period; | 217 | max_sleep = (le32_to_cpu(slp_itrvl) / period) * period; |
229 | cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK; | 218 | cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK; |
219 | } else { | ||
220 | max_sleep = period; | ||
221 | cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK; | ||
230 | } | 222 | } |
231 | 223 | ||
232 | for (i = 0; i < IWL_POWER_VEC_SIZE; i++) { | 224 | for (i = 0; i < IWL_POWER_VEC_SIZE; i++) |
233 | if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep) | 225 | if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep) |
234 | cmd->sleep_interval[i] = cpu_to_le32(max_sleep); | 226 | cmd->sleep_interval[i] = cpu_to_le32(max_sleep); |
235 | } | ||
236 | 227 | ||
237 | IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags); | 228 | IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags); |
238 | IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout)); | 229 | IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout)); |
@@ -244,7 +235,7 @@ static int iwl_update_power_command(struct iwl_priv *priv, | |||
244 | le32_to_cpu(cmd->sleep_interval[3]), | 235 | le32_to_cpu(cmd->sleep_interval[3]), |
245 | le32_to_cpu(cmd->sleep_interval[4])); | 236 | le32_to_cpu(cmd->sleep_interval[4])); |
246 | 237 | ||
247 | return ret; | 238 | return 0; |
248 | } | 239 | } |
249 | 240 | ||
250 | 241 | ||
@@ -295,7 +286,7 @@ int iwl_power_update_mode(struct iwl_priv *priv, bool force) | |||
295 | if (final_mode != IWL_POWER_MODE_CAM) | 286 | if (final_mode != IWL_POWER_MODE_CAM) |
296 | set_bit(STATUS_POWER_PMI, &priv->status); | 287 | set_bit(STATUS_POWER_PMI, &priv->status); |
297 | 288 | ||
298 | iwl_update_power_command(priv, &cmd, final_mode); | 289 | iwl_update_power_cmd(priv, &cmd, final_mode); |
299 | cmd.keep_alive_beacons = 0; | 290 | cmd.keep_alive_beacons = 0; |
300 | 291 | ||
301 | if (final_mode == IWL_POWER_INDEX_5) | 292 | if (final_mode == IWL_POWER_INDEX_5) |
@@ -392,13 +383,11 @@ EXPORT_SYMBOL(iwl_power_set_system_mode); | |||
392 | /* initialize to default */ | 383 | /* initialize to default */ |
393 | void iwl_power_initialize(struct iwl_priv *priv) | 384 | void iwl_power_initialize(struct iwl_priv *priv) |
394 | { | 385 | { |
395 | |||
396 | iwl_power_init_handle(priv); | 386 | iwl_power_init_handle(priv); |
397 | priv->power_data.user_power_setting = IWL_POWER_AUTO; | 387 | priv->power_data.user_power_setting = IWL_POWER_AUTO; |
398 | priv->power_data.power_disabled = 0; | ||
399 | priv->power_data.system_power_setting = IWL_POWER_SYS_AUTO; | 388 | priv->power_data.system_power_setting = IWL_POWER_SYS_AUTO; |
400 | priv->power_data.is_battery_active = 0; | ||
401 | priv->power_data.power_disabled = 0; | 389 | priv->power_data.power_disabled = 0; |
390 | priv->power_data.is_battery_active = 0; | ||
402 | priv->power_data.critical_power_setting = 0; | 391 | priv->power_data.critical_power_setting = 0; |
403 | } | 392 | } |
404 | EXPORT_SYMBOL(iwl_power_initialize); | 393 | EXPORT_SYMBOL(iwl_power_initialize); |
@@ -407,8 +396,8 @@ EXPORT_SYMBOL(iwl_power_initialize); | |||
407 | int iwl_power_temperature_change(struct iwl_priv *priv) | 396 | int iwl_power_temperature_change(struct iwl_priv *priv) |
408 | { | 397 | { |
409 | int ret = 0; | 398 | int ret = 0; |
410 | u16 new_critical = priv->power_data.critical_power_setting; | ||
411 | s32 temperature = KELVIN_TO_CELSIUS(priv->last_temperature); | 399 | s32 temperature = KELVIN_TO_CELSIUS(priv->last_temperature); |
400 | u16 new_critical = priv->power_data.critical_power_setting; | ||
412 | 401 | ||
413 | if (temperature > IWL_CT_KILL_TEMPERATURE) | 402 | if (temperature > IWL_CT_KILL_TEMPERATURE) |
414 | return 0; | 403 | return 0; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.h b/drivers/net/wireless/iwlwifi/iwl-power.h index fa098d8975ce..859b60b5335c 100644 --- a/drivers/net/wireless/iwlwifi/iwl-power.h +++ b/drivers/net/wireless/iwlwifi/iwl-power.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2007 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -42,7 +42,10 @@ enum { | |||
42 | IWL_POWER_INDEX_5, | 42 | IWL_POWER_INDEX_5, |
43 | IWL_POWER_AUTO, | 43 | IWL_POWER_AUTO, |
44 | IWL_POWER_MAX = IWL_POWER_AUTO, | 44 | IWL_POWER_MAX = IWL_POWER_AUTO, |
45 | IWL39_POWER_AC = IWL_POWER_AUTO, /* 0x06 */ | ||
45 | IWL_POWER_AC, | 46 | IWL_POWER_AC, |
47 | IWL39_POWER_BATTERY = IWL_POWER_AC, /* 0x07 */ | ||
48 | IWL39_POWER_LIMIT = IWL_POWER_AC, | ||
46 | IWL_POWER_BATTERY, | 49 | IWL_POWER_BATTERY, |
47 | }; | 50 | }; |
48 | 51 | ||
@@ -56,8 +59,21 @@ enum { | |||
56 | #define IWL_POWER_MASK 0x0F | 59 | #define IWL_POWER_MASK 0x0F |
57 | #define IWL_POWER_ENABLED 0x10 | 60 | #define IWL_POWER_ENABLED 0x10 |
58 | 61 | ||
62 | #define IWL_POWER_RANGE_0 (0) | ||
63 | #define IWL_POWER_RANGE_1 (1) | ||
64 | |||
65 | #define IWL_POWER_LEVEL(x) ((x) & IWL_POWER_MASK) | ||
66 | |||
59 | /* Power management (not Tx power) structures */ | 67 | /* Power management (not Tx power) structures */ |
60 | 68 | ||
69 | #define NOSLP __constant_cpu_to_le16(0), 0, 0 | ||
70 | #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0 | ||
71 | #define SLP_TOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC) | ||
72 | #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \ | ||
73 | __constant_cpu_to_le32(X1), \ | ||
74 | __constant_cpu_to_le32(X2), \ | ||
75 | __constant_cpu_to_le32(X3), \ | ||
76 | __constant_cpu_to_le32(X4)} | ||
61 | struct iwl_power_vec_entry { | 77 | struct iwl_power_vec_entry { |
62 | struct iwl_powertable_cmd cmd; | 78 | struct iwl_powertable_cmd cmd; |
63 | u8 no_dtim; | 79 | u8 no_dtim; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-prph.h b/drivers/net/wireless/iwlwifi/iwl-prph.h index b7a5f23351c3..3b9cac3fd216 100644 --- a/drivers/net/wireless/iwlwifi/iwl-prph.h +++ b/drivers/net/wireless/iwlwifi/iwl-prph.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
diff --git a/drivers/net/wireless/iwlwifi/iwl-rfkill.c b/drivers/net/wireless/iwlwifi/iwl-rfkill.c index 4b69da30665c..f67d7be10748 100644 --- a/drivers/net/wireless/iwlwifi/iwl-rfkill.c +++ b/drivers/net/wireless/iwlwifi/iwl-rfkill.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -62,7 +62,8 @@ static int iwl_rfkill_soft_rf_kill(void *data, enum rfkill_state state) | |||
62 | iwl_radio_kill_sw_disable_radio(priv); | 62 | iwl_radio_kill_sw_disable_radio(priv); |
63 | break; | 63 | break; |
64 | default: | 64 | default: |
65 | IWL_WARNING("we received unexpected RFKILL state %d\n", state); | 65 | IWL_WARN(priv, "we received unexpected RFKILL state %d\n", |
66 | state); | ||
66 | break; | 67 | break; |
67 | } | 68 | } |
68 | out_unlock: | 69 | out_unlock: |
@@ -81,7 +82,7 @@ int iwl_rfkill_init(struct iwl_priv *priv) | |||
81 | IWL_DEBUG_RF_KILL("Initializing RFKILL.\n"); | 82 | IWL_DEBUG_RF_KILL("Initializing RFKILL.\n"); |
82 | priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN); | 83 | priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN); |
83 | if (!priv->rfkill) { | 84 | if (!priv->rfkill) { |
84 | IWL_ERROR("Unable to allocate RFKILL device.\n"); | 85 | IWL_ERR(priv, "Unable to allocate RFKILL device.\n"); |
85 | ret = -ENOMEM; | 86 | ret = -ENOMEM; |
86 | goto error; | 87 | goto error; |
87 | } | 88 | } |
@@ -97,7 +98,7 @@ int iwl_rfkill_init(struct iwl_priv *priv) | |||
97 | 98 | ||
98 | ret = rfkill_register(priv->rfkill); | 99 | ret = rfkill_register(priv->rfkill); |
99 | if (ret) { | 100 | if (ret) { |
100 | IWL_ERROR("Unable to register RFKILL: %d\n", ret); | 101 | IWL_ERR(priv, "Unable to register RFKILL: %d\n", ret); |
101 | goto free_rfkill; | 102 | goto free_rfkill; |
102 | } | 103 | } |
103 | 104 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-rfkill.h b/drivers/net/wireless/iwlwifi/iwl-rfkill.h index 86dc055a2e94..633dafb4bf1b 100644 --- a/drivers/net/wireless/iwlwifi/iwl-rfkill.h +++ b/drivers/net/wireless/iwlwifi/iwl-rfkill.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2007 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c index c5f1aa0feac8..33145207fc15 100644 --- a/drivers/net/wireless/iwlwifi/iwl-rx.c +++ b/drivers/net/wireless/iwlwifi/iwl-rx.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -125,9 +125,10 @@ EXPORT_SYMBOL(iwl_rx_queue_space); | |||
125 | */ | 125 | */ |
126 | int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q) | 126 | int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q) |
127 | { | 127 | { |
128 | u32 reg = 0; | ||
129 | int ret = 0; | ||
130 | unsigned long flags; | 128 | unsigned long flags; |
129 | u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg; | ||
130 | u32 reg; | ||
131 | int ret = 0; | ||
131 | 132 | ||
132 | spin_lock_irqsave(&q->lock, flags); | 133 | spin_lock_irqsave(&q->lock, flags); |
133 | 134 | ||
@@ -149,15 +150,14 @@ int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q) | |||
149 | goto exit_unlock; | 150 | goto exit_unlock; |
150 | 151 | ||
151 | /* Device expects a multiple of 8 */ | 152 | /* Device expects a multiple of 8 */ |
152 | iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR, | 153 | iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write & ~0x7); |
153 | q->write & ~0x7); | ||
154 | iwl_release_nic_access(priv); | 154 | iwl_release_nic_access(priv); |
155 | 155 | ||
156 | /* Else device is assumed to be awake */ | 156 | /* Else device is assumed to be awake */ |
157 | } else | 157 | } else { |
158 | /* Device expects a multiple of 8 */ | 158 | /* Device expects a multiple of 8 */ |
159 | iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7); | 159 | iwl_write32(priv, rx_wrt_ptr_reg, q->write & ~0x7); |
160 | 160 | } | |
161 | 161 | ||
162 | q->need_update = 0; | 162 | q->need_update = 0; |
163 | 163 | ||
@@ -262,8 +262,7 @@ void iwl_rx_allocate(struct iwl_priv *priv) | |||
262 | rxb->skb = alloc_skb(priv->hw_params.rx_buf_size + 256, | 262 | rxb->skb = alloc_skb(priv->hw_params.rx_buf_size + 256, |
263 | GFP_KERNEL); | 263 | GFP_KERNEL); |
264 | if (!rxb->skb) { | 264 | if (!rxb->skb) { |
265 | printk(KERN_CRIT DRV_NAME | 265 | IWL_CRIT(priv, "Can not allocate SKB buffers\n"); |
266 | "Can not allocate SKB buffers\n"); | ||
267 | /* We don't reschedule replenish work here -- we will | 266 | /* We don't reschedule replenish work here -- we will |
268 | * call the restock method and if it still needs | 267 | * call the restock method and if it still needs |
269 | * more buffers it will schedule replenish */ | 268 | * more buffers it will schedule replenish */ |
@@ -895,7 +894,7 @@ static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv, | |||
895 | rx_start = (struct iwl_rx_phy_res *)&priv->last_phy_res[1]; | 894 | rx_start = (struct iwl_rx_phy_res *)&priv->last_phy_res[1]; |
896 | 895 | ||
897 | if (!rx_start) { | 896 | if (!rx_start) { |
898 | IWL_ERROR("MPDU frame without a PHY data\n"); | 897 | IWL_ERR(priv, "MPDU frame without a PHY data\n"); |
899 | return; | 898 | return; |
900 | } | 899 | } |
901 | if (include_phy) { | 900 | if (include_phy) { |
@@ -1021,7 +1020,7 @@ void iwl_rx_reply_rx(struct iwl_priv *priv, | |||
1021 | } | 1020 | } |
1022 | 1021 | ||
1023 | if (!rx_start) { | 1022 | if (!rx_start) { |
1024 | IWL_ERROR("MPDU frame without a PHY data\n"); | 1023 | IWL_ERR(priv, "MPDU frame without a PHY data\n"); |
1025 | return; | 1024 | return; |
1026 | } | 1025 | } |
1027 | 1026 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c index 3c803f6922ef..c282d1d294e6 100644 --- a/drivers/net/wireless/iwlwifi/iwl-scan.c +++ b/drivers/net/wireless/iwlwifi/iwl-scan.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -46,15 +46,6 @@ | |||
46 | #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3) | 46 | #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3) |
47 | #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2) | 47 | #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2) |
48 | 48 | ||
49 | /* For faster active scanning, scan will move to the next channel if fewer than | ||
50 | * PLCP_QUIET_THRESH packets are heard on this channel within | ||
51 | * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell | ||
52 | * time if it's a quiet channel (nothing responded to our probe, and there's | ||
53 | * no other traffic). | ||
54 | * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */ | ||
55 | #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */ | ||
56 | #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */ | ||
57 | |||
58 | /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel. | 49 | /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel. |
59 | * Must be set longer than active dwell time. | 50 | * Must be set longer than active dwell time. |
60 | * For the most reliable scan, set > AP beacon interval (typically 100msec). */ | 51 | * For the most reliable scan, set > AP beacon interval (typically 100msec). */ |
@@ -63,7 +54,6 @@ | |||
63 | #define IWL_PASSIVE_DWELL_BASE (100) | 54 | #define IWL_PASSIVE_DWELL_BASE (100) |
64 | #define IWL_CHANNEL_TUNE_TIME 5 | 55 | #define IWL_CHANNEL_TUNE_TIME 5 |
65 | 56 | ||
66 | #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1)))) | ||
67 | 57 | ||
68 | 58 | ||
69 | /** | 59 | /** |
@@ -119,7 +109,7 @@ int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms) | |||
119 | } | 109 | } |
120 | EXPORT_SYMBOL(iwl_scan_cancel_timeout); | 110 | EXPORT_SYMBOL(iwl_scan_cancel_timeout); |
121 | 111 | ||
122 | static int iwl_send_scan_abort(struct iwl_priv *priv) | 112 | int iwl_send_scan_abort(struct iwl_priv *priv) |
123 | { | 113 | { |
124 | int ret = 0; | 114 | int ret = 0; |
125 | struct iwl_rx_packet *res; | 115 | struct iwl_rx_packet *res; |
@@ -160,7 +150,7 @@ static int iwl_send_scan_abort(struct iwl_priv *priv) | |||
160 | 150 | ||
161 | return ret; | 151 | return ret; |
162 | } | 152 | } |
163 | 153 | EXPORT_SYMBOL(iwl_send_scan_abort); | |
164 | 154 | ||
165 | /* Service response to REPLY_SCAN_CMD (0x80) */ | 155 | /* Service response to REPLY_SCAN_CMD (0x80) */ |
166 | static void iwl_rx_reply_scan(struct iwl_priv *priv, | 156 | static void iwl_rx_reply_scan(struct iwl_priv *priv, |
@@ -296,9 +286,9 @@ void iwl_setup_rx_scan_handlers(struct iwl_priv *priv) | |||
296 | } | 286 | } |
297 | EXPORT_SYMBOL(iwl_setup_rx_scan_handlers); | 287 | EXPORT_SYMBOL(iwl_setup_rx_scan_handlers); |
298 | 288 | ||
299 | static inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, | 289 | inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, |
300 | enum ieee80211_band band, | 290 | enum ieee80211_band band, |
301 | u8 n_probes) | 291 | u8 n_probes) |
302 | { | 292 | { |
303 | if (band == IEEE80211_BAND_5GHZ) | 293 | if (band == IEEE80211_BAND_5GHZ) |
304 | return IWL_ACTIVE_DWELL_TIME_52 + | 294 | return IWL_ACTIVE_DWELL_TIME_52 + |
@@ -307,9 +297,10 @@ static inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, | |||
307 | return IWL_ACTIVE_DWELL_TIME_24 + | 297 | return IWL_ACTIVE_DWELL_TIME_24 + |
308 | IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1); | 298 | IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1); |
309 | } | 299 | } |
300 | EXPORT_SYMBOL(iwl_get_active_dwell_time); | ||
310 | 301 | ||
311 | static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, | 302 | u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, |
312 | enum ieee80211_band band) | 303 | enum ieee80211_band band) |
313 | { | 304 | { |
314 | u16 passive = (band == IEEE80211_BAND_2GHZ) ? | 305 | u16 passive = (band == IEEE80211_BAND_2GHZ) ? |
315 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 : | 306 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 : |
@@ -327,6 +318,7 @@ static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, | |||
327 | 318 | ||
328 | return passive; | 319 | return passive; |
329 | } | 320 | } |
321 | EXPORT_SYMBOL(iwl_get_passive_dwell_time); | ||
330 | 322 | ||
331 | static int iwl_get_channels_for_scan(struct iwl_priv *priv, | 323 | static int iwl_get_channels_for_scan(struct iwl_priv *priv, |
332 | enum ieee80211_band band, | 324 | enum ieee80211_band band, |
@@ -450,7 +442,7 @@ EXPORT_SYMBOL(iwl_scan_initiate); | |||
450 | 442 | ||
451 | #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ) | 443 | #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ) |
452 | 444 | ||
453 | static void iwl_bg_scan_check(struct work_struct *data) | 445 | void iwl_bg_scan_check(struct work_struct *data) |
454 | { | 446 | { |
455 | struct iwl_priv *priv = | 447 | struct iwl_priv *priv = |
456 | container_of(data, struct iwl_priv, scan_check.work); | 448 | container_of(data, struct iwl_priv, scan_check.work); |
@@ -470,6 +462,8 @@ static void iwl_bg_scan_check(struct work_struct *data) | |||
470 | } | 462 | } |
471 | mutex_unlock(&priv->mutex); | 463 | mutex_unlock(&priv->mutex); |
472 | } | 464 | } |
465 | EXPORT_SYMBOL(iwl_bg_scan_check); | ||
466 | |||
473 | /** | 467 | /** |
474 | * iwl_supported_rate_to_ie - fill in the supported rate in IE field | 468 | * iwl_supported_rate_to_ie - fill in the supported rate in IE field |
475 | * | 469 | * |
@@ -527,10 +521,10 @@ static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband, | |||
527 | * iwl_fill_probe_req - fill in all required fields and IE for probe request | 521 | * iwl_fill_probe_req - fill in all required fields and IE for probe request |
528 | */ | 522 | */ |
529 | 523 | ||
530 | static u16 iwl_fill_probe_req(struct iwl_priv *priv, | 524 | u16 iwl_fill_probe_req(struct iwl_priv *priv, |
531 | enum ieee80211_band band, | 525 | enum ieee80211_band band, |
532 | struct ieee80211_mgmt *frame, | 526 | struct ieee80211_mgmt *frame, |
533 | int left) | 527 | int left) |
534 | { | 528 | { |
535 | int len = 0; | 529 | int len = 0; |
536 | u8 *pos = NULL; | 530 | u8 *pos = NULL; |
@@ -624,6 +618,7 @@ static u16 iwl_fill_probe_req(struct iwl_priv *priv, | |||
624 | 618 | ||
625 | return (u16)len; | 619 | return (u16)len; |
626 | } | 620 | } |
621 | EXPORT_SYMBOL(iwl_fill_probe_req); | ||
627 | 622 | ||
628 | static void iwl_bg_request_scan(struct work_struct *data) | 623 | static void iwl_bg_request_scan(struct work_struct *data) |
629 | { | 624 | { |
@@ -650,7 +645,7 @@ static void iwl_bg_request_scan(struct work_struct *data) | |||
650 | mutex_lock(&priv->mutex); | 645 | mutex_lock(&priv->mutex); |
651 | 646 | ||
652 | if (!iwl_is_ready(priv)) { | 647 | if (!iwl_is_ready(priv)) { |
653 | IWL_WARNING("request scan called when driver not ready.\n"); | 648 | IWL_WARN(priv, "request scan called when driver not ready.\n"); |
654 | goto done; | 649 | goto done; |
655 | } | 650 | } |
656 | 651 | ||
@@ -773,7 +768,7 @@ static void iwl_bg_request_scan(struct work_struct *data) | |||
773 | if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965) | 768 | if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965) |
774 | rx_chain = 0x6; | 769 | rx_chain = 0x6; |
775 | } else { | 770 | } else { |
776 | IWL_WARNING("Invalid scan band count\n"); | 771 | IWL_WARN(priv, "Invalid scan band count\n"); |
777 | goto done; | 772 | goto done; |
778 | } | 773 | } |
779 | 774 | ||
@@ -839,7 +834,7 @@ static void iwl_bg_request_scan(struct work_struct *data) | |||
839 | mutex_unlock(&priv->mutex); | 834 | mutex_unlock(&priv->mutex); |
840 | } | 835 | } |
841 | 836 | ||
842 | static void iwl_bg_abort_scan(struct work_struct *work) | 837 | void iwl_bg_abort_scan(struct work_struct *work) |
843 | { | 838 | { |
844 | struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan); | 839 | struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan); |
845 | 840 | ||
@@ -853,8 +848,9 @@ static void iwl_bg_abort_scan(struct work_struct *work) | |||
853 | 848 | ||
854 | mutex_unlock(&priv->mutex); | 849 | mutex_unlock(&priv->mutex); |
855 | } | 850 | } |
851 | EXPORT_SYMBOL(iwl_bg_abort_scan); | ||
856 | 852 | ||
857 | static void iwl_bg_scan_completed(struct work_struct *work) | 853 | void iwl_bg_scan_completed(struct work_struct *work) |
858 | { | 854 | { |
859 | struct iwl_priv *priv = | 855 | struct iwl_priv *priv = |
860 | container_of(work, struct iwl_priv, scan_completed); | 856 | container_of(work, struct iwl_priv, scan_completed); |
@@ -872,7 +868,7 @@ static void iwl_bg_scan_completed(struct work_struct *work) | |||
872 | iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); | 868 | iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); |
873 | mutex_unlock(&priv->mutex); | 869 | mutex_unlock(&priv->mutex); |
874 | } | 870 | } |
875 | 871 | EXPORT_SYMBOL(iwl_bg_scan_completed); | |
876 | 872 | ||
877 | void iwl_setup_scan_deferred_work(struct iwl_priv *priv) | 873 | void iwl_setup_scan_deferred_work(struct iwl_priv *priv) |
878 | { | 874 | { |
diff --git a/drivers/net/wireless/iwlwifi/iwl-spectrum.c b/drivers/net/wireless/iwlwifi/iwl-spectrum.c index 836c3c80b69e..aba1ef22fc61 100644 --- a/drivers/net/wireless/iwlwifi/iwl-spectrum.c +++ b/drivers/net/wireless/iwlwifi/iwl-spectrum.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -146,7 +146,7 @@ static int iwl_get_measurement(struct iwl_priv *priv, | |||
146 | 146 | ||
147 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; | 147 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
148 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { | 148 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
149 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | 149 | IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n"); |
150 | rc = -EIO; | 150 | rc = -EIO; |
151 | } | 151 | } |
152 | 152 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-spectrum.h b/drivers/net/wireless/iwlwifi/iwl-spectrum.h index b7d7943e476b..a77c1e619062 100644 --- a/drivers/net/wireless/iwlwifi/iwl-spectrum.h +++ b/drivers/net/wireless/iwlwifi/iwl-spectrum.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ieee80211 subsystem header files. | 5 | * Portions of this file are derived from the ieee80211 subsystem header files. |
6 | * | 6 | * |
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c index 412f66bac1af..9bba98e5e056 100644 --- a/drivers/net/wireless/iwlwifi/iwl-sta.c +++ b/drivers/net/wireless/iwlwifi/iwl-sta.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -86,8 +86,10 @@ static void iwl_sta_ucode_activate(struct iwl_priv *priv, u8 sta_id) | |||
86 | 86 | ||
87 | spin_lock_irqsave(&priv->sta_lock, flags); | 87 | spin_lock_irqsave(&priv->sta_lock, flags); |
88 | 88 | ||
89 | if (!(priv->stations[sta_id].used & IWL_STA_DRIVER_ACTIVE)) | 89 | if (!(priv->stations[sta_id].used & IWL_STA_DRIVER_ACTIVE) && |
90 | IWL_ERROR("ACTIVATE a non DRIVER active station %d\n", sta_id); | 90 | !(priv->stations_39[sta_id].used & IWL_STA_DRIVER_ACTIVE)) |
91 | IWL_ERR(priv, "ACTIVATE a non DRIVER active station %d\n", | ||
92 | sta_id); | ||
91 | 93 | ||
92 | priv->stations[sta_id].used |= IWL_STA_UCODE_ACTIVE; | 94 | priv->stations[sta_id].used |= IWL_STA_UCODE_ACTIVE; |
93 | IWL_DEBUG_ASSOC("Added STA to Ucode: %pM\n", | 95 | IWL_DEBUG_ASSOC("Added STA to Ucode: %pM\n", |
@@ -105,13 +107,13 @@ static int iwl_add_sta_callback(struct iwl_priv *priv, | |||
105 | u8 sta_id = addsta->sta.sta_id; | 107 | u8 sta_id = addsta->sta.sta_id; |
106 | 108 | ||
107 | if (!skb) { | 109 | if (!skb) { |
108 | IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n"); | 110 | IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n"); |
109 | return 1; | 111 | return 1; |
110 | } | 112 | } |
111 | 113 | ||
112 | res = (struct iwl_rx_packet *)skb->data; | 114 | res = (struct iwl_rx_packet *)skb->data; |
113 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { | 115 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
114 | IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n", | 116 | IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n", |
115 | res->hdr.flags); | 117 | res->hdr.flags); |
116 | return 1; | 118 | return 1; |
117 | } | 119 | } |
@@ -130,7 +132,7 @@ static int iwl_add_sta_callback(struct iwl_priv *priv, | |||
130 | return 1; | 132 | return 1; |
131 | } | 133 | } |
132 | 134 | ||
133 | static int iwl_send_add_sta(struct iwl_priv *priv, | 135 | int iwl_send_add_sta(struct iwl_priv *priv, |
134 | struct iwl_addsta_cmd *sta, u8 flags) | 136 | struct iwl_addsta_cmd *sta, u8 flags) |
135 | { | 137 | { |
136 | struct iwl_rx_packet *res = NULL; | 138 | struct iwl_rx_packet *res = NULL; |
@@ -155,7 +157,7 @@ static int iwl_send_add_sta(struct iwl_priv *priv, | |||
155 | 157 | ||
156 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; | 158 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
157 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { | 159 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
158 | IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n", | 160 | IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n", |
159 | res->hdr.flags); | 161 | res->hdr.flags); |
160 | ret = -EIO; | 162 | ret = -EIO; |
161 | } | 163 | } |
@@ -168,7 +170,7 @@ static int iwl_send_add_sta(struct iwl_priv *priv, | |||
168 | break; | 170 | break; |
169 | default: | 171 | default: |
170 | ret = -EIO; | 172 | ret = -EIO; |
171 | IWL_WARNING("REPLY_ADD_STA failed\n"); | 173 | IWL_WARN(priv, "REPLY_ADD_STA failed\n"); |
172 | break; | 174 | break; |
173 | } | 175 | } |
174 | } | 176 | } |
@@ -178,6 +180,7 @@ static int iwl_send_add_sta(struct iwl_priv *priv, | |||
178 | 180 | ||
179 | return ret; | 181 | return ret; |
180 | } | 182 | } |
183 | EXPORT_SYMBOL(iwl_send_add_sta); | ||
181 | 184 | ||
182 | static void iwl_set_ht_add_station(struct iwl_priv *priv, u8 index, | 185 | static void iwl_set_ht_add_station(struct iwl_priv *priv, u8 index, |
183 | struct ieee80211_sta_ht_cap *sta_ht_inf) | 186 | struct ieee80211_sta_ht_cap *sta_ht_inf) |
@@ -204,7 +207,7 @@ static void iwl_set_ht_add_station(struct iwl_priv *priv, u8 index, | |||
204 | case WLAN_HT_CAP_SM_PS_DISABLED: | 207 | case WLAN_HT_CAP_SM_PS_DISABLED: |
205 | break; | 208 | break; |
206 | default: | 209 | default: |
207 | IWL_WARNING("Invalid MIMO PS mode %d\n", mimo_ps_mode); | 210 | IWL_WARN(priv, "Invalid MIMO PS mode %d\n", mimo_ps_mode); |
208 | break; | 211 | break; |
209 | } | 212 | } |
210 | 213 | ||
@@ -307,7 +310,7 @@ static void iwl_sta_ucode_deactivate(struct iwl_priv *priv, const char *addr) | |||
307 | 310 | ||
308 | /* Ucode must be active and driver must be non active */ | 311 | /* Ucode must be active and driver must be non active */ |
309 | if (priv->stations[sta_id].used != IWL_STA_UCODE_ACTIVE) | 312 | if (priv->stations[sta_id].used != IWL_STA_UCODE_ACTIVE) |
310 | IWL_ERROR("removed non active STA %d\n", sta_id); | 313 | IWL_ERR(priv, "removed non active STA %d\n", sta_id); |
311 | 314 | ||
312 | priv->stations[sta_id].used &= ~IWL_STA_UCODE_ACTIVE; | 315 | priv->stations[sta_id].used &= ~IWL_STA_UCODE_ACTIVE; |
313 | 316 | ||
@@ -324,13 +327,13 @@ static int iwl_remove_sta_callback(struct iwl_priv *priv, | |||
324 | const char *addr = rm_sta->addr; | 327 | const char *addr = rm_sta->addr; |
325 | 328 | ||
326 | if (!skb) { | 329 | if (!skb) { |
327 | IWL_ERROR("Error: Response NULL in REPLY_REMOVE_STA.\n"); | 330 | IWL_ERR(priv, "Error: Response NULL in REPLY_REMOVE_STA.\n"); |
328 | return 1; | 331 | return 1; |
329 | } | 332 | } |
330 | 333 | ||
331 | res = (struct iwl_rx_packet *)skb->data; | 334 | res = (struct iwl_rx_packet *)skb->data; |
332 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { | 335 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
333 | IWL_ERROR("Bad return from REPLY_REMOVE_STA (0x%08X)\n", | 336 | IWL_ERR(priv, "Bad return from REPLY_REMOVE_STA (0x%08X)\n", |
334 | res->hdr.flags); | 337 | res->hdr.flags); |
335 | return 1; | 338 | return 1; |
336 | } | 339 | } |
@@ -340,7 +343,7 @@ static int iwl_remove_sta_callback(struct iwl_priv *priv, | |||
340 | iwl_sta_ucode_deactivate(priv, addr); | 343 | iwl_sta_ucode_deactivate(priv, addr); |
341 | break; | 344 | break; |
342 | default: | 345 | default: |
343 | IWL_ERROR("REPLY_REMOVE_STA failed\n"); | 346 | IWL_ERR(priv, "REPLY_REMOVE_STA failed\n"); |
344 | break; | 347 | break; |
345 | } | 348 | } |
346 | 349 | ||
@@ -378,7 +381,7 @@ static int iwl_send_remove_station(struct iwl_priv *priv, const u8 *addr, | |||
378 | 381 | ||
379 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; | 382 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
380 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { | 383 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
381 | IWL_ERROR("Bad return from REPLY_REMOVE_STA (0x%08X)\n", | 384 | IWL_ERR(priv, "Bad return from REPLY_REMOVE_STA (0x%08X)\n", |
382 | res->hdr.flags); | 385 | res->hdr.flags); |
383 | ret = -EIO; | 386 | ret = -EIO; |
384 | } | 387 | } |
@@ -391,7 +394,7 @@ static int iwl_send_remove_station(struct iwl_priv *priv, const u8 *addr, | |||
391 | break; | 394 | break; |
392 | default: | 395 | default: |
393 | ret = -EIO; | 396 | ret = -EIO; |
394 | IWL_ERROR("REPLY_REMOVE_STA failed\n"); | 397 | IWL_ERR(priv, "REPLY_REMOVE_STA failed\n"); |
395 | break; | 398 | break; |
396 | } | 399 | } |
397 | } | 400 | } |
@@ -433,13 +436,13 @@ int iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap) | |||
433 | sta_id, addr); | 436 | sta_id, addr); |
434 | 437 | ||
435 | if (!(priv->stations[sta_id].used & IWL_STA_DRIVER_ACTIVE)) { | 438 | if (!(priv->stations[sta_id].used & IWL_STA_DRIVER_ACTIVE)) { |
436 | IWL_ERROR("Removing %pM but non DRIVER active\n", | 439 | IWL_ERR(priv, "Removing %pM but non DRIVER active\n", |
437 | addr); | 440 | addr); |
438 | goto out; | 441 | goto out; |
439 | } | 442 | } |
440 | 443 | ||
441 | if (!(priv->stations[sta_id].used & IWL_STA_UCODE_ACTIVE)) { | 444 | if (!(priv->stations[sta_id].used & IWL_STA_UCODE_ACTIVE)) { |
442 | IWL_ERROR("Removing %pM but non UCODE active\n", | 445 | IWL_ERR(priv, "Removing %pM but non UCODE active\n", |
443 | addr); | 446 | addr); |
444 | goto out; | 447 | goto out; |
445 | } | 448 | } |
@@ -475,7 +478,7 @@ void iwl_clear_stations_table(struct iwl_priv *priv) | |||
475 | if (iwl_is_alive(priv) && | 478 | if (iwl_is_alive(priv) && |
476 | !test_bit(STATUS_EXIT_PENDING, &priv->status) && | 479 | !test_bit(STATUS_EXIT_PENDING, &priv->status) && |
477 | iwl_send_cmd_pdu_async(priv, REPLY_REMOVE_ALL_STA, 0, NULL, NULL)) | 480 | iwl_send_cmd_pdu_async(priv, REPLY_REMOVE_ALL_STA, 0, NULL, NULL)) |
478 | IWL_ERROR("Couldn't clear the station table\n"); | 481 | IWL_ERR(priv, "Couldn't clear the station table\n"); |
479 | 482 | ||
480 | priv->num_stations = 0; | 483 | priv->num_stations = 0; |
481 | memset(priv->stations, 0, sizeof(priv->stations)); | 484 | memset(priv->stations, 0, sizeof(priv->stations)); |
@@ -548,7 +551,7 @@ int iwl_remove_default_wep_key(struct iwl_priv *priv, | |||
548 | spin_lock_irqsave(&priv->sta_lock, flags); | 551 | spin_lock_irqsave(&priv->sta_lock, flags); |
549 | 552 | ||
550 | if (!test_and_clear_bit(keyconf->keyidx, &priv->ucode_key_table)) | 553 | if (!test_and_clear_bit(keyconf->keyidx, &priv->ucode_key_table)) |
551 | IWL_ERROR("index %d not used in uCode key table.\n", | 554 | IWL_ERR(priv, "index %d not used in uCode key table.\n", |
552 | keyconf->keyidx); | 555 | keyconf->keyidx); |
553 | 556 | ||
554 | priv->default_wep_key--; | 557 | priv->default_wep_key--; |
@@ -582,7 +585,7 @@ int iwl_set_default_wep_key(struct iwl_priv *priv, | |||
582 | priv->default_wep_key++; | 585 | priv->default_wep_key++; |
583 | 586 | ||
584 | if (test_and_set_bit(keyconf->keyidx, &priv->ucode_key_table)) | 587 | if (test_and_set_bit(keyconf->keyidx, &priv->ucode_key_table)) |
585 | IWL_ERROR("index %d already used in uCode key table.\n", | 588 | IWL_ERR(priv, "index %d already used in uCode key table.\n", |
586 | keyconf->keyidx); | 589 | keyconf->keyidx); |
587 | 590 | ||
588 | priv->wep_keys[keyconf->keyidx].key_size = keyconf->keylen; | 591 | priv->wep_keys[keyconf->keyidx].key_size = keyconf->keylen; |
@@ -638,7 +641,7 @@ static int iwl_set_wep_dynamic_key_info(struct iwl_priv *priv, | |||
638 | * in uCode. */ | 641 | * in uCode. */ |
639 | 642 | ||
640 | WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, | 643 | WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, |
641 | "no space for new kew"); | 644 | "no space for a new key"); |
642 | 645 | ||
643 | priv->stations[sta_id].sta.key.key_flags = key_flags; | 646 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
644 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 647 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
@@ -686,7 +689,7 @@ static int iwl_set_ccmp_dynamic_key_info(struct iwl_priv *priv, | |||
686 | * in uCode. */ | 689 | * in uCode. */ |
687 | 690 | ||
688 | WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, | 691 | WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, |
689 | "no space for new kew"); | 692 | "no space for a new key"); |
690 | 693 | ||
691 | priv->stations[sta_id].sta.key.key_flags = key_flags; | 694 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
692 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 695 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
@@ -722,7 +725,7 @@ static int iwl_set_tkip_dynamic_key_info(struct iwl_priv *priv, | |||
722 | * in uCode. */ | 725 | * in uCode. */ |
723 | 726 | ||
724 | WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, | 727 | WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, |
725 | "no space for new kew"); | 728 | "no space for a new key"); |
726 | 729 | ||
727 | /* This copy is acutally not needed: we get the key with each TX */ | 730 | /* This copy is acutally not needed: we get the key with each TX */ |
728 | memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16); | 731 | memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16); |
@@ -812,7 +815,7 @@ int iwl_remove_dynamic_key(struct iwl_priv *priv, | |||
812 | } | 815 | } |
813 | 816 | ||
814 | if (priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET) { | 817 | if (priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET) { |
815 | IWL_WARNING("Removing wrong key %d 0x%x\n", | 818 | IWL_WARN(priv, "Removing wrong key %d 0x%x\n", |
816 | keyconf->keyidx, key_flags); | 819 | keyconf->keyidx, key_flags); |
817 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 820 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
818 | return 0; | 821 | return 0; |
@@ -820,7 +823,7 @@ int iwl_remove_dynamic_key(struct iwl_priv *priv, | |||
820 | 823 | ||
821 | if (!test_and_clear_bit(priv->stations[sta_id].sta.key.key_offset, | 824 | if (!test_and_clear_bit(priv->stations[sta_id].sta.key.key_offset, |
822 | &priv->ucode_key_table)) | 825 | &priv->ucode_key_table)) |
823 | IWL_ERROR("index %d not used in uCode key table.\n", | 826 | IWL_ERR(priv, "index %d not used in uCode key table.\n", |
824 | priv->stations[sta_id].sta.key.key_offset); | 827 | priv->stations[sta_id].sta.key.key_offset); |
825 | memset(&priv->stations[sta_id].keyinfo, 0, | 828 | memset(&priv->stations[sta_id].keyinfo, 0, |
826 | sizeof(struct iwl_hw_key)); | 829 | sizeof(struct iwl_hw_key)); |
@@ -857,7 +860,8 @@ int iwl_set_dynamic_key(struct iwl_priv *priv, | |||
857 | ret = iwl_set_wep_dynamic_key_info(priv, keyconf, sta_id); | 860 | ret = iwl_set_wep_dynamic_key_info(priv, keyconf, sta_id); |
858 | break; | 861 | break; |
859 | default: | 862 | default: |
860 | IWL_ERROR("Unknown alg: %s alg = %d\n", __func__, keyconf->alg); | 863 | IWL_ERR(priv, |
864 | "Unknown alg: %s alg = %d\n", __func__, keyconf->alg); | ||
861 | ret = -EINVAL; | 865 | ret = -EINVAL; |
862 | } | 866 | } |
863 | 867 | ||
@@ -1069,7 +1073,8 @@ int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr) | |||
1069 | return priv->hw_params.bcast_sta_id; | 1073 | return priv->hw_params.bcast_sta_id; |
1070 | 1074 | ||
1071 | default: | 1075 | default: |
1072 | IWL_WARNING("Unknown mode of operation: %d\n", priv->iw_mode); | 1076 | IWL_WARN(priv, "Unknown mode of operation: %d\n", |
1077 | priv->iw_mode); | ||
1073 | return priv->hw_params.bcast_sta_id; | 1078 | return priv->hw_params.bcast_sta_id; |
1074 | } | 1079 | } |
1075 | } | 1080 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.h b/drivers/net/wireless/iwlwifi/iwl-sta.h index 9bb7cefc1f3c..97f6169007f8 100644 --- a/drivers/net/wireless/iwlwifi/iwl-sta.h +++ b/drivers/net/wireless/iwlwifi/iwl-sta.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -56,6 +56,8 @@ int iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap); | |||
56 | void iwl_clear_stations_table(struct iwl_priv *priv); | 56 | void iwl_clear_stations_table(struct iwl_priv *priv); |
57 | int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr); | 57 | int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr); |
58 | int iwl_get_ra_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr); | 58 | int iwl_get_ra_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr); |
59 | int iwl_send_add_sta(struct iwl_priv *priv, | ||
60 | struct iwl_addsta_cmd *sta, u8 flags); | ||
59 | u8 iwl_add_station_flags(struct iwl_priv *priv, const u8 *addr, | 61 | u8 iwl_add_station_flags(struct iwl_priv *priv, const u8 *addr, |
60 | int is_ap, u8 flags, | 62 | int is_ap, u8 flags, |
61 | struct ieee80211_sta_ht_cap *ht_info); | 63 | struct ieee80211_sta_ht_cap *ht_info); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c index b0ee86c62685..7d2b6e11f73e 100644 --- a/drivers/net/wireless/iwlwifi/iwl-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-tx.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -76,116 +76,6 @@ static inline void iwl_free_dma_ptr(struct iwl_priv *priv, | |||
76 | memset(ptr, 0, sizeof(*ptr)); | 76 | memset(ptr, 0, sizeof(*ptr)); |
77 | } | 77 | } |
78 | 78 | ||
79 | static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx) | ||
80 | { | ||
81 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; | ||
82 | |||
83 | dma_addr_t addr = get_unaligned_le32(&tb->lo); | ||
84 | if (sizeof(dma_addr_t) > sizeof(u32)) | ||
85 | addr |= | ||
86 | ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16; | ||
87 | |||
88 | return addr; | ||
89 | } | ||
90 | |||
91 | static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx) | ||
92 | { | ||
93 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; | ||
94 | |||
95 | return le16_to_cpu(tb->hi_n_len) >> 4; | ||
96 | } | ||
97 | |||
98 | static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx, | ||
99 | dma_addr_t addr, u16 len) | ||
100 | { | ||
101 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; | ||
102 | u16 hi_n_len = len << 4; | ||
103 | |||
104 | put_unaligned_le32(addr, &tb->lo); | ||
105 | if (sizeof(dma_addr_t) > sizeof(u32)) | ||
106 | hi_n_len |= ((addr >> 16) >> 16) & 0xF; | ||
107 | |||
108 | tb->hi_n_len = cpu_to_le16(hi_n_len); | ||
109 | |||
110 | tfd->num_tbs = idx + 1; | ||
111 | } | ||
112 | |||
113 | static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd) | ||
114 | { | ||
115 | return tfd->num_tbs & 0x1f; | ||
116 | } | ||
117 | |||
118 | /** | ||
119 | * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr] | ||
120 | * @priv - driver private data | ||
121 | * @txq - tx queue | ||
122 | * | ||
123 | * Does NOT advance any TFD circular buffer read/write indexes | ||
124 | * Does NOT free the TFD itself (which is within circular buffer) | ||
125 | */ | ||
126 | static void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq) | ||
127 | { | ||
128 | struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)&txq->tfds[0]; | ||
129 | struct iwl_tfd *tfd; | ||
130 | struct pci_dev *dev = priv->pci_dev; | ||
131 | int index = txq->q.read_ptr; | ||
132 | int i; | ||
133 | int num_tbs; | ||
134 | |||
135 | tfd = &tfd_tmp[index]; | ||
136 | |||
137 | /* Sanity check on number of chunks */ | ||
138 | num_tbs = iwl_tfd_get_num_tbs(tfd); | ||
139 | |||
140 | if (num_tbs >= IWL_NUM_OF_TBS) { | ||
141 | IWL_ERROR("Too many chunks: %i\n", num_tbs); | ||
142 | /* @todo issue fatal error, it is quite serious situation */ | ||
143 | return; | ||
144 | } | ||
145 | |||
146 | /* Unmap tx_cmd */ | ||
147 | if (num_tbs) | ||
148 | pci_unmap_single(dev, | ||
149 | pci_unmap_addr(&txq->cmd[index]->meta, mapping), | ||
150 | pci_unmap_len(&txq->cmd[index]->meta, len), | ||
151 | PCI_DMA_TODEVICE); | ||
152 | |||
153 | /* Unmap chunks, if any. */ | ||
154 | for (i = 1; i < num_tbs; i++) { | ||
155 | pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i), | ||
156 | iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE); | ||
157 | |||
158 | if (txq->txb) { | ||
159 | dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]); | ||
160 | txq->txb[txq->q.read_ptr].skb[i - 1] = NULL; | ||
161 | } | ||
162 | } | ||
163 | } | ||
164 | |||
165 | static int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, | ||
166 | struct iwl_tfd *tfd, | ||
167 | dma_addr_t addr, u16 len) | ||
168 | { | ||
169 | |||
170 | u32 num_tbs = iwl_tfd_get_num_tbs(tfd); | ||
171 | |||
172 | /* Each TFD can point to a maximum 20 Tx buffers */ | ||
173 | if (num_tbs >= IWL_NUM_OF_TBS) { | ||
174 | IWL_ERROR("Error can not send more than %d chunks\n", | ||
175 | IWL_NUM_OF_TBS); | ||
176 | return -EINVAL; | ||
177 | } | ||
178 | |||
179 | BUG_ON(addr & ~DMA_BIT_MASK(36)); | ||
180 | if (unlikely(addr & ~IWL_TX_DMA_MASK)) | ||
181 | IWL_ERROR("Unaligned address = %llx\n", | ||
182 | (unsigned long long)addr); | ||
183 | |||
184 | iwl_tfd_set_tb(tfd, num_tbs, addr, len); | ||
185 | |||
186 | return 0; | ||
187 | } | ||
188 | |||
189 | /** | 79 | /** |
190 | * iwl_txq_update_write_ptr - Send new write index to hardware | 80 | * iwl_txq_update_write_ptr - Send new write index to hardware |
191 | */ | 81 | */ |
@@ -241,7 +131,7 @@ EXPORT_SYMBOL(iwl_txq_update_write_ptr); | |||
241 | * Free all buffers. | 131 | * Free all buffers. |
242 | * 0-fill, but do not free "txq" descriptor structure. | 132 | * 0-fill, but do not free "txq" descriptor structure. |
243 | */ | 133 | */ |
244 | static void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id) | 134 | void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id) |
245 | { | 135 | { |
246 | struct iwl_tx_queue *txq = &priv->txq[txq_id]; | 136 | struct iwl_tx_queue *txq = &priv->txq[txq_id]; |
247 | struct iwl_queue *q = &txq->q; | 137 | struct iwl_queue *q = &txq->q; |
@@ -254,7 +144,7 @@ static void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id) | |||
254 | /* first, empty all BD's */ | 144 | /* first, empty all BD's */ |
255 | for (; q->write_ptr != q->read_ptr; | 145 | for (; q->write_ptr != q->read_ptr; |
256 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) | 146 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) |
257 | iwl_hw_txq_free_tfd(priv, txq); | 147 | priv->cfg->ops->lib->txq_free_tfd(priv, txq); |
258 | 148 | ||
259 | len = sizeof(struct iwl_cmd) * q->n_window; | 149 | len = sizeof(struct iwl_cmd) * q->n_window; |
260 | 150 | ||
@@ -264,7 +154,7 @@ static void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id) | |||
264 | 154 | ||
265 | /* De-alloc circular buffer of TFDs */ | 155 | /* De-alloc circular buffer of TFDs */ |
266 | if (txq->q.n_bd) | 156 | if (txq->q.n_bd) |
267 | pci_free_consistent(dev, sizeof(struct iwl_tfd) * | 157 | pci_free_consistent(dev, priv->hw_params.tfd_size * |
268 | txq->q.n_bd, txq->tfds, txq->q.dma_addr); | 158 | txq->q.n_bd, txq->tfds, txq->q.dma_addr); |
269 | 159 | ||
270 | /* De-alloc array of per-TFD driver data */ | 160 | /* De-alloc array of per-TFD driver data */ |
@@ -274,7 +164,7 @@ static void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id) | |||
274 | /* 0-fill queue descriptor structure */ | 164 | /* 0-fill queue descriptor structure */ |
275 | memset(txq, 0, sizeof(*txq)); | 165 | memset(txq, 0, sizeof(*txq)); |
276 | } | 166 | } |
277 | 167 | EXPORT_SYMBOL(iwl_tx_queue_free); | |
278 | 168 | ||
279 | /** | 169 | /** |
280 | * iwl_cmd_queue_free - Deallocate DMA queue. | 170 | * iwl_cmd_queue_free - Deallocate DMA queue. |
@@ -388,6 +278,7 @@ static int iwl_tx_queue_alloc(struct iwl_priv *priv, | |||
388 | struct iwl_tx_queue *txq, u32 id) | 278 | struct iwl_tx_queue *txq, u32 id) |
389 | { | 279 | { |
390 | struct pci_dev *dev = priv->pci_dev; | 280 | struct pci_dev *dev = priv->pci_dev; |
281 | size_t tfd_sz = priv->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX; | ||
391 | 282 | ||
392 | /* Driver private data, only for Tx (not command) queues, | 283 | /* Driver private data, only for Tx (not command) queues, |
393 | * not shared with device. */ | 284 | * not shared with device. */ |
@@ -395,22 +286,20 @@ static int iwl_tx_queue_alloc(struct iwl_priv *priv, | |||
395 | txq->txb = kmalloc(sizeof(txq->txb[0]) * | 286 | txq->txb = kmalloc(sizeof(txq->txb[0]) * |
396 | TFD_QUEUE_SIZE_MAX, GFP_KERNEL); | 287 | TFD_QUEUE_SIZE_MAX, GFP_KERNEL); |
397 | if (!txq->txb) { | 288 | if (!txq->txb) { |
398 | IWL_ERROR("kmalloc for auxiliary BD " | 289 | IWL_ERR(priv, "kmalloc for auxiliary BD " |
399 | "structures failed\n"); | 290 | "structures failed\n"); |
400 | goto error; | 291 | goto error; |
401 | } | 292 | } |
402 | } else | 293 | } else { |
403 | txq->txb = NULL; | 294 | txq->txb = NULL; |
295 | } | ||
404 | 296 | ||
405 | /* Circular buffer of transmit frame descriptors (TFDs), | 297 | /* Circular buffer of transmit frame descriptors (TFDs), |
406 | * shared with device */ | 298 | * shared with device */ |
407 | txq->tfds = pci_alloc_consistent(dev, | 299 | txq->tfds = pci_alloc_consistent(dev, tfd_sz, &txq->q.dma_addr); |
408 | sizeof(txq->tfds[0]) * TFD_QUEUE_SIZE_MAX, | ||
409 | &txq->q.dma_addr); | ||
410 | 300 | ||
411 | if (!txq->tfds) { | 301 | if (!txq->tfds) { |
412 | IWL_ERROR("pci_alloc_consistent(%zd) failed\n", | 302 | IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n", tfd_sz); |
413 | sizeof(txq->tfds[0]) * TFD_QUEUE_SIZE_MAX); | ||
414 | goto error; | 303 | goto error; |
415 | } | 304 | } |
416 | txq->q.id = id; | 305 | txq->q.id = id; |
@@ -424,42 +313,11 @@ static int iwl_tx_queue_alloc(struct iwl_priv *priv, | |||
424 | return -ENOMEM; | 313 | return -ENOMEM; |
425 | } | 314 | } |
426 | 315 | ||
427 | /* | ||
428 | * Tell nic where to find circular buffer of Tx Frame Descriptors for | ||
429 | * given Tx queue, and enable the DMA channel used for that queue. | ||
430 | * | ||
431 | * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA | ||
432 | * channels supported in hardware. | ||
433 | */ | ||
434 | static int iwl_hw_tx_queue_init(struct iwl_priv *priv, | ||
435 | struct iwl_tx_queue *txq) | ||
436 | { | ||
437 | int ret; | ||
438 | unsigned long flags; | ||
439 | int txq_id = txq->q.id; | ||
440 | |||
441 | spin_lock_irqsave(&priv->lock, flags); | ||
442 | ret = iwl_grab_nic_access(priv); | ||
443 | if (ret) { | ||
444 | spin_unlock_irqrestore(&priv->lock, flags); | ||
445 | return ret; | ||
446 | } | ||
447 | |||
448 | /* Circular buffer (TFD queue in DRAM) physical base address */ | ||
449 | iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id), | ||
450 | txq->q.dma_addr >> 8); | ||
451 | |||
452 | iwl_release_nic_access(priv); | ||
453 | spin_unlock_irqrestore(&priv->lock, flags); | ||
454 | |||
455 | return 0; | ||
456 | } | ||
457 | |||
458 | /** | 316 | /** |
459 | * iwl_tx_queue_init - Allocate and initialize one tx/cmd queue | 317 | * iwl_tx_queue_init - Allocate and initialize one tx/cmd queue |
460 | */ | 318 | */ |
461 | static int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq, | 319 | int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq, |
462 | int slots_num, u32 txq_id) | 320 | int slots_num, u32 txq_id) |
463 | { | 321 | { |
464 | int i, len; | 322 | int i, len; |
465 | int ret; | 323 | int ret; |
@@ -501,7 +359,7 @@ static int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq, | |||
501 | iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id); | 359 | iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id); |
502 | 360 | ||
503 | /* Tell device where to find queue */ | 361 | /* Tell device where to find queue */ |
504 | iwl_hw_tx_queue_init(priv, txq); | 362 | priv->cfg->ops->lib->txq_init(priv, txq); |
505 | 363 | ||
506 | return 0; | 364 | return 0; |
507 | err: | 365 | err: |
@@ -516,6 +374,8 @@ err: | |||
516 | } | 374 | } |
517 | return -ENOMEM; | 375 | return -ENOMEM; |
518 | } | 376 | } |
377 | EXPORT_SYMBOL(iwl_tx_queue_init); | ||
378 | |||
519 | /** | 379 | /** |
520 | * iwl_hw_txq_ctx_free - Free TXQ Context | 380 | * iwl_hw_txq_ctx_free - Free TXQ Context |
521 | * | 381 | * |
@@ -557,13 +417,13 @@ int iwl_txq_ctx_reset(struct iwl_priv *priv) | |||
557 | ret = iwl_alloc_dma_ptr(priv, &priv->scd_bc_tbls, | 417 | ret = iwl_alloc_dma_ptr(priv, &priv->scd_bc_tbls, |
558 | priv->hw_params.scd_bc_tbls_size); | 418 | priv->hw_params.scd_bc_tbls_size); |
559 | if (ret) { | 419 | if (ret) { |
560 | IWL_ERROR("Scheduler BC Table allocation failed\n"); | 420 | IWL_ERR(priv, "Scheduler BC Table allocation failed\n"); |
561 | goto error_bc_tbls; | 421 | goto error_bc_tbls; |
562 | } | 422 | } |
563 | /* Alloc keep-warm buffer */ | 423 | /* Alloc keep-warm buffer */ |
564 | ret = iwl_alloc_dma_ptr(priv, &priv->kw, IWL_KW_SIZE); | 424 | ret = iwl_alloc_dma_ptr(priv, &priv->kw, IWL_KW_SIZE); |
565 | if (ret) { | 425 | if (ret) { |
566 | IWL_ERROR("Keep Warm allocation failed\n"); | 426 | IWL_ERR(priv, "Keep Warm allocation failed\n"); |
567 | goto error_kw; | 427 | goto error_kw; |
568 | } | 428 | } |
569 | spin_lock_irqsave(&priv->lock, flags); | 429 | spin_lock_irqsave(&priv->lock, flags); |
@@ -589,7 +449,7 @@ int iwl_txq_ctx_reset(struct iwl_priv *priv) | |||
589 | ret = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num, | 449 | ret = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num, |
590 | txq_id); | 450 | txq_id); |
591 | if (ret) { | 451 | if (ret) { |
592 | IWL_ERROR("Tx %d queue init failed\n", txq_id); | 452 | IWL_ERR(priv, "Tx %d queue init failed\n", txq_id); |
593 | goto error; | 453 | goto error; |
594 | } | 454 | } |
595 | } | 455 | } |
@@ -802,7 +662,7 @@ static void iwl_tx_cmd_build_hwcrypto(struct iwl_priv *priv, | |||
802 | break; | 662 | break; |
803 | 663 | ||
804 | default: | 664 | default: |
805 | printk(KERN_ERR "Unknown encode alg %d\n", keyconf->alg); | 665 | IWL_ERR(priv, "Unknown encode alg %d\n", keyconf->alg); |
806 | break; | 666 | break; |
807 | } | 667 | } |
808 | } | 668 | } |
@@ -822,7 +682,6 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
822 | { | 682 | { |
823 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | 683 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
824 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 684 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
825 | struct iwl_tfd *tfd; | ||
826 | struct iwl_tx_queue *txq; | 685 | struct iwl_tx_queue *txq; |
827 | struct iwl_queue *q; | 686 | struct iwl_queue *q; |
828 | struct iwl_cmd *out_cmd; | 687 | struct iwl_cmd *out_cmd; |
@@ -850,7 +709,7 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
850 | 709 | ||
851 | if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == | 710 | if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == |
852 | IWL_INVALID_RATE) { | 711 | IWL_INVALID_RATE) { |
853 | IWL_ERROR("ERROR: No TX rate available.\n"); | 712 | IWL_ERR(priv, "ERROR: No TX rate available.\n"); |
854 | goto drop_unlock; | 713 | goto drop_unlock; |
855 | } | 714 | } |
856 | 715 | ||
@@ -913,10 +772,6 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
913 | 772 | ||
914 | spin_lock_irqsave(&priv->lock, flags); | 773 | spin_lock_irqsave(&priv->lock, flags); |
915 | 774 | ||
916 | /* Set up first empty TFD within this queue's circular TFD buffer */ | ||
917 | tfd = &txq->tfds[q->write_ptr]; | ||
918 | memset(tfd, 0, sizeof(*tfd)); | ||
919 | |||
920 | /* Set up driver data for this TFD */ | 775 | /* Set up driver data for this TFD */ |
921 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info)); | 776 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info)); |
922 | txq->txb[q->write_ptr].skb[0] = skb; | 777 | txq->txb[q->write_ptr].skb[0] = skb; |
@@ -970,7 +825,8 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
970 | /* Add buffer containing Tx command and MAC(!) header to TFD's | 825 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
971 | * first entry */ | 826 | * first entry */ |
972 | txcmd_phys += offsetof(struct iwl_cmd, hdr); | 827 | txcmd_phys += offsetof(struct iwl_cmd, hdr); |
973 | iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len); | 828 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, |
829 | txcmd_phys, len, 1, 0); | ||
974 | 830 | ||
975 | if (info->control.hw_key) | 831 | if (info->control.hw_key) |
976 | iwl_tx_cmd_build_hwcrypto(priv, info, tx_cmd, skb, sta_id); | 832 | iwl_tx_cmd_build_hwcrypto(priv, info, tx_cmd, skb, sta_id); |
@@ -981,7 +837,9 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
981 | if (len) { | 837 | if (len) { |
982 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, | 838 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, |
983 | len, PCI_DMA_TODEVICE); | 839 | len, PCI_DMA_TODEVICE); |
984 | iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len); | 840 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, |
841 | phys_addr, len, | ||
842 | 0, 0); | ||
985 | } | 843 | } |
986 | 844 | ||
987 | /* Tell NIC about any 2-byte padding after MAC header */ | 845 | /* Tell NIC about any 2-byte padding after MAC header */ |
@@ -1063,7 +921,6 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
1063 | { | 921 | { |
1064 | struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM]; | 922 | struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM]; |
1065 | struct iwl_queue *q = &txq->q; | 923 | struct iwl_queue *q = &txq->q; |
1066 | struct iwl_tfd *tfd; | ||
1067 | struct iwl_cmd *out_cmd; | 924 | struct iwl_cmd *out_cmd; |
1068 | dma_addr_t phys_addr; | 925 | dma_addr_t phys_addr; |
1069 | unsigned long flags; | 926 | unsigned long flags; |
@@ -1086,16 +943,12 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
1086 | } | 943 | } |
1087 | 944 | ||
1088 | if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) { | 945 | if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) { |
1089 | IWL_ERROR("No space for Tx\n"); | 946 | IWL_ERR(priv, "No space for Tx\n"); |
1090 | return -ENOSPC; | 947 | return -ENOSPC; |
1091 | } | 948 | } |
1092 | 949 | ||
1093 | spin_lock_irqsave(&priv->hcmd_lock, flags); | 950 | spin_lock_irqsave(&priv->hcmd_lock, flags); |
1094 | 951 | ||
1095 | tfd = &txq->tfds[q->write_ptr]; | ||
1096 | memset(tfd, 0, sizeof(*tfd)); | ||
1097 | |||
1098 | |||
1099 | idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE); | 952 | idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE); |
1100 | out_cmd = txq->cmd[idx]; | 953 | out_cmd = txq->cmd[idx]; |
1101 | 954 | ||
@@ -1120,7 +973,9 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
1120 | pci_unmap_len_set(&out_cmd->meta, len, len); | 973 | pci_unmap_len_set(&out_cmd->meta, len, len); |
1121 | phys_addr += offsetof(struct iwl_cmd, hdr); | 974 | phys_addr += offsetof(struct iwl_cmd, hdr); |
1122 | 975 | ||
1123 | iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size); | 976 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, |
977 | phys_addr, fix_size, 1, | ||
978 | U32_PAD(cmd->len)); | ||
1124 | 979 | ||
1125 | #ifdef CONFIG_IWLWIFI_DEBUG | 980 | #ifdef CONFIG_IWLWIFI_DEBUG |
1126 | switch (out_cmd->hdr.cmd) { | 981 | switch (out_cmd->hdr.cmd) { |
@@ -1144,8 +999,9 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
1144 | #endif | 999 | #endif |
1145 | txq->need_update = 1; | 1000 | txq->need_update = 1; |
1146 | 1001 | ||
1147 | /* Set up entry in queue's byte count circular buffer */ | 1002 | if (priv->cfg->ops->lib->txq_update_byte_cnt_tbl) |
1148 | priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0); | 1003 | /* Set up entry in queue's byte count circular buffer */ |
1004 | priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0); | ||
1149 | 1005 | ||
1150 | /* Increment and update queue's write index */ | 1006 | /* Increment and update queue's write index */ |
1151 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); | 1007 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
@@ -1163,7 +1019,7 @@ int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index) | |||
1163 | int nfreed = 0; | 1019 | int nfreed = 0; |
1164 | 1020 | ||
1165 | if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) { | 1021 | if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) { |
1166 | IWL_ERROR("Read index for DMA queue txq id (%d), index %d, " | 1022 | IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, " |
1167 | "is out of range [0-%d] %d %d.\n", txq_id, | 1023 | "is out of range [0-%d] %d %d.\n", txq_id, |
1168 | index, q->n_bd, q->write_ptr, q->read_ptr); | 1024 | index, q->n_bd, q->write_ptr, q->read_ptr); |
1169 | return 0; | 1025 | return 0; |
@@ -1180,7 +1036,7 @@ int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index) | |||
1180 | if (priv->cfg->ops->lib->txq_inval_byte_cnt_tbl) | 1036 | if (priv->cfg->ops->lib->txq_inval_byte_cnt_tbl) |
1181 | priv->cfg->ops->lib->txq_inval_byte_cnt_tbl(priv, txq); | 1037 | priv->cfg->ops->lib->txq_inval_byte_cnt_tbl(priv, txq); |
1182 | 1038 | ||
1183 | iwl_hw_txq_free_tfd(priv, txq); | 1039 | priv->cfg->ops->lib->txq_free_tfd(priv, txq); |
1184 | nfreed++; | 1040 | nfreed++; |
1185 | } | 1041 | } |
1186 | return nfreed; | 1042 | return nfreed; |
@@ -1203,7 +1059,7 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id, | |||
1203 | int nfreed = 0; | 1059 | int nfreed = 0; |
1204 | 1060 | ||
1205 | if ((idx >= q->n_bd) || (iwl_queue_used(q, idx) == 0)) { | 1061 | if ((idx >= q->n_bd) || (iwl_queue_used(q, idx) == 0)) { |
1206 | IWL_ERROR("Read index for DMA queue txq id (%d), index %d, " | 1062 | IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, " |
1207 | "is out of range [0-%d] %d %d.\n", txq_id, | 1063 | "is out of range [0-%d] %d %d.\n", txq_id, |
1208 | idx, q->n_bd, q->write_ptr, q->read_ptr); | 1064 | idx, q->n_bd, q->write_ptr, q->read_ptr); |
1209 | return; | 1065 | return; |
@@ -1218,7 +1074,7 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id, | |||
1218 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { | 1074 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
1219 | 1075 | ||
1220 | if (nfreed++ > 0) { | 1076 | if (nfreed++ > 0) { |
1221 | IWL_ERROR("HCMD skipped: index (%d) %d %d\n", idx, | 1077 | IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", idx, |
1222 | q->write_ptr, q->read_ptr); | 1078 | q->write_ptr, q->read_ptr); |
1223 | queue_work(priv->workqueue, &priv->restart); | 1079 | queue_work(priv->workqueue, &priv->restart); |
1224 | } | 1080 | } |
@@ -1306,7 +1162,7 @@ int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn) | |||
1306 | else | 1162 | else |
1307 | return -EINVAL; | 1163 | return -EINVAL; |
1308 | 1164 | ||
1309 | IWL_WARNING("%s on ra = %pM tid = %d\n", | 1165 | IWL_WARN(priv, "%s on ra = %pM tid = %d\n", |
1310 | __func__, ra, tid); | 1166 | __func__, ra, tid); |
1311 | 1167 | ||
1312 | sta_id = iwl_find_station(priv, ra); | 1168 | sta_id = iwl_find_station(priv, ra); |
@@ -1314,7 +1170,7 @@ int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn) | |||
1314 | return -ENXIO; | 1170 | return -ENXIO; |
1315 | 1171 | ||
1316 | if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) { | 1172 | if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) { |
1317 | IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n"); | 1173 | IWL_ERR(priv, "Start AGG when state is not IWL_AGG_OFF !\n"); |
1318 | return -ENXIO; | 1174 | return -ENXIO; |
1319 | } | 1175 | } |
1320 | 1176 | ||
@@ -1334,7 +1190,7 @@ int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn) | |||
1334 | return ret; | 1190 | return ret; |
1335 | 1191 | ||
1336 | if (tid_data->tfds_in_queue == 0) { | 1192 | if (tid_data->tfds_in_queue == 0) { |
1337 | printk(KERN_ERR "HW queue is empty\n"); | 1193 | IWL_ERR(priv, "HW queue is empty\n"); |
1338 | tid_data->agg.state = IWL_AGG_ON; | 1194 | tid_data->agg.state = IWL_AGG_ON; |
1339 | ieee80211_start_tx_ba_cb_irqsafe(priv->hw, ra, tid); | 1195 | ieee80211_start_tx_ba_cb_irqsafe(priv->hw, ra, tid); |
1340 | } else { | 1196 | } else { |
@@ -1354,7 +1210,7 @@ int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid) | |||
1354 | unsigned long flags; | 1210 | unsigned long flags; |
1355 | 1211 | ||
1356 | if (!ra) { | 1212 | if (!ra) { |
1357 | IWL_ERROR("ra = NULL\n"); | 1213 | IWL_ERR(priv, "ra = NULL\n"); |
1358 | return -EINVAL; | 1214 | return -EINVAL; |
1359 | } | 1215 | } |
1360 | 1216 | ||
@@ -1369,7 +1225,7 @@ int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid) | |||
1369 | return -ENXIO; | 1225 | return -ENXIO; |
1370 | 1226 | ||
1371 | if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON) | 1227 | if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON) |
1372 | IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n"); | 1228 | IWL_WARN(priv, "Stopping AGG while state not IWL_AGG_ON\n"); |
1373 | 1229 | ||
1374 | tid_data = &priv->stations[sta_id].tid[tid]; | 1230 | tid_data = &priv->stations[sta_id].tid[tid]; |
1375 | ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4; | 1231 | ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4; |
@@ -1455,7 +1311,7 @@ static int iwl_tx_status_reply_compressed_ba(struct iwl_priv *priv, | |||
1455 | struct ieee80211_tx_info *info; | 1311 | struct ieee80211_tx_info *info; |
1456 | 1312 | ||
1457 | if (unlikely(!agg->wait_for_ba)) { | 1313 | if (unlikely(!agg->wait_for_ba)) { |
1458 | IWL_ERROR("Received BA when not expected\n"); | 1314 | IWL_ERR(priv, "Received BA when not expected\n"); |
1459 | return -EINVAL; | 1315 | return -EINVAL; |
1460 | } | 1316 | } |
1461 | 1317 | ||
@@ -1528,7 +1384,8 @@ void iwl_rx_reply_compressed_ba(struct iwl_priv *priv, | |||
1528 | u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn); | 1384 | u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn); |
1529 | 1385 | ||
1530 | if (scd_flow >= priv->hw_params.max_txq_num) { | 1386 | if (scd_flow >= priv->hw_params.max_txq_num) { |
1531 | IWL_ERROR("BUG_ON scd_flow is bigger than number of queues\n"); | 1387 | IWL_ERR(priv, |
1388 | "BUG_ON scd_flow is bigger than number of queues\n"); | ||
1532 | return; | 1389 | return; |
1533 | } | 1390 | } |
1534 | 1391 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c index 95d01984c80e..25a350810a10 100644 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -46,40 +46,25 @@ | |||
46 | 46 | ||
47 | #include <asm/div64.h> | 47 | #include <asm/div64.h> |
48 | 48 | ||
49 | #include "iwl-3945-core.h" | 49 | #define DRV_NAME "iwl3945" |
50 | |||
51 | #include "iwl-fh.h" | ||
52 | #include "iwl-3945-fh.h" | ||
53 | #include "iwl-commands.h" | ||
54 | #include "iwl-sta.h" | ||
50 | #include "iwl-3945.h" | 55 | #include "iwl-3945.h" |
51 | #include "iwl-helpers.h" | 56 | #include "iwl-helpers.h" |
52 | 57 | #include "iwl-core.h" | |
53 | #ifdef CONFIG_IWL3945_DEBUG | 58 | #include "iwl-dev.h" |
54 | u32 iwl3945_debug_level; | ||
55 | #endif | ||
56 | |||
57 | static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv, | ||
58 | struct iwl3945_tx_queue *txq); | ||
59 | |||
60 | /****************************************************************************** | ||
61 | * | ||
62 | * module boiler plate | ||
63 | * | ||
64 | ******************************************************************************/ | ||
65 | |||
66 | /* module parameters */ | ||
67 | static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */ | ||
68 | static u32 iwl3945_param_debug; /* def: 0 = minimal debug log messages */ | ||
69 | static int iwl3945_param_disable; /* def: 0 = enable radio */ | ||
70 | static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */ | ||
71 | int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */ | ||
72 | int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */ | ||
73 | 59 | ||
74 | /* | 60 | /* |
75 | * module name, copyright, version, etc. | 61 | * module name, copyright, version, etc. |
76 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | ||
77 | */ | 62 | */ |
78 | 63 | ||
79 | #define DRV_DESCRIPTION \ | 64 | #define DRV_DESCRIPTION \ |
80 | "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux" | 65 | "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux" |
81 | 66 | ||
82 | #ifdef CONFIG_IWL3945_DEBUG | 67 | #ifdef CONFIG_IWLWIFI_DEBUG |
83 | #define VD "d" | 68 | #define VD "d" |
84 | #else | 69 | #else |
85 | #define VD | 70 | #define VD |
@@ -91,10 +76,10 @@ int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */ | |||
91 | #define VS | 76 | #define VS |
92 | #endif | 77 | #endif |
93 | 78 | ||
94 | #define IWLWIFI_VERSION "1.2.26k" VD VS | 79 | #define IWL39_VERSION "1.2.26k" VD VS |
95 | #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation" | 80 | #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation" |
96 | #define DRV_AUTHOR "<ilw@linux.intel.com>" | 81 | #define DRV_AUTHOR "<ilw@linux.intel.com>" |
97 | #define DRV_VERSION IWLWIFI_VERSION | 82 | #define DRV_VERSION IWL39_VERSION |
98 | 83 | ||
99 | 84 | ||
100 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | 85 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
@@ -102,235 +87,13 @@ MODULE_VERSION(DRV_VERSION); | |||
102 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); | 87 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); |
103 | MODULE_LICENSE("GPL"); | 88 | MODULE_LICENSE("GPL"); |
104 | 89 | ||
105 | static const struct ieee80211_supported_band *iwl3945_get_band( | 90 | /* module parameters */ |
106 | struct iwl3945_priv *priv, enum ieee80211_band band) | 91 | struct iwl_mod_params iwl3945_mod_params = { |
107 | { | 92 | .num_of_queues = IWL39_MAX_NUM_QUEUES, |
108 | return priv->hw->wiphy->bands[band]; | 93 | .sw_crypto = 1, |
109 | } | 94 | .restart_fw = 1, |
110 | 95 | /* the rest are 0 by default */ | |
111 | /*************** DMA-QUEUE-GENERAL-FUNCTIONS ***** | 96 | }; |
112 | * DMA services | ||
113 | * | ||
114 | * Theory of operation | ||
115 | * | ||
116 | * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer | ||
117 | * of buffer descriptors, each of which points to one or more data buffers for | ||
118 | * the device to read from or fill. Driver and device exchange status of each | ||
119 | * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty | ||
120 | * entries in each circular buffer, to protect against confusing empty and full | ||
121 | * queue states. | ||
122 | * | ||
123 | * The device reads or writes the data in the queues via the device's several | ||
124 | * DMA/FIFO channels. Each queue is mapped to a single DMA channel. | ||
125 | * | ||
126 | * For Tx queue, there are low mark and high mark limits. If, after queuing | ||
127 | * the packet for Tx, free space become < low mark, Tx queue stopped. When | ||
128 | * reclaiming packets (on 'tx done IRQ), if free space become > high mark, | ||
129 | * Tx queue resumed. | ||
130 | * | ||
131 | * The 3945 operates with six queues: One receive queue, one transmit queue | ||
132 | * (#4) for sending commands to the device firmware, and four transmit queues | ||
133 | * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused. | ||
134 | ***************************************************/ | ||
135 | |||
136 | int iwl3945_queue_space(const struct iwl3945_queue *q) | ||
137 | { | ||
138 | int s = q->read_ptr - q->write_ptr; | ||
139 | |||
140 | if (q->read_ptr > q->write_ptr) | ||
141 | s -= q->n_bd; | ||
142 | |||
143 | if (s <= 0) | ||
144 | s += q->n_window; | ||
145 | /* keep some reserve to not confuse empty and full situations */ | ||
146 | s -= 2; | ||
147 | if (s < 0) | ||
148 | s = 0; | ||
149 | return s; | ||
150 | } | ||
151 | |||
152 | int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i) | ||
153 | { | ||
154 | return q->write_ptr > q->read_ptr ? | ||
155 | (i >= q->read_ptr && i < q->write_ptr) : | ||
156 | !(i < q->read_ptr && i >= q->write_ptr); | ||
157 | } | ||
158 | |||
159 | |||
160 | static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge) | ||
161 | { | ||
162 | /* This is for scan command, the big buffer at end of command array */ | ||
163 | if (is_huge) | ||
164 | return q->n_window; /* must be power of 2 */ | ||
165 | |||
166 | /* Otherwise, use normal size buffers */ | ||
167 | return index & (q->n_window - 1); | ||
168 | } | ||
169 | |||
170 | /** | ||
171 | * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes | ||
172 | */ | ||
173 | static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q, | ||
174 | int count, int slots_num, u32 id) | ||
175 | { | ||
176 | q->n_bd = count; | ||
177 | q->n_window = slots_num; | ||
178 | q->id = id; | ||
179 | |||
180 | /* count must be power-of-two size, otherwise iwl_queue_inc_wrap | ||
181 | * and iwl_queue_dec_wrap are broken. */ | ||
182 | BUG_ON(!is_power_of_2(count)); | ||
183 | |||
184 | /* slots_num must be power-of-two size, otherwise | ||
185 | * get_cmd_index is broken. */ | ||
186 | BUG_ON(!is_power_of_2(slots_num)); | ||
187 | |||
188 | q->low_mark = q->n_window / 4; | ||
189 | if (q->low_mark < 4) | ||
190 | q->low_mark = 4; | ||
191 | |||
192 | q->high_mark = q->n_window / 8; | ||
193 | if (q->high_mark < 2) | ||
194 | q->high_mark = 2; | ||
195 | |||
196 | q->write_ptr = q->read_ptr = 0; | ||
197 | |||
198 | return 0; | ||
199 | } | ||
200 | |||
201 | /** | ||
202 | * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue | ||
203 | */ | ||
204 | static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv, | ||
205 | struct iwl3945_tx_queue *txq, u32 id) | ||
206 | { | ||
207 | struct pci_dev *dev = priv->pci_dev; | ||
208 | |||
209 | /* Driver private data, only for Tx (not command) queues, | ||
210 | * not shared with device. */ | ||
211 | if (id != IWL_CMD_QUEUE_NUM) { | ||
212 | txq->txb = kmalloc(sizeof(txq->txb[0]) * | ||
213 | TFD_QUEUE_SIZE_MAX, GFP_KERNEL); | ||
214 | if (!txq->txb) { | ||
215 | IWL_ERROR("kmalloc for auxiliary BD " | ||
216 | "structures failed\n"); | ||
217 | goto error; | ||
218 | } | ||
219 | } else | ||
220 | txq->txb = NULL; | ||
221 | |||
222 | /* Circular buffer of transmit frame descriptors (TFDs), | ||
223 | * shared with device */ | ||
224 | txq->bd = pci_alloc_consistent(dev, | ||
225 | sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX, | ||
226 | &txq->q.dma_addr); | ||
227 | |||
228 | if (!txq->bd) { | ||
229 | IWL_ERROR("pci_alloc_consistent(%zd) failed\n", | ||
230 | sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX); | ||
231 | goto error; | ||
232 | } | ||
233 | txq->q.id = id; | ||
234 | |||
235 | return 0; | ||
236 | |||
237 | error: | ||
238 | kfree(txq->txb); | ||
239 | txq->txb = NULL; | ||
240 | |||
241 | return -ENOMEM; | ||
242 | } | ||
243 | |||
244 | /** | ||
245 | * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue | ||
246 | */ | ||
247 | int iwl3945_tx_queue_init(struct iwl3945_priv *priv, | ||
248 | struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id) | ||
249 | { | ||
250 | struct pci_dev *dev = priv->pci_dev; | ||
251 | int len; | ||
252 | int rc = 0; | ||
253 | |||
254 | /* | ||
255 | * Alloc buffer array for commands (Tx or other types of commands). | ||
256 | * For the command queue (#4), allocate command space + one big | ||
257 | * command for scan, since scan command is very huge; the system will | ||
258 | * not have two scans at the same time, so only one is needed. | ||
259 | * For data Tx queues (all other queues), no super-size command | ||
260 | * space is needed. | ||
261 | */ | ||
262 | len = sizeof(struct iwl3945_cmd) * slots_num; | ||
263 | if (txq_id == IWL_CMD_QUEUE_NUM) | ||
264 | len += IWL_MAX_SCAN_SIZE; | ||
265 | txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd); | ||
266 | if (!txq->cmd) | ||
267 | return -ENOMEM; | ||
268 | |||
269 | /* Alloc driver data array and TFD circular buffer */ | ||
270 | rc = iwl3945_tx_queue_alloc(priv, txq, txq_id); | ||
271 | if (rc) { | ||
272 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); | ||
273 | |||
274 | return -ENOMEM; | ||
275 | } | ||
276 | txq->need_update = 0; | ||
277 | |||
278 | /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise | ||
279 | * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */ | ||
280 | BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1)); | ||
281 | |||
282 | /* Initialize queue high/low-water, head/tail indexes */ | ||
283 | iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id); | ||
284 | |||
285 | /* Tell device where to find queue, enable DMA channel. */ | ||
286 | iwl3945_hw_tx_queue_init(priv, txq); | ||
287 | |||
288 | return 0; | ||
289 | } | ||
290 | |||
291 | /** | ||
292 | * iwl3945_tx_queue_free - Deallocate DMA queue. | ||
293 | * @txq: Transmit queue to deallocate. | ||
294 | * | ||
295 | * Empty queue by removing and destroying all BD's. | ||
296 | * Free all buffers. | ||
297 | * 0-fill, but do not free "txq" descriptor structure. | ||
298 | */ | ||
299 | void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq) | ||
300 | { | ||
301 | struct iwl3945_queue *q = &txq->q; | ||
302 | struct pci_dev *dev = priv->pci_dev; | ||
303 | int len; | ||
304 | |||
305 | if (q->n_bd == 0) | ||
306 | return; | ||
307 | |||
308 | /* first, empty all BD's */ | ||
309 | for (; q->write_ptr != q->read_ptr; | ||
310 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) | ||
311 | iwl3945_hw_txq_free_tfd(priv, txq); | ||
312 | |||
313 | len = sizeof(struct iwl3945_cmd) * q->n_window; | ||
314 | if (q->id == IWL_CMD_QUEUE_NUM) | ||
315 | len += IWL_MAX_SCAN_SIZE; | ||
316 | |||
317 | /* De-alloc array of command/tx buffers */ | ||
318 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); | ||
319 | |||
320 | /* De-alloc circular buffer of TFDs */ | ||
321 | if (txq->q.n_bd) | ||
322 | pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) * | ||
323 | txq->q.n_bd, txq->bd, txq->q.dma_addr); | ||
324 | |||
325 | /* De-alloc array of per-TFD driver data */ | ||
326 | kfree(txq->txb); | ||
327 | txq->txb = NULL; | ||
328 | |||
329 | /* 0-fill queue descriptor structure */ | ||
330 | memset(txq, 0, sizeof(*txq)); | ||
331 | } | ||
332 | |||
333 | const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; | ||
334 | 97 | ||
335 | /*************** STATION TABLE MANAGEMENT **** | 98 | /*************** STATION TABLE MANAGEMENT **** |
336 | * mac80211 should be examined to determine if sta_info is duplicating | 99 | * mac80211 should be examined to determine if sta_info is duplicating |
@@ -344,7 +107,7 @@ const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF | |||
344 | * | 107 | * |
345 | * NOTE: This does not remove station from device's station table. | 108 | * NOTE: This does not remove station from device's station table. |
346 | */ | 109 | */ |
347 | static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap) | 110 | static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap) |
348 | { | 111 | { |
349 | int index = IWL_INVALID_STATION; | 112 | int index = IWL_INVALID_STATION; |
350 | int i; | 113 | int i; |
@@ -355,11 +118,11 @@ static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int | |||
355 | if (is_ap) | 118 | if (is_ap) |
356 | index = IWL_AP_ID; | 119 | index = IWL_AP_ID; |
357 | else if (is_broadcast_ether_addr(addr)) | 120 | else if (is_broadcast_ether_addr(addr)) |
358 | index = priv->hw_setting.bcast_sta_id; | 121 | index = priv->hw_params.bcast_sta_id; |
359 | else | 122 | else |
360 | for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) | 123 | for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) |
361 | if (priv->stations[i].used && | 124 | if (priv->stations_39[i].used && |
362 | !compare_ether_addr(priv->stations[i].sta.sta.addr, | 125 | !compare_ether_addr(priv->stations_39[i].sta.sta.addr, |
363 | addr)) { | 126 | addr)) { |
364 | index = i; | 127 | index = i; |
365 | break; | 128 | break; |
@@ -368,8 +131,8 @@ static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int | |||
368 | if (unlikely(index == IWL_INVALID_STATION)) | 131 | if (unlikely(index == IWL_INVALID_STATION)) |
369 | goto out; | 132 | goto out; |
370 | 133 | ||
371 | if (priv->stations[index].used) { | 134 | if (priv->stations_39[index].used) { |
372 | priv->stations[index].used = 0; | 135 | priv->stations_39[index].used = 0; |
373 | priv->num_stations--; | 136 | priv->num_stations--; |
374 | } | 137 | } |
375 | 138 | ||
@@ -386,14 +149,14 @@ out: | |||
386 | * | 149 | * |
387 | * NOTE: This does not clear or otherwise alter the device's station table. | 150 | * NOTE: This does not clear or otherwise alter the device's station table. |
388 | */ | 151 | */ |
389 | static void iwl3945_clear_stations_table(struct iwl3945_priv *priv) | 152 | static void iwl3945_clear_stations_table(struct iwl_priv *priv) |
390 | { | 153 | { |
391 | unsigned long flags; | 154 | unsigned long flags; |
392 | 155 | ||
393 | spin_lock_irqsave(&priv->sta_lock, flags); | 156 | spin_lock_irqsave(&priv->sta_lock, flags); |
394 | 157 | ||
395 | priv->num_stations = 0; | 158 | priv->num_stations = 0; |
396 | memset(priv->stations, 0, sizeof(priv->stations)); | 159 | memset(priv->stations_39, 0, sizeof(priv->stations_39)); |
397 | 160 | ||
398 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 161 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
399 | } | 162 | } |
@@ -401,7 +164,7 @@ static void iwl3945_clear_stations_table(struct iwl3945_priv *priv) | |||
401 | /** | 164 | /** |
402 | * iwl3945_add_station - Add station to station tables in driver and device | 165 | * iwl3945_add_station - Add station to station tables in driver and device |
403 | */ | 166 | */ |
404 | u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags) | 167 | u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags) |
405 | { | 168 | { |
406 | int i; | 169 | int i; |
407 | int index = IWL_INVALID_STATION; | 170 | int index = IWL_INVALID_STATION; |
@@ -413,16 +176,16 @@ u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 | |||
413 | if (is_ap) | 176 | if (is_ap) |
414 | index = IWL_AP_ID; | 177 | index = IWL_AP_ID; |
415 | else if (is_broadcast_ether_addr(addr)) | 178 | else if (is_broadcast_ether_addr(addr)) |
416 | index = priv->hw_setting.bcast_sta_id; | 179 | index = priv->hw_params.bcast_sta_id; |
417 | else | 180 | else |
418 | for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) { | 181 | for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) { |
419 | if (!compare_ether_addr(priv->stations[i].sta.sta.addr, | 182 | if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr, |
420 | addr)) { | 183 | addr)) { |
421 | index = i; | 184 | index = i; |
422 | break; | 185 | break; |
423 | } | 186 | } |
424 | 187 | ||
425 | if (!priv->stations[i].used && | 188 | if (!priv->stations_39[i].used && |
426 | index == IWL_INVALID_STATION) | 189 | index == IWL_INVALID_STATION) |
427 | index = i; | 190 | index = i; |
428 | } | 191 | } |
@@ -434,14 +197,14 @@ u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 | |||
434 | return index; | 197 | return index; |
435 | } | 198 | } |
436 | 199 | ||
437 | if (priv->stations[index].used && | 200 | if (priv->stations_39[index].used && |
438 | !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) { | 201 | !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) { |
439 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | 202 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); |
440 | return index; | 203 | return index; |
441 | } | 204 | } |
442 | 205 | ||
443 | IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr); | 206 | IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr); |
444 | station = &priv->stations[index]; | 207 | station = &priv->stations_39[index]; |
445 | station->used = 1; | 208 | station->used = 1; |
446 | priv->num_stations++; | 209 | priv->num_stations++; |
447 | 210 | ||
@@ -460,353 +223,16 @@ u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 | |||
460 | /* Turn on both antennas for the station... */ | 223 | /* Turn on both antennas for the station... */ |
461 | station->sta.rate_n_flags = | 224 | station->sta.rate_n_flags = |
462 | iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK); | 225 | iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK); |
463 | station->current_rate.rate_n_flags = | ||
464 | le16_to_cpu(station->sta.rate_n_flags); | ||
465 | 226 | ||
466 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | 227 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); |
467 | 228 | ||
468 | /* Add station to device's station table */ | 229 | /* Add station to device's station table */ |
469 | iwl3945_send_add_station(priv, &station->sta, flags); | 230 | iwl_send_add_sta(priv, |
231 | (struct iwl_addsta_cmd *)&station->sta, flags); | ||
470 | return index; | 232 | return index; |
471 | 233 | ||
472 | } | 234 | } |
473 | 235 | ||
474 | /*************** DRIVER STATUS FUNCTIONS *****/ | ||
475 | |||
476 | static inline int iwl3945_is_ready(struct iwl3945_priv *priv) | ||
477 | { | ||
478 | /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are | ||
479 | * set but EXIT_PENDING is not */ | ||
480 | return test_bit(STATUS_READY, &priv->status) && | ||
481 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) && | ||
482 | !test_bit(STATUS_EXIT_PENDING, &priv->status); | ||
483 | } | ||
484 | |||
485 | static inline int iwl3945_is_alive(struct iwl3945_priv *priv) | ||
486 | { | ||
487 | return test_bit(STATUS_ALIVE, &priv->status); | ||
488 | } | ||
489 | |||
490 | static inline int iwl3945_is_init(struct iwl3945_priv *priv) | ||
491 | { | ||
492 | return test_bit(STATUS_INIT, &priv->status); | ||
493 | } | ||
494 | |||
495 | static inline int iwl3945_is_rfkill_sw(struct iwl3945_priv *priv) | ||
496 | { | ||
497 | return test_bit(STATUS_RF_KILL_SW, &priv->status); | ||
498 | } | ||
499 | |||
500 | static inline int iwl3945_is_rfkill_hw(struct iwl3945_priv *priv) | ||
501 | { | ||
502 | return test_bit(STATUS_RF_KILL_HW, &priv->status); | ||
503 | } | ||
504 | |||
505 | static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv) | ||
506 | { | ||
507 | return iwl3945_is_rfkill_hw(priv) || | ||
508 | iwl3945_is_rfkill_sw(priv); | ||
509 | } | ||
510 | |||
511 | static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv) | ||
512 | { | ||
513 | |||
514 | if (iwl3945_is_rfkill(priv)) | ||
515 | return 0; | ||
516 | |||
517 | return iwl3945_is_ready(priv); | ||
518 | } | ||
519 | |||
520 | /*************** HOST COMMAND QUEUE FUNCTIONS *****/ | ||
521 | |||
522 | #define IWL_CMD(x) case x: return #x | ||
523 | |||
524 | static const char *get_cmd_string(u8 cmd) | ||
525 | { | ||
526 | switch (cmd) { | ||
527 | IWL_CMD(REPLY_ALIVE); | ||
528 | IWL_CMD(REPLY_ERROR); | ||
529 | IWL_CMD(REPLY_RXON); | ||
530 | IWL_CMD(REPLY_RXON_ASSOC); | ||
531 | IWL_CMD(REPLY_QOS_PARAM); | ||
532 | IWL_CMD(REPLY_RXON_TIMING); | ||
533 | IWL_CMD(REPLY_ADD_STA); | ||
534 | IWL_CMD(REPLY_REMOVE_STA); | ||
535 | IWL_CMD(REPLY_REMOVE_ALL_STA); | ||
536 | IWL_CMD(REPLY_3945_RX); | ||
537 | IWL_CMD(REPLY_TX); | ||
538 | IWL_CMD(REPLY_RATE_SCALE); | ||
539 | IWL_CMD(REPLY_LEDS_CMD); | ||
540 | IWL_CMD(REPLY_TX_LINK_QUALITY_CMD); | ||
541 | IWL_CMD(RADAR_NOTIFICATION); | ||
542 | IWL_CMD(REPLY_QUIET_CMD); | ||
543 | IWL_CMD(REPLY_CHANNEL_SWITCH); | ||
544 | IWL_CMD(CHANNEL_SWITCH_NOTIFICATION); | ||
545 | IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD); | ||
546 | IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION); | ||
547 | IWL_CMD(POWER_TABLE_CMD); | ||
548 | IWL_CMD(PM_SLEEP_NOTIFICATION); | ||
549 | IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC); | ||
550 | IWL_CMD(REPLY_SCAN_CMD); | ||
551 | IWL_CMD(REPLY_SCAN_ABORT_CMD); | ||
552 | IWL_CMD(SCAN_START_NOTIFICATION); | ||
553 | IWL_CMD(SCAN_RESULTS_NOTIFICATION); | ||
554 | IWL_CMD(SCAN_COMPLETE_NOTIFICATION); | ||
555 | IWL_CMD(BEACON_NOTIFICATION); | ||
556 | IWL_CMD(REPLY_TX_BEACON); | ||
557 | IWL_CMD(WHO_IS_AWAKE_NOTIFICATION); | ||
558 | IWL_CMD(QUIET_NOTIFICATION); | ||
559 | IWL_CMD(REPLY_TX_PWR_TABLE_CMD); | ||
560 | IWL_CMD(MEASURE_ABORT_NOTIFICATION); | ||
561 | IWL_CMD(REPLY_BT_CONFIG); | ||
562 | IWL_CMD(REPLY_STATISTICS_CMD); | ||
563 | IWL_CMD(STATISTICS_NOTIFICATION); | ||
564 | IWL_CMD(REPLY_CARD_STATE_CMD); | ||
565 | IWL_CMD(CARD_STATE_NOTIFICATION); | ||
566 | IWL_CMD(MISSED_BEACONS_NOTIFICATION); | ||
567 | default: | ||
568 | return "UNKNOWN"; | ||
569 | |||
570 | } | ||
571 | } | ||
572 | |||
573 | #define HOST_COMPLETE_TIMEOUT (HZ / 2) | ||
574 | |||
575 | /** | ||
576 | * iwl3945_enqueue_hcmd - enqueue a uCode command | ||
577 | * @priv: device private data point | ||
578 | * @cmd: a point to the ucode command structure | ||
579 | * | ||
580 | * The function returns < 0 values to indicate the operation is | ||
581 | * failed. On success, it turns the index (> 0) of command in the | ||
582 | * command queue. | ||
583 | */ | ||
584 | static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd) | ||
585 | { | ||
586 | struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM]; | ||
587 | struct iwl3945_queue *q = &txq->q; | ||
588 | struct iwl3945_tfd_frame *tfd; | ||
589 | u32 *control_flags; | ||
590 | struct iwl3945_cmd *out_cmd; | ||
591 | u32 idx; | ||
592 | u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr)); | ||
593 | dma_addr_t phys_addr; | ||
594 | int pad; | ||
595 | u16 count; | ||
596 | int ret; | ||
597 | unsigned long flags; | ||
598 | |||
599 | /* If any of the command structures end up being larger than | ||
600 | * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then | ||
601 | * we will need to increase the size of the TFD entries */ | ||
602 | BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) && | ||
603 | !(cmd->meta.flags & CMD_SIZE_HUGE)); | ||
604 | |||
605 | |||
606 | if (iwl3945_is_rfkill(priv)) { | ||
607 | IWL_DEBUG_INFO("Not sending command - RF KILL"); | ||
608 | return -EIO; | ||
609 | } | ||
610 | |||
611 | if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) { | ||
612 | IWL_ERROR("No space for Tx\n"); | ||
613 | return -ENOSPC; | ||
614 | } | ||
615 | |||
616 | spin_lock_irqsave(&priv->hcmd_lock, flags); | ||
617 | |||
618 | tfd = &txq->bd[q->write_ptr]; | ||
619 | memset(tfd, 0, sizeof(*tfd)); | ||
620 | |||
621 | control_flags = (u32 *) tfd; | ||
622 | |||
623 | idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE); | ||
624 | out_cmd = &txq->cmd[idx]; | ||
625 | |||
626 | out_cmd->hdr.cmd = cmd->id; | ||
627 | memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta)); | ||
628 | memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len); | ||
629 | |||
630 | /* At this point, the out_cmd now has all of the incoming cmd | ||
631 | * information */ | ||
632 | |||
633 | out_cmd->hdr.flags = 0; | ||
634 | out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) | | ||
635 | INDEX_TO_SEQ(q->write_ptr)); | ||
636 | if (out_cmd->meta.flags & CMD_SIZE_HUGE) | ||
637 | out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME); | ||
638 | |||
639 | phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx + | ||
640 | offsetof(struct iwl3945_cmd, hdr); | ||
641 | iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size); | ||
642 | |||
643 | pad = U32_PAD(cmd->len); | ||
644 | count = TFD_CTL_COUNT_GET(*control_flags); | ||
645 | *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad); | ||
646 | |||
647 | IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, " | ||
648 | "%d bytes at %d[%d]:%d\n", | ||
649 | get_cmd_string(out_cmd->hdr.cmd), | ||
650 | out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence), | ||
651 | fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM); | ||
652 | |||
653 | txq->need_update = 1; | ||
654 | |||
655 | /* Increment and update queue's write index */ | ||
656 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); | ||
657 | ret = iwl3945_tx_queue_update_write_ptr(priv, txq); | ||
658 | |||
659 | spin_unlock_irqrestore(&priv->hcmd_lock, flags); | ||
660 | return ret ? ret : idx; | ||
661 | } | ||
662 | |||
663 | static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd) | ||
664 | { | ||
665 | int ret; | ||
666 | |||
667 | BUG_ON(!(cmd->meta.flags & CMD_ASYNC)); | ||
668 | |||
669 | /* An asynchronous command can not expect an SKB to be set. */ | ||
670 | BUG_ON(cmd->meta.flags & CMD_WANT_SKB); | ||
671 | |||
672 | /* An asynchronous command MUST have a callback. */ | ||
673 | BUG_ON(!cmd->meta.u.callback); | ||
674 | |||
675 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
676 | return -EBUSY; | ||
677 | |||
678 | ret = iwl3945_enqueue_hcmd(priv, cmd); | ||
679 | if (ret < 0) { | ||
680 | IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n", | ||
681 | get_cmd_string(cmd->id), ret); | ||
682 | return ret; | ||
683 | } | ||
684 | return 0; | ||
685 | } | ||
686 | |||
687 | static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd) | ||
688 | { | ||
689 | int cmd_idx; | ||
690 | int ret; | ||
691 | |||
692 | BUG_ON(cmd->meta.flags & CMD_ASYNC); | ||
693 | |||
694 | /* A synchronous command can not have a callback set. */ | ||
695 | BUG_ON(cmd->meta.u.callback != NULL); | ||
696 | |||
697 | if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) { | ||
698 | IWL_ERROR("Error sending %s: Already sending a host command\n", | ||
699 | get_cmd_string(cmd->id)); | ||
700 | ret = -EBUSY; | ||
701 | goto out; | ||
702 | } | ||
703 | |||
704 | set_bit(STATUS_HCMD_ACTIVE, &priv->status); | ||
705 | |||
706 | if (cmd->meta.flags & CMD_WANT_SKB) | ||
707 | cmd->meta.source = &cmd->meta; | ||
708 | |||
709 | cmd_idx = iwl3945_enqueue_hcmd(priv, cmd); | ||
710 | if (cmd_idx < 0) { | ||
711 | ret = cmd_idx; | ||
712 | IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n", | ||
713 | get_cmd_string(cmd->id), ret); | ||
714 | goto out; | ||
715 | } | ||
716 | |||
717 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | ||
718 | !test_bit(STATUS_HCMD_ACTIVE, &priv->status), | ||
719 | HOST_COMPLETE_TIMEOUT); | ||
720 | if (!ret) { | ||
721 | if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) { | ||
722 | IWL_ERROR("Error sending %s: time out after %dms.\n", | ||
723 | get_cmd_string(cmd->id), | ||
724 | jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); | ||
725 | |||
726 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | ||
727 | ret = -ETIMEDOUT; | ||
728 | goto cancel; | ||
729 | } | ||
730 | } | ||
731 | |||
732 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { | ||
733 | IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n", | ||
734 | get_cmd_string(cmd->id)); | ||
735 | ret = -ECANCELED; | ||
736 | goto fail; | ||
737 | } | ||
738 | if (test_bit(STATUS_FW_ERROR, &priv->status)) { | ||
739 | IWL_DEBUG_INFO("Command %s failed: FW Error\n", | ||
740 | get_cmd_string(cmd->id)); | ||
741 | ret = -EIO; | ||
742 | goto fail; | ||
743 | } | ||
744 | if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) { | ||
745 | IWL_ERROR("Error: Response NULL in '%s'\n", | ||
746 | get_cmd_string(cmd->id)); | ||
747 | ret = -EIO; | ||
748 | goto cancel; | ||
749 | } | ||
750 | |||
751 | ret = 0; | ||
752 | goto out; | ||
753 | |||
754 | cancel: | ||
755 | if (cmd->meta.flags & CMD_WANT_SKB) { | ||
756 | struct iwl3945_cmd *qcmd; | ||
757 | |||
758 | /* Cancel the CMD_WANT_SKB flag for the cmd in the | ||
759 | * TX cmd queue. Otherwise in case the cmd comes | ||
760 | * in later, it will possibly set an invalid | ||
761 | * address (cmd->meta.source). */ | ||
762 | qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx]; | ||
763 | qcmd->meta.flags &= ~CMD_WANT_SKB; | ||
764 | } | ||
765 | fail: | ||
766 | if (cmd->meta.u.skb) { | ||
767 | dev_kfree_skb_any(cmd->meta.u.skb); | ||
768 | cmd->meta.u.skb = NULL; | ||
769 | } | ||
770 | out: | ||
771 | clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status); | ||
772 | return ret; | ||
773 | } | ||
774 | |||
775 | int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd) | ||
776 | { | ||
777 | if (cmd->meta.flags & CMD_ASYNC) | ||
778 | return iwl3945_send_cmd_async(priv, cmd); | ||
779 | |||
780 | return iwl3945_send_cmd_sync(priv, cmd); | ||
781 | } | ||
782 | |||
783 | int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data) | ||
784 | { | ||
785 | struct iwl3945_host_cmd cmd = { | ||
786 | .id = id, | ||
787 | .len = len, | ||
788 | .data = data, | ||
789 | }; | ||
790 | |||
791 | return iwl3945_send_cmd_sync(priv, &cmd); | ||
792 | } | ||
793 | |||
794 | static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val) | ||
795 | { | ||
796 | struct iwl3945_host_cmd cmd = { | ||
797 | .id = id, | ||
798 | .len = sizeof(val), | ||
799 | .data = &val, | ||
800 | }; | ||
801 | |||
802 | return iwl3945_send_cmd_sync(priv, &cmd); | ||
803 | } | ||
804 | |||
805 | int iwl3945_send_statistics_request(struct iwl3945_priv *priv) | ||
806 | { | ||
807 | return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0); | ||
808 | } | ||
809 | |||
810 | /** | 236 | /** |
811 | * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON | 237 | * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON |
812 | * @band: 2.4 or 5 GHz band | 238 | * @band: 2.4 or 5 GHz band |
@@ -817,25 +243,25 @@ int iwl3945_send_statistics_request(struct iwl3945_priv *priv) | |||
817 | * NOTE: Does not commit to the hardware; it sets appropriate bit fields | 243 | * NOTE: Does not commit to the hardware; it sets appropriate bit fields |
818 | * in the staging RXON flag structure based on the band | 244 | * in the staging RXON flag structure based on the band |
819 | */ | 245 | */ |
820 | static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv, | 246 | static int iwl3945_set_rxon_channel(struct iwl_priv *priv, |
821 | enum ieee80211_band band, | 247 | enum ieee80211_band band, |
822 | u16 channel) | 248 | u16 channel) |
823 | { | 249 | { |
824 | if (!iwl3945_get_channel_info(priv, band, channel)) { | 250 | if (!iwl_get_channel_info(priv, band, channel)) { |
825 | IWL_DEBUG_INFO("Could not set channel to %d [%d]\n", | 251 | IWL_DEBUG_INFO("Could not set channel to %d [%d]\n", |
826 | channel, band); | 252 | channel, band); |
827 | return -EINVAL; | 253 | return -EINVAL; |
828 | } | 254 | } |
829 | 255 | ||
830 | if ((le16_to_cpu(priv->staging_rxon.channel) == channel) && | 256 | if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) && |
831 | (priv->band == band)) | 257 | (priv->band == band)) |
832 | return 0; | 258 | return 0; |
833 | 259 | ||
834 | priv->staging_rxon.channel = cpu_to_le16(channel); | 260 | priv->staging39_rxon.channel = cpu_to_le16(channel); |
835 | if (band == IEEE80211_BAND_5GHZ) | 261 | if (band == IEEE80211_BAND_5GHZ) |
836 | priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK; | 262 | priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK; |
837 | else | 263 | else |
838 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | 264 | priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK; |
839 | 265 | ||
840 | priv->band = band; | 266 | priv->band = band; |
841 | 267 | ||
@@ -851,73 +277,74 @@ static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv, | |||
851 | * be #ifdef'd out once the driver is stable and folks aren't actively | 277 | * be #ifdef'd out once the driver is stable and folks aren't actively |
852 | * making changes | 278 | * making changes |
853 | */ | 279 | */ |
854 | static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon) | 280 | static int iwl3945_check_rxon_cmd(struct iwl_priv *priv) |
855 | { | 281 | { |
856 | int error = 0; | 282 | int error = 0; |
857 | int counter = 1; | 283 | int counter = 1; |
284 | struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon; | ||
858 | 285 | ||
859 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | 286 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { |
860 | error |= le32_to_cpu(rxon->flags & | 287 | error |= le32_to_cpu(rxon->flags & |
861 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | 288 | (RXON_FLG_TGJ_NARROW_BAND_MSK | |
862 | RXON_FLG_RADAR_DETECT_MSK)); | 289 | RXON_FLG_RADAR_DETECT_MSK)); |
863 | if (error) | 290 | if (error) |
864 | IWL_WARNING("check 24G fields %d | %d\n", | 291 | IWL_WARN(priv, "check 24G fields %d | %d\n", |
865 | counter++, error); | 292 | counter++, error); |
866 | } else { | 293 | } else { |
867 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | 294 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? |
868 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | 295 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); |
869 | if (error) | 296 | if (error) |
870 | IWL_WARNING("check 52 fields %d | %d\n", | 297 | IWL_WARN(priv, "check 52 fields %d | %d\n", |
871 | counter++, error); | 298 | counter++, error); |
872 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | 299 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); |
873 | if (error) | 300 | if (error) |
874 | IWL_WARNING("check 52 CCK %d | %d\n", | 301 | IWL_WARN(priv, "check 52 CCK %d | %d\n", |
875 | counter++, error); | 302 | counter++, error); |
876 | } | 303 | } |
877 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | 304 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; |
878 | if (error) | 305 | if (error) |
879 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | 306 | IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error); |
880 | 307 | ||
881 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | 308 | /* make sure basic rates 6Mbps and 1Mbps are supported */ |
882 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | 309 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && |
883 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | 310 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); |
884 | if (error) | 311 | if (error) |
885 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | 312 | IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error); |
886 | 313 | ||
887 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | 314 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); |
888 | if (error) | 315 | if (error) |
889 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | 316 | IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error); |
890 | 317 | ||
891 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | 318 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) |
892 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | 319 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); |
893 | if (error) | 320 | if (error) |
894 | IWL_WARNING("check CCK and short slot %d | %d\n", | 321 | IWL_WARN(priv, "check CCK and short slot %d | %d\n", |
895 | counter++, error); | 322 | counter++, error); |
896 | 323 | ||
897 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | 324 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) |
898 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | 325 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); |
899 | if (error) | 326 | if (error) |
900 | IWL_WARNING("check CCK & auto detect %d | %d\n", | 327 | IWL_WARN(priv, "check CCK & auto detect %d | %d\n", |
901 | counter++, error); | 328 | counter++, error); |
902 | 329 | ||
903 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | 330 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | |
904 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | 331 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); |
905 | if (error) | 332 | if (error) |
906 | IWL_WARNING("check TGG and auto detect %d | %d\n", | 333 | IWL_WARN(priv, "check TGG and auto detect %d | %d\n", |
907 | counter++, error); | 334 | counter++, error); |
908 | 335 | ||
909 | if ((rxon->flags & RXON_FLG_DIS_DIV_MSK)) | 336 | if ((rxon->flags & RXON_FLG_DIS_DIV_MSK)) |
910 | error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK | | 337 | error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK | |
911 | RXON_FLG_ANT_A_MSK)) == 0); | 338 | RXON_FLG_ANT_A_MSK)) == 0); |
912 | if (error) | 339 | if (error) |
913 | IWL_WARNING("check antenna %d %d\n", counter++, error); | 340 | IWL_WARN(priv, "check antenna %d %d\n", counter++, error); |
914 | 341 | ||
915 | if (error) | 342 | if (error) |
916 | IWL_WARNING("Tuning to channel %d\n", | 343 | IWL_WARN(priv, "Tuning to channel %d\n", |
917 | le16_to_cpu(rxon->channel)); | 344 | le16_to_cpu(rxon->channel)); |
918 | 345 | ||
919 | if (error) { | 346 | if (error) { |
920 | IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n"); | 347 | IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n"); |
921 | return -1; | 348 | return -1; |
922 | } | 349 | } |
923 | return 0; | 350 | return 0; |
@@ -931,22 +358,22 @@ static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon) | |||
931 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | 358 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that |
932 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | 359 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. |
933 | */ | 360 | */ |
934 | static int iwl3945_full_rxon_required(struct iwl3945_priv *priv) | 361 | static int iwl3945_full_rxon_required(struct iwl_priv *priv) |
935 | { | 362 | { |
936 | 363 | ||
937 | /* These items are only settable from the full RXON command */ | 364 | /* These items are only settable from the full RXON command */ |
938 | if (!(iwl3945_is_associated(priv)) || | 365 | if (!(iwl3945_is_associated(priv)) || |
939 | compare_ether_addr(priv->staging_rxon.bssid_addr, | 366 | compare_ether_addr(priv->staging39_rxon.bssid_addr, |
940 | priv->active_rxon.bssid_addr) || | 367 | priv->active39_rxon.bssid_addr) || |
941 | compare_ether_addr(priv->staging_rxon.node_addr, | 368 | compare_ether_addr(priv->staging39_rxon.node_addr, |
942 | priv->active_rxon.node_addr) || | 369 | priv->active39_rxon.node_addr) || |
943 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | 370 | compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr, |
944 | priv->active_rxon.wlap_bssid_addr) || | 371 | priv->active39_rxon.wlap_bssid_addr) || |
945 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | 372 | (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) || |
946 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | 373 | (priv->staging39_rxon.channel != priv->active39_rxon.channel) || |
947 | (priv->staging_rxon.air_propagation != | 374 | (priv->staging39_rxon.air_propagation != |
948 | priv->active_rxon.air_propagation) || | 375 | priv->active39_rxon.air_propagation) || |
949 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) | 376 | (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id)) |
950 | return 1; | 377 | return 1; |
951 | 378 | ||
952 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | 379 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can |
@@ -954,31 +381,31 @@ static int iwl3945_full_rxon_required(struct iwl3945_priv *priv) | |||
954 | * flag transitions are allowed using RXON_ASSOC */ | 381 | * flag transitions are allowed using RXON_ASSOC */ |
955 | 382 | ||
956 | /* Check if we are not switching bands */ | 383 | /* Check if we are not switching bands */ |
957 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | 384 | if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) != |
958 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | 385 | (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)) |
959 | return 1; | 386 | return 1; |
960 | 387 | ||
961 | /* Check if we are switching association toggle */ | 388 | /* Check if we are switching association toggle */ |
962 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | 389 | if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != |
963 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | 390 | (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) |
964 | return 1; | 391 | return 1; |
965 | 392 | ||
966 | return 0; | 393 | return 0; |
967 | } | 394 | } |
968 | 395 | ||
969 | static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv) | 396 | static int iwl3945_send_rxon_assoc(struct iwl_priv *priv) |
970 | { | 397 | { |
971 | int rc = 0; | 398 | int rc = 0; |
972 | struct iwl3945_rx_packet *res = NULL; | 399 | struct iwl_rx_packet *res = NULL; |
973 | struct iwl3945_rxon_assoc_cmd rxon_assoc; | 400 | struct iwl3945_rxon_assoc_cmd rxon_assoc; |
974 | struct iwl3945_host_cmd cmd = { | 401 | struct iwl_host_cmd cmd = { |
975 | .id = REPLY_RXON_ASSOC, | 402 | .id = REPLY_RXON_ASSOC, |
976 | .len = sizeof(rxon_assoc), | 403 | .len = sizeof(rxon_assoc), |
977 | .meta.flags = CMD_WANT_SKB, | 404 | .meta.flags = CMD_WANT_SKB, |
978 | .data = &rxon_assoc, | 405 | .data = &rxon_assoc, |
979 | }; | 406 | }; |
980 | const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon; | 407 | const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon; |
981 | const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon; | 408 | const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon; |
982 | 409 | ||
983 | if ((rxon1->flags == rxon2->flags) && | 410 | if ((rxon1->flags == rxon2->flags) && |
984 | (rxon1->filter_flags == rxon2->filter_flags) && | 411 | (rxon1->filter_flags == rxon2->filter_flags) && |
@@ -988,19 +415,19 @@ static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv) | |||
988 | return 0; | 415 | return 0; |
989 | } | 416 | } |
990 | 417 | ||
991 | rxon_assoc.flags = priv->staging_rxon.flags; | 418 | rxon_assoc.flags = priv->staging39_rxon.flags; |
992 | rxon_assoc.filter_flags = priv->staging_rxon.filter_flags; | 419 | rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags; |
993 | rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates; | 420 | rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates; |
994 | rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates; | 421 | rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates; |
995 | rxon_assoc.reserved = 0; | 422 | rxon_assoc.reserved = 0; |
996 | 423 | ||
997 | rc = iwl3945_send_cmd_sync(priv, &cmd); | 424 | rc = iwl_send_cmd_sync(priv, &cmd); |
998 | if (rc) | 425 | if (rc) |
999 | return rc; | 426 | return rc; |
1000 | 427 | ||
1001 | res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data; | 428 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
1002 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { | 429 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
1003 | IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n"); | 430 | IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n"); |
1004 | rc = -EIO; | 431 | rc = -EIO; |
1005 | } | 432 | } |
1006 | 433 | ||
@@ -1011,6 +438,43 @@ static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv) | |||
1011 | } | 438 | } |
1012 | 439 | ||
1013 | /** | 440 | /** |
441 | * iwl3945_get_antenna_flags - Get antenna flags for RXON command | ||
442 | * @priv: eeprom and antenna fields are used to determine antenna flags | ||
443 | * | ||
444 | * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed | ||
445 | * iwl3945_mod_params.antenna specifies the antenna diversity mode: | ||
446 | * | ||
447 | * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself | ||
448 | * IWL_ANTENNA_MAIN - Force MAIN antenna | ||
449 | * IWL_ANTENNA_AUX - Force AUX antenna | ||
450 | */ | ||
451 | __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv) | ||
452 | { | ||
453 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; | ||
454 | |||
455 | switch (iwl3945_mod_params.antenna) { | ||
456 | case IWL_ANTENNA_DIVERSITY: | ||
457 | return 0; | ||
458 | |||
459 | case IWL_ANTENNA_MAIN: | ||
460 | if (eeprom->antenna_switch_type) | ||
461 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; | ||
462 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; | ||
463 | |||
464 | case IWL_ANTENNA_AUX: | ||
465 | if (eeprom->antenna_switch_type) | ||
466 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; | ||
467 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; | ||
468 | } | ||
469 | |||
470 | /* bad antenna selector value */ | ||
471 | IWL_ERR(priv, "Bad antenna selector value (0x%x)\n", | ||
472 | iwl3945_mod_params.antenna); | ||
473 | |||
474 | return 0; /* "diversity" is default if error */ | ||
475 | } | ||
476 | |||
477 | /** | ||
1014 | * iwl3945_commit_rxon - commit staging_rxon to hardware | 478 | * iwl3945_commit_rxon - commit staging_rxon to hardware |
1015 | * | 479 | * |
1016 | * The RXON command in staging_rxon is committed to the hardware and | 480 | * The RXON command in staging_rxon is committed to the hardware and |
@@ -1018,26 +482,26 @@ static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv) | |||
1018 | * function correctly transitions out of the RXON_ASSOC_MSK state if | 482 | * function correctly transitions out of the RXON_ASSOC_MSK state if |
1019 | * a HW tune is required based on the RXON structure changes. | 483 | * a HW tune is required based on the RXON structure changes. |
1020 | */ | 484 | */ |
1021 | static int iwl3945_commit_rxon(struct iwl3945_priv *priv) | 485 | static int iwl3945_commit_rxon(struct iwl_priv *priv) |
1022 | { | 486 | { |
1023 | /* cast away the const for active_rxon in this function */ | 487 | /* cast away the const for active_rxon in this function */ |
1024 | struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon; | 488 | struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon; |
1025 | int rc = 0; | 489 | int rc = 0; |
1026 | 490 | ||
1027 | if (!iwl3945_is_alive(priv)) | 491 | if (!iwl_is_alive(priv)) |
1028 | return -1; | 492 | return -1; |
1029 | 493 | ||
1030 | /* always get timestamp with Rx frame */ | 494 | /* always get timestamp with Rx frame */ |
1031 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | 495 | priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK; |
1032 | 496 | ||
1033 | /* select antenna */ | 497 | /* select antenna */ |
1034 | priv->staging_rxon.flags &= | 498 | priv->staging39_rxon.flags &= |
1035 | ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK); | 499 | ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK); |
1036 | priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv); | 500 | priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv); |
1037 | 501 | ||
1038 | rc = iwl3945_check_rxon_cmd(&priv->staging_rxon); | 502 | rc = iwl3945_check_rxon_cmd(priv); |
1039 | if (rc) { | 503 | if (rc) { |
1040 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); | 504 | IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n"); |
1041 | return -EINVAL; | 505 | return -EINVAL; |
1042 | } | 506 | } |
1043 | 507 | ||
@@ -1047,12 +511,12 @@ static int iwl3945_commit_rxon(struct iwl3945_priv *priv) | |||
1047 | if (!iwl3945_full_rxon_required(priv)) { | 511 | if (!iwl3945_full_rxon_required(priv)) { |
1048 | rc = iwl3945_send_rxon_assoc(priv); | 512 | rc = iwl3945_send_rxon_assoc(priv); |
1049 | if (rc) { | 513 | if (rc) { |
1050 | IWL_ERROR("Error setting RXON_ASSOC " | 514 | IWL_ERR(priv, "Error setting RXON_ASSOC " |
1051 | "configuration (%d).\n", rc); | 515 | "configuration (%d).\n", rc); |
1052 | return rc; | 516 | return rc; |
1053 | } | 517 | } |
1054 | 518 | ||
1055 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | 519 | memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon)); |
1056 | 520 | ||
1057 | return 0; | 521 | return 0; |
1058 | } | 522 | } |
@@ -1062,19 +526,19 @@ static int iwl3945_commit_rxon(struct iwl3945_priv *priv) | |||
1062 | * we must clear the associated from the active configuration | 526 | * we must clear the associated from the active configuration |
1063 | * before we apply the new config */ | 527 | * before we apply the new config */ |
1064 | if (iwl3945_is_associated(priv) && | 528 | if (iwl3945_is_associated(priv) && |
1065 | (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) { | 529 | (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) { |
1066 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); | 530 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); |
1067 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | 531 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
1068 | 532 | ||
1069 | rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON, | 533 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
1070 | sizeof(struct iwl3945_rxon_cmd), | 534 | sizeof(struct iwl3945_rxon_cmd), |
1071 | &priv->active_rxon); | 535 | &priv->active39_rxon); |
1072 | 536 | ||
1073 | /* If the mask clearing failed then we set | 537 | /* If the mask clearing failed then we set |
1074 | * active_rxon back to what it was previously */ | 538 | * active_rxon back to what it was previously */ |
1075 | if (rc) { | 539 | if (rc) { |
1076 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | 540 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; |
1077 | IWL_ERROR("Error clearing ASSOC_MSK on current " | 541 | IWL_ERR(priv, "Error clearing ASSOC_MSK on current " |
1078 | "configuration (%d).\n", rc); | 542 | "configuration (%d).\n", rc); |
1079 | return rc; | 543 | return rc; |
1080 | } | 544 | } |
@@ -1084,35 +548,35 @@ static int iwl3945_commit_rxon(struct iwl3945_priv *priv) | |||
1084 | "* with%s RXON_FILTER_ASSOC_MSK\n" | 548 | "* with%s RXON_FILTER_ASSOC_MSK\n" |
1085 | "* channel = %d\n" | 549 | "* channel = %d\n" |
1086 | "* bssid = %pM\n", | 550 | "* bssid = %pM\n", |
1087 | ((priv->staging_rxon.filter_flags & | 551 | ((priv->staging39_rxon.filter_flags & |
1088 | RXON_FILTER_ASSOC_MSK) ? "" : "out"), | 552 | RXON_FILTER_ASSOC_MSK) ? "" : "out"), |
1089 | le16_to_cpu(priv->staging_rxon.channel), | 553 | le16_to_cpu(priv->staging39_rxon.channel), |
1090 | priv->staging_rxon.bssid_addr); | 554 | priv->staging_rxon.bssid_addr); |
1091 | 555 | ||
1092 | /* Apply the new configuration */ | 556 | /* Apply the new configuration */ |
1093 | rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON, | 557 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
1094 | sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon); | 558 | sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon); |
1095 | if (rc) { | 559 | if (rc) { |
1096 | IWL_ERROR("Error setting new configuration (%d).\n", rc); | 560 | IWL_ERR(priv, "Error setting new configuration (%d).\n", rc); |
1097 | return rc; | 561 | return rc; |
1098 | } | 562 | } |
1099 | 563 | ||
1100 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | 564 | memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon)); |
1101 | 565 | ||
1102 | iwl3945_clear_stations_table(priv); | 566 | iwl3945_clear_stations_table(priv); |
1103 | 567 | ||
1104 | /* If we issue a new RXON command which required a tune then we must | 568 | /* If we issue a new RXON command which required a tune then we must |
1105 | * send a new TXPOWER command or we won't be able to Tx any frames */ | 569 | * send a new TXPOWER command or we won't be able to Tx any frames */ |
1106 | rc = iwl3945_hw_reg_send_txpower(priv); | 570 | rc = priv->cfg->ops->lib->send_tx_power(priv); |
1107 | if (rc) { | 571 | if (rc) { |
1108 | IWL_ERROR("Error setting Tx power (%d).\n", rc); | 572 | IWL_ERR(priv, "Error setting Tx power (%d).\n", rc); |
1109 | return rc; | 573 | return rc; |
1110 | } | 574 | } |
1111 | 575 | ||
1112 | /* Add the broadcast address so we can send broadcast frames */ | 576 | /* Add the broadcast address so we can send broadcast frames */ |
1113 | if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) == | 577 | if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) == |
1114 | IWL_INVALID_STATION) { | 578 | IWL_INVALID_STATION) { |
1115 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); | 579 | IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n"); |
1116 | return -EIO; | 580 | return -EIO; |
1117 | } | 581 | } |
1118 | 582 | ||
@@ -1120,185 +584,23 @@ static int iwl3945_commit_rxon(struct iwl3945_priv *priv) | |||
1120 | * add the IWL_AP_ID to the station rate table */ | 584 | * add the IWL_AP_ID to the station rate table */ |
1121 | if (iwl3945_is_associated(priv) && | 585 | if (iwl3945_is_associated(priv) && |
1122 | (priv->iw_mode == NL80211_IFTYPE_STATION)) | 586 | (priv->iw_mode == NL80211_IFTYPE_STATION)) |
1123 | if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0) | 587 | if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0) |
1124 | == IWL_INVALID_STATION) { | 588 | == IWL_INVALID_STATION) { |
1125 | IWL_ERROR("Error adding AP address for transmit.\n"); | 589 | IWL_ERR(priv, "Error adding AP address for transmit\n"); |
1126 | return -EIO; | 590 | return -EIO; |
1127 | } | 591 | } |
1128 | 592 | ||
1129 | /* Init the hardware's rate fallback order based on the band */ | 593 | /* Init the hardware's rate fallback order based on the band */ |
1130 | rc = iwl3945_init_hw_rate_table(priv); | 594 | rc = iwl3945_init_hw_rate_table(priv); |
1131 | if (rc) { | 595 | if (rc) { |
1132 | IWL_ERROR("Error setting HW rate table: %02X\n", rc); | 596 | IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc); |
1133 | return -EIO; | 597 | return -EIO; |
1134 | } | 598 | } |
1135 | 599 | ||
1136 | return 0; | 600 | return 0; |
1137 | } | 601 | } |
1138 | 602 | ||
1139 | static int iwl3945_send_bt_config(struct iwl3945_priv *priv) | 603 | static int iwl3945_update_sta_key_info(struct iwl_priv *priv, |
1140 | { | ||
1141 | struct iwl3945_bt_cmd bt_cmd = { | ||
1142 | .flags = 3, | ||
1143 | .lead_time = 0xAA, | ||
1144 | .max_kill = 1, | ||
1145 | .kill_ack_mask = 0, | ||
1146 | .kill_cts_mask = 0, | ||
1147 | }; | ||
1148 | |||
1149 | return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG, | ||
1150 | sizeof(struct iwl3945_bt_cmd), &bt_cmd); | ||
1151 | } | ||
1152 | |||
1153 | static int iwl3945_send_scan_abort(struct iwl3945_priv *priv) | ||
1154 | { | ||
1155 | int rc = 0; | ||
1156 | struct iwl3945_rx_packet *res; | ||
1157 | struct iwl3945_host_cmd cmd = { | ||
1158 | .id = REPLY_SCAN_ABORT_CMD, | ||
1159 | .meta.flags = CMD_WANT_SKB, | ||
1160 | }; | ||
1161 | |||
1162 | /* If there isn't a scan actively going on in the hardware | ||
1163 | * then we are in between scan bands and not actually | ||
1164 | * actively scanning, so don't send the abort command */ | ||
1165 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | ||
1166 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | ||
1167 | return 0; | ||
1168 | } | ||
1169 | |||
1170 | rc = iwl3945_send_cmd_sync(priv, &cmd); | ||
1171 | if (rc) { | ||
1172 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | ||
1173 | return rc; | ||
1174 | } | ||
1175 | |||
1176 | res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data; | ||
1177 | if (res->u.status != CAN_ABORT_STATUS) { | ||
1178 | /* The scan abort will return 1 for success or | ||
1179 | * 2 for "failure". A failure condition can be | ||
1180 | * due to simply not being in an active scan which | ||
1181 | * can occur if we send the scan abort before we | ||
1182 | * the microcode has notified us that a scan is | ||
1183 | * completed. */ | ||
1184 | IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status); | ||
1185 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | ||
1186 | clear_bit(STATUS_SCAN_HW, &priv->status); | ||
1187 | } | ||
1188 | |||
1189 | dev_kfree_skb_any(cmd.meta.u.skb); | ||
1190 | |||
1191 | return rc; | ||
1192 | } | ||
1193 | |||
1194 | static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv, | ||
1195 | struct iwl3945_cmd *cmd, | ||
1196 | struct sk_buff *skb) | ||
1197 | { | ||
1198 | return 1; | ||
1199 | } | ||
1200 | |||
1201 | /* | ||
1202 | * CARD_STATE_CMD | ||
1203 | * | ||
1204 | * Use: Sets the device's internal card state to enable, disable, or halt | ||
1205 | * | ||
1206 | * When in the 'enable' state the card operates as normal. | ||
1207 | * When in the 'disable' state, the card enters into a low power mode. | ||
1208 | * When in the 'halt' state, the card is shut down and must be fully | ||
1209 | * restarted to come back on. | ||
1210 | */ | ||
1211 | static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag) | ||
1212 | { | ||
1213 | struct iwl3945_host_cmd cmd = { | ||
1214 | .id = REPLY_CARD_STATE_CMD, | ||
1215 | .len = sizeof(u32), | ||
1216 | .data = &flags, | ||
1217 | .meta.flags = meta_flag, | ||
1218 | }; | ||
1219 | |||
1220 | if (meta_flag & CMD_ASYNC) | ||
1221 | cmd.meta.u.callback = iwl3945_card_state_sync_callback; | ||
1222 | |||
1223 | return iwl3945_send_cmd(priv, &cmd); | ||
1224 | } | ||
1225 | |||
1226 | static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv, | ||
1227 | struct iwl3945_cmd *cmd, struct sk_buff *skb) | ||
1228 | { | ||
1229 | struct iwl3945_rx_packet *res = NULL; | ||
1230 | |||
1231 | if (!skb) { | ||
1232 | IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n"); | ||
1233 | return 1; | ||
1234 | } | ||
1235 | |||
1236 | res = (struct iwl3945_rx_packet *)skb->data; | ||
1237 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { | ||
1238 | IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n", | ||
1239 | res->hdr.flags); | ||
1240 | return 1; | ||
1241 | } | ||
1242 | |||
1243 | switch (res->u.add_sta.status) { | ||
1244 | case ADD_STA_SUCCESS_MSK: | ||
1245 | break; | ||
1246 | default: | ||
1247 | break; | ||
1248 | } | ||
1249 | |||
1250 | /* We didn't cache the SKB; let the caller free it */ | ||
1251 | return 1; | ||
1252 | } | ||
1253 | |||
1254 | int iwl3945_send_add_station(struct iwl3945_priv *priv, | ||
1255 | struct iwl3945_addsta_cmd *sta, u8 flags) | ||
1256 | { | ||
1257 | struct iwl3945_rx_packet *res = NULL; | ||
1258 | int rc = 0; | ||
1259 | struct iwl3945_host_cmd cmd = { | ||
1260 | .id = REPLY_ADD_STA, | ||
1261 | .len = sizeof(struct iwl3945_addsta_cmd), | ||
1262 | .meta.flags = flags, | ||
1263 | .data = sta, | ||
1264 | }; | ||
1265 | |||
1266 | if (flags & CMD_ASYNC) | ||
1267 | cmd.meta.u.callback = iwl3945_add_sta_sync_callback; | ||
1268 | else | ||
1269 | cmd.meta.flags |= CMD_WANT_SKB; | ||
1270 | |||
1271 | rc = iwl3945_send_cmd(priv, &cmd); | ||
1272 | |||
1273 | if (rc || (flags & CMD_ASYNC)) | ||
1274 | return rc; | ||
1275 | |||
1276 | res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data; | ||
1277 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { | ||
1278 | IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n", | ||
1279 | res->hdr.flags); | ||
1280 | rc = -EIO; | ||
1281 | } | ||
1282 | |||
1283 | if (rc == 0) { | ||
1284 | switch (res->u.add_sta.status) { | ||
1285 | case ADD_STA_SUCCESS_MSK: | ||
1286 | IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n"); | ||
1287 | break; | ||
1288 | default: | ||
1289 | rc = -EIO; | ||
1290 | IWL_WARNING("REPLY_ADD_STA failed\n"); | ||
1291 | break; | ||
1292 | } | ||
1293 | } | ||
1294 | |||
1295 | priv->alloc_rxb_skb--; | ||
1296 | dev_kfree_skb_any(cmd.meta.u.skb); | ||
1297 | |||
1298 | return rc; | ||
1299 | } | ||
1300 | |||
1301 | static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv, | ||
1302 | struct ieee80211_key_conf *keyconf, | 604 | struct ieee80211_key_conf *keyconf, |
1303 | u8 sta_id) | 605 | u8 sta_id) |
1304 | { | 606 | { |
@@ -1318,42 +620,45 @@ static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv, | |||
1318 | return -EINVAL; | 620 | return -EINVAL; |
1319 | } | 621 | } |
1320 | spin_lock_irqsave(&priv->sta_lock, flags); | 622 | spin_lock_irqsave(&priv->sta_lock, flags); |
1321 | priv->stations[sta_id].keyinfo.alg = keyconf->alg; | 623 | priv->stations_39[sta_id].keyinfo.alg = keyconf->alg; |
1322 | priv->stations[sta_id].keyinfo.keylen = keyconf->keylen; | 624 | priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen; |
1323 | memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, | 625 | memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key, |
1324 | keyconf->keylen); | 626 | keyconf->keylen); |
1325 | 627 | ||
1326 | memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, | 628 | memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key, |
1327 | keyconf->keylen); | 629 | keyconf->keylen); |
1328 | priv->stations[sta_id].sta.key.key_flags = key_flags; | 630 | priv->stations_39[sta_id].sta.key.key_flags = key_flags; |
1329 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 631 | priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
1330 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 632 | priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
1331 | 633 | ||
1332 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 634 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
1333 | 635 | ||
1334 | IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n"); | 636 | IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n"); |
1335 | iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0); | 637 | iwl_send_add_sta(priv, |
638 | (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0); | ||
1336 | return 0; | 639 | return 0; |
1337 | } | 640 | } |
1338 | 641 | ||
1339 | static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id) | 642 | static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id) |
1340 | { | 643 | { |
1341 | unsigned long flags; | 644 | unsigned long flags; |
1342 | 645 | ||
1343 | spin_lock_irqsave(&priv->sta_lock, flags); | 646 | spin_lock_irqsave(&priv->sta_lock, flags); |
1344 | memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key)); | 647 | memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key)); |
1345 | memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo)); | 648 | memset(&priv->stations_39[sta_id].sta.key, 0, |
1346 | priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; | 649 | sizeof(struct iwl4965_keyinfo)); |
1347 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 650 | priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; |
1348 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 651 | priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
652 | priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | ||
1349 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 653 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
1350 | 654 | ||
1351 | IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n"); | 655 | IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n"); |
1352 | iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0); | 656 | iwl_send_add_sta(priv, |
657 | (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0); | ||
1353 | return 0; | 658 | return 0; |
1354 | } | 659 | } |
1355 | 660 | ||
1356 | static void iwl3945_clear_free_frames(struct iwl3945_priv *priv) | 661 | static void iwl3945_clear_free_frames(struct iwl_priv *priv) |
1357 | { | 662 | { |
1358 | struct list_head *element; | 663 | struct list_head *element; |
1359 | 664 | ||
@@ -1368,20 +673,20 @@ static void iwl3945_clear_free_frames(struct iwl3945_priv *priv) | |||
1368 | } | 673 | } |
1369 | 674 | ||
1370 | if (priv->frames_count) { | 675 | if (priv->frames_count) { |
1371 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | 676 | IWL_WARN(priv, "%d frames still in use. Did we lose one?\n", |
1372 | priv->frames_count); | 677 | priv->frames_count); |
1373 | priv->frames_count = 0; | 678 | priv->frames_count = 0; |
1374 | } | 679 | } |
1375 | } | 680 | } |
1376 | 681 | ||
1377 | static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv) | 682 | static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv) |
1378 | { | 683 | { |
1379 | struct iwl3945_frame *frame; | 684 | struct iwl3945_frame *frame; |
1380 | struct list_head *element; | 685 | struct list_head *element; |
1381 | if (list_empty(&priv->free_frames)) { | 686 | if (list_empty(&priv->free_frames)) { |
1382 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | 687 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); |
1383 | if (!frame) { | 688 | if (!frame) { |
1384 | IWL_ERROR("Could not allocate frame!\n"); | 689 | IWL_ERR(priv, "Could not allocate frame!\n"); |
1385 | return NULL; | 690 | return NULL; |
1386 | } | 691 | } |
1387 | 692 | ||
@@ -1394,13 +699,13 @@ static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv) | |||
1394 | return list_entry(element, struct iwl3945_frame, list); | 699 | return list_entry(element, struct iwl3945_frame, list); |
1395 | } | 700 | } |
1396 | 701 | ||
1397 | static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame) | 702 | static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame) |
1398 | { | 703 | { |
1399 | memset(frame, 0, sizeof(*frame)); | 704 | memset(frame, 0, sizeof(*frame)); |
1400 | list_add(&frame->list, &priv->free_frames); | 705 | list_add(&frame->list, &priv->free_frames); |
1401 | } | 706 | } |
1402 | 707 | ||
1403 | unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv, | 708 | unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv, |
1404 | struct ieee80211_hdr *hdr, | 709 | struct ieee80211_hdr *hdr, |
1405 | int left) | 710 | int left) |
1406 | { | 711 | { |
@@ -1418,13 +723,13 @@ unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv, | |||
1418 | return priv->ibss_beacon->len; | 723 | return priv->ibss_beacon->len; |
1419 | } | 724 | } |
1420 | 725 | ||
1421 | static u8 iwl3945_rate_get_lowest_plcp(struct iwl3945_priv *priv) | 726 | static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv) |
1422 | { | 727 | { |
1423 | u8 i; | 728 | u8 i; |
1424 | int rate_mask; | 729 | int rate_mask; |
1425 | 730 | ||
1426 | /* Set rate mask*/ | 731 | /* Set rate mask*/ |
1427 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | 732 | if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) |
1428 | rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK; | 733 | rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK; |
1429 | else | 734 | else |
1430 | rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK; | 735 | rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK; |
@@ -1436,13 +741,13 @@ static u8 iwl3945_rate_get_lowest_plcp(struct iwl3945_priv *priv) | |||
1436 | } | 741 | } |
1437 | 742 | ||
1438 | /* No valid rate was found. Assign the lowest one */ | 743 | /* No valid rate was found. Assign the lowest one */ |
1439 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | 744 | if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) |
1440 | return IWL_RATE_1M_PLCP; | 745 | return IWL_RATE_1M_PLCP; |
1441 | else | 746 | else |
1442 | return IWL_RATE_6M_PLCP; | 747 | return IWL_RATE_6M_PLCP; |
1443 | } | 748 | } |
1444 | 749 | ||
1445 | static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv) | 750 | static int iwl3945_send_beacon_cmd(struct iwl_priv *priv) |
1446 | { | 751 | { |
1447 | struct iwl3945_frame *frame; | 752 | struct iwl3945_frame *frame; |
1448 | unsigned int frame_size; | 753 | unsigned int frame_size; |
@@ -1452,7 +757,7 @@ static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv) | |||
1452 | frame = iwl3945_get_free_frame(priv); | 757 | frame = iwl3945_get_free_frame(priv); |
1453 | 758 | ||
1454 | if (!frame) { | 759 | if (!frame) { |
1455 | IWL_ERROR("Could not obtain free frame buffer for beacon " | 760 | IWL_ERR(priv, "Could not obtain free frame buffer for beacon " |
1456 | "command.\n"); | 761 | "command.\n"); |
1457 | return -ENOMEM; | 762 | return -ENOMEM; |
1458 | } | 763 | } |
@@ -1461,7 +766,7 @@ static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv) | |||
1461 | 766 | ||
1462 | frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate); | 767 | frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate); |
1463 | 768 | ||
1464 | rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, | 769 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
1465 | &frame->u.cmd[0]); | 770 | &frame->u.cmd[0]); |
1466 | 771 | ||
1467 | iwl3945_free_frame(priv, frame); | 772 | iwl3945_free_frame(priv, frame); |
@@ -1469,307 +774,27 @@ static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv) | |||
1469 | return rc; | 774 | return rc; |
1470 | } | 775 | } |
1471 | 776 | ||
1472 | /****************************************************************************** | 777 | static void iwl3945_unset_hw_params(struct iwl_priv *priv) |
1473 | * | ||
1474 | * EEPROM related functions | ||
1475 | * | ||
1476 | ******************************************************************************/ | ||
1477 | |||
1478 | static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac) | ||
1479 | { | ||
1480 | memcpy(mac, priv->eeprom.mac_address, 6); | ||
1481 | } | ||
1482 | |||
1483 | /* | ||
1484 | * Clear the OWNER_MSK, to establish driver (instead of uCode running on | ||
1485 | * embedded controller) as EEPROM reader; each read is a series of pulses | ||
1486 | * to/from the EEPROM chip, not a single event, so even reads could conflict | ||
1487 | * if they weren't arbitrated by some ownership mechanism. Here, the driver | ||
1488 | * simply claims ownership, which should be safe when this function is called | ||
1489 | * (i.e. before loading uCode!). | ||
1490 | */ | ||
1491 | static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv) | ||
1492 | { | 778 | { |
1493 | _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK); | 779 | if (priv->shared_virt) |
1494 | return 0; | ||
1495 | } | ||
1496 | |||
1497 | /** | ||
1498 | * iwl3945_eeprom_init - read EEPROM contents | ||
1499 | * | ||
1500 | * Load the EEPROM contents from adapter into priv->eeprom | ||
1501 | * | ||
1502 | * NOTE: This routine uses the non-debug IO access functions. | ||
1503 | */ | ||
1504 | int iwl3945_eeprom_init(struct iwl3945_priv *priv) | ||
1505 | { | ||
1506 | u16 *e = (u16 *)&priv->eeprom; | ||
1507 | u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP); | ||
1508 | int sz = sizeof(priv->eeprom); | ||
1509 | int ret; | ||
1510 | u16 addr; | ||
1511 | |||
1512 | /* The EEPROM structure has several padding buffers within it | ||
1513 | * and when adding new EEPROM maps is subject to programmer errors | ||
1514 | * which may be very difficult to identify without explicitly | ||
1515 | * checking the resulting size of the eeprom map. */ | ||
1516 | BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE); | ||
1517 | |||
1518 | if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) { | ||
1519 | IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp); | ||
1520 | return -ENOENT; | ||
1521 | } | ||
1522 | |||
1523 | /* Make sure driver (instead of uCode) is allowed to read EEPROM */ | ||
1524 | ret = iwl3945_eeprom_acquire_semaphore(priv); | ||
1525 | if (ret < 0) { | ||
1526 | IWL_ERROR("Failed to acquire EEPROM semaphore.\n"); | ||
1527 | return -ENOENT; | ||
1528 | } | ||
1529 | |||
1530 | /* eeprom is an array of 16bit values */ | ||
1531 | for (addr = 0; addr < sz; addr += sizeof(u16)) { | ||
1532 | u32 r; | ||
1533 | |||
1534 | _iwl3945_write32(priv, CSR_EEPROM_REG, | ||
1535 | CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); | ||
1536 | _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD); | ||
1537 | ret = iwl3945_poll_direct_bit(priv, CSR_EEPROM_REG, | ||
1538 | CSR_EEPROM_REG_READ_VALID_MSK, | ||
1539 | IWL_EEPROM_ACCESS_TIMEOUT); | ||
1540 | if (ret < 0) { | ||
1541 | IWL_ERROR("Time out reading EEPROM[%d]\n", addr); | ||
1542 | return ret; | ||
1543 | } | ||
1544 | |||
1545 | r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG); | ||
1546 | e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16)); | ||
1547 | } | ||
1548 | |||
1549 | return 0; | ||
1550 | } | ||
1551 | |||
1552 | static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv) | ||
1553 | { | ||
1554 | if (priv->hw_setting.shared_virt) | ||
1555 | pci_free_consistent(priv->pci_dev, | 780 | pci_free_consistent(priv->pci_dev, |
1556 | sizeof(struct iwl3945_shared), | 781 | sizeof(struct iwl3945_shared), |
1557 | priv->hw_setting.shared_virt, | 782 | priv->shared_virt, |
1558 | priv->hw_setting.shared_phys); | 783 | priv->shared_phys); |
1559 | } | ||
1560 | |||
1561 | /** | ||
1562 | * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field | ||
1563 | * | ||
1564 | * return : set the bit for each supported rate insert in ie | ||
1565 | */ | ||
1566 | static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate, | ||
1567 | u16 basic_rate, int *left) | ||
1568 | { | ||
1569 | u16 ret_rates = 0, bit; | ||
1570 | int i; | ||
1571 | u8 *cnt = ie; | ||
1572 | u8 *rates = ie + 1; | ||
1573 | |||
1574 | for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) { | ||
1575 | if (bit & supported_rate) { | ||
1576 | ret_rates |= bit; | ||
1577 | rates[*cnt] = iwl3945_rates[i].ieee | | ||
1578 | ((bit & basic_rate) ? 0x80 : 0x00); | ||
1579 | (*cnt)++; | ||
1580 | (*left)--; | ||
1581 | if ((*left <= 0) || | ||
1582 | (*cnt >= IWL_SUPPORTED_RATES_IE_LEN)) | ||
1583 | break; | ||
1584 | } | ||
1585 | } | ||
1586 | |||
1587 | return ret_rates; | ||
1588 | } | ||
1589 | |||
1590 | /** | ||
1591 | * iwl3945_fill_probe_req - fill in all required fields and IE for probe request | ||
1592 | */ | ||
1593 | static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv, | ||
1594 | struct ieee80211_mgmt *frame, | ||
1595 | int left) | ||
1596 | { | ||
1597 | int len = 0; | ||
1598 | u8 *pos = NULL; | ||
1599 | u16 active_rates, ret_rates, cck_rates; | ||
1600 | |||
1601 | /* Make sure there is enough space for the probe request, | ||
1602 | * two mandatory IEs and the data */ | ||
1603 | left -= 24; | ||
1604 | if (left < 0) | ||
1605 | return 0; | ||
1606 | len += 24; | ||
1607 | |||
1608 | frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ); | ||
1609 | memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN); | ||
1610 | memcpy(frame->sa, priv->mac_addr, ETH_ALEN); | ||
1611 | memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN); | ||
1612 | frame->seq_ctrl = 0; | ||
1613 | |||
1614 | /* fill in our indirect SSID IE */ | ||
1615 | /* ...next IE... */ | ||
1616 | |||
1617 | left -= 2; | ||
1618 | if (left < 0) | ||
1619 | return 0; | ||
1620 | len += 2; | ||
1621 | pos = &(frame->u.probe_req.variable[0]); | ||
1622 | *pos++ = WLAN_EID_SSID; | ||
1623 | *pos++ = 0; | ||
1624 | |||
1625 | /* fill in supported rate */ | ||
1626 | /* ...next IE... */ | ||
1627 | left -= 2; | ||
1628 | if (left < 0) | ||
1629 | return 0; | ||
1630 | |||
1631 | /* ... fill it in... */ | ||
1632 | *pos++ = WLAN_EID_SUPP_RATES; | ||
1633 | *pos = 0; | ||
1634 | |||
1635 | priv->active_rate = priv->rates_mask; | ||
1636 | active_rates = priv->active_rate; | ||
1637 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | ||
1638 | |||
1639 | cck_rates = IWL_CCK_RATES_MASK & active_rates; | ||
1640 | ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates, | ||
1641 | priv->active_rate_basic, &left); | ||
1642 | active_rates &= ~ret_rates; | ||
1643 | |||
1644 | ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates, | ||
1645 | priv->active_rate_basic, &left); | ||
1646 | active_rates &= ~ret_rates; | ||
1647 | |||
1648 | len += 2 + *pos; | ||
1649 | pos += (*pos) + 1; | ||
1650 | if (active_rates == 0) | ||
1651 | goto fill_end; | ||
1652 | |||
1653 | /* fill in supported extended rate */ | ||
1654 | /* ...next IE... */ | ||
1655 | left -= 2; | ||
1656 | if (left < 0) | ||
1657 | return 0; | ||
1658 | /* ... fill it in... */ | ||
1659 | *pos++ = WLAN_EID_EXT_SUPP_RATES; | ||
1660 | *pos = 0; | ||
1661 | iwl3945_supported_rate_to_ie(pos, active_rates, | ||
1662 | priv->active_rate_basic, &left); | ||
1663 | if (*pos > 0) | ||
1664 | len += 2 + *pos; | ||
1665 | |||
1666 | fill_end: | ||
1667 | return (u16)len; | ||
1668 | } | 784 | } |
1669 | 785 | ||
1670 | /* | 786 | /* |
1671 | * QoS support | 787 | * QoS support |
1672 | */ | 788 | */ |
1673 | static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv, | 789 | static int iwl3945_send_qos_params_command(struct iwl_priv *priv, |
1674 | struct iwl3945_qosparam_cmd *qos) | 790 | struct iwl_qosparam_cmd *qos) |
1675 | { | 791 | { |
1676 | 792 | ||
1677 | return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM, | 793 | return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM, |
1678 | sizeof(struct iwl3945_qosparam_cmd), qos); | 794 | sizeof(struct iwl_qosparam_cmd), qos); |
1679 | } | 795 | } |
1680 | 796 | ||
1681 | static void iwl3945_reset_qos(struct iwl3945_priv *priv) | 797 | static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force) |
1682 | { | ||
1683 | u16 cw_min = 15; | ||
1684 | u16 cw_max = 1023; | ||
1685 | u8 aifs = 2; | ||
1686 | u8 is_legacy = 0; | ||
1687 | unsigned long flags; | ||
1688 | int i; | ||
1689 | |||
1690 | spin_lock_irqsave(&priv->lock, flags); | ||
1691 | priv->qos_data.qos_active = 0; | ||
1692 | |||
1693 | /* QoS always active in AP and ADHOC mode | ||
1694 | * In STA mode wait for association | ||
1695 | */ | ||
1696 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC || | ||
1697 | priv->iw_mode == NL80211_IFTYPE_AP) | ||
1698 | priv->qos_data.qos_active = 1; | ||
1699 | else | ||
1700 | priv->qos_data.qos_active = 0; | ||
1701 | |||
1702 | |||
1703 | /* check for legacy mode */ | ||
1704 | if ((priv->iw_mode == NL80211_IFTYPE_ADHOC && | ||
1705 | (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) || | ||
1706 | (priv->iw_mode == NL80211_IFTYPE_STATION && | ||
1707 | (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) { | ||
1708 | cw_min = 31; | ||
1709 | is_legacy = 1; | ||
1710 | } | ||
1711 | |||
1712 | if (priv->qos_data.qos_active) | ||
1713 | aifs = 3; | ||
1714 | |||
1715 | priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min); | ||
1716 | priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max); | ||
1717 | priv->qos_data.def_qos_parm.ac[0].aifsn = aifs; | ||
1718 | priv->qos_data.def_qos_parm.ac[0].edca_txop = 0; | ||
1719 | priv->qos_data.def_qos_parm.ac[0].reserved1 = 0; | ||
1720 | |||
1721 | if (priv->qos_data.qos_active) { | ||
1722 | i = 1; | ||
1723 | priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min); | ||
1724 | priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max); | ||
1725 | priv->qos_data.def_qos_parm.ac[i].aifsn = 7; | ||
1726 | priv->qos_data.def_qos_parm.ac[i].edca_txop = 0; | ||
1727 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; | ||
1728 | |||
1729 | i = 2; | ||
1730 | priv->qos_data.def_qos_parm.ac[i].cw_min = | ||
1731 | cpu_to_le16((cw_min + 1) / 2 - 1); | ||
1732 | priv->qos_data.def_qos_parm.ac[i].cw_max = | ||
1733 | cpu_to_le16(cw_max); | ||
1734 | priv->qos_data.def_qos_parm.ac[i].aifsn = 2; | ||
1735 | if (is_legacy) | ||
1736 | priv->qos_data.def_qos_parm.ac[i].edca_txop = | ||
1737 | cpu_to_le16(6016); | ||
1738 | else | ||
1739 | priv->qos_data.def_qos_parm.ac[i].edca_txop = | ||
1740 | cpu_to_le16(3008); | ||
1741 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; | ||
1742 | |||
1743 | i = 3; | ||
1744 | priv->qos_data.def_qos_parm.ac[i].cw_min = | ||
1745 | cpu_to_le16((cw_min + 1) / 4 - 1); | ||
1746 | priv->qos_data.def_qos_parm.ac[i].cw_max = | ||
1747 | cpu_to_le16((cw_max + 1) / 2 - 1); | ||
1748 | priv->qos_data.def_qos_parm.ac[i].aifsn = 2; | ||
1749 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; | ||
1750 | if (is_legacy) | ||
1751 | priv->qos_data.def_qos_parm.ac[i].edca_txop = | ||
1752 | cpu_to_le16(3264); | ||
1753 | else | ||
1754 | priv->qos_data.def_qos_parm.ac[i].edca_txop = | ||
1755 | cpu_to_le16(1504); | ||
1756 | } else { | ||
1757 | for (i = 1; i < 4; i++) { | ||
1758 | priv->qos_data.def_qos_parm.ac[i].cw_min = | ||
1759 | cpu_to_le16(cw_min); | ||
1760 | priv->qos_data.def_qos_parm.ac[i].cw_max = | ||
1761 | cpu_to_le16(cw_max); | ||
1762 | priv->qos_data.def_qos_parm.ac[i].aifsn = aifs; | ||
1763 | priv->qos_data.def_qos_parm.ac[i].edca_txop = 0; | ||
1764 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; | ||
1765 | } | ||
1766 | } | ||
1767 | IWL_DEBUG_QOS("set QoS to default \n"); | ||
1768 | |||
1769 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1770 | } | ||
1771 | |||
1772 | static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force) | ||
1773 | { | 798 | { |
1774 | unsigned long flags; | 799 | unsigned long flags; |
1775 | 800 | ||
@@ -1804,56 +829,42 @@ static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force) | |||
1804 | */ | 829 | */ |
1805 | #define MSEC_TO_USEC 1024 | 830 | #define MSEC_TO_USEC 1024 |
1806 | 831 | ||
1807 | #define NOSLP __constant_cpu_to_le32(0) | ||
1808 | #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK | ||
1809 | #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC) | ||
1810 | #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \ | ||
1811 | __constant_cpu_to_le32(X1), \ | ||
1812 | __constant_cpu_to_le32(X2), \ | ||
1813 | __constant_cpu_to_le32(X3), \ | ||
1814 | __constant_cpu_to_le32(X4)} | ||
1815 | |||
1816 | 832 | ||
1817 | /* default power management (not Tx power) table values */ | 833 | /* default power management (not Tx power) table values */ |
1818 | /* for TIM 0-10 */ | 834 | /* for TIM 0-10 */ |
1819 | static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = { | 835 | static struct iwl_power_vec_entry range_0[IWL_POWER_MAX] = { |
1820 | {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, | 836 | {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, |
1821 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0}, | 837 | {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0}, |
1822 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0}, | 838 | {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0}, |
1823 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0}, | 839 | {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0}, |
1824 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1}, | 840 | {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1}, |
1825 | {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1} | 841 | {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1} |
1826 | }; | 842 | }; |
1827 | 843 | ||
1828 | /* for TIM > 10 */ | 844 | /* for TIM > 10 */ |
1829 | static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = { | 845 | static struct iwl_power_vec_entry range_1[IWL_POWER_MAX] = { |
1830 | {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, | 846 | {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, |
1831 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), | 847 | {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0}, |
1832 | SLP_VEC(1, 2, 3, 4, 0xFF)}, 0}, | 848 | {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0}, |
1833 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), | 849 | {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 0xFF)}, 0}, |
1834 | SLP_VEC(2, 4, 6, 7, 0xFF)}, 0}, | 850 | {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0}, |
1835 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), | 851 | {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0} |
1836 | SLP_VEC(2, 6, 9, 9, 0xFF)}, 0}, | ||
1837 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0}, | ||
1838 | {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), | ||
1839 | SLP_VEC(4, 7, 10, 10, 0xFF)}, 0} | ||
1840 | }; | 852 | }; |
1841 | 853 | ||
1842 | int iwl3945_power_init_handle(struct iwl3945_priv *priv) | 854 | int iwl3945_power_init_handle(struct iwl_priv *priv) |
1843 | { | 855 | { |
1844 | int rc = 0, i; | 856 | int rc = 0, i; |
1845 | struct iwl3945_power_mgr *pow_data; | 857 | struct iwl_power_mgr *pow_data; |
1846 | int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC; | 858 | int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX; |
1847 | u16 pci_pm; | 859 | u16 pci_pm; |
1848 | 860 | ||
1849 | IWL_DEBUG_POWER("Initialize power \n"); | 861 | IWL_DEBUG_POWER("Initialize power \n"); |
1850 | 862 | ||
1851 | pow_data = &(priv->power_data); | 863 | pow_data = &priv->power_data; |
1852 | 864 | ||
1853 | memset(pow_data, 0, sizeof(*pow_data)); | 865 | memset(pow_data, 0, sizeof(*pow_data)); |
1854 | 866 | ||
1855 | pow_data->active_index = IWL_POWER_RANGE_0; | 867 | pow_data->dtim_period = 1; |
1856 | pow_data->dtim_val = 0xffff; | ||
1857 | 868 | ||
1858 | memcpy(&pow_data->pwr_range_0[0], &range_0[0], size); | 869 | memcpy(&pow_data->pwr_range_0[0], &range_0[0], size); |
1859 | memcpy(&pow_data->pwr_range_1[0], &range_1[0], size); | 870 | memcpy(&pow_data->pwr_range_1[0], &range_1[0], size); |
@@ -1862,11 +873,11 @@ int iwl3945_power_init_handle(struct iwl3945_priv *priv) | |||
1862 | if (rc != 0) | 873 | if (rc != 0) |
1863 | return 0; | 874 | return 0; |
1864 | else { | 875 | else { |
1865 | struct iwl3945_powertable_cmd *cmd; | 876 | struct iwl_powertable_cmd *cmd; |
1866 | 877 | ||
1867 | IWL_DEBUG_POWER("adjust power command flags\n"); | 878 | IWL_DEBUG_POWER("adjust power command flags\n"); |
1868 | 879 | ||
1869 | for (i = 0; i < IWL_POWER_AC; i++) { | 880 | for (i = 0; i < IWL_POWER_MAX; i++) { |
1870 | cmd = &pow_data->pwr_range_0[i].cmd; | 881 | cmd = &pow_data->pwr_range_0[i].cmd; |
1871 | 882 | ||
1872 | if (pci_pm & 0x1) | 883 | if (pci_pm & 0x1) |
@@ -1878,56 +889,49 @@ int iwl3945_power_init_handle(struct iwl3945_priv *priv) | |||
1878 | return rc; | 889 | return rc; |
1879 | } | 890 | } |
1880 | 891 | ||
1881 | static int iwl3945_update_power_cmd(struct iwl3945_priv *priv, | 892 | static int iwl3945_update_power_cmd(struct iwl_priv *priv, |
1882 | struct iwl3945_powertable_cmd *cmd, u32 mode) | 893 | struct iwl_powertable_cmd *cmd, u32 mode) |
1883 | { | 894 | { |
1884 | int rc = 0, i; | 895 | struct iwl_power_mgr *pow_data; |
1885 | u8 skip; | 896 | struct iwl_power_vec_entry *range; |
1886 | u32 max_sleep = 0; | 897 | u32 max_sleep = 0; |
1887 | struct iwl3945_power_vec_entry *range; | 898 | int i; |
1888 | u8 period = 0; | 899 | u8 period = 0; |
1889 | struct iwl3945_power_mgr *pow_data; | 900 | bool skip; |
1890 | 901 | ||
1891 | if (mode > IWL_POWER_INDEX_5) { | 902 | if (mode > IWL_POWER_INDEX_5) { |
1892 | IWL_DEBUG_POWER("Error invalid power mode \n"); | 903 | IWL_DEBUG_POWER("Error invalid power mode \n"); |
1893 | return -1; | 904 | return -EINVAL; |
1894 | } | 905 | } |
1895 | pow_data = &(priv->power_data); | 906 | pow_data = &priv->power_data; |
1896 | 907 | ||
1897 | if (pow_data->active_index == IWL_POWER_RANGE_0) | 908 | if (pow_data->dtim_period < 10) |
1898 | range = &pow_data->pwr_range_0[0]; | 909 | range = &pow_data->pwr_range_0[0]; |
1899 | else | 910 | else |
1900 | range = &pow_data->pwr_range_1[1]; | 911 | range = &pow_data->pwr_range_1[1]; |
1901 | 912 | ||
1902 | memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd)); | 913 | memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd)); |
1903 | 914 | ||
1904 | #ifdef IWL_MAC80211_DISABLE | ||
1905 | if (priv->assoc_network != NULL) { | ||
1906 | unsigned long flags; | ||
1907 | |||
1908 | period = priv->assoc_network->tim.tim_period; | ||
1909 | } | ||
1910 | #endif /*IWL_MAC80211_DISABLE */ | ||
1911 | skip = range[mode].no_dtim; | ||
1912 | 915 | ||
1913 | if (period == 0) { | 916 | if (period == 0) { |
1914 | period = 1; | 917 | period = 1; |
1915 | skip = 0; | 918 | skip = false; |
919 | } else { | ||
920 | skip = !!range[mode].no_dtim; | ||
1916 | } | 921 | } |
1917 | 922 | ||
1918 | if (skip == 0) { | 923 | if (skip) { |
1919 | max_sleep = period; | ||
1920 | cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK; | ||
1921 | } else { | ||
1922 | __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]; | 924 | __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]; |
1923 | max_sleep = (le32_to_cpu(slp_itrvl) / period) * period; | 925 | max_sleep = (le32_to_cpu(slp_itrvl) / period) * period; |
1924 | cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK; | 926 | cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK; |
927 | } else { | ||
928 | max_sleep = period; | ||
929 | cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK; | ||
1925 | } | 930 | } |
1926 | 931 | ||
1927 | for (i = 0; i < IWL_POWER_VEC_SIZE; i++) { | 932 | for (i = 0; i < IWL_POWER_VEC_SIZE; i++) |
1928 | if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep) | 933 | if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep) |
1929 | cmd->sleep_interval[i] = cpu_to_le32(max_sleep); | 934 | cmd->sleep_interval[i] = cpu_to_le32(max_sleep); |
1930 | } | ||
1931 | 935 | ||
1932 | IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags); | 936 | IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags); |
1933 | IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout)); | 937 | IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout)); |
@@ -1939,23 +943,23 @@ static int iwl3945_update_power_cmd(struct iwl3945_priv *priv, | |||
1939 | le32_to_cpu(cmd->sleep_interval[3]), | 943 | le32_to_cpu(cmd->sleep_interval[3]), |
1940 | le32_to_cpu(cmd->sleep_interval[4])); | 944 | le32_to_cpu(cmd->sleep_interval[4])); |
1941 | 945 | ||
1942 | return rc; | 946 | return 0; |
1943 | } | 947 | } |
1944 | 948 | ||
1945 | static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode) | 949 | static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode) |
1946 | { | 950 | { |
1947 | u32 uninitialized_var(final_mode); | 951 | u32 uninitialized_var(final_mode); |
1948 | int rc; | 952 | int rc; |
1949 | struct iwl3945_powertable_cmd cmd; | 953 | struct iwl_powertable_cmd cmd; |
1950 | 954 | ||
1951 | /* If on battery, set to 3, | 955 | /* If on battery, set to 3, |
1952 | * if plugged into AC power, set to CAM ("continuously aware mode"), | 956 | * if plugged into AC power, set to CAM ("continuously aware mode"), |
1953 | * else user level */ | 957 | * else user level */ |
1954 | switch (mode) { | 958 | switch (mode) { |
1955 | case IWL_POWER_BATTERY: | 959 | case IWL39_POWER_BATTERY: |
1956 | final_mode = IWL_POWER_INDEX_3; | 960 | final_mode = IWL_POWER_INDEX_3; |
1957 | break; | 961 | break; |
1958 | case IWL_POWER_AC: | 962 | case IWL39_POWER_AC: |
1959 | final_mode = IWL_POWER_MODE_CAM; | 963 | final_mode = IWL_POWER_MODE_CAM; |
1960 | break; | 964 | break; |
1961 | default: | 965 | default: |
@@ -1965,7 +969,9 @@ static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode) | |||
1965 | 969 | ||
1966 | iwl3945_update_power_cmd(priv, &cmd, final_mode); | 970 | iwl3945_update_power_cmd(priv, &cmd, final_mode); |
1967 | 971 | ||
1968 | rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd); | 972 | /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */ |
973 | rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, | ||
974 | sizeof(struct iwl3945_powertable_cmd), &cmd); | ||
1969 | 975 | ||
1970 | if (final_mode == IWL_POWER_MODE_CAM) | 976 | if (final_mode == IWL_POWER_MODE_CAM) |
1971 | clear_bit(STATUS_POWER_PMI, &priv->status); | 977 | clear_bit(STATUS_POWER_PMI, &priv->status); |
@@ -1975,58 +981,6 @@ static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode) | |||
1975 | return rc; | 981 | return rc; |
1976 | } | 982 | } |
1977 | 983 | ||
1978 | /** | ||
1979 | * iwl3945_scan_cancel - Cancel any currently executing HW scan | ||
1980 | * | ||
1981 | * NOTE: priv->mutex is not required before calling this function | ||
1982 | */ | ||
1983 | static int iwl3945_scan_cancel(struct iwl3945_priv *priv) | ||
1984 | { | ||
1985 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | ||
1986 | clear_bit(STATUS_SCANNING, &priv->status); | ||
1987 | return 0; | ||
1988 | } | ||
1989 | |||
1990 | if (test_bit(STATUS_SCANNING, &priv->status)) { | ||
1991 | if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | ||
1992 | IWL_DEBUG_SCAN("Queuing scan abort.\n"); | ||
1993 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | ||
1994 | queue_work(priv->workqueue, &priv->abort_scan); | ||
1995 | |||
1996 | } else | ||
1997 | IWL_DEBUG_SCAN("Scan abort already in progress.\n"); | ||
1998 | |||
1999 | return test_bit(STATUS_SCANNING, &priv->status); | ||
2000 | } | ||
2001 | |||
2002 | return 0; | ||
2003 | } | ||
2004 | |||
2005 | /** | ||
2006 | * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan | ||
2007 | * @ms: amount of time to wait (in milliseconds) for scan to abort | ||
2008 | * | ||
2009 | * NOTE: priv->mutex must be held before calling this function | ||
2010 | */ | ||
2011 | static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms) | ||
2012 | { | ||
2013 | unsigned long now = jiffies; | ||
2014 | int ret; | ||
2015 | |||
2016 | ret = iwl3945_scan_cancel(priv); | ||
2017 | if (ret && ms) { | ||
2018 | mutex_unlock(&priv->mutex); | ||
2019 | while (!time_after(jiffies, now + msecs_to_jiffies(ms)) && | ||
2020 | test_bit(STATUS_SCANNING, &priv->status)) | ||
2021 | msleep(1); | ||
2022 | mutex_lock(&priv->mutex); | ||
2023 | |||
2024 | return test_bit(STATUS_SCANNING, &priv->status); | ||
2025 | } | ||
2026 | |||
2027 | return ret; | ||
2028 | } | ||
2029 | |||
2030 | #define MAX_UCODE_BEACON_INTERVAL 1024 | 984 | #define MAX_UCODE_BEACON_INTERVAL 1024 |
2031 | #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA) | 985 | #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA) |
2032 | 986 | ||
@@ -2043,7 +997,7 @@ static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val) | |||
2043 | return cpu_to_le16(new_val); | 997 | return cpu_to_le16(new_val); |
2044 | } | 998 | } |
2045 | 999 | ||
2046 | static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv) | 1000 | static void iwl3945_setup_rxon_timing(struct iwl_priv *priv) |
2047 | { | 1001 | { |
2048 | u64 interval_tm_unit; | 1002 | u64 interval_tm_unit; |
2049 | u64 tsf, result; | 1003 | u64 tsf, result; |
@@ -2054,13 +1008,10 @@ static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv) | |||
2054 | conf = ieee80211_get_hw_conf(priv->hw); | 1008 | conf = ieee80211_get_hw_conf(priv->hw); |
2055 | 1009 | ||
2056 | spin_lock_irqsave(&priv->lock, flags); | 1010 | spin_lock_irqsave(&priv->lock, flags); |
2057 | priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1); | 1011 | priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp); |
2058 | priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0); | ||
2059 | |||
2060 | priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL; | 1012 | priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL; |
2061 | 1013 | ||
2062 | tsf = priv->timestamp1; | 1014 | tsf = priv->timestamp; |
2063 | tsf = ((tsf << 32) | priv->timestamp0); | ||
2064 | 1015 | ||
2065 | beacon_int = priv->beacon_int; | 1016 | beacon_int = priv->beacon_int; |
2066 | spin_unlock_irqrestore(&priv->lock, flags); | 1017 | spin_unlock_irqrestore(&priv->lock, flags); |
@@ -2099,9 +1050,9 @@ static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv) | |||
2099 | le16_to_cpu(priv->rxon_timing.atim_window)); | 1050 | le16_to_cpu(priv->rxon_timing.atim_window)); |
2100 | } | 1051 | } |
2101 | 1052 | ||
2102 | static int iwl3945_scan_initiate(struct iwl3945_priv *priv) | 1053 | static int iwl3945_scan_initiate(struct iwl_priv *priv) |
2103 | { | 1054 | { |
2104 | if (!iwl3945_is_ready_rf(priv)) { | 1055 | if (!iwl_is_ready_rf(priv)) { |
2105 | IWL_DEBUG_SCAN("Aborting scan due to not ready.\n"); | 1056 | IWL_DEBUG_SCAN("Aborting scan due to not ready.\n"); |
2106 | return -EIO; | 1057 | return -EIO; |
2107 | } | 1058 | } |
@@ -2131,9 +1082,9 @@ static int iwl3945_scan_initiate(struct iwl3945_priv *priv) | |||
2131 | return 0; | 1082 | return 0; |
2132 | } | 1083 | } |
2133 | 1084 | ||
2134 | static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt) | 1085 | static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
2135 | { | 1086 | { |
2136 | struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon; | 1087 | struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon; |
2137 | 1088 | ||
2138 | if (hw_decrypt) | 1089 | if (hw_decrypt) |
2139 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | 1090 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; |
@@ -2143,64 +1094,64 @@ static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt) | |||
2143 | return 0; | 1094 | return 0; |
2144 | } | 1095 | } |
2145 | 1096 | ||
2146 | static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, | 1097 | static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv, |
2147 | enum ieee80211_band band) | 1098 | enum ieee80211_band band) |
2148 | { | 1099 | { |
2149 | if (band == IEEE80211_BAND_5GHZ) { | 1100 | if (band == IEEE80211_BAND_5GHZ) { |
2150 | priv->staging_rxon.flags &= | 1101 | priv->staging39_rxon.flags &= |
2151 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | 1102 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
2152 | | RXON_FLG_CCK_MSK); | 1103 | | RXON_FLG_CCK_MSK); |
2153 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | 1104 | priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; |
2154 | } else { | 1105 | } else { |
2155 | /* Copied from iwl3945_bg_post_associate() */ | 1106 | /* Copied from iwl3945_bg_post_associate() */ |
2156 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | 1107 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
2157 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | 1108 | priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; |
2158 | else | 1109 | else |
2159 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | 1110 | priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
2160 | 1111 | ||
2161 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) | 1112 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
2162 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | 1113 | priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
2163 | 1114 | ||
2164 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | 1115 | priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK; |
2165 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | 1116 | priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; |
2166 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | 1117 | priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK; |
2167 | } | 1118 | } |
2168 | } | 1119 | } |
2169 | 1120 | ||
2170 | /* | 1121 | /* |
2171 | * initialize rxon structure with default values from eeprom | 1122 | * initialize rxon structure with default values from eeprom |
2172 | */ | 1123 | */ |
2173 | static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv, | 1124 | static void iwl3945_connection_init_rx_config(struct iwl_priv *priv, |
2174 | int mode) | 1125 | int mode) |
2175 | { | 1126 | { |
2176 | const struct iwl3945_channel_info *ch_info; | 1127 | const struct iwl_channel_info *ch_info; |
2177 | 1128 | ||
2178 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | 1129 | memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon)); |
2179 | 1130 | ||
2180 | switch (mode) { | 1131 | switch (mode) { |
2181 | case NL80211_IFTYPE_AP: | 1132 | case NL80211_IFTYPE_AP: |
2182 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; | 1133 | priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP; |
2183 | break; | 1134 | break; |
2184 | 1135 | ||
2185 | case NL80211_IFTYPE_STATION: | 1136 | case NL80211_IFTYPE_STATION: |
2186 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; | 1137 | priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS; |
2187 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | 1138 | priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; |
2188 | break; | 1139 | break; |
2189 | 1140 | ||
2190 | case NL80211_IFTYPE_ADHOC: | 1141 | case NL80211_IFTYPE_ADHOC: |
2191 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; | 1142 | priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS; |
2192 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | 1143 | priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; |
2193 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | 1144 | priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | |
2194 | RXON_FILTER_ACCEPT_GRP_MSK; | 1145 | RXON_FILTER_ACCEPT_GRP_MSK; |
2195 | break; | 1146 | break; |
2196 | 1147 | ||
2197 | case NL80211_IFTYPE_MONITOR: | 1148 | case NL80211_IFTYPE_MONITOR: |
2198 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; | 1149 | priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; |
2199 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | 1150 | priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | |
2200 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | 1151 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; |
2201 | break; | 1152 | break; |
2202 | default: | 1153 | default: |
2203 | IWL_ERROR("Unsupported interface type %d\n", mode); | 1154 | IWL_ERR(priv, "Unsupported interface type %d\n", mode); |
2204 | break; | 1155 | break; |
2205 | } | 1156 | } |
2206 | 1157 | ||
@@ -2208,13 +1159,13 @@ static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv, | |||
2208 | /* TODO: Figure out when short_preamble would be set and cache from | 1159 | /* TODO: Figure out when short_preamble would be set and cache from |
2209 | * that */ | 1160 | * that */ |
2210 | if (!hw_to_local(priv->hw)->short_preamble) | 1161 | if (!hw_to_local(priv->hw)->short_preamble) |
2211 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | 1162 | priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; |
2212 | else | 1163 | else |
2213 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | 1164 | priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
2214 | #endif | 1165 | #endif |
2215 | 1166 | ||
2216 | ch_info = iwl3945_get_channel_info(priv, priv->band, | 1167 | ch_info = iwl_get_channel_info(priv, priv->band, |
2217 | le16_to_cpu(priv->active_rxon.channel)); | 1168 | le16_to_cpu(priv->active39_rxon.channel)); |
2218 | 1169 | ||
2219 | if (!ch_info) | 1170 | if (!ch_info) |
2220 | ch_info = &priv->channel_info[0]; | 1171 | ch_info = &priv->channel_info[0]; |
@@ -2226,7 +1177,7 @@ static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv, | |||
2226 | if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info))) | 1177 | if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info))) |
2227 | ch_info = &priv->channel_info[0]; | 1178 | ch_info = &priv->channel_info[0]; |
2228 | 1179 | ||
2229 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | 1180 | priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel); |
2230 | if (is_channel_a_band(ch_info)) | 1181 | if (is_channel_a_band(ch_info)) |
2231 | priv->band = IEEE80211_BAND_5GHZ; | 1182 | priv->band = IEEE80211_BAND_5GHZ; |
2232 | else | 1183 | else |
@@ -2234,40 +1185,40 @@ static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv, | |||
2234 | 1185 | ||
2235 | iwl3945_set_flags_for_phymode(priv, priv->band); | 1186 | iwl3945_set_flags_for_phymode(priv, priv->band); |
2236 | 1187 | ||
2237 | priv->staging_rxon.ofdm_basic_rates = | 1188 | priv->staging39_rxon.ofdm_basic_rates = |
2238 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | 1189 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; |
2239 | priv->staging_rxon.cck_basic_rates = | 1190 | priv->staging39_rxon.cck_basic_rates = |
2240 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | 1191 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; |
2241 | } | 1192 | } |
2242 | 1193 | ||
2243 | static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode) | 1194 | static int iwl3945_set_mode(struct iwl_priv *priv, int mode) |
2244 | { | 1195 | { |
2245 | if (mode == NL80211_IFTYPE_ADHOC) { | 1196 | if (mode == NL80211_IFTYPE_ADHOC) { |
2246 | const struct iwl3945_channel_info *ch_info; | 1197 | const struct iwl_channel_info *ch_info; |
2247 | 1198 | ||
2248 | ch_info = iwl3945_get_channel_info(priv, | 1199 | ch_info = iwl_get_channel_info(priv, |
2249 | priv->band, | 1200 | priv->band, |
2250 | le16_to_cpu(priv->staging_rxon.channel)); | 1201 | le16_to_cpu(priv->staging39_rxon.channel)); |
2251 | 1202 | ||
2252 | if (!ch_info || !is_channel_ibss(ch_info)) { | 1203 | if (!ch_info || !is_channel_ibss(ch_info)) { |
2253 | IWL_ERROR("channel %d not IBSS channel\n", | 1204 | IWL_ERR(priv, "channel %d not IBSS channel\n", |
2254 | le16_to_cpu(priv->staging_rxon.channel)); | 1205 | le16_to_cpu(priv->staging39_rxon.channel)); |
2255 | return -EINVAL; | 1206 | return -EINVAL; |
2256 | } | 1207 | } |
2257 | } | 1208 | } |
2258 | 1209 | ||
2259 | iwl3945_connection_init_rx_config(priv, mode); | 1210 | iwl3945_connection_init_rx_config(priv, mode); |
2260 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | 1211 | memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
2261 | 1212 | ||
2262 | iwl3945_clear_stations_table(priv); | 1213 | iwl3945_clear_stations_table(priv); |
2263 | 1214 | ||
2264 | /* don't commit rxon if rf-kill is on*/ | 1215 | /* don't commit rxon if rf-kill is on*/ |
2265 | if (!iwl3945_is_ready_rf(priv)) | 1216 | if (!iwl_is_ready_rf(priv)) |
2266 | return -EAGAIN; | 1217 | return -EAGAIN; |
2267 | 1218 | ||
2268 | cancel_delayed_work(&priv->scan_check); | 1219 | cancel_delayed_work(&priv->scan_check); |
2269 | if (iwl3945_scan_cancel_timeout(priv, 100)) { | 1220 | if (iwl_scan_cancel_timeout(priv, 100)) { |
2270 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); | 1221 | IWL_WARN(priv, "Aborted scan still in progress after 100ms\n"); |
2271 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | 1222 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); |
2272 | return -EAGAIN; | 1223 | return -EAGAIN; |
2273 | } | 1224 | } |
@@ -2277,49 +1228,50 @@ static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode) | |||
2277 | return 0; | 1228 | return 0; |
2278 | } | 1229 | } |
2279 | 1230 | ||
2280 | static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv, | 1231 | static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv, |
2281 | struct ieee80211_tx_info *info, | 1232 | struct ieee80211_tx_info *info, |
2282 | struct iwl3945_cmd *cmd, | 1233 | struct iwl_cmd *cmd, |
2283 | struct sk_buff *skb_frag, | 1234 | struct sk_buff *skb_frag, |
2284 | int last_frag) | 1235 | int last_frag) |
2285 | { | 1236 | { |
1237 | struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload; | ||
2286 | struct iwl3945_hw_key *keyinfo = | 1238 | struct iwl3945_hw_key *keyinfo = |
2287 | &priv->stations[info->control.hw_key->hw_key_idx].keyinfo; | 1239 | &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo; |
2288 | 1240 | ||
2289 | switch (keyinfo->alg) { | 1241 | switch (keyinfo->alg) { |
2290 | case ALG_CCMP: | 1242 | case ALG_CCMP: |
2291 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM; | 1243 | tx->sec_ctl = TX_CMD_SEC_CCM; |
2292 | memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen); | 1244 | memcpy(tx->key, keyinfo->key, keyinfo->keylen); |
2293 | IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n"); | 1245 | IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n"); |
2294 | break; | 1246 | break; |
2295 | 1247 | ||
2296 | case ALG_TKIP: | 1248 | case ALG_TKIP: |
2297 | #if 0 | 1249 | #if 0 |
2298 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP; | 1250 | tx->sec_ctl = TX_CMD_SEC_TKIP; |
2299 | 1251 | ||
2300 | if (last_frag) | 1252 | if (last_frag) |
2301 | memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8, | 1253 | memcpy(tx->tkip_mic.byte, skb_frag->tail - 8, |
2302 | 8); | 1254 | 8); |
2303 | else | 1255 | else |
2304 | memset(cmd->cmd.tx.tkip_mic.byte, 0, 8); | 1256 | memset(tx->tkip_mic.byte, 0, 8); |
2305 | #endif | 1257 | #endif |
2306 | break; | 1258 | break; |
2307 | 1259 | ||
2308 | case ALG_WEP: | 1260 | case ALG_WEP: |
2309 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP | | 1261 | tx->sec_ctl = TX_CMD_SEC_WEP | |
2310 | (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT; | 1262 | (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT; |
2311 | 1263 | ||
2312 | if (keyinfo->keylen == 13) | 1264 | if (keyinfo->keylen == 13) |
2313 | cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128; | 1265 | tx->sec_ctl |= TX_CMD_SEC_KEY128; |
2314 | 1266 | ||
2315 | memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen); | 1267 | memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen); |
2316 | 1268 | ||
2317 | IWL_DEBUG_TX("Configuring packet for WEP encryption " | 1269 | IWL_DEBUG_TX("Configuring packet for WEP encryption " |
2318 | "with key %d\n", info->control.hw_key->hw_key_idx); | 1270 | "with key %d\n", info->control.hw_key->hw_key_idx); |
2319 | break; | 1271 | break; |
2320 | 1272 | ||
2321 | default: | 1273 | default: |
2322 | printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg); | 1274 | IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg); |
2323 | break; | 1275 | break; |
2324 | } | 1276 | } |
2325 | } | 1277 | } |
@@ -2327,17 +1279,17 @@ static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv, | |||
2327 | /* | 1279 | /* |
2328 | * handle build REPLY_TX command notification. | 1280 | * handle build REPLY_TX command notification. |
2329 | */ | 1281 | */ |
2330 | static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv, | 1282 | static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv, |
2331 | struct iwl3945_cmd *cmd, | 1283 | struct iwl_cmd *cmd, |
2332 | struct ieee80211_tx_info *info, | 1284 | struct ieee80211_tx_info *info, |
2333 | struct ieee80211_hdr *hdr, | 1285 | struct ieee80211_hdr *hdr, u8 std_id) |
2334 | int is_unicast, u8 std_id) | ||
2335 | { | 1286 | { |
1287 | struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload; | ||
1288 | __le32 tx_flags = tx->tx_flags; | ||
2336 | __le16 fc = hdr->frame_control; | 1289 | __le16 fc = hdr->frame_control; |
2337 | __le32 tx_flags = cmd->cmd.tx.tx_flags; | ||
2338 | u8 rc_flags = info->control.rates[0].flags; | 1290 | u8 rc_flags = info->control.rates[0].flags; |
2339 | 1291 | ||
2340 | cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | 1292 | tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
2341 | if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { | 1293 | if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { |
2342 | tx_flags |= TX_CMD_FLG_ACK_MSK; | 1294 | tx_flags |= TX_CMD_FLG_ACK_MSK; |
2343 | if (ieee80211_is_mgmt(fc)) | 1295 | if (ieee80211_is_mgmt(fc)) |
@@ -2350,13 +1302,13 @@ static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv, | |||
2350 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | 1302 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; |
2351 | } | 1303 | } |
2352 | 1304 | ||
2353 | cmd->cmd.tx.sta_id = std_id; | 1305 | tx->sta_id = std_id; |
2354 | if (ieee80211_has_morefrags(fc)) | 1306 | if (ieee80211_has_morefrags(fc)) |
2355 | tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; | 1307 | tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; |
2356 | 1308 | ||
2357 | if (ieee80211_is_data_qos(fc)) { | 1309 | if (ieee80211_is_data_qos(fc)) { |
2358 | u8 *qc = ieee80211_get_qos_ctl(hdr); | 1310 | u8 *qc = ieee80211_get_qos_ctl(hdr); |
2359 | cmd->cmd.tx.tid_tspec = qc[0] & 0xf; | 1311 | tx->tid_tspec = qc[0] & 0xf; |
2360 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; | 1312 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; |
2361 | } else { | 1313 | } else { |
2362 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | 1314 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; |
@@ -2376,25 +1328,25 @@ static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv, | |||
2376 | tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); | 1328 | tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); |
2377 | if (ieee80211_is_mgmt(fc)) { | 1329 | if (ieee80211_is_mgmt(fc)) { |
2378 | if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc)) | 1330 | if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc)) |
2379 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3); | 1331 | tx->timeout.pm_frame_timeout = cpu_to_le16(3); |
2380 | else | 1332 | else |
2381 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2); | 1333 | tx->timeout.pm_frame_timeout = cpu_to_le16(2); |
2382 | } else { | 1334 | } else { |
2383 | cmd->cmd.tx.timeout.pm_frame_timeout = 0; | 1335 | tx->timeout.pm_frame_timeout = 0; |
2384 | #ifdef CONFIG_IWL3945_LEDS | 1336 | #ifdef CONFIG_IWL3945_LEDS |
2385 | priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len); | 1337 | priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len); |
2386 | #endif | 1338 | #endif |
2387 | } | 1339 | } |
2388 | 1340 | ||
2389 | cmd->cmd.tx.driver_txop = 0; | 1341 | tx->driver_txop = 0; |
2390 | cmd->cmd.tx.tx_flags = tx_flags; | 1342 | tx->tx_flags = tx_flags; |
2391 | cmd->cmd.tx.next_frame_len = 0; | 1343 | tx->next_frame_len = 0; |
2392 | } | 1344 | } |
2393 | 1345 | ||
2394 | /** | 1346 | /** |
2395 | * iwl3945_get_sta_id - Find station's index within station table | 1347 | * iwl3945_get_sta_id - Find station's index within station table |
2396 | */ | 1348 | */ |
2397 | static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr) | 1349 | static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr) |
2398 | { | 1350 | { |
2399 | int sta_id; | 1351 | int sta_id; |
2400 | u16 fc = le16_to_cpu(hdr->frame_control); | 1352 | u16 fc = le16_to_cpu(hdr->frame_control); |
@@ -2402,7 +1354,7 @@ static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *h | |||
2402 | /* If this frame is broadcast or management, use broadcast station id */ | 1354 | /* If this frame is broadcast or management, use broadcast station id */ |
2403 | if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) || | 1355 | if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) || |
2404 | is_multicast_ether_addr(hdr->addr1)) | 1356 | is_multicast_ether_addr(hdr->addr1)) |
2405 | return priv->hw_setting.bcast_sta_id; | 1357 | return priv->hw_params.bcast_sta_id; |
2406 | 1358 | ||
2407 | switch (priv->iw_mode) { | 1359 | switch (priv->iw_mode) { |
2408 | 1360 | ||
@@ -2416,7 +1368,7 @@ static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *h | |||
2416 | sta_id = iwl3945_hw_find_station(priv, hdr->addr1); | 1368 | sta_id = iwl3945_hw_find_station(priv, hdr->addr1); |
2417 | if (sta_id != IWL_INVALID_STATION) | 1369 | if (sta_id != IWL_INVALID_STATION) |
2418 | return sta_id; | 1370 | return sta_id; |
2419 | return priv->hw_setting.bcast_sta_id; | 1371 | return priv->hw_params.bcast_sta_id; |
2420 | 1372 | ||
2421 | /* If this frame is going out to an IBSS network, find the station, | 1373 | /* If this frame is going out to an IBSS network, find the station, |
2422 | * or create a new station table entry */ | 1374 | * or create a new station table entry */ |
@@ -2434,35 +1386,35 @@ static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *h | |||
2434 | IWL_DEBUG_DROP("Station %pM not in station map. " | 1386 | IWL_DEBUG_DROP("Station %pM not in station map. " |
2435 | "Defaulting to broadcast...\n", | 1387 | "Defaulting to broadcast...\n", |
2436 | hdr->addr1); | 1388 | hdr->addr1); |
2437 | iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr)); | 1389 | iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr)); |
2438 | return priv->hw_setting.bcast_sta_id; | 1390 | return priv->hw_params.bcast_sta_id; |
2439 | } | 1391 | } |
2440 | /* If we are in monitor mode, use BCAST. This is required for | 1392 | /* If we are in monitor mode, use BCAST. This is required for |
2441 | * packet injection. */ | 1393 | * packet injection. */ |
2442 | case NL80211_IFTYPE_MONITOR: | 1394 | case NL80211_IFTYPE_MONITOR: |
2443 | return priv->hw_setting.bcast_sta_id; | 1395 | return priv->hw_params.bcast_sta_id; |
2444 | 1396 | ||
2445 | default: | 1397 | default: |
2446 | IWL_WARNING("Unknown mode of operation: %d\n", priv->iw_mode); | 1398 | IWL_WARN(priv, "Unknown mode of operation: %d\n", |
2447 | return priv->hw_setting.bcast_sta_id; | 1399 | priv->iw_mode); |
1400 | return priv->hw_params.bcast_sta_id; | ||
2448 | } | 1401 | } |
2449 | } | 1402 | } |
2450 | 1403 | ||
2451 | /* | 1404 | /* |
2452 | * start REPLY_TX command process | 1405 | * start REPLY_TX command process |
2453 | */ | 1406 | */ |
2454 | static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb) | 1407 | static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) |
2455 | { | 1408 | { |
2456 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | 1409 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
2457 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 1410 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
2458 | struct iwl3945_tfd_frame *tfd; | 1411 | struct iwl3945_tx_cmd *tx; |
2459 | u32 *control_flags; | 1412 | struct iwl_tx_queue *txq = NULL; |
2460 | int txq_id = skb_get_queue_mapping(skb); | 1413 | struct iwl_queue *q = NULL; |
2461 | struct iwl3945_tx_queue *txq = NULL; | 1414 | struct iwl_cmd *out_cmd = NULL; |
2462 | struct iwl3945_queue *q = NULL; | ||
2463 | dma_addr_t phys_addr; | 1415 | dma_addr_t phys_addr; |
2464 | dma_addr_t txcmd_phys; | 1416 | dma_addr_t txcmd_phys; |
2465 | struct iwl3945_cmd *out_cmd = NULL; | 1417 | int txq_id = skb_get_queue_mapping(skb); |
2466 | u16 len, idx, len_org, hdr_len; | 1418 | u16 len, idx, len_org, hdr_len; |
2467 | u8 id; | 1419 | u8 id; |
2468 | u8 unicast; | 1420 | u8 unicast; |
@@ -2476,13 +1428,13 @@ static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb) | |||
2476 | int rc; | 1428 | int rc; |
2477 | 1429 | ||
2478 | spin_lock_irqsave(&priv->lock, flags); | 1430 | spin_lock_irqsave(&priv->lock, flags); |
2479 | if (iwl3945_is_rfkill(priv)) { | 1431 | if (iwl_is_rfkill(priv)) { |
2480 | IWL_DEBUG_DROP("Dropping - RF KILL\n"); | 1432 | IWL_DEBUG_DROP("Dropping - RF KILL\n"); |
2481 | goto drop_unlock; | 1433 | goto drop_unlock; |
2482 | } | 1434 | } |
2483 | 1435 | ||
2484 | if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) { | 1436 | if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) { |
2485 | IWL_ERROR("ERROR: No TX rate available.\n"); | 1437 | IWL_ERR(priv, "ERROR: No TX rate available.\n"); |
2486 | goto drop_unlock; | 1438 | goto drop_unlock; |
2487 | } | 1439 | } |
2488 | 1440 | ||
@@ -2491,7 +1443,7 @@ static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb) | |||
2491 | 1443 | ||
2492 | fc = hdr->frame_control; | 1444 | fc = hdr->frame_control; |
2493 | 1445 | ||
2494 | #ifdef CONFIG_IWL3945_DEBUG | 1446 | #ifdef CONFIG_IWLWIFI_DEBUG |
2495 | if (ieee80211_is_auth(fc)) | 1447 | if (ieee80211_is_auth(fc)) |
2496 | IWL_DEBUG_TX("Sending AUTH frame\n"); | 1448 | IWL_DEBUG_TX("Sending AUTH frame\n"); |
2497 | else if (ieee80211_is_assoc_req(fc)) | 1449 | else if (ieee80211_is_assoc_req(fc)) |
@@ -2526,7 +1478,7 @@ static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb) | |||
2526 | if (ieee80211_is_data_qos(fc)) { | 1478 | if (ieee80211_is_data_qos(fc)) { |
2527 | qc = ieee80211_get_qos_ctl(hdr); | 1479 | qc = ieee80211_get_qos_ctl(hdr); |
2528 | tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; | 1480 | tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; |
2529 | seq_number = priv->stations[sta_id].tid[tid].seq_number & | 1481 | seq_number = priv->stations_39[sta_id].tid[tid].seq_number & |
2530 | IEEE80211_SCTL_SEQ; | 1482 | IEEE80211_SCTL_SEQ; |
2531 | hdr->seq_ctrl = cpu_to_le16(seq_number) | | 1483 | hdr->seq_ctrl = cpu_to_le16(seq_number) | |
2532 | (hdr->seq_ctrl & | 1484 | (hdr->seq_ctrl & |
@@ -2540,20 +1492,17 @@ static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb) | |||
2540 | 1492 | ||
2541 | spin_lock_irqsave(&priv->lock, flags); | 1493 | spin_lock_irqsave(&priv->lock, flags); |
2542 | 1494 | ||
2543 | /* Set up first empty TFD within this queue's circular TFD buffer */ | ||
2544 | tfd = &txq->bd[q->write_ptr]; | ||
2545 | memset(tfd, 0, sizeof(*tfd)); | ||
2546 | control_flags = (u32 *) tfd; | ||
2547 | idx = get_cmd_index(q, q->write_ptr, 0); | 1495 | idx = get_cmd_index(q, q->write_ptr, 0); |
2548 | 1496 | ||
2549 | /* Set up driver data for this TFD */ | 1497 | /* Set up driver data for this TFD */ |
2550 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info)); | 1498 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info)); |
2551 | txq->txb[q->write_ptr].skb[0] = skb; | 1499 | txq->txb[q->write_ptr].skb[0] = skb; |
2552 | 1500 | ||
2553 | /* Init first empty entry in queue's array of Tx/cmd buffers */ | 1501 | /* Init first empty entry in queue's array of Tx/cmd buffers */ |
2554 | out_cmd = &txq->cmd[idx]; | 1502 | out_cmd = txq->cmd[idx]; |
1503 | tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload; | ||
2555 | memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); | 1504 | memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); |
2556 | memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx)); | 1505 | memset(tx, 0, sizeof(*tx)); |
2557 | 1506 | ||
2558 | /* | 1507 | /* |
2559 | * Set up the Tx-command (not MAC!) header. | 1508 | * Set up the Tx-command (not MAC!) header. |
@@ -2566,7 +1515,7 @@ static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb) | |||
2566 | INDEX_TO_SEQ(q->write_ptr))); | 1515 | INDEX_TO_SEQ(q->write_ptr))); |
2567 | 1516 | ||
2568 | /* Copy MAC header from skb into command buffer */ | 1517 | /* Copy MAC header from skb into command buffer */ |
2569 | memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len); | 1518 | memcpy(tx->hdr, hdr, hdr_len); |
2570 | 1519 | ||
2571 | /* | 1520 | /* |
2572 | * Use the first empty entry in this queue's command buffer array | 1521 | * Use the first empty entry in this queue's command buffer array |
@@ -2577,8 +1526,8 @@ static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb) | |||
2577 | * of the MAC header (device reads on dword boundaries). | 1526 | * of the MAC header (device reads on dword boundaries). |
2578 | * We'll tell device about this padding later. | 1527 | * We'll tell device about this padding later. |
2579 | */ | 1528 | */ |
2580 | len = priv->hw_setting.tx_cmd_len + | 1529 | len = sizeof(struct iwl3945_tx_cmd) + |
2581 | sizeof(struct iwl3945_cmd_header) + hdr_len; | 1530 | sizeof(struct iwl_cmd_header) + hdr_len; |
2582 | 1531 | ||
2583 | len_org = len; | 1532 | len_org = len; |
2584 | len = (len + 3) & ~3; | 1533 | len = (len + 3) & ~3; |
@@ -2590,12 +1539,19 @@ static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb) | |||
2590 | 1539 | ||
2591 | /* Physical address of this Tx command's header (not MAC header!), | 1540 | /* Physical address of this Tx command's header (not MAC header!), |
2592 | * within command buffer array. */ | 1541 | * within command buffer array. */ |
2593 | txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx + | 1542 | txcmd_phys = pci_map_single(priv->pci_dev, |
2594 | offsetof(struct iwl3945_cmd, hdr); | 1543 | out_cmd, sizeof(struct iwl_cmd), |
1544 | PCI_DMA_TODEVICE); | ||
1545 | pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys); | ||
1546 | pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd)); | ||
1547 | /* Add buffer containing Tx command and MAC(!) header to TFD's | ||
1548 | * first entry */ | ||
1549 | txcmd_phys += offsetof(struct iwl_cmd, hdr); | ||
2595 | 1550 | ||
2596 | /* Add buffer containing Tx command and MAC(!) header to TFD's | 1551 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
2597 | * first entry */ | 1552 | * first entry */ |
2598 | iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len); | 1553 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, |
1554 | txcmd_phys, len, 1, 0); | ||
2599 | 1555 | ||
2600 | if (info->control.hw_key) | 1556 | if (info->control.hw_key) |
2601 | iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0); | 1557 | iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0); |
@@ -2606,60 +1562,52 @@ static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb) | |||
2606 | if (len) { | 1562 | if (len) { |
2607 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, | 1563 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, |
2608 | len, PCI_DMA_TODEVICE); | 1564 | len, PCI_DMA_TODEVICE); |
2609 | iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len); | 1565 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, |
1566 | phys_addr, len, | ||
1567 | 0, U32_PAD(len)); | ||
2610 | } | 1568 | } |
2611 | 1569 | ||
2612 | if (!len) | ||
2613 | /* If there is no payload, then we use only one Tx buffer */ | ||
2614 | *control_flags = TFD_CTL_COUNT_SET(1); | ||
2615 | else | ||
2616 | /* Else use 2 buffers. | ||
2617 | * Tell 3945 about any padding after MAC header */ | ||
2618 | *control_flags = TFD_CTL_COUNT_SET(2) | | ||
2619 | TFD_CTL_PAD_SET(U32_PAD(len)); | ||
2620 | |||
2621 | /* Total # bytes to be transmitted */ | 1570 | /* Total # bytes to be transmitted */ |
2622 | len = (u16)skb->len; | 1571 | len = (u16)skb->len; |
2623 | out_cmd->cmd.tx.len = cpu_to_le16(len); | 1572 | tx->len = cpu_to_le16(len); |
2624 | 1573 | ||
2625 | /* TODO need this for burst mode later on */ | 1574 | /* TODO need this for burst mode later on */ |
2626 | iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id); | 1575 | iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id); |
2627 | 1576 | ||
2628 | /* set is_hcca to 0; it probably will never be implemented */ | 1577 | /* set is_hcca to 0; it probably will never be implemented */ |
2629 | iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0); | 1578 | iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0); |
2630 | 1579 | ||
2631 | out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK; | 1580 | tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK; |
2632 | out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK; | 1581 | tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK; |
2633 | 1582 | ||
2634 | if (!ieee80211_has_morefrags(hdr->frame_control)) { | 1583 | if (!ieee80211_has_morefrags(hdr->frame_control)) { |
2635 | txq->need_update = 1; | 1584 | txq->need_update = 1; |
2636 | if (qc) | 1585 | if (qc) |
2637 | priv->stations[sta_id].tid[tid].seq_number = seq_number; | 1586 | priv->stations_39[sta_id].tid[tid].seq_number = seq_number; |
2638 | } else { | 1587 | } else { |
2639 | wait_write_ptr = 1; | 1588 | wait_write_ptr = 1; |
2640 | txq->need_update = 0; | 1589 | txq->need_update = 0; |
2641 | } | 1590 | } |
2642 | 1591 | ||
2643 | iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload, | 1592 | iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx)); |
2644 | sizeof(out_cmd->cmd.tx)); | ||
2645 | 1593 | ||
2646 | iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr, | 1594 | iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr, |
2647 | ieee80211_hdrlen(fc)); | 1595 | ieee80211_hdrlen(fc)); |
2648 | 1596 | ||
2649 | /* Tell device the write index *just past* this latest filled TFD */ | 1597 | /* Tell device the write index *just past* this latest filled TFD */ |
2650 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); | 1598 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
2651 | rc = iwl3945_tx_queue_update_write_ptr(priv, txq); | 1599 | rc = iwl_txq_update_write_ptr(priv, txq); |
2652 | spin_unlock_irqrestore(&priv->lock, flags); | 1600 | spin_unlock_irqrestore(&priv->lock, flags); |
2653 | 1601 | ||
2654 | if (rc) | 1602 | if (rc) |
2655 | return rc; | 1603 | return rc; |
2656 | 1604 | ||
2657 | if ((iwl3945_queue_space(q) < q->high_mark) | 1605 | if ((iwl_queue_space(q) < q->high_mark) |
2658 | && priv->mac80211_registered) { | 1606 | && priv->mac80211_registered) { |
2659 | if (wait_write_ptr) { | 1607 | if (wait_write_ptr) { |
2660 | spin_lock_irqsave(&priv->lock, flags); | 1608 | spin_lock_irqsave(&priv->lock, flags); |
2661 | txq->need_update = 1; | 1609 | txq->need_update = 1; |
2662 | iwl3945_tx_queue_update_write_ptr(priv, txq); | 1610 | iwl_txq_update_write_ptr(priv, txq); |
2663 | spin_unlock_irqrestore(&priv->lock, flags); | 1611 | spin_unlock_irqrestore(&priv->lock, flags); |
2664 | } | 1612 | } |
2665 | 1613 | ||
@@ -2674,15 +1622,15 @@ drop: | |||
2674 | return -1; | 1622 | return -1; |
2675 | } | 1623 | } |
2676 | 1624 | ||
2677 | static void iwl3945_set_rate(struct iwl3945_priv *priv) | 1625 | static void iwl3945_set_rate(struct iwl_priv *priv) |
2678 | { | 1626 | { |
2679 | const struct ieee80211_supported_band *sband = NULL; | 1627 | const struct ieee80211_supported_band *sband = NULL; |
2680 | struct ieee80211_rate *rate; | 1628 | struct ieee80211_rate *rate; |
2681 | int i; | 1629 | int i; |
2682 | 1630 | ||
2683 | sband = iwl3945_get_band(priv, priv->band); | 1631 | sband = iwl_get_hw_mode(priv, priv->band); |
2684 | if (!sband) { | 1632 | if (!sband) { |
2685 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | 1633 | IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n"); |
2686 | return; | 1634 | return; |
2687 | } | 1635 | } |
2688 | 1636 | ||
@@ -2711,24 +1659,24 @@ static void iwl3945_set_rate(struct iwl3945_priv *priv) | |||
2711 | * OFDM | 1659 | * OFDM |
2712 | */ | 1660 | */ |
2713 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | 1661 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) |
2714 | priv->staging_rxon.cck_basic_rates = | 1662 | priv->staging39_rxon.cck_basic_rates = |
2715 | ((priv->active_rate_basic & | 1663 | ((priv->active_rate_basic & |
2716 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | 1664 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; |
2717 | else | 1665 | else |
2718 | priv->staging_rxon.cck_basic_rates = | 1666 | priv->staging39_rxon.cck_basic_rates = |
2719 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | 1667 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; |
2720 | 1668 | ||
2721 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | 1669 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) |
2722 | priv->staging_rxon.ofdm_basic_rates = | 1670 | priv->staging39_rxon.ofdm_basic_rates = |
2723 | ((priv->active_rate_basic & | 1671 | ((priv->active_rate_basic & |
2724 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | 1672 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> |
2725 | IWL_FIRST_OFDM_RATE) & 0xFF; | 1673 | IWL_FIRST_OFDM_RATE) & 0xFF; |
2726 | else | 1674 | else |
2727 | priv->staging_rxon.ofdm_basic_rates = | 1675 | priv->staging39_rxon.ofdm_basic_rates = |
2728 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | 1676 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; |
2729 | } | 1677 | } |
2730 | 1678 | ||
2731 | static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio) | 1679 | static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio) |
2732 | { | 1680 | { |
2733 | unsigned long flags; | 1681 | unsigned long flags; |
2734 | 1682 | ||
@@ -2739,21 +1687,21 @@ static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio) | |||
2739 | disable_radio ? "OFF" : "ON"); | 1687 | disable_radio ? "OFF" : "ON"); |
2740 | 1688 | ||
2741 | if (disable_radio) { | 1689 | if (disable_radio) { |
2742 | iwl3945_scan_cancel(priv); | 1690 | iwl_scan_cancel(priv); |
2743 | /* FIXME: This is a workaround for AP */ | 1691 | /* FIXME: This is a workaround for AP */ |
2744 | if (priv->iw_mode != NL80211_IFTYPE_AP) { | 1692 | if (priv->iw_mode != NL80211_IFTYPE_AP) { |
2745 | spin_lock_irqsave(&priv->lock, flags); | 1693 | spin_lock_irqsave(&priv->lock, flags); |
2746 | iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET, | 1694 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
2747 | CSR_UCODE_SW_BIT_RFKILL); | 1695 | CSR_UCODE_SW_BIT_RFKILL); |
2748 | spin_unlock_irqrestore(&priv->lock, flags); | 1696 | spin_unlock_irqrestore(&priv->lock, flags); |
2749 | iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0); | 1697 | iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0); |
2750 | set_bit(STATUS_RF_KILL_SW, &priv->status); | 1698 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
2751 | } | 1699 | } |
2752 | return; | 1700 | return; |
2753 | } | 1701 | } |
2754 | 1702 | ||
2755 | spin_lock_irqsave(&priv->lock, flags); | 1703 | spin_lock_irqsave(&priv->lock, flags); |
2756 | iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | 1704 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2757 | 1705 | ||
2758 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | 1706 | clear_bit(STATUS_RF_KILL_SW, &priv->status); |
2759 | spin_unlock_irqrestore(&priv->lock, flags); | 1707 | spin_unlock_irqrestore(&priv->lock, flags); |
@@ -2762,9 +1710,9 @@ static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio) | |||
2762 | msleep(10); | 1710 | msleep(10); |
2763 | 1711 | ||
2764 | spin_lock_irqsave(&priv->lock, flags); | 1712 | spin_lock_irqsave(&priv->lock, flags); |
2765 | iwl3945_read32(priv, CSR_UCODE_DRV_GP1); | 1713 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
2766 | if (!iwl3945_grab_nic_access(priv)) | 1714 | if (!iwl_grab_nic_access(priv)) |
2767 | iwl3945_release_nic_access(priv); | 1715 | iwl_release_nic_access(priv); |
2768 | spin_unlock_irqrestore(&priv->lock, flags); | 1716 | spin_unlock_irqrestore(&priv->lock, flags); |
2769 | 1717 | ||
2770 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { | 1718 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { |
@@ -2778,13 +1726,13 @@ static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio) | |||
2778 | return; | 1726 | return; |
2779 | } | 1727 | } |
2780 | 1728 | ||
2781 | void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb, | 1729 | void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb, |
2782 | u32 decrypt_res, struct ieee80211_rx_status *stats) | 1730 | u32 decrypt_res, struct ieee80211_rx_status *stats) |
2783 | { | 1731 | { |
2784 | u16 fc = | 1732 | u16 fc = |
2785 | le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control); | 1733 | le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control); |
2786 | 1734 | ||
2787 | if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK) | 1735 | if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK) |
2788 | return; | 1736 | return; |
2789 | 1737 | ||
2790 | if (!(fc & IEEE80211_FCTL_PROTECTED)) | 1738 | if (!(fc & IEEE80211_FCTL_PROTECTED)) |
@@ -2863,13 +1811,13 @@ static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) | |||
2863 | return cpu_to_le32(res); | 1811 | return cpu_to_le32(res); |
2864 | } | 1812 | } |
2865 | 1813 | ||
2866 | static int iwl3945_get_measurement(struct iwl3945_priv *priv, | 1814 | static int iwl3945_get_measurement(struct iwl_priv *priv, |
2867 | struct ieee80211_measurement_params *params, | 1815 | struct ieee80211_measurement_params *params, |
2868 | u8 type) | 1816 | u8 type) |
2869 | { | 1817 | { |
2870 | struct iwl3945_spectrum_cmd spectrum; | 1818 | struct iwl_spectrum_cmd spectrum; |
2871 | struct iwl3945_rx_packet *res; | 1819 | struct iwl_rx_packet *res; |
2872 | struct iwl3945_host_cmd cmd = { | 1820 | struct iwl_host_cmd cmd = { |
2873 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, | 1821 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
2874 | .data = (void *)&spectrum, | 1822 | .data = (void *)&spectrum, |
2875 | .meta.flags = CMD_WANT_SKB, | 1823 | .meta.flags = CMD_WANT_SKB, |
@@ -2905,17 +1853,17 @@ static int iwl3945_get_measurement(struct iwl3945_priv *priv, | |||
2905 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | 1853 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); |
2906 | spectrum.channels[0].channel = params->channel; | 1854 | spectrum.channels[0].channel = params->channel; |
2907 | spectrum.channels[0].type = type; | 1855 | spectrum.channels[0].type = type; |
2908 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | 1856 | if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK) |
2909 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | 1857 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | |
2910 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | 1858 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; |
2911 | 1859 | ||
2912 | rc = iwl3945_send_cmd_sync(priv, &cmd); | 1860 | rc = iwl_send_cmd_sync(priv, &cmd); |
2913 | if (rc) | 1861 | if (rc) |
2914 | return rc; | 1862 | return rc; |
2915 | 1863 | ||
2916 | res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data; | 1864 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
2917 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { | 1865 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
2918 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | 1866 | IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n"); |
2919 | rc = -EIO; | 1867 | rc = -EIO; |
2920 | } | 1868 | } |
2921 | 1869 | ||
@@ -2942,11 +1890,11 @@ static int iwl3945_get_measurement(struct iwl3945_priv *priv, | |||
2942 | } | 1890 | } |
2943 | #endif | 1891 | #endif |
2944 | 1892 | ||
2945 | static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv, | 1893 | static void iwl3945_rx_reply_alive(struct iwl_priv *priv, |
2946 | struct iwl3945_rx_mem_buffer *rxb) | 1894 | struct iwl_rx_mem_buffer *rxb) |
2947 | { | 1895 | { |
2948 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 1896 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
2949 | struct iwl3945_alive_resp *palive; | 1897 | struct iwl_alive_resp *palive; |
2950 | struct delayed_work *pwork; | 1898 | struct delayed_work *pwork; |
2951 | 1899 | ||
2952 | palive = &pkt->u.alive_frame; | 1900 | palive = &pkt->u.alive_frame; |
@@ -2958,14 +1906,13 @@ static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv, | |||
2958 | 1906 | ||
2959 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | 1907 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { |
2960 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | 1908 | IWL_DEBUG_INFO("Initialization Alive received.\n"); |
2961 | memcpy(&priv->card_alive_init, | 1909 | memcpy(&priv->card_alive_init, &pkt->u.alive_frame, |
2962 | &pkt->u.alive_frame, | 1910 | sizeof(struct iwl_alive_resp)); |
2963 | sizeof(struct iwl3945_init_alive_resp)); | ||
2964 | pwork = &priv->init_alive_start; | 1911 | pwork = &priv->init_alive_start; |
2965 | } else { | 1912 | } else { |
2966 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | 1913 | IWL_DEBUG_INFO("Runtime Alive received.\n"); |
2967 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | 1914 | memcpy(&priv->card_alive, &pkt->u.alive_frame, |
2968 | sizeof(struct iwl3945_alive_resp)); | 1915 | sizeof(struct iwl_alive_resp)); |
2969 | pwork = &priv->alive_start; | 1916 | pwork = &priv->alive_start; |
2970 | iwl3945_disable_events(priv); | 1917 | iwl3945_disable_events(priv); |
2971 | } | 1918 | } |
@@ -2976,24 +1923,26 @@ static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv, | |||
2976 | queue_delayed_work(priv->workqueue, pwork, | 1923 | queue_delayed_work(priv->workqueue, pwork, |
2977 | msecs_to_jiffies(5)); | 1924 | msecs_to_jiffies(5)); |
2978 | else | 1925 | else |
2979 | IWL_WARNING("uCode did not respond OK.\n"); | 1926 | IWL_WARN(priv, "uCode did not respond OK.\n"); |
2980 | } | 1927 | } |
2981 | 1928 | ||
2982 | static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv, | 1929 | static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv, |
2983 | struct iwl3945_rx_mem_buffer *rxb) | 1930 | struct iwl_rx_mem_buffer *rxb) |
2984 | { | 1931 | { |
2985 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 1932 | #ifdef CONFIG_IWLWIFI_DEBUG |
1933 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; | ||
1934 | #endif | ||
2986 | 1935 | ||
2987 | IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status); | 1936 | IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status); |
2988 | return; | 1937 | return; |
2989 | } | 1938 | } |
2990 | 1939 | ||
2991 | static void iwl3945_rx_reply_error(struct iwl3945_priv *priv, | 1940 | static void iwl3945_rx_reply_error(struct iwl_priv *priv, |
2992 | struct iwl3945_rx_mem_buffer *rxb) | 1941 | struct iwl_rx_mem_buffer *rxb) |
2993 | { | 1942 | { |
2994 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 1943 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
2995 | 1944 | ||
2996 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | 1945 | IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) " |
2997 | "seq 0x%04X ser 0x%08X\n", | 1946 | "seq 0x%04X ser 0x%08X\n", |
2998 | le32_to_cpu(pkt->u.err_resp.error_type), | 1947 | le32_to_cpu(pkt->u.err_resp.error_type), |
2999 | get_cmd_string(pkt->u.err_resp.cmd_id), | 1948 | get_cmd_string(pkt->u.err_resp.cmd_id), |
@@ -3004,23 +1953,23 @@ static void iwl3945_rx_reply_error(struct iwl3945_priv *priv, | |||
3004 | 1953 | ||
3005 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | 1954 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x |
3006 | 1955 | ||
3007 | static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb) | 1956 | static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
3008 | { | 1957 | { |
3009 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 1958 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
3010 | struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon; | 1959 | struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon; |
3011 | struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif); | 1960 | struct iwl_csa_notification *csa = &(pkt->u.csa_notif); |
3012 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", | 1961 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
3013 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | 1962 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); |
3014 | rxon->channel = csa->channel; | 1963 | rxon->channel = csa->channel; |
3015 | priv->staging_rxon.channel = csa->channel; | 1964 | priv->staging39_rxon.channel = csa->channel; |
3016 | } | 1965 | } |
3017 | 1966 | ||
3018 | static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv, | 1967 | static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv, |
3019 | struct iwl3945_rx_mem_buffer *rxb) | 1968 | struct iwl_rx_mem_buffer *rxb) |
3020 | { | 1969 | { |
3021 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT | 1970 | #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT |
3022 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 1971 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
3023 | struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif); | 1972 | struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif); |
3024 | 1973 | ||
3025 | if (!report->state) { | 1974 | if (!report->state) { |
3026 | IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO, | 1975 | IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO, |
@@ -3033,38 +1982,39 @@ static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv, | |||
3033 | #endif | 1982 | #endif |
3034 | } | 1983 | } |
3035 | 1984 | ||
3036 | static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv, | 1985 | static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv, |
3037 | struct iwl3945_rx_mem_buffer *rxb) | 1986 | struct iwl_rx_mem_buffer *rxb) |
3038 | { | 1987 | { |
3039 | #ifdef CONFIG_IWL3945_DEBUG | 1988 | #ifdef CONFIG_IWLWIFI_DEBUG |
3040 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 1989 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
3041 | struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif); | 1990 | struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif); |
3042 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", | 1991 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
3043 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | 1992 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); |
3044 | #endif | 1993 | #endif |
3045 | } | 1994 | } |
3046 | 1995 | ||
3047 | static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv, | 1996 | static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
3048 | struct iwl3945_rx_mem_buffer *rxb) | 1997 | struct iwl_rx_mem_buffer *rxb) |
3049 | { | 1998 | { |
3050 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 1999 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
3051 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " | 2000 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
3052 | "notification for %s:\n", | 2001 | "notification for %s:\n", |
3053 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | 2002 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); |
3054 | iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); | 2003 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, |
2004 | le32_to_cpu(pkt->len)); | ||
3055 | } | 2005 | } |
3056 | 2006 | ||
3057 | static void iwl3945_bg_beacon_update(struct work_struct *work) | 2007 | static void iwl3945_bg_beacon_update(struct work_struct *work) |
3058 | { | 2008 | { |
3059 | struct iwl3945_priv *priv = | 2009 | struct iwl_priv *priv = |
3060 | container_of(work, struct iwl3945_priv, beacon_update); | 2010 | container_of(work, struct iwl_priv, beacon_update); |
3061 | struct sk_buff *beacon; | 2011 | struct sk_buff *beacon; |
3062 | 2012 | ||
3063 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | 2013 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ |
3064 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); | 2014 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); |
3065 | 2015 | ||
3066 | if (!beacon) { | 2016 | if (!beacon) { |
3067 | IWL_ERROR("update beacon failed\n"); | 2017 | IWL_ERR(priv, "update beacon failed\n"); |
3068 | return; | 2018 | return; |
3069 | } | 2019 | } |
3070 | 2020 | ||
@@ -3079,11 +2029,11 @@ static void iwl3945_bg_beacon_update(struct work_struct *work) | |||
3079 | iwl3945_send_beacon_cmd(priv); | 2029 | iwl3945_send_beacon_cmd(priv); |
3080 | } | 2030 | } |
3081 | 2031 | ||
3082 | static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv, | 2032 | static void iwl3945_rx_beacon_notif(struct iwl_priv *priv, |
3083 | struct iwl3945_rx_mem_buffer *rxb) | 2033 | struct iwl_rx_mem_buffer *rxb) |
3084 | { | 2034 | { |
3085 | #ifdef CONFIG_IWL3945_DEBUG | 2035 | #ifdef CONFIG_IWLWIFI_DEBUG |
3086 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 2036 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
3087 | struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status); | 2037 | struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status); |
3088 | u8 rate = beacon->beacon_notify_hdr.rate; | 2038 | u8 rate = beacon->beacon_notify_hdr.rate; |
3089 | 2039 | ||
@@ -3102,25 +2052,25 @@ static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv, | |||
3102 | } | 2052 | } |
3103 | 2053 | ||
3104 | /* Service response to REPLY_SCAN_CMD (0x80) */ | 2054 | /* Service response to REPLY_SCAN_CMD (0x80) */ |
3105 | static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv, | 2055 | static void iwl3945_rx_reply_scan(struct iwl_priv *priv, |
3106 | struct iwl3945_rx_mem_buffer *rxb) | 2056 | struct iwl_rx_mem_buffer *rxb) |
3107 | { | 2057 | { |
3108 | #ifdef CONFIG_IWL3945_DEBUG | 2058 | #ifdef CONFIG_IWLWIFI_DEBUG |
3109 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 2059 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
3110 | struct iwl3945_scanreq_notification *notif = | 2060 | struct iwl_scanreq_notification *notif = |
3111 | (struct iwl3945_scanreq_notification *)pkt->u.raw; | 2061 | (struct iwl_scanreq_notification *)pkt->u.raw; |
3112 | 2062 | ||
3113 | IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status); | 2063 | IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status); |
3114 | #endif | 2064 | #endif |
3115 | } | 2065 | } |
3116 | 2066 | ||
3117 | /* Service SCAN_START_NOTIFICATION (0x82) */ | 2067 | /* Service SCAN_START_NOTIFICATION (0x82) */ |
3118 | static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv, | 2068 | static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv, |
3119 | struct iwl3945_rx_mem_buffer *rxb) | 2069 | struct iwl_rx_mem_buffer *rxb) |
3120 | { | 2070 | { |
3121 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 2071 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
3122 | struct iwl3945_scanstart_notification *notif = | 2072 | struct iwl_scanstart_notification *notif = |
3123 | (struct iwl3945_scanstart_notification *)pkt->u.raw; | 2073 | (struct iwl_scanstart_notification *)pkt->u.raw; |
3124 | priv->scan_start_tsf = le32_to_cpu(notif->tsf_low); | 2074 | priv->scan_start_tsf = le32_to_cpu(notif->tsf_low); |
3125 | IWL_DEBUG_SCAN("Scan start: " | 2075 | IWL_DEBUG_SCAN("Scan start: " |
3126 | "%d [802.11%s] " | 2076 | "%d [802.11%s] " |
@@ -3132,12 +2082,14 @@ static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv, | |||
3132 | } | 2082 | } |
3133 | 2083 | ||
3134 | /* Service SCAN_RESULTS_NOTIFICATION (0x83) */ | 2084 | /* Service SCAN_RESULTS_NOTIFICATION (0x83) */ |
3135 | static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv, | 2085 | static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv, |
3136 | struct iwl3945_rx_mem_buffer *rxb) | 2086 | struct iwl_rx_mem_buffer *rxb) |
3137 | { | 2087 | { |
3138 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 2088 | #ifdef CONFIG_IWLWIFI_DEBUG |
3139 | struct iwl3945_scanresults_notification *notif = | 2089 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
3140 | (struct iwl3945_scanresults_notification *)pkt->u.raw; | 2090 | struct iwl_scanresults_notification *notif = |
2091 | (struct iwl_scanresults_notification *)pkt->u.raw; | ||
2092 | #endif | ||
3141 | 2093 | ||
3142 | IWL_DEBUG_SCAN("Scan ch.res: " | 2094 | IWL_DEBUG_SCAN("Scan ch.res: " |
3143 | "%d [802.11%s] " | 2095 | "%d [802.11%s] " |
@@ -3157,11 +2109,13 @@ static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv, | |||
3157 | } | 2109 | } |
3158 | 2110 | ||
3159 | /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */ | 2111 | /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */ |
3160 | static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv, | 2112 | static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv, |
3161 | struct iwl3945_rx_mem_buffer *rxb) | 2113 | struct iwl_rx_mem_buffer *rxb) |
3162 | { | 2114 | { |
3163 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 2115 | #ifdef CONFIG_IWLWIFI_DEBUG |
3164 | struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw; | 2116 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
2117 | struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw; | ||
2118 | #endif | ||
3165 | 2119 | ||
3166 | IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n", | 2120 | IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n", |
3167 | scan_notif->scanned_channels, | 2121 | scan_notif->scanned_channels, |
@@ -3220,10 +2174,10 @@ reschedule: | |||
3220 | 2174 | ||
3221 | /* Handle notification from uCode that card's power state is changing | 2175 | /* Handle notification from uCode that card's power state is changing |
3222 | * due to software, hardware, or critical temperature RFKILL */ | 2176 | * due to software, hardware, or critical temperature RFKILL */ |
3223 | static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv, | 2177 | static void iwl3945_rx_card_state_notif(struct iwl_priv *priv, |
3224 | struct iwl3945_rx_mem_buffer *rxb) | 2178 | struct iwl_rx_mem_buffer *rxb) |
3225 | { | 2179 | { |
3226 | struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data; | 2180 | struct iwl_rx_packet *pkt = (void *)rxb->skb->data; |
3227 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); | 2181 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
3228 | unsigned long status = priv->status; | 2182 | unsigned long status = priv->status; |
3229 | 2183 | ||
@@ -3231,7 +2185,7 @@ static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv, | |||
3231 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | 2185 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", |
3232 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | 2186 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); |
3233 | 2187 | ||
3234 | iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET, | 2188 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
3235 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); | 2189 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3236 | 2190 | ||
3237 | if (flags & HW_CARD_DISABLED) | 2191 | if (flags & HW_CARD_DISABLED) |
@@ -3245,7 +2199,7 @@ static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv, | |||
3245 | else | 2199 | else |
3246 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | 2200 | clear_bit(STATUS_RF_KILL_SW, &priv->status); |
3247 | 2201 | ||
3248 | iwl3945_scan_cancel(priv); | 2202 | iwl_scan_cancel(priv); |
3249 | 2203 | ||
3250 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | 2204 | if ((test_bit(STATUS_RF_KILL_HW, &status) != |
3251 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | 2205 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || |
@@ -3265,7 +2219,7 @@ static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv, | |||
3265 | * This function chains into the hardware specific files for them to setup | 2219 | * This function chains into the hardware specific files for them to setup |
3266 | * any hardware specific handlers as well. | 2220 | * any hardware specific handlers as well. |
3267 | */ | 2221 | */ |
3268 | static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv) | 2222 | static void iwl3945_setup_rx_handlers(struct iwl_priv *priv) |
3269 | { | 2223 | { |
3270 | priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive; | 2224 | priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive; |
3271 | priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta; | 2225 | priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta; |
@@ -3303,15 +2257,15 @@ static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv) | |||
3303 | * When FW advances 'R' index, all entries between old and new 'R' index | 2257 | * When FW advances 'R' index, all entries between old and new 'R' index |
3304 | * need to be reclaimed. | 2258 | * need to be reclaimed. |
3305 | */ | 2259 | */ |
3306 | static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv, | 2260 | static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv, |
3307 | int txq_id, int index) | 2261 | int txq_id, int index) |
3308 | { | 2262 | { |
3309 | struct iwl3945_tx_queue *txq = &priv->txq[txq_id]; | 2263 | struct iwl_tx_queue *txq = &priv->txq[txq_id]; |
3310 | struct iwl3945_queue *q = &txq->q; | 2264 | struct iwl_queue *q = &txq->q; |
3311 | int nfreed = 0; | 2265 | int nfreed = 0; |
3312 | 2266 | ||
3313 | if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) { | 2267 | if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) { |
3314 | IWL_ERROR("Read index for DMA queue txq id (%d), index %d, " | 2268 | IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, " |
3315 | "is out of range [0-%d] %d %d.\n", txq_id, | 2269 | "is out of range [0-%d] %d %d.\n", txq_id, |
3316 | index, q->n_bd, q->write_ptr, q->read_ptr); | 2270 | index, q->n_bd, q->write_ptr, q->read_ptr); |
3317 | return; | 2271 | return; |
@@ -3320,7 +2274,7 @@ static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv, | |||
3320 | for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index; | 2274 | for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index; |
3321 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { | 2275 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
3322 | if (nfreed > 1) { | 2276 | if (nfreed > 1) { |
3323 | IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index, | 2277 | IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index, |
3324 | q->write_ptr, q->read_ptr); | 2278 | q->write_ptr, q->read_ptr); |
3325 | queue_work(priv->workqueue, &priv->restart); | 2279 | queue_work(priv->workqueue, &priv->restart); |
3326 | break; | 2280 | break; |
@@ -3338,21 +2292,28 @@ static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv, | |||
3338 | * will be executed. The attached skb (if present) will only be freed | 2292 | * will be executed. The attached skb (if present) will only be freed |
3339 | * if the callback returns 1 | 2293 | * if the callback returns 1 |
3340 | */ | 2294 | */ |
3341 | static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv, | 2295 | static void iwl3945_tx_cmd_complete(struct iwl_priv *priv, |
3342 | struct iwl3945_rx_mem_buffer *rxb) | 2296 | struct iwl_rx_mem_buffer *rxb) |
3343 | { | 2297 | { |
3344 | struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data; | 2298 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
3345 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); | 2299 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
3346 | int txq_id = SEQ_TO_QUEUE(sequence); | 2300 | int txq_id = SEQ_TO_QUEUE(sequence); |
3347 | int index = SEQ_TO_INDEX(sequence); | 2301 | int index = SEQ_TO_INDEX(sequence); |
3348 | int huge = sequence & SEQ_HUGE_FRAME; | 2302 | int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME); |
3349 | int cmd_index; | 2303 | int cmd_index; |
3350 | struct iwl3945_cmd *cmd; | 2304 | struct iwl_cmd *cmd; |
3351 | 2305 | ||
3352 | BUG_ON(txq_id != IWL_CMD_QUEUE_NUM); | 2306 | if (WARN(txq_id != IWL_CMD_QUEUE_NUM, |
2307 | "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n", | ||
2308 | txq_id, sequence, | ||
2309 | priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr, | ||
2310 | priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) { | ||
2311 | iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32); | ||
2312 | return; | ||
2313 | } | ||
3353 | 2314 | ||
3354 | cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge); | 2315 | cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge); |
3355 | cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index]; | 2316 | cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index]; |
3356 | 2317 | ||
3357 | /* Input error checking is done when commands are added to queue. */ | 2318 | /* Input error checking is done when commands are added to queue. */ |
3358 | if (cmd->meta.flags & CMD_WANT_SKB) { | 2319 | if (cmd->meta.flags & CMD_WANT_SKB) { |
@@ -3417,7 +2378,6 @@ static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv, | |||
3417 | * | 2378 | * |
3418 | * Driver sequence: | 2379 | * Driver sequence: |
3419 | * | 2380 | * |
3420 | * iwl3945_rx_queue_alloc() Allocates rx_free | ||
3421 | * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls | 2381 | * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls |
3422 | * iwl3945_rx_queue_restock | 2382 | * iwl3945_rx_queue_restock |
3423 | * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx | 2383 | * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx |
@@ -3426,7 +2386,7 @@ static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv, | |||
3426 | * are available, schedules iwl3945_rx_replenish | 2386 | * are available, schedules iwl3945_rx_replenish |
3427 | * | 2387 | * |
3428 | * -- enable interrupts -- | 2388 | * -- enable interrupts -- |
3429 | * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the | 2389 | * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the |
3430 | * READ INDEX, detaching the SKB from the pool. | 2390 | * READ INDEX, detaching the SKB from the pool. |
3431 | * Moves the packet buffer from queue to rx_used. | 2391 | * Moves the packet buffer from queue to rx_used. |
3432 | * Calls iwl3945_rx_queue_restock to refill any empty | 2392 | * Calls iwl3945_rx_queue_restock to refill any empty |
@@ -3436,70 +2396,9 @@ static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv, | |||
3436 | */ | 2396 | */ |
3437 | 2397 | ||
3438 | /** | 2398 | /** |
3439 | * iwl3945_rx_queue_space - Return number of free slots available in queue. | ||
3440 | */ | ||
3441 | static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q) | ||
3442 | { | ||
3443 | int s = q->read - q->write; | ||
3444 | if (s <= 0) | ||
3445 | s += RX_QUEUE_SIZE; | ||
3446 | /* keep some buffer to not confuse full and empty queue */ | ||
3447 | s -= 2; | ||
3448 | if (s < 0) | ||
3449 | s = 0; | ||
3450 | return s; | ||
3451 | } | ||
3452 | |||
3453 | /** | ||
3454 | * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue | ||
3455 | */ | ||
3456 | int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q) | ||
3457 | { | ||
3458 | u32 reg = 0; | ||
3459 | int rc = 0; | ||
3460 | unsigned long flags; | ||
3461 | |||
3462 | spin_lock_irqsave(&q->lock, flags); | ||
3463 | |||
3464 | if (q->need_update == 0) | ||
3465 | goto exit_unlock; | ||
3466 | |||
3467 | /* If power-saving is in use, make sure device is awake */ | ||
3468 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { | ||
3469 | reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1); | ||
3470 | |||
3471 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | ||
3472 | iwl3945_set_bit(priv, CSR_GP_CNTRL, | ||
3473 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
3474 | goto exit_unlock; | ||
3475 | } | ||
3476 | |||
3477 | rc = iwl3945_grab_nic_access(priv); | ||
3478 | if (rc) | ||
3479 | goto exit_unlock; | ||
3480 | |||
3481 | /* Device expects a multiple of 8 */ | ||
3482 | iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR, | ||
3483 | q->write & ~0x7); | ||
3484 | iwl3945_release_nic_access(priv); | ||
3485 | |||
3486 | /* Else device is assumed to be awake */ | ||
3487 | } else | ||
3488 | /* Device expects a multiple of 8 */ | ||
3489 | iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7); | ||
3490 | |||
3491 | |||
3492 | q->need_update = 0; | ||
3493 | |||
3494 | exit_unlock: | ||
3495 | spin_unlock_irqrestore(&q->lock, flags); | ||
3496 | return rc; | ||
3497 | } | ||
3498 | |||
3499 | /** | ||
3500 | * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr | 2399 | * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr |
3501 | */ | 2400 | */ |
3502 | static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv, | 2401 | static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv, |
3503 | dma_addr_t dma_addr) | 2402 | dma_addr_t dma_addr) |
3504 | { | 2403 | { |
3505 | return cpu_to_le32((u32)dma_addr); | 2404 | return cpu_to_le32((u32)dma_addr); |
@@ -3516,24 +2415,24 @@ static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv, | |||
3516 | * also updates the memory address in the firmware to reference the new | 2415 | * also updates the memory address in the firmware to reference the new |
3517 | * target buffer. | 2416 | * target buffer. |
3518 | */ | 2417 | */ |
3519 | static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv) | 2418 | static int iwl3945_rx_queue_restock(struct iwl_priv *priv) |
3520 | { | 2419 | { |
3521 | struct iwl3945_rx_queue *rxq = &priv->rxq; | 2420 | struct iwl_rx_queue *rxq = &priv->rxq; |
3522 | struct list_head *element; | 2421 | struct list_head *element; |
3523 | struct iwl3945_rx_mem_buffer *rxb; | 2422 | struct iwl_rx_mem_buffer *rxb; |
3524 | unsigned long flags; | 2423 | unsigned long flags; |
3525 | int write, rc; | 2424 | int write, rc; |
3526 | 2425 | ||
3527 | spin_lock_irqsave(&rxq->lock, flags); | 2426 | spin_lock_irqsave(&rxq->lock, flags); |
3528 | write = rxq->write & ~0x7; | 2427 | write = rxq->write & ~0x7; |
3529 | while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) { | 2428 | while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) { |
3530 | /* Get next free Rx buffer, remove from free list */ | 2429 | /* Get next free Rx buffer, remove from free list */ |
3531 | element = rxq->rx_free.next; | 2430 | element = rxq->rx_free.next; |
3532 | rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list); | 2431 | rxb = list_entry(element, struct iwl_rx_mem_buffer, list); |
3533 | list_del(element); | 2432 | list_del(element); |
3534 | 2433 | ||
3535 | /* Point to Rx buffer via next RBD in circular buffer */ | 2434 | /* Point to Rx buffer via next RBD in circular buffer */ |
3536 | rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr); | 2435 | rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr); |
3537 | rxq->queue[rxq->write] = rxb; | 2436 | rxq->queue[rxq->write] = rxb; |
3538 | rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; | 2437 | rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; |
3539 | rxq->free_count--; | 2438 | rxq->free_count--; |
@@ -3552,7 +2451,7 @@ static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv) | |||
3552 | spin_lock_irqsave(&rxq->lock, flags); | 2451 | spin_lock_irqsave(&rxq->lock, flags); |
3553 | rxq->need_update = 1; | 2452 | rxq->need_update = 1; |
3554 | spin_unlock_irqrestore(&rxq->lock, flags); | 2453 | spin_unlock_irqrestore(&rxq->lock, flags); |
3555 | rc = iwl3945_rx_queue_update_write_ptr(priv, rxq); | 2454 | rc = iwl_rx_queue_update_write_ptr(priv, rxq); |
3556 | if (rc) | 2455 | if (rc) |
3557 | return rc; | 2456 | return rc; |
3558 | } | 2457 | } |
@@ -3568,24 +2467,24 @@ static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv) | |||
3568 | * Also restock the Rx queue via iwl3945_rx_queue_restock. | 2467 | * Also restock the Rx queue via iwl3945_rx_queue_restock. |
3569 | * This is called as a scheduled work item (except for during initialization) | 2468 | * This is called as a scheduled work item (except for during initialization) |
3570 | */ | 2469 | */ |
3571 | static void iwl3945_rx_allocate(struct iwl3945_priv *priv) | 2470 | static void iwl3945_rx_allocate(struct iwl_priv *priv) |
3572 | { | 2471 | { |
3573 | struct iwl3945_rx_queue *rxq = &priv->rxq; | 2472 | struct iwl_rx_queue *rxq = &priv->rxq; |
3574 | struct list_head *element; | 2473 | struct list_head *element; |
3575 | struct iwl3945_rx_mem_buffer *rxb; | 2474 | struct iwl_rx_mem_buffer *rxb; |
3576 | unsigned long flags; | 2475 | unsigned long flags; |
3577 | spin_lock_irqsave(&rxq->lock, flags); | 2476 | spin_lock_irqsave(&rxq->lock, flags); |
3578 | while (!list_empty(&rxq->rx_used)) { | 2477 | while (!list_empty(&rxq->rx_used)) { |
3579 | element = rxq->rx_used.next; | 2478 | element = rxq->rx_used.next; |
3580 | rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list); | 2479 | rxb = list_entry(element, struct iwl_rx_mem_buffer, list); |
3581 | 2480 | ||
3582 | /* Alloc a new receive buffer */ | 2481 | /* Alloc a new receive buffer */ |
3583 | rxb->skb = | 2482 | rxb->skb = |
3584 | alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC); | 2483 | alloc_skb(priv->hw_params.rx_buf_size, |
2484 | __GFP_NOWARN | GFP_ATOMIC); | ||
3585 | if (!rxb->skb) { | 2485 | if (!rxb->skb) { |
3586 | if (net_ratelimit()) | 2486 | if (net_ratelimit()) |
3587 | printk(KERN_CRIT DRV_NAME | 2487 | IWL_CRIT(priv, ": Can not allocate SKB buffers\n"); |
3588 | ": Can not allocate SKB buffers\n"); | ||
3589 | /* We don't reschedule replenish work here -- we will | 2488 | /* We don't reschedule replenish work here -- we will |
3590 | * call the restock method and if it still needs | 2489 | * call the restock method and if it still needs |
3591 | * more buffers it will schedule replenish */ | 2490 | * more buffers it will schedule replenish */ |
@@ -3604,9 +2503,10 @@ static void iwl3945_rx_allocate(struct iwl3945_priv *priv) | |||
3604 | list_del(element); | 2503 | list_del(element); |
3605 | 2504 | ||
3606 | /* Get physical address of RB/SKB */ | 2505 | /* Get physical address of RB/SKB */ |
3607 | rxb->dma_addr = | 2506 | rxb->real_dma_addr = pci_map_single(priv->pci_dev, |
3608 | pci_map_single(priv->pci_dev, rxb->skb->data, | 2507 | rxb->skb->data, |
3609 | IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | 2508 | priv->hw_params.rx_buf_size, |
2509 | PCI_DMA_FROMDEVICE); | ||
3610 | list_add_tail(&rxb->list, &rxq->rx_free); | 2510 | list_add_tail(&rxb->list, &rxq->rx_free); |
3611 | rxq->free_count++; | 2511 | rxq->free_count++; |
3612 | } | 2512 | } |
@@ -3618,7 +2518,7 @@ static void iwl3945_rx_allocate(struct iwl3945_priv *priv) | |||
3618 | */ | 2518 | */ |
3619 | static void __iwl3945_rx_replenish(void *data) | 2519 | static void __iwl3945_rx_replenish(void *data) |
3620 | { | 2520 | { |
3621 | struct iwl3945_priv *priv = data; | 2521 | struct iwl_priv *priv = data; |
3622 | 2522 | ||
3623 | iwl3945_rx_allocate(priv); | 2523 | iwl3945_rx_allocate(priv); |
3624 | iwl3945_rx_queue_restock(priv); | 2524 | iwl3945_rx_queue_restock(priv); |
@@ -3627,7 +2527,7 @@ static void __iwl3945_rx_replenish(void *data) | |||
3627 | 2527 | ||
3628 | void iwl3945_rx_replenish(void *data) | 2528 | void iwl3945_rx_replenish(void *data) |
3629 | { | 2529 | { |
3630 | struct iwl3945_priv *priv = data; | 2530 | struct iwl_priv *priv = data; |
3631 | unsigned long flags; | 2531 | unsigned long flags; |
3632 | 2532 | ||
3633 | iwl3945_rx_allocate(priv); | 2533 | iwl3945_rx_allocate(priv); |
@@ -3637,84 +2537,6 @@ void iwl3945_rx_replenish(void *data) | |||
3637 | spin_unlock_irqrestore(&priv->lock, flags); | 2537 | spin_unlock_irqrestore(&priv->lock, flags); |
3638 | } | 2538 | } |
3639 | 2539 | ||
3640 | /* Assumes that the skb field of the buffers in 'pool' is kept accurate. | ||
3641 | * If an SKB has been detached, the POOL needs to have its SKB set to NULL | ||
3642 | * This free routine walks the list of POOL entries and if SKB is set to | ||
3643 | * non NULL it is unmapped and freed | ||
3644 | */ | ||
3645 | static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq) | ||
3646 | { | ||
3647 | int i; | ||
3648 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { | ||
3649 | if (rxq->pool[i].skb != NULL) { | ||
3650 | pci_unmap_single(priv->pci_dev, | ||
3651 | rxq->pool[i].dma_addr, | ||
3652 | IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | ||
3653 | dev_kfree_skb(rxq->pool[i].skb); | ||
3654 | } | ||
3655 | } | ||
3656 | |||
3657 | pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd, | ||
3658 | rxq->dma_addr); | ||
3659 | rxq->bd = NULL; | ||
3660 | } | ||
3661 | |||
3662 | int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv) | ||
3663 | { | ||
3664 | struct iwl3945_rx_queue *rxq = &priv->rxq; | ||
3665 | struct pci_dev *dev = priv->pci_dev; | ||
3666 | int i; | ||
3667 | |||
3668 | spin_lock_init(&rxq->lock); | ||
3669 | INIT_LIST_HEAD(&rxq->rx_free); | ||
3670 | INIT_LIST_HEAD(&rxq->rx_used); | ||
3671 | |||
3672 | /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */ | ||
3673 | rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr); | ||
3674 | if (!rxq->bd) | ||
3675 | return -ENOMEM; | ||
3676 | |||
3677 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | ||
3678 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) | ||
3679 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | ||
3680 | |||
3681 | /* Set us so that we have processed and used all buffers, but have | ||
3682 | * not restocked the Rx queue with fresh buffers */ | ||
3683 | rxq->read = rxq->write = 0; | ||
3684 | rxq->free_count = 0; | ||
3685 | rxq->need_update = 0; | ||
3686 | return 0; | ||
3687 | } | ||
3688 | |||
3689 | void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq) | ||
3690 | { | ||
3691 | unsigned long flags; | ||
3692 | int i; | ||
3693 | spin_lock_irqsave(&rxq->lock, flags); | ||
3694 | INIT_LIST_HEAD(&rxq->rx_free); | ||
3695 | INIT_LIST_HEAD(&rxq->rx_used); | ||
3696 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | ||
3697 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { | ||
3698 | /* In the reset function, these buffers may have been allocated | ||
3699 | * to an SKB, so we need to unmap and free potential storage */ | ||
3700 | if (rxq->pool[i].skb != NULL) { | ||
3701 | pci_unmap_single(priv->pci_dev, | ||
3702 | rxq->pool[i].dma_addr, | ||
3703 | IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | ||
3704 | priv->alloc_rxb_skb--; | ||
3705 | dev_kfree_skb(rxq->pool[i].skb); | ||
3706 | rxq->pool[i].skb = NULL; | ||
3707 | } | ||
3708 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | ||
3709 | } | ||
3710 | |||
3711 | /* Set us so that we have processed and used all buffers, but have | ||
3712 | * not restocked the Rx queue with fresh buffers */ | ||
3713 | rxq->read = rxq->write = 0; | ||
3714 | rxq->free_count = 0; | ||
3715 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
3716 | } | ||
3717 | |||
3718 | /* Convert linear signal-to-noise ratio into dB */ | 2540 | /* Convert linear signal-to-noise ratio into dB */ |
3719 | static u8 ratio2dB[100] = { | 2541 | static u8 ratio2dB[100] = { |
3720 | /* 0 1 2 3 4 5 6 7 8 9 */ | 2542 | /* 0 1 2 3 4 5 6 7 8 9 */ |
@@ -3800,11 +2622,11 @@ int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm) | |||
3800 | * the appropriate handlers, including command responses, | 2622 | * the appropriate handlers, including command responses, |
3801 | * frame-received notifications, and other notifications. | 2623 | * frame-received notifications, and other notifications. |
3802 | */ | 2624 | */ |
3803 | static void iwl3945_rx_handle(struct iwl3945_priv *priv) | 2625 | static void iwl3945_rx_handle(struct iwl_priv *priv) |
3804 | { | 2626 | { |
3805 | struct iwl3945_rx_mem_buffer *rxb; | 2627 | struct iwl_rx_mem_buffer *rxb; |
3806 | struct iwl3945_rx_packet *pkt; | 2628 | struct iwl_rx_packet *pkt; |
3807 | struct iwl3945_rx_queue *rxq = &priv->rxq; | 2629 | struct iwl_rx_queue *rxq = &priv->rxq; |
3808 | u32 r, i; | 2630 | u32 r, i; |
3809 | int reclaim; | 2631 | int reclaim; |
3810 | unsigned long flags; | 2632 | unsigned long flags; |
@@ -3813,10 +2635,10 @@ static void iwl3945_rx_handle(struct iwl3945_priv *priv) | |||
3813 | 2635 | ||
3814 | /* uCode's read index (stored in shared DRAM) indicates the last Rx | 2636 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
3815 | * buffer that the driver may process (last buffer filled by ucode). */ | 2637 | * buffer that the driver may process (last buffer filled by ucode). */ |
3816 | r = iwl3945_hw_get_rx_read(priv); | 2638 | r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; |
3817 | i = rxq->read; | 2639 | i = rxq->read; |
3818 | 2640 | ||
3819 | if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) | 2641 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
3820 | fill_rx = 1; | 2642 | fill_rx = 1; |
3821 | /* Rx interrupt, but nothing sent from uCode */ | 2643 | /* Rx interrupt, but nothing sent from uCode */ |
3822 | if (i == r) | 2644 | if (i == r) |
@@ -3832,10 +2654,10 @@ static void iwl3945_rx_handle(struct iwl3945_priv *priv) | |||
3832 | 2654 | ||
3833 | rxq->queue[i] = NULL; | 2655 | rxq->queue[i] = NULL; |
3834 | 2656 | ||
3835 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | 2657 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr, |
3836 | IWL_RX_BUF_SIZE, | 2658 | priv->hw_params.rx_buf_size, |
3837 | PCI_DMA_FROMDEVICE); | 2659 | PCI_DMA_FROMDEVICE); |
3838 | pkt = (struct iwl3945_rx_packet *)rxb->skb->data; | 2660 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
3839 | 2661 | ||
3840 | /* Reclaim a command buffer only if this packet is a response | 2662 | /* Reclaim a command buffer only if this packet is a response |
3841 | * to a (driver-originated) command. | 2663 | * to a (driver-originated) command. |
@@ -3851,13 +2673,13 @@ static void iwl3945_rx_handle(struct iwl3945_priv *priv) | |||
3851 | * handle those that need handling via function in | 2673 | * handle those that need handling via function in |
3852 | * rx_handlers table. See iwl3945_setup_rx_handlers() */ | 2674 | * rx_handlers table. See iwl3945_setup_rx_handlers() */ |
3853 | if (priv->rx_handlers[pkt->hdr.cmd]) { | 2675 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
3854 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | 2676 | IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR, |
3855 | "r = %d, i = %d, %s, 0x%02x\n", r, i, | 2677 | "r = %d, i = %d, %s, 0x%02x\n", r, i, |
3856 | get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | 2678 | get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); |
3857 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); | 2679 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); |
3858 | } else { | 2680 | } else { |
3859 | /* No handling needed */ | 2681 | /* No handling needed */ |
3860 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | 2682 | IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR, |
3861 | "r %d i %d No handler needed for %s, 0x%02x\n", | 2683 | "r %d i %d No handler needed for %s, 0x%02x\n", |
3862 | r, i, get_cmd_string(pkt->hdr.cmd), | 2684 | r, i, get_cmd_string(pkt->hdr.cmd), |
3863 | pkt->hdr.cmd); | 2685 | pkt->hdr.cmd); |
@@ -3865,12 +2687,12 @@ static void iwl3945_rx_handle(struct iwl3945_priv *priv) | |||
3865 | 2687 | ||
3866 | if (reclaim) { | 2688 | if (reclaim) { |
3867 | /* Invoke any callbacks, transfer the skb to caller, and | 2689 | /* Invoke any callbacks, transfer the skb to caller, and |
3868 | * fire off the (possibly) blocking iwl3945_send_cmd() | 2690 | * fire off the (possibly) blocking iwl_send_cmd() |
3869 | * as we reclaim the driver command queue */ | 2691 | * as we reclaim the driver command queue */ |
3870 | if (rxb && rxb->skb) | 2692 | if (rxb && rxb->skb) |
3871 | iwl3945_tx_cmd_complete(priv, rxb); | 2693 | iwl3945_tx_cmd_complete(priv, rxb); |
3872 | else | 2694 | else |
3873 | IWL_WARNING("Claim null rxb?\n"); | 2695 | IWL_WARN(priv, "Claim null rxb?\n"); |
3874 | } | 2696 | } |
3875 | 2697 | ||
3876 | /* For now we just don't re-use anything. We can tweak this | 2698 | /* For now we just don't re-use anything. We can tweak this |
@@ -3882,8 +2704,9 @@ static void iwl3945_rx_handle(struct iwl3945_priv *priv) | |||
3882 | rxb->skb = NULL; | 2704 | rxb->skb = NULL; |
3883 | } | 2705 | } |
3884 | 2706 | ||
3885 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | 2707 | pci_unmap_single(priv->pci_dev, rxb->real_dma_addr, |
3886 | IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | 2708 | priv->hw_params.rx_buf_size, |
2709 | PCI_DMA_FROMDEVICE); | ||
3887 | spin_lock_irqsave(&rxq->lock, flags); | 2710 | spin_lock_irqsave(&rxq->lock, flags); |
3888 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | 2711 | list_add_tail(&rxb->list, &priv->rxq.rx_used); |
3889 | spin_unlock_irqrestore(&rxq->lock, flags); | 2712 | spin_unlock_irqrestore(&rxq->lock, flags); |
@@ -3905,57 +2728,12 @@ static void iwl3945_rx_handle(struct iwl3945_priv *priv) | |||
3905 | iwl3945_rx_queue_restock(priv); | 2728 | iwl3945_rx_queue_restock(priv); |
3906 | } | 2729 | } |
3907 | 2730 | ||
3908 | /** | 2731 | #ifdef CONFIG_IWLWIFI_DEBUG |
3909 | * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware | 2732 | static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv, |
3910 | */ | 2733 | struct iwl3945_rxon_cmd *rxon) |
3911 | static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv, | ||
3912 | struct iwl3945_tx_queue *txq) | ||
3913 | { | ||
3914 | u32 reg = 0; | ||
3915 | int rc = 0; | ||
3916 | int txq_id = txq->q.id; | ||
3917 | |||
3918 | if (txq->need_update == 0) | ||
3919 | return rc; | ||
3920 | |||
3921 | /* if we're trying to save power */ | ||
3922 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { | ||
3923 | /* wake up nic if it's powered down ... | ||
3924 | * uCode will wake up, and interrupt us again, so next | ||
3925 | * time we'll skip this part. */ | ||
3926 | reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1); | ||
3927 | |||
3928 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | ||
3929 | IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg); | ||
3930 | iwl3945_set_bit(priv, CSR_GP_CNTRL, | ||
3931 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
3932 | return rc; | ||
3933 | } | ||
3934 | |||
3935 | /* restore this queue's parameters in nic hardware. */ | ||
3936 | rc = iwl3945_grab_nic_access(priv); | ||
3937 | if (rc) | ||
3938 | return rc; | ||
3939 | iwl3945_write_direct32(priv, HBUS_TARG_WRPTR, | ||
3940 | txq->q.write_ptr | (txq_id << 8)); | ||
3941 | iwl3945_release_nic_access(priv); | ||
3942 | |||
3943 | /* else not in power-save mode, uCode will never sleep when we're | ||
3944 | * trying to tx (during RFKILL, we're not trying to tx). */ | ||
3945 | } else | ||
3946 | iwl3945_write32(priv, HBUS_TARG_WRPTR, | ||
3947 | txq->q.write_ptr | (txq_id << 8)); | ||
3948 | |||
3949 | txq->need_update = 0; | ||
3950 | |||
3951 | return rc; | ||
3952 | } | ||
3953 | |||
3954 | #ifdef CONFIG_IWL3945_DEBUG | ||
3955 | static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon) | ||
3956 | { | 2734 | { |
3957 | IWL_DEBUG_RADIO("RX CONFIG:\n"); | 2735 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
3958 | iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); | 2736 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
3959 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); | 2737 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
3960 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | 2738 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); |
3961 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | 2739 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", |
@@ -3970,16 +2748,16 @@ static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon) | |||
3970 | } | 2748 | } |
3971 | #endif | 2749 | #endif |
3972 | 2750 | ||
3973 | static void iwl3945_enable_interrupts(struct iwl3945_priv *priv) | 2751 | static void iwl3945_enable_interrupts(struct iwl_priv *priv) |
3974 | { | 2752 | { |
3975 | IWL_DEBUG_ISR("Enabling interrupts\n"); | 2753 | IWL_DEBUG_ISR("Enabling interrupts\n"); |
3976 | set_bit(STATUS_INT_ENABLED, &priv->status); | 2754 | set_bit(STATUS_INT_ENABLED, &priv->status); |
3977 | iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); | 2755 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
3978 | } | 2756 | } |
3979 | 2757 | ||
3980 | 2758 | ||
3981 | /* call this function to flush any scheduled tasklet */ | 2759 | /* call this function to flush any scheduled tasklet */ |
3982 | static inline void iwl_synchronize_irq(struct iwl3945_priv *priv) | 2760 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) |
3983 | { | 2761 | { |
3984 | /* wait to make sure we flush pending tasklet*/ | 2762 | /* wait to make sure we flush pending tasklet*/ |
3985 | synchronize_irq(priv->pci_dev->irq); | 2763 | synchronize_irq(priv->pci_dev->irq); |
@@ -3987,17 +2765,17 @@ static inline void iwl_synchronize_irq(struct iwl3945_priv *priv) | |||
3987 | } | 2765 | } |
3988 | 2766 | ||
3989 | 2767 | ||
3990 | static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv) | 2768 | static inline void iwl3945_disable_interrupts(struct iwl_priv *priv) |
3991 | { | 2769 | { |
3992 | clear_bit(STATUS_INT_ENABLED, &priv->status); | 2770 | clear_bit(STATUS_INT_ENABLED, &priv->status); |
3993 | 2771 | ||
3994 | /* disable interrupts from uCode/NIC to host */ | 2772 | /* disable interrupts from uCode/NIC to host */ |
3995 | iwl3945_write32(priv, CSR_INT_MASK, 0x00000000); | 2773 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
3996 | 2774 | ||
3997 | /* acknowledge/clear/reset any interrupts still pending | 2775 | /* acknowledge/clear/reset any interrupts still pending |
3998 | * from uCode or flow handler (Rx/Tx DMA) */ | 2776 | * from uCode or flow handler (Rx/Tx DMA) */ |
3999 | iwl3945_write32(priv, CSR_INT, 0xffffffff); | 2777 | iwl_write32(priv, CSR_INT, 0xffffffff); |
4000 | iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | 2778 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); |
4001 | IWL_DEBUG_ISR("Disabled interrupts\n"); | 2779 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
4002 | } | 2780 | } |
4003 | 2781 | ||
@@ -4024,7 +2802,7 @@ static const char *desc_lookup(int i) | |||
4024 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | 2802 | #define ERROR_START_OFFSET (1 * sizeof(u32)) |
4025 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | 2803 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) |
4026 | 2804 | ||
4027 | static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv) | 2805 | static void iwl3945_dump_nic_error_log(struct iwl_priv *priv) |
4028 | { | 2806 | { |
4029 | u32 i; | 2807 | u32 i; |
4030 | u32 desc, time, count, base, data1; | 2808 | u32 desc, time, count, base, data1; |
@@ -4034,49 +2812,50 @@ static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv) | |||
4034 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); | 2812 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); |
4035 | 2813 | ||
4036 | if (!iwl3945_hw_valid_rtc_data_addr(base)) { | 2814 | if (!iwl3945_hw_valid_rtc_data_addr(base)) { |
4037 | IWL_ERROR("Not valid error log pointer 0x%08X\n", base); | 2815 | IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base); |
4038 | return; | 2816 | return; |
4039 | } | 2817 | } |
4040 | 2818 | ||
4041 | rc = iwl3945_grab_nic_access(priv); | 2819 | rc = iwl_grab_nic_access(priv); |
4042 | if (rc) { | 2820 | if (rc) { |
4043 | IWL_WARNING("Can not read from adapter at this time.\n"); | 2821 | IWL_WARN(priv, "Can not read from adapter at this time.\n"); |
4044 | return; | 2822 | return; |
4045 | } | 2823 | } |
4046 | 2824 | ||
4047 | count = iwl3945_read_targ_mem(priv, base); | 2825 | count = iwl_read_targ_mem(priv, base); |
4048 | 2826 | ||
4049 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | 2827 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { |
4050 | IWL_ERROR("Start IWL Error Log Dump:\n"); | 2828 | IWL_ERR(priv, "Start IWL Error Log Dump:\n"); |
4051 | IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count); | 2829 | IWL_ERR(priv, "Status: 0x%08lX, count: %d\n", |
2830 | priv->status, count); | ||
4052 | } | 2831 | } |
4053 | 2832 | ||
4054 | IWL_ERROR("Desc Time asrtPC blink2 " | 2833 | IWL_ERR(priv, "Desc Time asrtPC blink2 " |
4055 | "ilink1 nmiPC Line\n"); | 2834 | "ilink1 nmiPC Line\n"); |
4056 | for (i = ERROR_START_OFFSET; | 2835 | for (i = ERROR_START_OFFSET; |
4057 | i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET; | 2836 | i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET; |
4058 | i += ERROR_ELEM_SIZE) { | 2837 | i += ERROR_ELEM_SIZE) { |
4059 | desc = iwl3945_read_targ_mem(priv, base + i); | 2838 | desc = iwl_read_targ_mem(priv, base + i); |
4060 | time = | 2839 | time = |
4061 | iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32)); | 2840 | iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32)); |
4062 | blink1 = | 2841 | blink1 = |
4063 | iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32)); | 2842 | iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32)); |
4064 | blink2 = | 2843 | blink2 = |
4065 | iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32)); | 2844 | iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32)); |
4066 | ilink1 = | 2845 | ilink1 = |
4067 | iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32)); | 2846 | iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32)); |
4068 | ilink2 = | 2847 | ilink2 = |
4069 | iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32)); | 2848 | iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32)); |
4070 | data1 = | 2849 | data1 = |
4071 | iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32)); | 2850 | iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32)); |
4072 | 2851 | ||
4073 | IWL_ERROR | 2852 | IWL_ERR(priv, |
4074 | ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n", | 2853 | "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n", |
4075 | desc_lookup(desc), desc, time, blink1, blink2, | 2854 | desc_lookup(desc), desc, time, blink1, blink2, |
4076 | ilink1, ilink2, data1); | 2855 | ilink1, ilink2, data1); |
4077 | } | 2856 | } |
4078 | 2857 | ||
4079 | iwl3945_release_nic_access(priv); | 2858 | iwl_release_nic_access(priv); |
4080 | 2859 | ||
4081 | } | 2860 | } |
4082 | 2861 | ||
@@ -4085,9 +2864,9 @@ static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv) | |||
4085 | /** | 2864 | /** |
4086 | * iwl3945_print_event_log - Dump error event log to syslog | 2865 | * iwl3945_print_event_log - Dump error event log to syslog |
4087 | * | 2866 | * |
4088 | * NOTE: Must be called with iwl3945_grab_nic_access() already obtained! | 2867 | * NOTE: Must be called with iwl_grab_nic_access() already obtained! |
4089 | */ | 2868 | */ |
4090 | static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx, | 2869 | static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx, |
4091 | u32 num_events, u32 mode) | 2870 | u32 num_events, u32 mode) |
4092 | { | 2871 | { |
4093 | u32 i; | 2872 | u32 i; |
@@ -4111,21 +2890,22 @@ static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx, | |||
4111 | /* "time" is actually "data" for mode 0 (no timestamp). | 2890 | /* "time" is actually "data" for mode 0 (no timestamp). |
4112 | * place event id # at far right for easier visual parsing. */ | 2891 | * place event id # at far right for easier visual parsing. */ |
4113 | for (i = 0; i < num_events; i++) { | 2892 | for (i = 0; i < num_events; i++) { |
4114 | ev = iwl3945_read_targ_mem(priv, ptr); | 2893 | ev = iwl_read_targ_mem(priv, ptr); |
4115 | ptr += sizeof(u32); | 2894 | ptr += sizeof(u32); |
4116 | time = iwl3945_read_targ_mem(priv, ptr); | 2895 | time = iwl_read_targ_mem(priv, ptr); |
4117 | ptr += sizeof(u32); | 2896 | ptr += sizeof(u32); |
4118 | if (mode == 0) | 2897 | if (mode == 0) { |
4119 | IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */ | 2898 | /* data, ev */ |
4120 | else { | 2899 | IWL_ERR(priv, "0x%08x\t%04u\n", time, ev); |
4121 | data = iwl3945_read_targ_mem(priv, ptr); | 2900 | } else { |
2901 | data = iwl_read_targ_mem(priv, ptr); | ||
4122 | ptr += sizeof(u32); | 2902 | ptr += sizeof(u32); |
4123 | IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev); | 2903 | IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev); |
4124 | } | 2904 | } |
4125 | } | 2905 | } |
4126 | } | 2906 | } |
4127 | 2907 | ||
4128 | static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv) | 2908 | static void iwl3945_dump_nic_event_log(struct iwl_priv *priv) |
4129 | { | 2909 | { |
4130 | int rc; | 2910 | int rc; |
4131 | u32 base; /* SRAM byte address of event log header */ | 2911 | u32 base; /* SRAM byte address of event log header */ |
@@ -4137,32 +2917,32 @@ static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv) | |||
4137 | 2917 | ||
4138 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | 2918 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); |
4139 | if (!iwl3945_hw_valid_rtc_data_addr(base)) { | 2919 | if (!iwl3945_hw_valid_rtc_data_addr(base)) { |
4140 | IWL_ERROR("Invalid event log pointer 0x%08X\n", base); | 2920 | IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base); |
4141 | return; | 2921 | return; |
4142 | } | 2922 | } |
4143 | 2923 | ||
4144 | rc = iwl3945_grab_nic_access(priv); | 2924 | rc = iwl_grab_nic_access(priv); |
4145 | if (rc) { | 2925 | if (rc) { |
4146 | IWL_WARNING("Can not read from adapter at this time.\n"); | 2926 | IWL_WARN(priv, "Can not read from adapter at this time.\n"); |
4147 | return; | 2927 | return; |
4148 | } | 2928 | } |
4149 | 2929 | ||
4150 | /* event log header */ | 2930 | /* event log header */ |
4151 | capacity = iwl3945_read_targ_mem(priv, base); | 2931 | capacity = iwl_read_targ_mem(priv, base); |
4152 | mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32))); | 2932 | mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32))); |
4153 | num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32))); | 2933 | num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); |
4154 | next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32))); | 2934 | next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32))); |
4155 | 2935 | ||
4156 | size = num_wraps ? capacity : next_entry; | 2936 | size = num_wraps ? capacity : next_entry; |
4157 | 2937 | ||
4158 | /* bail out if nothing in log */ | 2938 | /* bail out if nothing in log */ |
4159 | if (size == 0) { | 2939 | if (size == 0) { |
4160 | IWL_ERROR("Start IWL Event Log Dump: nothing in log\n"); | 2940 | IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n"); |
4161 | iwl3945_release_nic_access(priv); | 2941 | iwl_release_nic_access(priv); |
4162 | return; | 2942 | return; |
4163 | } | 2943 | } |
4164 | 2944 | ||
4165 | IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n", | 2945 | IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n", |
4166 | size, num_wraps); | 2946 | size, num_wraps); |
4167 | 2947 | ||
4168 | /* if uCode has wrapped back to top of log, start at the oldest entry, | 2948 | /* if uCode has wrapped back to top of log, start at the oldest entry, |
@@ -4174,13 +2954,13 @@ static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv) | |||
4174 | /* (then/else) start at top of log */ | 2954 | /* (then/else) start at top of log */ |
4175 | iwl3945_print_event_log(priv, 0, next_entry, mode); | 2955 | iwl3945_print_event_log(priv, 0, next_entry, mode); |
4176 | 2956 | ||
4177 | iwl3945_release_nic_access(priv); | 2957 | iwl_release_nic_access(priv); |
4178 | } | 2958 | } |
4179 | 2959 | ||
4180 | /** | 2960 | /** |
4181 | * iwl3945_irq_handle_error - called for HW or SW error interrupt from card | 2961 | * iwl3945_irq_handle_error - called for HW or SW error interrupt from card |
4182 | */ | 2962 | */ |
4183 | static void iwl3945_irq_handle_error(struct iwl3945_priv *priv) | 2963 | static void iwl3945_irq_handle_error(struct iwl_priv *priv) |
4184 | { | 2964 | { |
4185 | /* Set the FW error flag -- cleared on iwl3945_down */ | 2965 | /* Set the FW error flag -- cleared on iwl3945_down */ |
4186 | set_bit(STATUS_FW_ERROR, &priv->status); | 2966 | set_bit(STATUS_FW_ERROR, &priv->status); |
@@ -4188,11 +2968,11 @@ static void iwl3945_irq_handle_error(struct iwl3945_priv *priv) | |||
4188 | /* Cancel currently queued command. */ | 2968 | /* Cancel currently queued command. */ |
4189 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | 2969 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); |
4190 | 2970 | ||
4191 | #ifdef CONFIG_IWL3945_DEBUG | 2971 | #ifdef CONFIG_IWLWIFI_DEBUG |
4192 | if (iwl3945_debug_level & IWL_DL_FW_ERRORS) { | 2972 | if (priv->debug_level & IWL_DL_FW_ERRORS) { |
4193 | iwl3945_dump_nic_error_log(priv); | 2973 | iwl3945_dump_nic_error_log(priv); |
4194 | iwl3945_dump_nic_event_log(priv); | 2974 | iwl3945_dump_nic_event_log(priv); |
4195 | iwl3945_print_rx_config_cmd(&priv->staging_rxon); | 2975 | iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon); |
4196 | } | 2976 | } |
4197 | #endif | 2977 | #endif |
4198 | 2978 | ||
@@ -4207,37 +2987,38 @@ static void iwl3945_irq_handle_error(struct iwl3945_priv *priv) | |||
4207 | "Restarting adapter due to uCode error.\n"); | 2987 | "Restarting adapter due to uCode error.\n"); |
4208 | 2988 | ||
4209 | if (iwl3945_is_associated(priv)) { | 2989 | if (iwl3945_is_associated(priv)) { |
4210 | memcpy(&priv->recovery_rxon, &priv->active_rxon, | 2990 | memcpy(&priv->recovery39_rxon, &priv->active39_rxon, |
4211 | sizeof(priv->recovery_rxon)); | 2991 | sizeof(priv->recovery39_rxon)); |
4212 | priv->error_recovering = 1; | 2992 | priv->error_recovering = 1; |
4213 | } | 2993 | } |
4214 | queue_work(priv->workqueue, &priv->restart); | 2994 | if (priv->cfg->mod_params->restart_fw) |
2995 | queue_work(priv->workqueue, &priv->restart); | ||
4215 | } | 2996 | } |
4216 | } | 2997 | } |
4217 | 2998 | ||
4218 | static void iwl3945_error_recovery(struct iwl3945_priv *priv) | 2999 | static void iwl3945_error_recovery(struct iwl_priv *priv) |
4219 | { | 3000 | { |
4220 | unsigned long flags; | 3001 | unsigned long flags; |
4221 | 3002 | ||
4222 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | 3003 | memcpy(&priv->staging39_rxon, &priv->recovery39_rxon, |
4223 | sizeof(priv->staging_rxon)); | 3004 | sizeof(priv->staging39_rxon)); |
4224 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | 3005 | priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
4225 | iwl3945_commit_rxon(priv); | 3006 | iwl3945_commit_rxon(priv); |
4226 | 3007 | ||
4227 | iwl3945_add_station(priv, priv->bssid, 1, 0); | 3008 | iwl3945_add_station(priv, priv->bssid, 1, 0); |
4228 | 3009 | ||
4229 | spin_lock_irqsave(&priv->lock, flags); | 3010 | spin_lock_irqsave(&priv->lock, flags); |
4230 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | 3011 | priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id); |
4231 | priv->error_recovering = 0; | 3012 | priv->error_recovering = 0; |
4232 | spin_unlock_irqrestore(&priv->lock, flags); | 3013 | spin_unlock_irqrestore(&priv->lock, flags); |
4233 | } | 3014 | } |
4234 | 3015 | ||
4235 | static void iwl3945_irq_tasklet(struct iwl3945_priv *priv) | 3016 | static void iwl3945_irq_tasklet(struct iwl_priv *priv) |
4236 | { | 3017 | { |
4237 | u32 inta, handled = 0; | 3018 | u32 inta, handled = 0; |
4238 | u32 inta_fh; | 3019 | u32 inta_fh; |
4239 | unsigned long flags; | 3020 | unsigned long flags; |
4240 | #ifdef CONFIG_IWL3945_DEBUG | 3021 | #ifdef CONFIG_IWLWIFI_DEBUG |
4241 | u32 inta_mask; | 3022 | u32 inta_mask; |
4242 | #endif | 3023 | #endif |
4243 | 3024 | ||
@@ -4246,19 +3027,19 @@ static void iwl3945_irq_tasklet(struct iwl3945_priv *priv) | |||
4246 | /* Ack/clear/reset pending uCode interrupts. | 3027 | /* Ack/clear/reset pending uCode interrupts. |
4247 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | 3028 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, |
4248 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | 3029 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ |
4249 | inta = iwl3945_read32(priv, CSR_INT); | 3030 | inta = iwl_read32(priv, CSR_INT); |
4250 | iwl3945_write32(priv, CSR_INT, inta); | 3031 | iwl_write32(priv, CSR_INT, inta); |
4251 | 3032 | ||
4252 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | 3033 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. |
4253 | * Any new interrupts that happen after this, either while we're | 3034 | * Any new interrupts that happen after this, either while we're |
4254 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | 3035 | * in this tasklet, or later, will show up in next ISR/tasklet. */ |
4255 | inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS); | 3036 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
4256 | iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh); | 3037 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); |
4257 | 3038 | ||
4258 | #ifdef CONFIG_IWL3945_DEBUG | 3039 | #ifdef CONFIG_IWLWIFI_DEBUG |
4259 | if (iwl3945_debug_level & IWL_DL_ISR) { | 3040 | if (priv->debug_level & IWL_DL_ISR) { |
4260 | /* just for debug */ | 3041 | /* just for debug */ |
4261 | inta_mask = iwl3945_read32(priv, CSR_INT_MASK); | 3042 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
4262 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | 3043 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
4263 | inta, inta_mask, inta_fh); | 3044 | inta, inta_mask, inta_fh); |
4264 | } | 3045 | } |
@@ -4275,7 +3056,7 @@ static void iwl3945_irq_tasklet(struct iwl3945_priv *priv) | |||
4275 | 3056 | ||
4276 | /* Now service all interrupt bits discovered above. */ | 3057 | /* Now service all interrupt bits discovered above. */ |
4277 | if (inta & CSR_INT_BIT_HW_ERR) { | 3058 | if (inta & CSR_INT_BIT_HW_ERR) { |
4278 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | 3059 | IWL_ERR(priv, "Microcode HW error detected. Restarting.\n"); |
4279 | 3060 | ||
4280 | /* Tell the device to stop sending interrupts */ | 3061 | /* Tell the device to stop sending interrupts */ |
4281 | iwl3945_disable_interrupts(priv); | 3062 | iwl3945_disable_interrupts(priv); |
@@ -4289,8 +3070,8 @@ static void iwl3945_irq_tasklet(struct iwl3945_priv *priv) | |||
4289 | return; | 3070 | return; |
4290 | } | 3071 | } |
4291 | 3072 | ||
4292 | #ifdef CONFIG_IWL3945_DEBUG | 3073 | #ifdef CONFIG_IWLWIFI_DEBUG |
4293 | if (iwl3945_debug_level & (IWL_DL_ISR)) { | 3074 | if (priv->debug_level & (IWL_DL_ISR)) { |
4294 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ | 3075 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
4295 | if (inta & CSR_INT_BIT_SCD) | 3076 | if (inta & CSR_INT_BIT_SCD) |
4296 | IWL_DEBUG_ISR("Scheduler finished to transmit " | 3077 | IWL_DEBUG_ISR("Scheduler finished to transmit " |
@@ -4306,8 +3087,8 @@ static void iwl3945_irq_tasklet(struct iwl3945_priv *priv) | |||
4306 | 3087 | ||
4307 | /* Error detected by uCode */ | 3088 | /* Error detected by uCode */ |
4308 | if (inta & CSR_INT_BIT_SW_ERR) { | 3089 | if (inta & CSR_INT_BIT_SW_ERR) { |
4309 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | 3090 | IWL_ERR(priv, "Microcode SW error detected. " |
4310 | inta); | 3091 | "Restarting 0x%X.\n", inta); |
4311 | iwl3945_irq_handle_error(priv); | 3092 | iwl3945_irq_handle_error(priv); |
4312 | handled |= CSR_INT_BIT_SW_ERR; | 3093 | handled |= CSR_INT_BIT_SW_ERR; |
4313 | } | 3094 | } |
@@ -4315,13 +3096,13 @@ static void iwl3945_irq_tasklet(struct iwl3945_priv *priv) | |||
4315 | /* uCode wakes up after power-down sleep */ | 3096 | /* uCode wakes up after power-down sleep */ |
4316 | if (inta & CSR_INT_BIT_WAKEUP) { | 3097 | if (inta & CSR_INT_BIT_WAKEUP) { |
4317 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | 3098 | IWL_DEBUG_ISR("Wakeup interrupt\n"); |
4318 | iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq); | 3099 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
4319 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]); | 3100 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); |
4320 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]); | 3101 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); |
4321 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]); | 3102 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); |
4322 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]); | 3103 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); |
4323 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]); | 3104 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); |
4324 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]); | 3105 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); |
4325 | 3106 | ||
4326 | handled |= CSR_INT_BIT_WAKEUP; | 3107 | handled |= CSR_INT_BIT_WAKEUP; |
4327 | } | 3108 | } |
@@ -4337,23 +3118,22 @@ static void iwl3945_irq_tasklet(struct iwl3945_priv *priv) | |||
4337 | if (inta & CSR_INT_BIT_FH_TX) { | 3118 | if (inta & CSR_INT_BIT_FH_TX) { |
4338 | IWL_DEBUG_ISR("Tx interrupt\n"); | 3119 | IWL_DEBUG_ISR("Tx interrupt\n"); |
4339 | 3120 | ||
4340 | iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6)); | 3121 | iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6)); |
4341 | if (!iwl3945_grab_nic_access(priv)) { | 3122 | if (!iwl_grab_nic_access(priv)) { |
4342 | iwl3945_write_direct32(priv, | 3123 | iwl_write_direct32(priv, FH39_TCSR_CREDIT |
4343 | FH_TCSR_CREDIT | 3124 | (FH39_SRVC_CHNL), 0x0); |
4344 | (ALM_FH_SRVC_CHNL), 0x0); | 3125 | iwl_release_nic_access(priv); |
4345 | iwl3945_release_nic_access(priv); | ||
4346 | } | 3126 | } |
4347 | handled |= CSR_INT_BIT_FH_TX; | 3127 | handled |= CSR_INT_BIT_FH_TX; |
4348 | } | 3128 | } |
4349 | 3129 | ||
4350 | if (inta & ~handled) | 3130 | if (inta & ~handled) |
4351 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | 3131 | IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled); |
4352 | 3132 | ||
4353 | if (inta & ~CSR_INI_SET_MASK) { | 3133 | if (inta & ~CSR_INI_SET_MASK) { |
4354 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | 3134 | IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n", |
4355 | inta & ~CSR_INI_SET_MASK); | 3135 | inta & ~CSR_INI_SET_MASK); |
4356 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | 3136 | IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh); |
4357 | } | 3137 | } |
4358 | 3138 | ||
4359 | /* Re-enable all interrupts */ | 3139 | /* Re-enable all interrupts */ |
@@ -4361,11 +3141,11 @@ static void iwl3945_irq_tasklet(struct iwl3945_priv *priv) | |||
4361 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | 3141 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) |
4362 | iwl3945_enable_interrupts(priv); | 3142 | iwl3945_enable_interrupts(priv); |
4363 | 3143 | ||
4364 | #ifdef CONFIG_IWL3945_DEBUG | 3144 | #ifdef CONFIG_IWLWIFI_DEBUG |
4365 | if (iwl3945_debug_level & (IWL_DL_ISR)) { | 3145 | if (priv->debug_level & (IWL_DL_ISR)) { |
4366 | inta = iwl3945_read32(priv, CSR_INT); | 3146 | inta = iwl_read32(priv, CSR_INT); |
4367 | inta_mask = iwl3945_read32(priv, CSR_INT_MASK); | 3147 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
4368 | inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS); | 3148 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
4369 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " | 3149 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
4370 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | 3150 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); |
4371 | } | 3151 | } |
@@ -4375,7 +3155,7 @@ static void iwl3945_irq_tasklet(struct iwl3945_priv *priv) | |||
4375 | 3155 | ||
4376 | static irqreturn_t iwl3945_isr(int irq, void *data) | 3156 | static irqreturn_t iwl3945_isr(int irq, void *data) |
4377 | { | 3157 | { |
4378 | struct iwl3945_priv *priv = data; | 3158 | struct iwl_priv *priv = data; |
4379 | u32 inta, inta_mask; | 3159 | u32 inta, inta_mask; |
4380 | u32 inta_fh; | 3160 | u32 inta_fh; |
4381 | if (!priv) | 3161 | if (!priv) |
@@ -4387,12 +3167,12 @@ static irqreturn_t iwl3945_isr(int irq, void *data) | |||
4387 | * back-to-back ISRs and sporadic interrupts from our NIC. | 3167 | * back-to-back ISRs and sporadic interrupts from our NIC. |
4388 | * If we have something to service, the tasklet will re-enable ints. | 3168 | * If we have something to service, the tasklet will re-enable ints. |
4389 | * If we *don't* have something, we'll re-enable before leaving here. */ | 3169 | * If we *don't* have something, we'll re-enable before leaving here. */ |
4390 | inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */ | 3170 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
4391 | iwl3945_write32(priv, CSR_INT_MASK, 0x00000000); | 3171 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
4392 | 3172 | ||
4393 | /* Discover which interrupts are active/pending */ | 3173 | /* Discover which interrupts are active/pending */ |
4394 | inta = iwl3945_read32(priv, CSR_INT); | 3174 | inta = iwl_read32(priv, CSR_INT); |
4395 | inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS); | 3175 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
4396 | 3176 | ||
4397 | /* Ignore interrupt if there's nothing in NIC to service. | 3177 | /* Ignore interrupt if there's nothing in NIC to service. |
4398 | * This may be due to IRQ shared with another device, | 3178 | * This may be due to IRQ shared with another device, |
@@ -4404,7 +3184,7 @@ static irqreturn_t iwl3945_isr(int irq, void *data) | |||
4404 | 3184 | ||
4405 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | 3185 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { |
4406 | /* Hardware disappeared */ | 3186 | /* Hardware disappeared */ |
4407 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta); | 3187 | IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta); |
4408 | goto unplugged; | 3188 | goto unplugged; |
4409 | } | 3189 | } |
4410 | 3190 | ||
@@ -4430,337 +3210,26 @@ unplugged: | |||
4430 | return IRQ_NONE; | 3210 | return IRQ_NONE; |
4431 | } | 3211 | } |
4432 | 3212 | ||
4433 | /************************** EEPROM BANDS **************************** | 3213 | static int iwl3945_get_channels_for_scan(struct iwl_priv *priv, |
4434 | * | ||
4435 | * The iwl3945_eeprom_band definitions below provide the mapping from the | ||
4436 | * EEPROM contents to the specific channel number supported for each | ||
4437 | * band. | ||
4438 | * | ||
4439 | * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3 | ||
4440 | * definition below maps to physical channel 42 in the 5.2GHz spectrum. | ||
4441 | * The specific geography and calibration information for that channel | ||
4442 | * is contained in the eeprom map itself. | ||
4443 | * | ||
4444 | * During init, we copy the eeprom information and channel map | ||
4445 | * information into priv->channel_info_24/52 and priv->channel_map_24/52 | ||
4446 | * | ||
4447 | * channel_map_24/52 provides the index in the channel_info array for a | ||
4448 | * given channel. We have to have two separate maps as there is channel | ||
4449 | * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and | ||
4450 | * band_2 | ||
4451 | * | ||
4452 | * A value of 0xff stored in the channel_map indicates that the channel | ||
4453 | * is not supported by the hardware at all. | ||
4454 | * | ||
4455 | * A value of 0xfe in the channel_map indicates that the channel is not | ||
4456 | * valid for Tx with the current hardware. This means that | ||
4457 | * while the system can tune and receive on a given channel, it may not | ||
4458 | * be able to associate or transmit any frames on that | ||
4459 | * channel. There is no corresponding channel information for that | ||
4460 | * entry. | ||
4461 | * | ||
4462 | *********************************************************************/ | ||
4463 | |||
4464 | /* 2.4 GHz */ | ||
4465 | static const u8 iwl3945_eeprom_band_1[14] = { | ||
4466 | 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 | ||
4467 | }; | ||
4468 | |||
4469 | /* 5.2 GHz bands */ | ||
4470 | static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */ | ||
4471 | 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16 | ||
4472 | }; | ||
4473 | |||
4474 | static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */ | ||
4475 | 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 | ||
4476 | }; | ||
4477 | |||
4478 | static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */ | ||
4479 | 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 | ||
4480 | }; | ||
4481 | |||
4482 | static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */ | ||
4483 | 145, 149, 153, 157, 161, 165 | ||
4484 | }; | ||
4485 | |||
4486 | static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band, | ||
4487 | int *eeprom_ch_count, | ||
4488 | const struct iwl3945_eeprom_channel | ||
4489 | **eeprom_ch_info, | ||
4490 | const u8 **eeprom_ch_index) | ||
4491 | { | ||
4492 | switch (band) { | ||
4493 | case 1: /* 2.4GHz band */ | ||
4494 | *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1); | ||
4495 | *eeprom_ch_info = priv->eeprom.band_1_channels; | ||
4496 | *eeprom_ch_index = iwl3945_eeprom_band_1; | ||
4497 | break; | ||
4498 | case 2: /* 4.9GHz band */ | ||
4499 | *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2); | ||
4500 | *eeprom_ch_info = priv->eeprom.band_2_channels; | ||
4501 | *eeprom_ch_index = iwl3945_eeprom_band_2; | ||
4502 | break; | ||
4503 | case 3: /* 5.2GHz band */ | ||
4504 | *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3); | ||
4505 | *eeprom_ch_info = priv->eeprom.band_3_channels; | ||
4506 | *eeprom_ch_index = iwl3945_eeprom_band_3; | ||
4507 | break; | ||
4508 | case 4: /* 5.5GHz band */ | ||
4509 | *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4); | ||
4510 | *eeprom_ch_info = priv->eeprom.band_4_channels; | ||
4511 | *eeprom_ch_index = iwl3945_eeprom_band_4; | ||
4512 | break; | ||
4513 | case 5: /* 5.7GHz band */ | ||
4514 | *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5); | ||
4515 | *eeprom_ch_info = priv->eeprom.band_5_channels; | ||
4516 | *eeprom_ch_index = iwl3945_eeprom_band_5; | ||
4517 | break; | ||
4518 | default: | ||
4519 | BUG(); | ||
4520 | return; | ||
4521 | } | ||
4522 | } | ||
4523 | |||
4524 | /** | ||
4525 | * iwl3945_get_channel_info - Find driver's private channel info | ||
4526 | * | ||
4527 | * Based on band and channel number. | ||
4528 | */ | ||
4529 | const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv, | ||
4530 | enum ieee80211_band band, u16 channel) | ||
4531 | { | ||
4532 | int i; | ||
4533 | |||
4534 | switch (band) { | ||
4535 | case IEEE80211_BAND_5GHZ: | ||
4536 | for (i = 14; i < priv->channel_count; i++) { | ||
4537 | if (priv->channel_info[i].channel == channel) | ||
4538 | return &priv->channel_info[i]; | ||
4539 | } | ||
4540 | break; | ||
4541 | |||
4542 | case IEEE80211_BAND_2GHZ: | ||
4543 | if (channel >= 1 && channel <= 14) | ||
4544 | return &priv->channel_info[channel - 1]; | ||
4545 | break; | ||
4546 | case IEEE80211_NUM_BANDS: | ||
4547 | WARN_ON(1); | ||
4548 | } | ||
4549 | |||
4550 | return NULL; | ||
4551 | } | ||
4552 | |||
4553 | #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \ | ||
4554 | ? # x " " : "") | ||
4555 | |||
4556 | /** | ||
4557 | * iwl3945_init_channel_map - Set up driver's info for all possible channels | ||
4558 | */ | ||
4559 | static int iwl3945_init_channel_map(struct iwl3945_priv *priv) | ||
4560 | { | ||
4561 | int eeprom_ch_count = 0; | ||
4562 | const u8 *eeprom_ch_index = NULL; | ||
4563 | const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL; | ||
4564 | int band, ch; | ||
4565 | struct iwl3945_channel_info *ch_info; | ||
4566 | |||
4567 | if (priv->channel_count) { | ||
4568 | IWL_DEBUG_INFO("Channel map already initialized.\n"); | ||
4569 | return 0; | ||
4570 | } | ||
4571 | |||
4572 | if (priv->eeprom.version < 0x2f) { | ||
4573 | IWL_WARNING("Unsupported EEPROM version: 0x%04X\n", | ||
4574 | priv->eeprom.version); | ||
4575 | return -EINVAL; | ||
4576 | } | ||
4577 | |||
4578 | IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n"); | ||
4579 | |||
4580 | priv->channel_count = | ||
4581 | ARRAY_SIZE(iwl3945_eeprom_band_1) + | ||
4582 | ARRAY_SIZE(iwl3945_eeprom_band_2) + | ||
4583 | ARRAY_SIZE(iwl3945_eeprom_band_3) + | ||
4584 | ARRAY_SIZE(iwl3945_eeprom_band_4) + | ||
4585 | ARRAY_SIZE(iwl3945_eeprom_band_5); | ||
4586 | |||
4587 | IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count); | ||
4588 | |||
4589 | priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) * | ||
4590 | priv->channel_count, GFP_KERNEL); | ||
4591 | if (!priv->channel_info) { | ||
4592 | IWL_ERROR("Could not allocate channel_info\n"); | ||
4593 | priv->channel_count = 0; | ||
4594 | return -ENOMEM; | ||
4595 | } | ||
4596 | |||
4597 | ch_info = priv->channel_info; | ||
4598 | |||
4599 | /* Loop through the 5 EEPROM bands adding them in order to the | ||
4600 | * channel map we maintain (that contains additional information than | ||
4601 | * what just in the EEPROM) */ | ||
4602 | for (band = 1; band <= 5; band++) { | ||
4603 | |||
4604 | iwl3945_init_band_reference(priv, band, &eeprom_ch_count, | ||
4605 | &eeprom_ch_info, &eeprom_ch_index); | ||
4606 | |||
4607 | /* Loop through each band adding each of the channels */ | ||
4608 | for (ch = 0; ch < eeprom_ch_count; ch++) { | ||
4609 | ch_info->channel = eeprom_ch_index[ch]; | ||
4610 | ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ : | ||
4611 | IEEE80211_BAND_5GHZ; | ||
4612 | |||
4613 | /* permanently store EEPROM's channel regulatory flags | ||
4614 | * and max power in channel info database. */ | ||
4615 | ch_info->eeprom = eeprom_ch_info[ch]; | ||
4616 | |||
4617 | /* Copy the run-time flags so they are there even on | ||
4618 | * invalid channels */ | ||
4619 | ch_info->flags = eeprom_ch_info[ch].flags; | ||
4620 | |||
4621 | if (!(is_channel_valid(ch_info))) { | ||
4622 | IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - " | ||
4623 | "No traffic\n", | ||
4624 | ch_info->channel, | ||
4625 | ch_info->flags, | ||
4626 | is_channel_a_band(ch_info) ? | ||
4627 | "5.2" : "2.4"); | ||
4628 | ch_info++; | ||
4629 | continue; | ||
4630 | } | ||
4631 | |||
4632 | /* Initialize regulatory-based run-time data */ | ||
4633 | ch_info->max_power_avg = ch_info->curr_txpow = | ||
4634 | eeprom_ch_info[ch].max_power_avg; | ||
4635 | ch_info->scan_power = eeprom_ch_info[ch].max_power_avg; | ||
4636 | ch_info->min_power = 0; | ||
4637 | |||
4638 | IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x" | ||
4639 | " %ddBm): Ad-Hoc %ssupported\n", | ||
4640 | ch_info->channel, | ||
4641 | is_channel_a_band(ch_info) ? | ||
4642 | "5.2" : "2.4", | ||
4643 | CHECK_AND_PRINT(VALID), | ||
4644 | CHECK_AND_PRINT(IBSS), | ||
4645 | CHECK_AND_PRINT(ACTIVE), | ||
4646 | CHECK_AND_PRINT(RADAR), | ||
4647 | CHECK_AND_PRINT(WIDE), | ||
4648 | CHECK_AND_PRINT(DFS), | ||
4649 | eeprom_ch_info[ch].flags, | ||
4650 | eeprom_ch_info[ch].max_power_avg, | ||
4651 | ((eeprom_ch_info[ch]. | ||
4652 | flags & EEPROM_CHANNEL_IBSS) | ||
4653 | && !(eeprom_ch_info[ch]. | ||
4654 | flags & EEPROM_CHANNEL_RADAR)) | ||
4655 | ? "" : "not "); | ||
4656 | |||
4657 | /* Set the user_txpower_limit to the highest power | ||
4658 | * supported by any channel */ | ||
4659 | if (eeprom_ch_info[ch].max_power_avg > | ||
4660 | priv->user_txpower_limit) | ||
4661 | priv->user_txpower_limit = | ||
4662 | eeprom_ch_info[ch].max_power_avg; | ||
4663 | |||
4664 | ch_info++; | ||
4665 | } | ||
4666 | } | ||
4667 | |||
4668 | /* Set up txpower settings in driver for all channels */ | ||
4669 | if (iwl3945_txpower_set_from_eeprom(priv)) | ||
4670 | return -EIO; | ||
4671 | |||
4672 | return 0; | ||
4673 | } | ||
4674 | |||
4675 | /* | ||
4676 | * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map | ||
4677 | */ | ||
4678 | static void iwl3945_free_channel_map(struct iwl3945_priv *priv) | ||
4679 | { | ||
4680 | kfree(priv->channel_info); | ||
4681 | priv->channel_count = 0; | ||
4682 | } | ||
4683 | |||
4684 | /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after | ||
4685 | * sending probe req. This should be set long enough to hear probe responses | ||
4686 | * from more than one AP. */ | ||
4687 | #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */ | ||
4688 | #define IWL_ACTIVE_DWELL_TIME_52 (20) | ||
4689 | |||
4690 | #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3) | ||
4691 | #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2) | ||
4692 | |||
4693 | /* For faster active scanning, scan will move to the next channel if fewer than | ||
4694 | * PLCP_QUIET_THRESH packets are heard on this channel within | ||
4695 | * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell | ||
4696 | * time if it's a quiet channel (nothing responded to our probe, and there's | ||
4697 | * no other traffic). | ||
4698 | * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */ | ||
4699 | #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */ | ||
4700 | #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */ | ||
4701 | |||
4702 | /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel. | ||
4703 | * Must be set longer than active dwell time. | ||
4704 | * For the most reliable scan, set > AP beacon interval (typically 100msec). */ | ||
4705 | #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */ | ||
4706 | #define IWL_PASSIVE_DWELL_TIME_52 (10) | ||
4707 | #define IWL_PASSIVE_DWELL_BASE (100) | ||
4708 | #define IWL_CHANNEL_TUNE_TIME 5 | ||
4709 | |||
4710 | #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1))) | ||
4711 | |||
4712 | static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv, | ||
4713 | enum ieee80211_band band, | ||
4714 | u8 n_probes) | ||
4715 | { | ||
4716 | if (band == IEEE80211_BAND_5GHZ) | ||
4717 | return IWL_ACTIVE_DWELL_TIME_52 + | ||
4718 | IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1); | ||
4719 | else | ||
4720 | return IWL_ACTIVE_DWELL_TIME_24 + | ||
4721 | IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1); | ||
4722 | } | ||
4723 | |||
4724 | static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv, | ||
4725 | enum ieee80211_band band) | ||
4726 | { | ||
4727 | u16 passive = (band == IEEE80211_BAND_2GHZ) ? | ||
4728 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 : | ||
4729 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52; | ||
4730 | |||
4731 | if (iwl3945_is_associated(priv)) { | ||
4732 | /* If we're associated, we clamp the maximum passive | ||
4733 | * dwell time to be 98% of the beacon interval (minus | ||
4734 | * 2 * channel tune time) */ | ||
4735 | passive = priv->beacon_int; | ||
4736 | if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive) | ||
4737 | passive = IWL_PASSIVE_DWELL_BASE; | ||
4738 | passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2; | ||
4739 | } | ||
4740 | |||
4741 | return passive; | ||
4742 | } | ||
4743 | |||
4744 | static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, | ||
4745 | enum ieee80211_band band, | 3214 | enum ieee80211_band band, |
4746 | u8 is_active, u8 n_probes, | 3215 | u8 is_active, u8 n_probes, |
4747 | struct iwl3945_scan_channel *scan_ch) | 3216 | struct iwl3945_scan_channel *scan_ch) |
4748 | { | 3217 | { |
4749 | const struct ieee80211_channel *channels = NULL; | 3218 | const struct ieee80211_channel *channels = NULL; |
4750 | const struct ieee80211_supported_band *sband; | 3219 | const struct ieee80211_supported_band *sband; |
4751 | const struct iwl3945_channel_info *ch_info; | 3220 | const struct iwl_channel_info *ch_info; |
4752 | u16 passive_dwell = 0; | 3221 | u16 passive_dwell = 0; |
4753 | u16 active_dwell = 0; | 3222 | u16 active_dwell = 0; |
4754 | int added, i; | 3223 | int added, i; |
4755 | 3224 | ||
4756 | sband = iwl3945_get_band(priv, band); | 3225 | sband = iwl_get_hw_mode(priv, band); |
4757 | if (!sband) | 3226 | if (!sband) |
4758 | return 0; | 3227 | return 0; |
4759 | 3228 | ||
4760 | channels = sband->channels; | 3229 | channels = sband->channels; |
4761 | 3230 | ||
4762 | active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes); | 3231 | active_dwell = iwl_get_active_dwell_time(priv, band, n_probes); |
4763 | passive_dwell = iwl3945_get_passive_dwell_time(priv, band); | 3232 | passive_dwell = iwl_get_passive_dwell_time(priv, band); |
4764 | 3233 | ||
4765 | if (passive_dwell <= active_dwell) | 3234 | if (passive_dwell <= active_dwell) |
4766 | passive_dwell = active_dwell + 1; | 3235 | passive_dwell = active_dwell + 1; |
@@ -4771,7 +3240,7 @@ static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, | |||
4771 | 3240 | ||
4772 | scan_ch->channel = channels[i].hw_value; | 3241 | scan_ch->channel = channels[i].hw_value; |
4773 | 3242 | ||
4774 | ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel); | 3243 | ch_info = iwl_get_channel_info(priv, band, scan_ch->channel); |
4775 | if (!is_channel_valid(ch_info)) { | 3244 | if (!is_channel_valid(ch_info)) { |
4776 | IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n", | 3245 | IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n", |
4777 | scan_ch->channel); | 3246 | scan_ch->channel); |
@@ -4798,12 +3267,12 @@ static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, | |||
4798 | * hearing clear Rx packet).*/ | 3267 | * hearing clear Rx packet).*/ |
4799 | if (IWL_UCODE_API(priv->ucode_ver) >= 2) { | 3268 | if (IWL_UCODE_API(priv->ucode_ver) >= 2) { |
4800 | if (n_probes) | 3269 | if (n_probes) |
4801 | scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes); | 3270 | scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes); |
4802 | } else { | 3271 | } else { |
4803 | /* uCode v1 does not allow setting direct probe bits on | 3272 | /* uCode v1 does not allow setting direct probe bits on |
4804 | * passive channel. */ | 3273 | * passive channel. */ |
4805 | if ((scan_ch->type & 1) && n_probes) | 3274 | if ((scan_ch->type & 1) && n_probes) |
4806 | scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes); | 3275 | scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes); |
4807 | } | 3276 | } |
4808 | 3277 | ||
4809 | /* Set txpower levels to defaults */ | 3278 | /* Set txpower levels to defaults */ |
@@ -4835,7 +3304,7 @@ static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, | |||
4835 | return added; | 3304 | return added; |
4836 | } | 3305 | } |
4837 | 3306 | ||
4838 | static void iwl3945_init_hw_rates(struct iwl3945_priv *priv, | 3307 | static void iwl3945_init_hw_rates(struct iwl_priv *priv, |
4839 | struct ieee80211_rate *rates) | 3308 | struct ieee80211_rate *rates) |
4840 | { | 3309 | { |
4841 | int i; | 3310 | int i; |
@@ -4845,7 +3314,7 @@ static void iwl3945_init_hw_rates(struct iwl3945_priv *priv, | |||
4845 | rates[i].hw_value = i; /* Rate scaling will work on indexes */ | 3314 | rates[i].hw_value = i; /* Rate scaling will work on indexes */ |
4846 | rates[i].hw_value_short = i; | 3315 | rates[i].hw_value_short = i; |
4847 | rates[i].flags = 0; | 3316 | rates[i].flags = 0; |
4848 | if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) { | 3317 | if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) { |
4849 | /* | 3318 | /* |
4850 | * If CCK != 1M then set short preamble rate flag. | 3319 | * If CCK != 1M then set short preamble rate flag. |
4851 | */ | 3320 | */ |
@@ -4855,145 +3324,13 @@ static void iwl3945_init_hw_rates(struct iwl3945_priv *priv, | |||
4855 | } | 3324 | } |
4856 | } | 3325 | } |
4857 | 3326 | ||
4858 | /** | ||
4859 | * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom | ||
4860 | */ | ||
4861 | static int iwl3945_init_geos(struct iwl3945_priv *priv) | ||
4862 | { | ||
4863 | struct iwl3945_channel_info *ch; | ||
4864 | struct ieee80211_supported_band *sband; | ||
4865 | struct ieee80211_channel *channels; | ||
4866 | struct ieee80211_channel *geo_ch; | ||
4867 | struct ieee80211_rate *rates; | ||
4868 | int i = 0; | ||
4869 | |||
4870 | if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates || | ||
4871 | priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) { | ||
4872 | IWL_DEBUG_INFO("Geography modes already initialized.\n"); | ||
4873 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); | ||
4874 | return 0; | ||
4875 | } | ||
4876 | |||
4877 | channels = kzalloc(sizeof(struct ieee80211_channel) * | ||
4878 | priv->channel_count, GFP_KERNEL); | ||
4879 | if (!channels) | ||
4880 | return -ENOMEM; | ||
4881 | |||
4882 | rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)), | ||
4883 | GFP_KERNEL); | ||
4884 | if (!rates) { | ||
4885 | kfree(channels); | ||
4886 | return -ENOMEM; | ||
4887 | } | ||
4888 | |||
4889 | /* 5.2GHz channels start after the 2.4GHz channels */ | ||
4890 | sband = &priv->bands[IEEE80211_BAND_5GHZ]; | ||
4891 | sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)]; | ||
4892 | /* just OFDM */ | ||
4893 | sband->bitrates = &rates[IWL_FIRST_OFDM_RATE]; | ||
4894 | sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE; | ||
4895 | |||
4896 | sband = &priv->bands[IEEE80211_BAND_2GHZ]; | ||
4897 | sband->channels = channels; | ||
4898 | /* OFDM & CCK */ | ||
4899 | sband->bitrates = rates; | ||
4900 | sband->n_bitrates = IWL_RATE_COUNT; | ||
4901 | |||
4902 | priv->ieee_channels = channels; | ||
4903 | priv->ieee_rates = rates; | ||
4904 | |||
4905 | iwl3945_init_hw_rates(priv, rates); | ||
4906 | |||
4907 | for (i = 0; i < priv->channel_count; i++) { | ||
4908 | ch = &priv->channel_info[i]; | ||
4909 | |||
4910 | /* FIXME: might be removed if scan is OK*/ | ||
4911 | if (!is_channel_valid(ch)) | ||
4912 | continue; | ||
4913 | |||
4914 | if (is_channel_a_band(ch)) | ||
4915 | sband = &priv->bands[IEEE80211_BAND_5GHZ]; | ||
4916 | else | ||
4917 | sband = &priv->bands[IEEE80211_BAND_2GHZ]; | ||
4918 | |||
4919 | geo_ch = &sband->channels[sband->n_channels++]; | ||
4920 | |||
4921 | geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel); | ||
4922 | geo_ch->max_power = ch->max_power_avg; | ||
4923 | geo_ch->max_antenna_gain = 0xff; | ||
4924 | geo_ch->hw_value = ch->channel; | ||
4925 | |||
4926 | if (is_channel_valid(ch)) { | ||
4927 | if (!(ch->flags & EEPROM_CHANNEL_IBSS)) | ||
4928 | geo_ch->flags |= IEEE80211_CHAN_NO_IBSS; | ||
4929 | |||
4930 | if (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) | ||
4931 | geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN; | ||
4932 | |||
4933 | if (ch->flags & EEPROM_CHANNEL_RADAR) | ||
4934 | geo_ch->flags |= IEEE80211_CHAN_RADAR; | ||
4935 | |||
4936 | if (ch->max_power_avg > priv->max_channel_txpower_limit) | ||
4937 | priv->max_channel_txpower_limit = | ||
4938 | ch->max_power_avg; | ||
4939 | } else { | ||
4940 | geo_ch->flags |= IEEE80211_CHAN_DISABLED; | ||
4941 | } | ||
4942 | |||
4943 | /* Save flags for reg domain usage */ | ||
4944 | geo_ch->orig_flags = geo_ch->flags; | ||
4945 | |||
4946 | IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n", | ||
4947 | ch->channel, geo_ch->center_freq, | ||
4948 | is_channel_a_band(ch) ? "5.2" : "2.4", | ||
4949 | geo_ch->flags & IEEE80211_CHAN_DISABLED ? | ||
4950 | "restricted" : "valid", | ||
4951 | geo_ch->flags); | ||
4952 | } | ||
4953 | |||
4954 | if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && | ||
4955 | priv->cfg->sku & IWL_SKU_A) { | ||
4956 | printk(KERN_INFO DRV_NAME | ||
4957 | ": Incorrectly detected BG card as ABG. Please send " | ||
4958 | "your PCI ID 0x%04X:0x%04X to maintainer.\n", | ||
4959 | priv->pci_dev->device, priv->pci_dev->subsystem_device); | ||
4960 | priv->cfg->sku &= ~IWL_SKU_A; | ||
4961 | } | ||
4962 | |||
4963 | printk(KERN_INFO DRV_NAME | ||
4964 | ": Tunable channels: %d 802.11bg, %d 802.11a channels\n", | ||
4965 | priv->bands[IEEE80211_BAND_2GHZ].n_channels, | ||
4966 | priv->bands[IEEE80211_BAND_5GHZ].n_channels); | ||
4967 | |||
4968 | if (priv->bands[IEEE80211_BAND_2GHZ].n_channels) | ||
4969 | priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | ||
4970 | &priv->bands[IEEE80211_BAND_2GHZ]; | ||
4971 | if (priv->bands[IEEE80211_BAND_5GHZ].n_channels) | ||
4972 | priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = | ||
4973 | &priv->bands[IEEE80211_BAND_5GHZ]; | ||
4974 | |||
4975 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); | ||
4976 | |||
4977 | return 0; | ||
4978 | } | ||
4979 | |||
4980 | /* | ||
4981 | * iwl3945_free_geos - undo allocations in iwl3945_init_geos | ||
4982 | */ | ||
4983 | static void iwl3945_free_geos(struct iwl3945_priv *priv) | ||
4984 | { | ||
4985 | kfree(priv->ieee_channels); | ||
4986 | kfree(priv->ieee_rates); | ||
4987 | clear_bit(STATUS_GEO_CONFIGURED, &priv->status); | ||
4988 | } | ||
4989 | |||
4990 | /****************************************************************************** | 3327 | /****************************************************************************** |
4991 | * | 3328 | * |
4992 | * uCode download functions | 3329 | * uCode download functions |
4993 | * | 3330 | * |
4994 | ******************************************************************************/ | 3331 | ******************************************************************************/ |
4995 | 3332 | ||
4996 | static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv) | 3333 | static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv) |
4997 | { | 3334 | { |
4998 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); | 3335 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
4999 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | 3336 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); |
@@ -5007,7 +3344,7 @@ static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv) | |||
5007 | * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host, | 3344 | * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host, |
5008 | * looking at all data. | 3345 | * looking at all data. |
5009 | */ | 3346 | */ |
5010 | static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 *image, u32 len) | 3347 | static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len) |
5011 | { | 3348 | { |
5012 | u32 val; | 3349 | u32 val; |
5013 | u32 save_len = len; | 3350 | u32 save_len = len; |
@@ -5016,20 +3353,21 @@ static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 *image, u3 | |||
5016 | 3353 | ||
5017 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); | 3354 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); |
5018 | 3355 | ||
5019 | rc = iwl3945_grab_nic_access(priv); | 3356 | rc = iwl_grab_nic_access(priv); |
5020 | if (rc) | 3357 | if (rc) |
5021 | return rc; | 3358 | return rc; |
5022 | 3359 | ||
5023 | iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND); | 3360 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
3361 | IWL39_RTC_INST_LOWER_BOUND); | ||
5024 | 3362 | ||
5025 | errcnt = 0; | 3363 | errcnt = 0; |
5026 | for (; len > 0; len -= sizeof(u32), image++) { | 3364 | for (; len > 0; len -= sizeof(u32), image++) { |
5027 | /* read data comes through single port, auto-incr addr */ | 3365 | /* read data comes through single port, auto-incr addr */ |
5028 | /* NOTE: Use the debugless read so we don't flood kernel log | 3366 | /* NOTE: Use the debugless read so we don't flood kernel log |
5029 | * if IWL_DL_IO is set */ | 3367 | * if IWL_DL_IO is set */ |
5030 | val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT); | 3368 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
5031 | if (val != le32_to_cpu(*image)) { | 3369 | if (val != le32_to_cpu(*image)) { |
5032 | IWL_ERROR("uCode INST section is invalid at " | 3370 | IWL_ERR(priv, "uCode INST section is invalid at " |
5033 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | 3371 | "offset 0x%x, is 0x%x, s/b 0x%x\n", |
5034 | save_len - len, val, le32_to_cpu(*image)); | 3372 | save_len - len, val, le32_to_cpu(*image)); |
5035 | rc = -EIO; | 3373 | rc = -EIO; |
@@ -5039,7 +3377,7 @@ static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 *image, u3 | |||
5039 | } | 3377 | } |
5040 | } | 3378 | } |
5041 | 3379 | ||
5042 | iwl3945_release_nic_access(priv); | 3380 | iwl_release_nic_access(priv); |
5043 | 3381 | ||
5044 | if (!errcnt) | 3382 | if (!errcnt) |
5045 | IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n"); | 3383 | IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n"); |
@@ -5053,7 +3391,7 @@ static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 *image, u3 | |||
5053 | * using sample data 100 bytes apart. If these sample points are good, | 3391 | * using sample data 100 bytes apart. If these sample points are good, |
5054 | * it's a pretty good bet that everything between them is good, too. | 3392 | * it's a pretty good bet that everything between them is good, too. |
5055 | */ | 3393 | */ |
5056 | static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len) | 3394 | static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len) |
5057 | { | 3395 | { |
5058 | u32 val; | 3396 | u32 val; |
5059 | int rc = 0; | 3397 | int rc = 0; |
@@ -5062,7 +3400,7 @@ static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, | |||
5062 | 3400 | ||
5063 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); | 3401 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); |
5064 | 3402 | ||
5065 | rc = iwl3945_grab_nic_access(priv); | 3403 | rc = iwl_grab_nic_access(priv); |
5066 | if (rc) | 3404 | if (rc) |
5067 | return rc; | 3405 | return rc; |
5068 | 3406 | ||
@@ -5070,12 +3408,12 @@ static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, | |||
5070 | /* read data comes through single port, auto-incr addr */ | 3408 | /* read data comes through single port, auto-incr addr */ |
5071 | /* NOTE: Use the debugless read so we don't flood kernel log | 3409 | /* NOTE: Use the debugless read so we don't flood kernel log |
5072 | * if IWL_DL_IO is set */ | 3410 | * if IWL_DL_IO is set */ |
5073 | iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, | 3411 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
5074 | i + RTC_INST_LOWER_BOUND); | 3412 | i + IWL39_RTC_INST_LOWER_BOUND); |
5075 | val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT); | 3413 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
5076 | if (val != le32_to_cpu(*image)) { | 3414 | if (val != le32_to_cpu(*image)) { |
5077 | #if 0 /* Enable this if you want to see details */ | 3415 | #if 0 /* Enable this if you want to see details */ |
5078 | IWL_ERROR("uCode INST section is invalid at " | 3416 | IWL_ERR(priv, "uCode INST section is invalid at " |
5079 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | 3417 | "offset 0x%x, is 0x%x, s/b 0x%x\n", |
5080 | i, val, *image); | 3418 | i, val, *image); |
5081 | #endif | 3419 | #endif |
@@ -5086,7 +3424,7 @@ static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, | |||
5086 | } | 3424 | } |
5087 | } | 3425 | } |
5088 | 3426 | ||
5089 | iwl3945_release_nic_access(priv); | 3427 | iwl_release_nic_access(priv); |
5090 | 3428 | ||
5091 | return rc; | 3429 | return rc; |
5092 | } | 3430 | } |
@@ -5096,7 +3434,7 @@ static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, | |||
5096 | * iwl3945_verify_ucode - determine which instruction image is in SRAM, | 3434 | * iwl3945_verify_ucode - determine which instruction image is in SRAM, |
5097 | * and verify its contents | 3435 | * and verify its contents |
5098 | */ | 3436 | */ |
5099 | static int iwl3945_verify_ucode(struct iwl3945_priv *priv) | 3437 | static int iwl3945_verify_ucode(struct iwl_priv *priv) |
5100 | { | 3438 | { |
5101 | __le32 *image; | 3439 | __le32 *image; |
5102 | u32 len; | 3440 | u32 len; |
@@ -5129,7 +3467,7 @@ static int iwl3945_verify_ucode(struct iwl3945_priv *priv) | |||
5129 | return 0; | 3467 | return 0; |
5130 | } | 3468 | } |
5131 | 3469 | ||
5132 | IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); | 3470 | IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); |
5133 | 3471 | ||
5134 | /* Since nothing seems to match, show first several data entries in | 3472 | /* Since nothing seems to match, show first several data entries in |
5135 | * instruction SRAM, so maybe visual inspection will give a clue. | 3473 | * instruction SRAM, so maybe visual inspection will give a clue. |
@@ -5141,160 +3479,10 @@ static int iwl3945_verify_ucode(struct iwl3945_priv *priv) | |||
5141 | return rc; | 3479 | return rc; |
5142 | } | 3480 | } |
5143 | 3481 | ||
5144 | 3482 | static void iwl3945_nic_start(struct iwl_priv *priv) | |
5145 | /* check contents of special bootstrap uCode SRAM */ | ||
5146 | static int iwl3945_verify_bsm(struct iwl3945_priv *priv) | ||
5147 | { | ||
5148 | __le32 *image = priv->ucode_boot.v_addr; | ||
5149 | u32 len = priv->ucode_boot.len; | ||
5150 | u32 reg; | ||
5151 | u32 val; | ||
5152 | |||
5153 | IWL_DEBUG_INFO("Begin verify bsm\n"); | ||
5154 | |||
5155 | /* verify BSM SRAM contents */ | ||
5156 | val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG); | ||
5157 | for (reg = BSM_SRAM_LOWER_BOUND; | ||
5158 | reg < BSM_SRAM_LOWER_BOUND + len; | ||
5159 | reg += sizeof(u32), image++) { | ||
5160 | val = iwl3945_read_prph(priv, reg); | ||
5161 | if (val != le32_to_cpu(*image)) { | ||
5162 | IWL_ERROR("BSM uCode verification failed at " | ||
5163 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", | ||
5164 | BSM_SRAM_LOWER_BOUND, | ||
5165 | reg - BSM_SRAM_LOWER_BOUND, len, | ||
5166 | val, le32_to_cpu(*image)); | ||
5167 | return -EIO; | ||
5168 | } | ||
5169 | } | ||
5170 | |||
5171 | IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n"); | ||
5172 | |||
5173 | return 0; | ||
5174 | } | ||
5175 | |||
5176 | /** | ||
5177 | * iwl3945_load_bsm - Load bootstrap instructions | ||
5178 | * | ||
5179 | * BSM operation: | ||
5180 | * | ||
5181 | * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program | ||
5182 | * in special SRAM that does not power down during RFKILL. When powering back | ||
5183 | * up after power-saving sleeps (or during initial uCode load), the BSM loads | ||
5184 | * the bootstrap program into the on-board processor, and starts it. | ||
5185 | * | ||
5186 | * The bootstrap program loads (via DMA) instructions and data for a new | ||
5187 | * program from host DRAM locations indicated by the host driver in the | ||
5188 | * BSM_DRAM_* registers. Once the new program is loaded, it starts | ||
5189 | * automatically. | ||
5190 | * | ||
5191 | * When initializing the NIC, the host driver points the BSM to the | ||
5192 | * "initialize" uCode image. This uCode sets up some internal data, then | ||
5193 | * notifies host via "initialize alive" that it is complete. | ||
5194 | * | ||
5195 | * The host then replaces the BSM_DRAM_* pointer values to point to the | ||
5196 | * normal runtime uCode instructions and a backup uCode data cache buffer | ||
5197 | * (filled initially with starting data values for the on-board processor), | ||
5198 | * then triggers the "initialize" uCode to load and launch the runtime uCode, | ||
5199 | * which begins normal operation. | ||
5200 | * | ||
5201 | * When doing a power-save shutdown, runtime uCode saves data SRAM into | ||
5202 | * the backup data cache in DRAM before SRAM is powered down. | ||
5203 | * | ||
5204 | * When powering back up, the BSM loads the bootstrap program. This reloads | ||
5205 | * the runtime uCode instructions and the backup data cache into SRAM, | ||
5206 | * and re-launches the runtime uCode from where it left off. | ||
5207 | */ | ||
5208 | static int iwl3945_load_bsm(struct iwl3945_priv *priv) | ||
5209 | { | ||
5210 | __le32 *image = priv->ucode_boot.v_addr; | ||
5211 | u32 len = priv->ucode_boot.len; | ||
5212 | dma_addr_t pinst; | ||
5213 | dma_addr_t pdata; | ||
5214 | u32 inst_len; | ||
5215 | u32 data_len; | ||
5216 | int rc; | ||
5217 | int i; | ||
5218 | u32 done; | ||
5219 | u32 reg_offset; | ||
5220 | |||
5221 | IWL_DEBUG_INFO("Begin load bsm\n"); | ||
5222 | |||
5223 | /* make sure bootstrap program is no larger than BSM's SRAM size */ | ||
5224 | if (len > IWL_MAX_BSM_SIZE) | ||
5225 | return -EINVAL; | ||
5226 | |||
5227 | /* Tell bootstrap uCode where to find the "Initialize" uCode | ||
5228 | * in host DRAM ... host DRAM physical address bits 31:0 for 3945. | ||
5229 | * NOTE: iwl3945_initialize_alive_start() will replace these values, | ||
5230 | * after the "initialize" uCode has run, to point to | ||
5231 | * runtime/protocol instructions and backup data cache. */ | ||
5232 | pinst = priv->ucode_init.p_addr; | ||
5233 | pdata = priv->ucode_init_data.p_addr; | ||
5234 | inst_len = priv->ucode_init.len; | ||
5235 | data_len = priv->ucode_init_data.len; | ||
5236 | |||
5237 | rc = iwl3945_grab_nic_access(priv); | ||
5238 | if (rc) | ||
5239 | return rc; | ||
5240 | |||
5241 | iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); | ||
5242 | iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | ||
5243 | iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); | ||
5244 | iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); | ||
5245 | |||
5246 | /* Fill BSM memory with bootstrap instructions */ | ||
5247 | for (reg_offset = BSM_SRAM_LOWER_BOUND; | ||
5248 | reg_offset < BSM_SRAM_LOWER_BOUND + len; | ||
5249 | reg_offset += sizeof(u32), image++) | ||
5250 | _iwl3945_write_prph(priv, reg_offset, | ||
5251 | le32_to_cpu(*image)); | ||
5252 | |||
5253 | rc = iwl3945_verify_bsm(priv); | ||
5254 | if (rc) { | ||
5255 | iwl3945_release_nic_access(priv); | ||
5256 | return rc; | ||
5257 | } | ||
5258 | |||
5259 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ | ||
5260 | iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); | ||
5261 | iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG, | ||
5262 | RTC_INST_LOWER_BOUND); | ||
5263 | iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); | ||
5264 | |||
5265 | /* Load bootstrap code into instruction SRAM now, | ||
5266 | * to prepare to load "initialize" uCode */ | ||
5267 | iwl3945_write_prph(priv, BSM_WR_CTRL_REG, | ||
5268 | BSM_WR_CTRL_REG_BIT_START); | ||
5269 | |||
5270 | /* Wait for load of bootstrap uCode to finish */ | ||
5271 | for (i = 0; i < 100; i++) { | ||
5272 | done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG); | ||
5273 | if (!(done & BSM_WR_CTRL_REG_BIT_START)) | ||
5274 | break; | ||
5275 | udelay(10); | ||
5276 | } | ||
5277 | if (i < 100) | ||
5278 | IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i); | ||
5279 | else { | ||
5280 | IWL_ERROR("BSM write did not complete!\n"); | ||
5281 | return -EIO; | ||
5282 | } | ||
5283 | |||
5284 | /* Enable future boot loads whenever power management unit triggers it | ||
5285 | * (e.g. when powering back up after power-save shutdown) */ | ||
5286 | iwl3945_write_prph(priv, BSM_WR_CTRL_REG, | ||
5287 | BSM_WR_CTRL_REG_BIT_START_EN); | ||
5288 | |||
5289 | iwl3945_release_nic_access(priv); | ||
5290 | |||
5291 | return 0; | ||
5292 | } | ||
5293 | |||
5294 | static void iwl3945_nic_start(struct iwl3945_priv *priv) | ||
5295 | { | 3483 | { |
5296 | /* Remove all resets to allow NIC to operate */ | 3484 | /* Remove all resets to allow NIC to operate */ |
5297 | iwl3945_write32(priv, CSR_RESET, 0); | 3485 | iwl_write32(priv, CSR_RESET, 0); |
5298 | } | 3486 | } |
5299 | 3487 | ||
5300 | /** | 3488 | /** |
@@ -5302,9 +3490,9 @@ static void iwl3945_nic_start(struct iwl3945_priv *priv) | |||
5302 | * | 3490 | * |
5303 | * Copy into buffers for card to fetch via bus-mastering | 3491 | * Copy into buffers for card to fetch via bus-mastering |
5304 | */ | 3492 | */ |
5305 | static int iwl3945_read_ucode(struct iwl3945_priv *priv) | 3493 | static int iwl3945_read_ucode(struct iwl_priv *priv) |
5306 | { | 3494 | { |
5307 | struct iwl3945_ucode *ucode; | 3495 | struct iwl_ucode *ucode; |
5308 | int ret = -EINVAL, index; | 3496 | int ret = -EINVAL, index; |
5309 | const struct firmware *ucode_raw; | 3497 | const struct firmware *ucode_raw; |
5310 | /* firmware file name contains uCode/driver compatibility version */ | 3498 | /* firmware file name contains uCode/driver compatibility version */ |
@@ -5322,7 +3510,7 @@ static int iwl3945_read_ucode(struct iwl3945_priv *priv) | |||
5322 | sprintf(buf, "%s%u%s", name_pre, index, ".ucode"); | 3510 | sprintf(buf, "%s%u%s", name_pre, index, ".ucode"); |
5323 | ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev); | 3511 | ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev); |
5324 | if (ret < 0) { | 3512 | if (ret < 0) { |
5325 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | 3513 | IWL_ERR(priv, "%s firmware file req failed: %d\n", |
5326 | buf, ret); | 3514 | buf, ret); |
5327 | if (ret == -ENOENT) | 3515 | if (ret == -ENOENT) |
5328 | continue; | 3516 | continue; |
@@ -5330,7 +3518,9 @@ static int iwl3945_read_ucode(struct iwl3945_priv *priv) | |||
5330 | goto error; | 3518 | goto error; |
5331 | } else { | 3519 | } else { |
5332 | if (index < api_max) | 3520 | if (index < api_max) |
5333 | IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n", | 3521 | IWL_ERR(priv, "Loaded firmware %s, " |
3522 | "which is deprecated. " | ||
3523 | " Please use API v%u instead.\n", | ||
5334 | buf, api_max); | 3524 | buf, api_max); |
5335 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | 3525 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", |
5336 | buf, ucode_raw->size); | 3526 | buf, ucode_raw->size); |
@@ -5343,7 +3533,7 @@ static int iwl3945_read_ucode(struct iwl3945_priv *priv) | |||
5343 | 3533 | ||
5344 | /* Make sure that we got at least our header! */ | 3534 | /* Make sure that we got at least our header! */ |
5345 | if (ucode_raw->size < sizeof(*ucode)) { | 3535 | if (ucode_raw->size < sizeof(*ucode)) { |
5346 | IWL_ERROR("File size way too small!\n"); | 3536 | IWL_ERR(priv, "File size way too small!\n"); |
5347 | ret = -EINVAL; | 3537 | ret = -EINVAL; |
5348 | goto err_release; | 3538 | goto err_release; |
5349 | } | 3539 | } |
@@ -5364,7 +3554,7 @@ static int iwl3945_read_ucode(struct iwl3945_priv *priv) | |||
5364 | * on the API version read from firware header from here on forward */ | 3554 | * on the API version read from firware header from here on forward */ |
5365 | 3555 | ||
5366 | if (api_ver < api_min || api_ver > api_max) { | 3556 | if (api_ver < api_min || api_ver > api_max) { |
5367 | IWL_ERROR("Driver unable to support your firmware API. " | 3557 | IWL_ERR(priv, "Driver unable to support your firmware API. " |
5368 | "Driver supports v%u, firmware is v%u.\n", | 3558 | "Driver supports v%u, firmware is v%u.\n", |
5369 | api_max, api_ver); | 3559 | api_max, api_ver); |
5370 | priv->ucode_ver = 0; | 3560 | priv->ucode_ver = 0; |
@@ -5372,16 +3562,17 @@ static int iwl3945_read_ucode(struct iwl3945_priv *priv) | |||
5372 | goto err_release; | 3562 | goto err_release; |
5373 | } | 3563 | } |
5374 | if (api_ver != api_max) | 3564 | if (api_ver != api_max) |
5375 | IWL_ERROR("Firmware has old API version. Expected %u, " | 3565 | IWL_ERR(priv, "Firmware has old API version. Expected %u, " |
5376 | "got %u. New firmware can be obtained " | 3566 | "got %u. New firmware can be obtained " |
5377 | "from http://www.intellinuxwireless.org.\n", | 3567 | "from http://www.intellinuxwireless.org.\n", |
5378 | api_max, api_ver); | 3568 | api_max, api_ver); |
5379 | 3569 | ||
5380 | printk(KERN_INFO DRV_NAME " loaded firmware version %u.%u.%u.%u\n", | 3570 | IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n", |
5381 | IWL_UCODE_MAJOR(priv->ucode_ver), | 3571 | IWL_UCODE_MAJOR(priv->ucode_ver), |
5382 | IWL_UCODE_MINOR(priv->ucode_ver), | 3572 | IWL_UCODE_MINOR(priv->ucode_ver), |
5383 | IWL_UCODE_API(priv->ucode_ver), | 3573 | IWL_UCODE_API(priv->ucode_ver), |
5384 | IWL_UCODE_SERIAL(priv->ucode_ver)); | 3574 | IWL_UCODE_SERIAL(priv->ucode_ver)); |
3575 | |||
5385 | IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n", | 3576 | IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n", |
5386 | priv->ucode_ver); | 3577 | priv->ucode_ver); |
5387 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size); | 3578 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size); |
@@ -5403,32 +3594,32 @@ static int iwl3945_read_ucode(struct iwl3945_priv *priv) | |||
5403 | } | 3594 | } |
5404 | 3595 | ||
5405 | /* Verify that uCode images will fit in card's SRAM */ | 3596 | /* Verify that uCode images will fit in card's SRAM */ |
5406 | if (inst_size > IWL_MAX_INST_SIZE) { | 3597 | if (inst_size > IWL39_MAX_INST_SIZE) { |
5407 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", | 3598 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
5408 | inst_size); | 3599 | inst_size); |
5409 | ret = -EINVAL; | 3600 | ret = -EINVAL; |
5410 | goto err_release; | 3601 | goto err_release; |
5411 | } | 3602 | } |
5412 | 3603 | ||
5413 | if (data_size > IWL_MAX_DATA_SIZE) { | 3604 | if (data_size > IWL39_MAX_DATA_SIZE) { |
5414 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", | 3605 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
5415 | data_size); | 3606 | data_size); |
5416 | ret = -EINVAL; | 3607 | ret = -EINVAL; |
5417 | goto err_release; | 3608 | goto err_release; |
5418 | } | 3609 | } |
5419 | if (init_size > IWL_MAX_INST_SIZE) { | 3610 | if (init_size > IWL39_MAX_INST_SIZE) { |
5420 | IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n", | 3611 | IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n", |
5421 | init_size); | 3612 | init_size); |
5422 | ret = -EINVAL; | 3613 | ret = -EINVAL; |
5423 | goto err_release; | 3614 | goto err_release; |
5424 | } | 3615 | } |
5425 | if (init_data_size > IWL_MAX_DATA_SIZE) { | 3616 | if (init_data_size > IWL39_MAX_DATA_SIZE) { |
5426 | IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n", | 3617 | IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n", |
5427 | init_data_size); | 3618 | init_data_size); |
5428 | ret = -EINVAL; | 3619 | ret = -EINVAL; |
5429 | goto err_release; | 3620 | goto err_release; |
5430 | } | 3621 | } |
5431 | if (boot_size > IWL_MAX_BSM_SIZE) { | 3622 | if (boot_size > IWL39_MAX_BSM_SIZE) { |
5432 | IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n", | 3623 | IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n", |
5433 | boot_size); | 3624 | boot_size); |
5434 | ret = -EINVAL; | 3625 | ret = -EINVAL; |
@@ -5522,7 +3713,7 @@ static int iwl3945_read_ucode(struct iwl3945_priv *priv) | |||
5522 | return 0; | 3713 | return 0; |
5523 | 3714 | ||
5524 | err_pci_alloc: | 3715 | err_pci_alloc: |
5525 | IWL_ERROR("failed to allocate pci memory\n"); | 3716 | IWL_ERR(priv, "failed to allocate pci memory\n"); |
5526 | ret = -ENOMEM; | 3717 | ret = -ENOMEM; |
5527 | iwl3945_dealloc_ucode_pci(priv); | 3718 | iwl3945_dealloc_ucode_pci(priv); |
5528 | 3719 | ||
@@ -5543,7 +3734,7 @@ static int iwl3945_read_ucode(struct iwl3945_priv *priv) | |||
5543 | * We need to replace them to load runtime uCode inst and data, | 3734 | * We need to replace them to load runtime uCode inst and data, |
5544 | * and to save runtime data when powering down. | 3735 | * and to save runtime data when powering down. |
5545 | */ | 3736 | */ |
5546 | static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv) | 3737 | static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv) |
5547 | { | 3738 | { |
5548 | dma_addr_t pinst; | 3739 | dma_addr_t pinst; |
5549 | dma_addr_t pdata; | 3740 | dma_addr_t pdata; |
@@ -5555,24 +3746,24 @@ static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv) | |||
5555 | pdata = priv->ucode_data_backup.p_addr; | 3746 | pdata = priv->ucode_data_backup.p_addr; |
5556 | 3747 | ||
5557 | spin_lock_irqsave(&priv->lock, flags); | 3748 | spin_lock_irqsave(&priv->lock, flags); |
5558 | rc = iwl3945_grab_nic_access(priv); | 3749 | rc = iwl_grab_nic_access(priv); |
5559 | if (rc) { | 3750 | if (rc) { |
5560 | spin_unlock_irqrestore(&priv->lock, flags); | 3751 | spin_unlock_irqrestore(&priv->lock, flags); |
5561 | return rc; | 3752 | return rc; |
5562 | } | 3753 | } |
5563 | 3754 | ||
5564 | /* Tell bootstrap uCode where to find image to load */ | 3755 | /* Tell bootstrap uCode where to find image to load */ |
5565 | iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); | 3756 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
5566 | iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | 3757 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); |
5567 | iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, | 3758 | iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, |
5568 | priv->ucode_data.len); | 3759 | priv->ucode_data.len); |
5569 | 3760 | ||
5570 | /* Inst byte count must be last to set up, bit 31 signals uCode | 3761 | /* Inst byte count must be last to set up, bit 31 signals uCode |
5571 | * that all new ptr/size info is in place */ | 3762 | * that all new ptr/size info is in place */ |
5572 | iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, | 3763 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, |
5573 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); | 3764 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); |
5574 | 3765 | ||
5575 | iwl3945_release_nic_access(priv); | 3766 | iwl_release_nic_access(priv); |
5576 | 3767 | ||
5577 | spin_unlock_irqrestore(&priv->lock, flags); | 3768 | spin_unlock_irqrestore(&priv->lock, flags); |
5578 | 3769 | ||
@@ -5588,7 +3779,7 @@ static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv) | |||
5588 | * | 3779 | * |
5589 | * Tell "initialize" uCode to go ahead and load the runtime uCode. | 3780 | * Tell "initialize" uCode to go ahead and load the runtime uCode. |
5590 | */ | 3781 | */ |
5591 | static void iwl3945_init_alive_start(struct iwl3945_priv *priv) | 3782 | static void iwl3945_init_alive_start(struct iwl_priv *priv) |
5592 | { | 3783 | { |
5593 | /* Check alive response for "valid" sign from uCode */ | 3784 | /* Check alive response for "valid" sign from uCode */ |
5594 | if (priv->card_alive_init.is_valid != UCODE_VALID_OK) { | 3785 | if (priv->card_alive_init.is_valid != UCODE_VALID_OK) { |
@@ -5634,7 +3825,7 @@ static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, | |||
5634 | * from protocol/runtime uCode (initialization uCode's | 3825 | * from protocol/runtime uCode (initialization uCode's |
5635 | * Alive gets handled by iwl3945_init_alive_start()). | 3826 | * Alive gets handled by iwl3945_init_alive_start()). |
5636 | */ | 3827 | */ |
5637 | static void iwl3945_alive_start(struct iwl3945_priv *priv) | 3828 | static void iwl3945_alive_start(struct iwl_priv *priv) |
5638 | { | 3829 | { |
5639 | int rc = 0; | 3830 | int rc = 0; |
5640 | int thermal_spin = 0; | 3831 | int thermal_spin = 0; |
@@ -5661,15 +3852,15 @@ static void iwl3945_alive_start(struct iwl3945_priv *priv) | |||
5661 | 3852 | ||
5662 | iwl3945_clear_stations_table(priv); | 3853 | iwl3945_clear_stations_table(priv); |
5663 | 3854 | ||
5664 | rc = iwl3945_grab_nic_access(priv); | 3855 | rc = iwl_grab_nic_access(priv); |
5665 | if (rc) { | 3856 | if (rc) { |
5666 | IWL_WARNING("Can not read RFKILL status from adapter\n"); | 3857 | IWL_WARN(priv, "Can not read RFKILL status from adapter\n"); |
5667 | return; | 3858 | return; |
5668 | } | 3859 | } |
5669 | 3860 | ||
5670 | rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG); | 3861 | rfkill = iwl_read_prph(priv, APMG_RFKILL_REG); |
5671 | IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill); | 3862 | IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill); |
5672 | iwl3945_release_nic_access(priv); | 3863 | iwl_release_nic_access(priv); |
5673 | 3864 | ||
5674 | if (rfkill & 0x1) { | 3865 | if (rfkill & 0x1) { |
5675 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | 3866 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
@@ -5692,7 +3883,7 @@ static void iwl3945_alive_start(struct iwl3945_priv *priv) | |||
5692 | /* Clear out the uCode error bit if it is set */ | 3883 | /* Clear out the uCode error bit if it is set */ |
5693 | clear_bit(STATUS_FW_ERROR, &priv->status); | 3884 | clear_bit(STATUS_FW_ERROR, &priv->status); |
5694 | 3885 | ||
5695 | if (iwl3945_is_rfkill(priv)) | 3886 | if (iwl_is_rfkill(priv)) |
5696 | return; | 3887 | return; |
5697 | 3888 | ||
5698 | ieee80211_wake_queues(priv->hw); | 3889 | ieee80211_wake_queues(priv->hw); |
@@ -5704,19 +3895,19 @@ static void iwl3945_alive_start(struct iwl3945_priv *priv) | |||
5704 | 3895 | ||
5705 | if (iwl3945_is_associated(priv)) { | 3896 | if (iwl3945_is_associated(priv)) { |
5706 | struct iwl3945_rxon_cmd *active_rxon = | 3897 | struct iwl3945_rxon_cmd *active_rxon = |
5707 | (struct iwl3945_rxon_cmd *)(&priv->active_rxon); | 3898 | (struct iwl3945_rxon_cmd *)(&priv->active39_rxon); |
5708 | 3899 | ||
5709 | memcpy(&priv->staging_rxon, &priv->active_rxon, | 3900 | memcpy(&priv->staging39_rxon, &priv->active39_rxon, |
5710 | sizeof(priv->staging_rxon)); | 3901 | sizeof(priv->staging39_rxon)); |
5711 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | 3902 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
5712 | } else { | 3903 | } else { |
5713 | /* Initialize our rx_config data */ | 3904 | /* Initialize our rx_config data */ |
5714 | iwl3945_connection_init_rx_config(priv, priv->iw_mode); | 3905 | iwl3945_connection_init_rx_config(priv, priv->iw_mode); |
5715 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | 3906 | memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
5716 | } | 3907 | } |
5717 | 3908 | ||
5718 | /* Configure Bluetooth device coexistence support */ | 3909 | /* Configure Bluetooth device coexistence support */ |
5719 | iwl3945_send_bt_config(priv); | 3910 | iwl_send_bt_config(priv); |
5720 | 3911 | ||
5721 | /* Configure the adapter for unassociated operation */ | 3912 | /* Configure the adapter for unassociated operation */ |
5722 | iwl3945_commit_rxon(priv); | 3913 | iwl3945_commit_rxon(priv); |
@@ -5746,9 +3937,9 @@ static void iwl3945_alive_start(struct iwl3945_priv *priv) | |||
5746 | queue_work(priv->workqueue, &priv->restart); | 3937 | queue_work(priv->workqueue, &priv->restart); |
5747 | } | 3938 | } |
5748 | 3939 | ||
5749 | static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv); | 3940 | static void iwl3945_cancel_deferred_work(struct iwl_priv *priv); |
5750 | 3941 | ||
5751 | static void __iwl3945_down(struct iwl3945_priv *priv) | 3942 | static void __iwl3945_down(struct iwl_priv *priv) |
5752 | { | 3943 | { |
5753 | unsigned long flags; | 3944 | unsigned long flags; |
5754 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | 3945 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); |
@@ -5773,7 +3964,7 @@ static void __iwl3945_down(struct iwl3945_priv *priv) | |||
5773 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | 3964 | clear_bit(STATUS_EXIT_PENDING, &priv->status); |
5774 | 3965 | ||
5775 | /* stop and reset the on-board processor */ | 3966 | /* stop and reset the on-board processor */ |
5776 | iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); | 3967 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
5777 | 3968 | ||
5778 | /* tell the device to stop sending interrupts */ | 3969 | /* tell the device to stop sending interrupts */ |
5779 | spin_lock_irqsave(&priv->lock, flags); | 3970 | spin_lock_irqsave(&priv->lock, flags); |
@@ -5786,7 +3977,7 @@ static void __iwl3945_down(struct iwl3945_priv *priv) | |||
5786 | 3977 | ||
5787 | /* If we have not previously called iwl3945_init() then | 3978 | /* If we have not previously called iwl3945_init() then |
5788 | * clear all bits but the RF Kill and SUSPEND bits and return */ | 3979 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
5789 | if (!iwl3945_is_init(priv)) { | 3980 | if (!iwl_is_init(priv)) { |
5790 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << | 3981 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
5791 | STATUS_RF_KILL_HW | | 3982 | STATUS_RF_KILL_HW | |
5792 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | 3983 | test_bit(STATUS_RF_KILL_SW, &priv->status) << |
@@ -5815,29 +4006,31 @@ static void __iwl3945_down(struct iwl3945_priv *priv) | |||
5815 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | 4006 | test_bit(STATUS_EXIT_PENDING, &priv->status) << |
5816 | STATUS_EXIT_PENDING; | 4007 | STATUS_EXIT_PENDING; |
5817 | 4008 | ||
4009 | priv->cfg->ops->lib->apm_ops.reset(priv); | ||
5818 | spin_lock_irqsave(&priv->lock, flags); | 4010 | spin_lock_irqsave(&priv->lock, flags); |
5819 | iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | 4011 | iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
5820 | spin_unlock_irqrestore(&priv->lock, flags); | 4012 | spin_unlock_irqrestore(&priv->lock, flags); |
5821 | 4013 | ||
5822 | iwl3945_hw_txq_ctx_stop(priv); | 4014 | iwl3945_hw_txq_ctx_stop(priv); |
5823 | iwl3945_hw_rxq_stop(priv); | 4015 | iwl3945_hw_rxq_stop(priv); |
5824 | 4016 | ||
5825 | spin_lock_irqsave(&priv->lock, flags); | 4017 | spin_lock_irqsave(&priv->lock, flags); |
5826 | if (!iwl3945_grab_nic_access(priv)) { | 4018 | if (!iwl_grab_nic_access(priv)) { |
5827 | iwl3945_write_prph(priv, APMG_CLK_DIS_REG, | 4019 | iwl_write_prph(priv, APMG_CLK_DIS_REG, |
5828 | APMG_CLK_VAL_DMA_CLK_RQT); | 4020 | APMG_CLK_VAL_DMA_CLK_RQT); |
5829 | iwl3945_release_nic_access(priv); | 4021 | iwl_release_nic_access(priv); |
5830 | } | 4022 | } |
5831 | spin_unlock_irqrestore(&priv->lock, flags); | 4023 | spin_unlock_irqrestore(&priv->lock, flags); |
5832 | 4024 | ||
5833 | udelay(5); | 4025 | udelay(5); |
5834 | 4026 | ||
5835 | iwl3945_hw_nic_stop_master(priv); | 4027 | if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status)) |
5836 | iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); | 4028 | priv->cfg->ops->lib->apm_ops.stop(priv); |
5837 | iwl3945_hw_nic_reset(priv); | 4029 | else |
4030 | priv->cfg->ops->lib->apm_ops.reset(priv); | ||
5838 | 4031 | ||
5839 | exit: | 4032 | exit: |
5840 | memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp)); | 4033 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); |
5841 | 4034 | ||
5842 | if (priv->ibss_beacon) | 4035 | if (priv->ibss_beacon) |
5843 | dev_kfree_skb(priv->ibss_beacon); | 4036 | dev_kfree_skb(priv->ibss_beacon); |
@@ -5847,7 +4040,7 @@ static void __iwl3945_down(struct iwl3945_priv *priv) | |||
5847 | iwl3945_clear_free_frames(priv); | 4040 | iwl3945_clear_free_frames(priv); |
5848 | } | 4041 | } |
5849 | 4042 | ||
5850 | static void iwl3945_down(struct iwl3945_priv *priv) | 4043 | static void iwl3945_down(struct iwl_priv *priv) |
5851 | { | 4044 | { |
5852 | mutex_lock(&priv->mutex); | 4045 | mutex_lock(&priv->mutex); |
5853 | __iwl3945_down(priv); | 4046 | __iwl3945_down(priv); |
@@ -5858,58 +4051,58 @@ static void iwl3945_down(struct iwl3945_priv *priv) | |||
5858 | 4051 | ||
5859 | #define MAX_HW_RESTARTS 5 | 4052 | #define MAX_HW_RESTARTS 5 |
5860 | 4053 | ||
5861 | static int __iwl3945_up(struct iwl3945_priv *priv) | 4054 | static int __iwl3945_up(struct iwl_priv *priv) |
5862 | { | 4055 | { |
5863 | int rc, i; | 4056 | int rc, i; |
5864 | 4057 | ||
5865 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | 4058 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { |
5866 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | 4059 | IWL_WARN(priv, "Exit pending; will not bring the NIC up\n"); |
5867 | return -EIO; | 4060 | return -EIO; |
5868 | } | 4061 | } |
5869 | 4062 | ||
5870 | if (test_bit(STATUS_RF_KILL_SW, &priv->status)) { | 4063 | if (test_bit(STATUS_RF_KILL_SW, &priv->status)) { |
5871 | IWL_WARNING("Radio disabled by SW RF kill (module " | 4064 | IWL_WARN(priv, "Radio disabled by SW RF kill (module " |
5872 | "parameter)\n"); | 4065 | "parameter)\n"); |
5873 | return -ENODEV; | 4066 | return -ENODEV; |
5874 | } | 4067 | } |
5875 | 4068 | ||
5876 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { | 4069 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
5877 | IWL_ERROR("ucode not available for device bring up\n"); | 4070 | IWL_ERR(priv, "ucode not available for device bring up\n"); |
5878 | return -EIO; | 4071 | return -EIO; |
5879 | } | 4072 | } |
5880 | 4073 | ||
5881 | /* If platform's RF_KILL switch is NOT set to KILL */ | 4074 | /* If platform's RF_KILL switch is NOT set to KILL */ |
5882 | if (iwl3945_read32(priv, CSR_GP_CNTRL) & | 4075 | if (iwl_read32(priv, CSR_GP_CNTRL) & |
5883 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) | 4076 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
5884 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | 4077 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
5885 | else { | 4078 | else { |
5886 | set_bit(STATUS_RF_KILL_HW, &priv->status); | 4079 | set_bit(STATUS_RF_KILL_HW, &priv->status); |
5887 | if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) { | 4080 | if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) { |
5888 | IWL_WARNING("Radio disabled by HW RF Kill switch\n"); | 4081 | IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n"); |
5889 | return -ENODEV; | 4082 | return -ENODEV; |
5890 | } | 4083 | } |
5891 | } | 4084 | } |
5892 | 4085 | ||
5893 | iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF); | 4086 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
5894 | 4087 | ||
5895 | rc = iwl3945_hw_nic_init(priv); | 4088 | rc = iwl3945_hw_nic_init(priv); |
5896 | if (rc) { | 4089 | if (rc) { |
5897 | IWL_ERROR("Unable to int nic\n"); | 4090 | IWL_ERR(priv, "Unable to int nic\n"); |
5898 | return rc; | 4091 | return rc; |
5899 | } | 4092 | } |
5900 | 4093 | ||
5901 | /* make sure rfkill handshake bits are cleared */ | 4094 | /* make sure rfkill handshake bits are cleared */ |
5902 | iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | 4095 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
5903 | iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, | 4096 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
5904 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); | 4097 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
5905 | 4098 | ||
5906 | /* clear (again), then enable host interrupts */ | 4099 | /* clear (again), then enable host interrupts */ |
5907 | iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF); | 4100 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
5908 | iwl3945_enable_interrupts(priv); | 4101 | iwl3945_enable_interrupts(priv); |
5909 | 4102 | ||
5910 | /* really make sure rfkill handshake bits are cleared */ | 4103 | /* really make sure rfkill handshake bits are cleared */ |
5911 | iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | 4104 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
5912 | iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | 4105 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
5913 | 4106 | ||
5914 | /* Copy original ucode data image from disk into backup cache. | 4107 | /* Copy original ucode data image from disk into backup cache. |
5915 | * This will be used to initialize the on-board processor's | 4108 | * This will be used to initialize the on-board processor's |
@@ -5928,10 +4121,11 @@ static int __iwl3945_up(struct iwl3945_priv *priv) | |||
5928 | /* load bootstrap state machine, | 4121 | /* load bootstrap state machine, |
5929 | * load bootstrap program into processor's memory, | 4122 | * load bootstrap program into processor's memory, |
5930 | * prepare to load the "initialize" uCode */ | 4123 | * prepare to load the "initialize" uCode */ |
5931 | rc = iwl3945_load_bsm(priv); | 4124 | priv->cfg->ops->lib->load_ucode(priv); |
5932 | 4125 | ||
5933 | if (rc) { | 4126 | if (rc) { |
5934 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc); | 4127 | IWL_ERR(priv, |
4128 | "Unable to set up bootstrap uCode: %d\n", rc); | ||
5935 | continue; | 4129 | continue; |
5936 | } | 4130 | } |
5937 | 4131 | ||
@@ -5949,7 +4143,7 @@ static int __iwl3945_up(struct iwl3945_priv *priv) | |||
5949 | 4143 | ||
5950 | /* tried to restart and config the device for as long as our | 4144 | /* tried to restart and config the device for as long as our |
5951 | * patience could withstand */ | 4145 | * patience could withstand */ |
5952 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | 4146 | IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i); |
5953 | return -EIO; | 4147 | return -EIO; |
5954 | } | 4148 | } |
5955 | 4149 | ||
@@ -5962,8 +4156,8 @@ static int __iwl3945_up(struct iwl3945_priv *priv) | |||
5962 | 4156 | ||
5963 | static void iwl3945_bg_init_alive_start(struct work_struct *data) | 4157 | static void iwl3945_bg_init_alive_start(struct work_struct *data) |
5964 | { | 4158 | { |
5965 | struct iwl3945_priv *priv = | 4159 | struct iwl_priv *priv = |
5966 | container_of(data, struct iwl3945_priv, init_alive_start.work); | 4160 | container_of(data, struct iwl_priv, init_alive_start.work); |
5967 | 4161 | ||
5968 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | 4162 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
5969 | return; | 4163 | return; |
@@ -5975,8 +4169,8 @@ static void iwl3945_bg_init_alive_start(struct work_struct *data) | |||
5975 | 4169 | ||
5976 | static void iwl3945_bg_alive_start(struct work_struct *data) | 4170 | static void iwl3945_bg_alive_start(struct work_struct *data) |
5977 | { | 4171 | { |
5978 | struct iwl3945_priv *priv = | 4172 | struct iwl_priv *priv = |
5979 | container_of(data, struct iwl3945_priv, alive_start.work); | 4173 | container_of(data, struct iwl_priv, alive_start.work); |
5980 | 4174 | ||
5981 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | 4175 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
5982 | return; | 4176 | return; |
@@ -5986,66 +4180,31 @@ static void iwl3945_bg_alive_start(struct work_struct *data) | |||
5986 | mutex_unlock(&priv->mutex); | 4180 | mutex_unlock(&priv->mutex); |
5987 | } | 4181 | } |
5988 | 4182 | ||
5989 | static void iwl3945_bg_rf_kill(struct work_struct *work) | 4183 | static void iwl3945_rfkill_poll(struct work_struct *data) |
5990 | { | 4184 | { |
5991 | struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill); | 4185 | struct iwl_priv *priv = |
5992 | 4186 | container_of(data, struct iwl_priv, rfkill_poll.work); | |
5993 | wake_up_interruptible(&priv->wait_command_queue); | 4187 | unsigned long status = priv->status; |
5994 | |||
5995 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
5996 | return; | ||
5997 | 4188 | ||
5998 | mutex_lock(&priv->mutex); | 4189 | if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
4190 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | ||
4191 | else | ||
4192 | set_bit(STATUS_RF_KILL_HW, &priv->status); | ||
5999 | 4193 | ||
6000 | if (!iwl3945_is_rfkill(priv)) { | 4194 | if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status)) |
6001 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL, | 4195 | queue_work(priv->workqueue, &priv->rf_kill); |
6002 | "HW and/or SW RF Kill no longer active, restarting " | ||
6003 | "device\n"); | ||
6004 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
6005 | queue_work(priv->workqueue, &priv->restart); | ||
6006 | } else { | ||
6007 | 4196 | ||
6008 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | 4197 | queue_delayed_work(priv->workqueue, &priv->rfkill_poll, |
6009 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | 4198 | round_jiffies_relative(2 * HZ)); |
6010 | "disabled by SW switch\n"); | ||
6011 | else | ||
6012 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | ||
6013 | "Kill switch must be turned off for " | ||
6014 | "wireless networking to work.\n"); | ||
6015 | } | ||
6016 | 4199 | ||
6017 | mutex_unlock(&priv->mutex); | ||
6018 | iwl3945_rfkill_set_hw_state(priv); | ||
6019 | } | 4200 | } |
6020 | 4201 | ||
6021 | #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ) | 4202 | #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ) |
6022 | |||
6023 | static void iwl3945_bg_scan_check(struct work_struct *data) | ||
6024 | { | ||
6025 | struct iwl3945_priv *priv = | ||
6026 | container_of(data, struct iwl3945_priv, scan_check.work); | ||
6027 | |||
6028 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
6029 | return; | ||
6030 | |||
6031 | mutex_lock(&priv->mutex); | ||
6032 | if (test_bit(STATUS_SCANNING, &priv->status) || | ||
6033 | test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | ||
6034 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, | ||
6035 | "Scan completion watchdog resetting adapter (%dms)\n", | ||
6036 | jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG)); | ||
6037 | |||
6038 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
6039 | iwl3945_send_scan_abort(priv); | ||
6040 | } | ||
6041 | mutex_unlock(&priv->mutex); | ||
6042 | } | ||
6043 | |||
6044 | static void iwl3945_bg_request_scan(struct work_struct *data) | 4203 | static void iwl3945_bg_request_scan(struct work_struct *data) |
6045 | { | 4204 | { |
6046 | struct iwl3945_priv *priv = | 4205 | struct iwl_priv *priv = |
6047 | container_of(data, struct iwl3945_priv, request_scan); | 4206 | container_of(data, struct iwl_priv, request_scan); |
6048 | struct iwl3945_host_cmd cmd = { | 4207 | struct iwl_host_cmd cmd = { |
6049 | .id = REPLY_SCAN_CMD, | 4208 | .id = REPLY_SCAN_CMD, |
6050 | .len = sizeof(struct iwl3945_scan_cmd), | 4209 | .len = sizeof(struct iwl3945_scan_cmd), |
6051 | .meta.flags = CMD_SIZE_HUGE, | 4210 | .meta.flags = CMD_SIZE_HUGE, |
@@ -6061,8 +4220,8 @@ static void iwl3945_bg_request_scan(struct work_struct *data) | |||
6061 | 4220 | ||
6062 | mutex_lock(&priv->mutex); | 4221 | mutex_lock(&priv->mutex); |
6063 | 4222 | ||
6064 | if (!iwl3945_is_ready(priv)) { | 4223 | if (!iwl_is_ready(priv)) { |
6065 | IWL_WARNING("request scan called when driver not ready.\n"); | 4224 | IWL_WARN(priv, "request scan called when driver not ready.\n"); |
6066 | goto done; | 4225 | goto done; |
6067 | } | 4226 | } |
6068 | 4227 | ||
@@ -6090,7 +4249,7 @@ static void iwl3945_bg_request_scan(struct work_struct *data) | |||
6090 | goto done; | 4249 | goto done; |
6091 | } | 4250 | } |
6092 | 4251 | ||
6093 | if (iwl3945_is_rfkill(priv)) { | 4252 | if (iwl_is_rfkill(priv)) { |
6094 | IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n"); | 4253 | IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n"); |
6095 | goto done; | 4254 | goto done; |
6096 | } | 4255 | } |
@@ -6168,11 +4327,8 @@ static void iwl3945_bg_request_scan(struct work_struct *data) | |||
6168 | 4327 | ||
6169 | /* We don't build a direct scan probe request; the uCode will do | 4328 | /* We don't build a direct scan probe request; the uCode will do |
6170 | * that based on the direct_mask added to each channel entry */ | 4329 | * that based on the direct_mask added to each channel entry */ |
6171 | scan->tx_cmd.len = cpu_to_le16( | ||
6172 | iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data, | ||
6173 | IWL_MAX_SCAN_SIZE - sizeof(*scan))); | ||
6174 | scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; | 4330 | scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; |
6175 | scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id; | 4331 | scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id; |
6176 | scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | 4332 | scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
6177 | 4333 | ||
6178 | /* flags + rate selection */ | 4334 | /* flags + rate selection */ |
@@ -6187,10 +4343,15 @@ static void iwl3945_bg_request_scan(struct work_struct *data) | |||
6187 | scan->good_CRC_th = IWL_GOOD_CRC_TH; | 4343 | scan->good_CRC_th = IWL_GOOD_CRC_TH; |
6188 | band = IEEE80211_BAND_5GHZ; | 4344 | band = IEEE80211_BAND_5GHZ; |
6189 | } else { | 4345 | } else { |
6190 | IWL_WARNING("Invalid scan band count\n"); | 4346 | IWL_WARN(priv, "Invalid scan band count\n"); |
6191 | goto done; | 4347 | goto done; |
6192 | } | 4348 | } |
6193 | 4349 | ||
4350 | scan->tx_cmd.len = cpu_to_le16( | ||
4351 | iwl_fill_probe_req(priv, band, | ||
4352 | (struct ieee80211_mgmt *)scan->data, | ||
4353 | IWL_MAX_SCAN_SIZE - sizeof(*scan))); | ||
4354 | |||
6194 | /* select Rx antennas */ | 4355 | /* select Rx antennas */ |
6195 | scan->flags |= iwl3945_get_antenna_flags(priv); | 4356 | scan->flags |= iwl3945_get_antenna_flags(priv); |
6196 | 4357 | ||
@@ -6213,7 +4374,7 @@ static void iwl3945_bg_request_scan(struct work_struct *data) | |||
6213 | scan->len = cpu_to_le16(cmd.len); | 4374 | scan->len = cpu_to_le16(cmd.len); |
6214 | 4375 | ||
6215 | set_bit(STATUS_SCAN_HW, &priv->status); | 4376 | set_bit(STATUS_SCAN_HW, &priv->status); |
6216 | rc = iwl3945_send_cmd_sync(priv, &cmd); | 4377 | rc = iwl_send_cmd_sync(priv, &cmd); |
6217 | if (rc) | 4378 | if (rc) |
6218 | goto done; | 4379 | goto done; |
6219 | 4380 | ||
@@ -6239,7 +4400,7 @@ static void iwl3945_bg_request_scan(struct work_struct *data) | |||
6239 | 4400 | ||
6240 | static void iwl3945_bg_up(struct work_struct *data) | 4401 | static void iwl3945_bg_up(struct work_struct *data) |
6241 | { | 4402 | { |
6242 | struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up); | 4403 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
6243 | 4404 | ||
6244 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | 4405 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
6245 | return; | 4406 | return; |
@@ -6247,12 +4408,12 @@ static void iwl3945_bg_up(struct work_struct *data) | |||
6247 | mutex_lock(&priv->mutex); | 4408 | mutex_lock(&priv->mutex); |
6248 | __iwl3945_up(priv); | 4409 | __iwl3945_up(priv); |
6249 | mutex_unlock(&priv->mutex); | 4410 | mutex_unlock(&priv->mutex); |
6250 | iwl3945_rfkill_set_hw_state(priv); | 4411 | iwl_rfkill_set_hw_state(priv); |
6251 | } | 4412 | } |
6252 | 4413 | ||
6253 | static void iwl3945_bg_restart(struct work_struct *data) | 4414 | static void iwl3945_bg_restart(struct work_struct *data) |
6254 | { | 4415 | { |
6255 | struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart); | 4416 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
6256 | 4417 | ||
6257 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | 4418 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
6258 | return; | 4419 | return; |
@@ -6263,8 +4424,8 @@ static void iwl3945_bg_restart(struct work_struct *data) | |||
6263 | 4424 | ||
6264 | static void iwl3945_bg_rx_replenish(struct work_struct *data) | 4425 | static void iwl3945_bg_rx_replenish(struct work_struct *data) |
6265 | { | 4426 | { |
6266 | struct iwl3945_priv *priv = | 4427 | struct iwl_priv *priv = |
6267 | container_of(data, struct iwl3945_priv, rx_replenish); | 4428 | container_of(data, struct iwl_priv, rx_replenish); |
6268 | 4429 | ||
6269 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | 4430 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
6270 | return; | 4431 | return; |
@@ -6276,19 +4437,19 @@ static void iwl3945_bg_rx_replenish(struct work_struct *data) | |||
6276 | 4437 | ||
6277 | #define IWL_DELAY_NEXT_SCAN (HZ*2) | 4438 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
6278 | 4439 | ||
6279 | static void iwl3945_post_associate(struct iwl3945_priv *priv) | 4440 | static void iwl3945_post_associate(struct iwl_priv *priv) |
6280 | { | 4441 | { |
6281 | int rc = 0; | 4442 | int rc = 0; |
6282 | struct ieee80211_conf *conf = NULL; | 4443 | struct ieee80211_conf *conf = NULL; |
6283 | 4444 | ||
6284 | if (priv->iw_mode == NL80211_IFTYPE_AP) { | 4445 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
6285 | IWL_ERROR("%s Should not be called in AP mode\n", __func__); | 4446 | IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__); |
6286 | return; | 4447 | return; |
6287 | } | 4448 | } |
6288 | 4449 | ||
6289 | 4450 | ||
6290 | IWL_DEBUG_ASSOC("Associated as %d to: %pM\n", | 4451 | IWL_DEBUG_ASSOC("Associated as %d to: %pM\n", |
6291 | priv->assoc_id, priv->active_rxon.bssid_addr); | 4452 | priv->assoc_id, priv->active39_rxon.bssid_addr); |
6292 | 4453 | ||
6293 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | 4454 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
6294 | return; | 4455 | return; |
@@ -6296,41 +4457,41 @@ static void iwl3945_post_associate(struct iwl3945_priv *priv) | |||
6296 | if (!priv->vif || !priv->is_open) | 4457 | if (!priv->vif || !priv->is_open) |
6297 | return; | 4458 | return; |
6298 | 4459 | ||
6299 | iwl3945_scan_cancel_timeout(priv, 200); | 4460 | iwl_scan_cancel_timeout(priv, 200); |
6300 | 4461 | ||
6301 | conf = ieee80211_get_hw_conf(priv->hw); | 4462 | conf = ieee80211_get_hw_conf(priv->hw); |
6302 | 4463 | ||
6303 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | 4464 | priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
6304 | iwl3945_commit_rxon(priv); | 4465 | iwl3945_commit_rxon(priv); |
6305 | 4466 | ||
6306 | memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd)); | 4467 | memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd)); |
6307 | iwl3945_setup_rxon_timing(priv); | 4468 | iwl3945_setup_rxon_timing(priv); |
6308 | rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING, | 4469 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
6309 | sizeof(priv->rxon_timing), &priv->rxon_timing); | 4470 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
6310 | if (rc) | 4471 | if (rc) |
6311 | IWL_WARNING("REPLY_RXON_TIMING failed - " | 4472 | IWL_WARN(priv, "REPLY_RXON_TIMING failed - " |
6312 | "Attempting to continue.\n"); | 4473 | "Attempting to continue.\n"); |
6313 | 4474 | ||
6314 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | 4475 | priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; |
6315 | 4476 | ||
6316 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | 4477 | priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
6317 | 4478 | ||
6318 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | 4479 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", |
6319 | priv->assoc_id, priv->beacon_int); | 4480 | priv->assoc_id, priv->beacon_int); |
6320 | 4481 | ||
6321 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | 4482 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) |
6322 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | 4483 | priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
6323 | else | 4484 | else |
6324 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | 4485 | priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; |
6325 | 4486 | ||
6326 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | 4487 | if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) { |
6327 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | 4488 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
6328 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | 4489 | priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; |
6329 | else | 4490 | else |
6330 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | 4491 | priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
6331 | 4492 | ||
6332 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) | 4493 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
6333 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | 4494 | priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
6334 | 4495 | ||
6335 | } | 4496 | } |
6336 | 4497 | ||
@@ -6355,7 +4516,7 @@ static void iwl3945_post_associate(struct iwl3945_priv *priv) | |||
6355 | break; | 4516 | break; |
6356 | 4517 | ||
6357 | default: | 4518 | default: |
6358 | IWL_ERROR("%s Should not be called in %d mode\n", | 4519 | IWL_ERR(priv, "%s Should not be called in %d mode\n", |
6359 | __func__, priv->iw_mode); | 4520 | __func__, priv->iw_mode); |
6360 | break; | 4521 | break; |
6361 | } | 4522 | } |
@@ -6366,45 +4527,8 @@ static void iwl3945_post_associate(struct iwl3945_priv *priv) | |||
6366 | priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; | 4527 | priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; |
6367 | } | 4528 | } |
6368 | 4529 | ||
6369 | static void iwl3945_bg_abort_scan(struct work_struct *work) | ||
6370 | { | ||
6371 | struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan); | ||
6372 | |||
6373 | if (!iwl3945_is_ready(priv)) | ||
6374 | return; | ||
6375 | |||
6376 | mutex_lock(&priv->mutex); | ||
6377 | |||
6378 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | ||
6379 | iwl3945_send_scan_abort(priv); | ||
6380 | |||
6381 | mutex_unlock(&priv->mutex); | ||
6382 | } | ||
6383 | |||
6384 | static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed); | 4530 | static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed); |
6385 | 4531 | ||
6386 | static void iwl3945_bg_scan_completed(struct work_struct *work) | ||
6387 | { | ||
6388 | struct iwl3945_priv *priv = | ||
6389 | container_of(work, struct iwl3945_priv, scan_completed); | ||
6390 | |||
6391 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n"); | ||
6392 | |||
6393 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
6394 | return; | ||
6395 | |||
6396 | if (test_bit(STATUS_CONF_PENDING, &priv->status)) | ||
6397 | iwl3945_mac_config(priv->hw, 0); | ||
6398 | |||
6399 | ieee80211_scan_completed(priv->hw); | ||
6400 | |||
6401 | /* Since setting the TXPOWER may have been deferred while | ||
6402 | * performing the scan, fire one off */ | ||
6403 | mutex_lock(&priv->mutex); | ||
6404 | iwl3945_hw_reg_send_txpower(priv); | ||
6405 | mutex_unlock(&priv->mutex); | ||
6406 | } | ||
6407 | |||
6408 | /***************************************************************************** | 4532 | /***************************************************************************** |
6409 | * | 4533 | * |
6410 | * mac80211 entry point functions | 4534 | * mac80211 entry point functions |
@@ -6415,36 +4539,22 @@ static void iwl3945_bg_scan_completed(struct work_struct *work) | |||
6415 | 4539 | ||
6416 | static int iwl3945_mac_start(struct ieee80211_hw *hw) | 4540 | static int iwl3945_mac_start(struct ieee80211_hw *hw) |
6417 | { | 4541 | { |
6418 | struct iwl3945_priv *priv = hw->priv; | 4542 | struct iwl_priv *priv = hw->priv; |
6419 | int ret; | 4543 | int ret; |
6420 | 4544 | ||
6421 | IWL_DEBUG_MAC80211("enter\n"); | 4545 | IWL_DEBUG_MAC80211("enter\n"); |
6422 | 4546 | ||
6423 | if (pci_enable_device(priv->pci_dev)) { | ||
6424 | IWL_ERROR("Fail to pci_enable_device\n"); | ||
6425 | return -ENODEV; | ||
6426 | } | ||
6427 | pci_restore_state(priv->pci_dev); | ||
6428 | pci_enable_msi(priv->pci_dev); | ||
6429 | |||
6430 | ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED, | ||
6431 | DRV_NAME, priv); | ||
6432 | if (ret) { | ||
6433 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | ||
6434 | goto out_disable_msi; | ||
6435 | } | ||
6436 | |||
6437 | /* we should be verifying the device is ready to be opened */ | 4547 | /* we should be verifying the device is ready to be opened */ |
6438 | mutex_lock(&priv->mutex); | 4548 | mutex_lock(&priv->mutex); |
6439 | 4549 | ||
6440 | memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd)); | 4550 | memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd)); |
6441 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... | 4551 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... |
6442 | * ucode filename and max sizes are card-specific. */ | 4552 | * ucode filename and max sizes are card-specific. */ |
6443 | 4553 | ||
6444 | if (!priv->ucode_code.len) { | 4554 | if (!priv->ucode_code.len) { |
6445 | ret = iwl3945_read_ucode(priv); | 4555 | ret = iwl3945_read_ucode(priv); |
6446 | if (ret) { | 4556 | if (ret) { |
6447 | IWL_ERROR("Could not read microcode: %d\n", ret); | 4557 | IWL_ERR(priv, "Could not read microcode: %d\n", ret); |
6448 | mutex_unlock(&priv->mutex); | 4558 | mutex_unlock(&priv->mutex); |
6449 | goto out_release_irq; | 4559 | goto out_release_irq; |
6450 | } | 4560 | } |
@@ -6454,7 +4564,7 @@ static int iwl3945_mac_start(struct ieee80211_hw *hw) | |||
6454 | 4564 | ||
6455 | mutex_unlock(&priv->mutex); | 4565 | mutex_unlock(&priv->mutex); |
6456 | 4566 | ||
6457 | iwl3945_rfkill_set_hw_state(priv); | 4567 | iwl_rfkill_set_hw_state(priv); |
6458 | 4568 | ||
6459 | if (ret) | 4569 | if (ret) |
6460 | goto out_release_irq; | 4570 | goto out_release_irq; |
@@ -6471,22 +4581,23 @@ static int iwl3945_mac_start(struct ieee80211_hw *hw) | |||
6471 | UCODE_READY_TIMEOUT); | 4581 | UCODE_READY_TIMEOUT); |
6472 | if (!ret) { | 4582 | if (!ret) { |
6473 | if (!test_bit(STATUS_READY, &priv->status)) { | 4583 | if (!test_bit(STATUS_READY, &priv->status)) { |
6474 | IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n", | 4584 | IWL_ERR(priv, |
6475 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | 4585 | "Wait for START_ALIVE timeout after %dms.\n", |
4586 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | ||
6476 | ret = -ETIMEDOUT; | 4587 | ret = -ETIMEDOUT; |
6477 | goto out_release_irq; | 4588 | goto out_release_irq; |
6478 | } | 4589 | } |
6479 | } | 4590 | } |
6480 | 4591 | ||
4592 | /* ucode is running and will send rfkill notifications, | ||
4593 | * no need to poll the killswitch state anymore */ | ||
4594 | cancel_delayed_work(&priv->rfkill_poll); | ||
4595 | |||
6481 | priv->is_open = 1; | 4596 | priv->is_open = 1; |
6482 | IWL_DEBUG_MAC80211("leave\n"); | 4597 | IWL_DEBUG_MAC80211("leave\n"); |
6483 | return 0; | 4598 | return 0; |
6484 | 4599 | ||
6485 | out_release_irq: | 4600 | out_release_irq: |
6486 | free_irq(priv->pci_dev->irq, priv); | ||
6487 | out_disable_msi: | ||
6488 | pci_disable_msi(priv->pci_dev); | ||
6489 | pci_disable_device(priv->pci_dev); | ||
6490 | priv->is_open = 0; | 4601 | priv->is_open = 0; |
6491 | IWL_DEBUG_MAC80211("leave - failed\n"); | 4602 | IWL_DEBUG_MAC80211("leave - failed\n"); |
6492 | return ret; | 4603 | return ret; |
@@ -6494,7 +4605,7 @@ out_disable_msi: | |||
6494 | 4605 | ||
6495 | static void iwl3945_mac_stop(struct ieee80211_hw *hw) | 4606 | static void iwl3945_mac_stop(struct ieee80211_hw *hw) |
6496 | { | 4607 | { |
6497 | struct iwl3945_priv *priv = hw->priv; | 4608 | struct iwl_priv *priv = hw->priv; |
6498 | 4609 | ||
6499 | IWL_DEBUG_MAC80211("enter\n"); | 4610 | IWL_DEBUG_MAC80211("enter\n"); |
6500 | 4611 | ||
@@ -6505,29 +4616,29 @@ static void iwl3945_mac_stop(struct ieee80211_hw *hw) | |||
6505 | 4616 | ||
6506 | priv->is_open = 0; | 4617 | priv->is_open = 0; |
6507 | 4618 | ||
6508 | if (iwl3945_is_ready_rf(priv)) { | 4619 | if (iwl_is_ready_rf(priv)) { |
6509 | /* stop mac, cancel any scan request and clear | 4620 | /* stop mac, cancel any scan request and clear |
6510 | * RXON_FILTER_ASSOC_MSK BIT | 4621 | * RXON_FILTER_ASSOC_MSK BIT |
6511 | */ | 4622 | */ |
6512 | mutex_lock(&priv->mutex); | 4623 | mutex_lock(&priv->mutex); |
6513 | iwl3945_scan_cancel_timeout(priv, 100); | 4624 | iwl_scan_cancel_timeout(priv, 100); |
6514 | mutex_unlock(&priv->mutex); | 4625 | mutex_unlock(&priv->mutex); |
6515 | } | 4626 | } |
6516 | 4627 | ||
6517 | iwl3945_down(priv); | 4628 | iwl3945_down(priv); |
6518 | 4629 | ||
6519 | flush_workqueue(priv->workqueue); | 4630 | flush_workqueue(priv->workqueue); |
6520 | free_irq(priv->pci_dev->irq, priv); | 4631 | |
6521 | pci_disable_msi(priv->pci_dev); | 4632 | /* start polling the killswitch state again */ |
6522 | pci_save_state(priv->pci_dev); | 4633 | queue_delayed_work(priv->workqueue, &priv->rfkill_poll, |
6523 | pci_disable_device(priv->pci_dev); | 4634 | round_jiffies_relative(2 * HZ)); |
6524 | 4635 | ||
6525 | IWL_DEBUG_MAC80211("leave\n"); | 4636 | IWL_DEBUG_MAC80211("leave\n"); |
6526 | } | 4637 | } |
6527 | 4638 | ||
6528 | static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | 4639 | static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
6529 | { | 4640 | { |
6530 | struct iwl3945_priv *priv = hw->priv; | 4641 | struct iwl_priv *priv = hw->priv; |
6531 | 4642 | ||
6532 | IWL_DEBUG_MAC80211("enter\n"); | 4643 | IWL_DEBUG_MAC80211("enter\n"); |
6533 | 4644 | ||
@@ -6544,7 +4655,7 @@ static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
6544 | static int iwl3945_mac_add_interface(struct ieee80211_hw *hw, | 4655 | static int iwl3945_mac_add_interface(struct ieee80211_hw *hw, |
6545 | struct ieee80211_if_init_conf *conf) | 4656 | struct ieee80211_if_init_conf *conf) |
6546 | { | 4657 | { |
6547 | struct iwl3945_priv *priv = hw->priv; | 4658 | struct iwl_priv *priv = hw->priv; |
6548 | unsigned long flags; | 4659 | unsigned long flags; |
6549 | 4660 | ||
6550 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); | 4661 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
@@ -6567,7 +4678,7 @@ static int iwl3945_mac_add_interface(struct ieee80211_hw *hw, | |||
6567 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | 4678 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); |
6568 | } | 4679 | } |
6569 | 4680 | ||
6570 | if (iwl3945_is_ready(priv)) | 4681 | if (iwl_is_ready(priv)) |
6571 | iwl3945_set_mode(priv, conf->type); | 4682 | iwl3945_set_mode(priv, conf->type); |
6572 | 4683 | ||
6573 | mutex_unlock(&priv->mutex); | 4684 | mutex_unlock(&priv->mutex); |
@@ -6585,8 +4696,8 @@ static int iwl3945_mac_add_interface(struct ieee80211_hw *hw, | |||
6585 | */ | 4696 | */ |
6586 | static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed) | 4697 | static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed) |
6587 | { | 4698 | { |
6588 | struct iwl3945_priv *priv = hw->priv; | 4699 | struct iwl_priv *priv = hw->priv; |
6589 | const struct iwl3945_channel_info *ch_info; | 4700 | const struct iwl_channel_info *ch_info; |
6590 | struct ieee80211_conf *conf = &hw->conf; | 4701 | struct ieee80211_conf *conf = &hw->conf; |
6591 | unsigned long flags; | 4702 | unsigned long flags; |
6592 | int ret = 0; | 4703 | int ret = 0; |
@@ -6594,13 +4705,13 @@ static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
6594 | mutex_lock(&priv->mutex); | 4705 | mutex_lock(&priv->mutex); |
6595 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); | 4706 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
6596 | 4707 | ||
6597 | if (!iwl3945_is_ready(priv)) { | 4708 | if (!iwl_is_ready(priv)) { |
6598 | IWL_DEBUG_MAC80211("leave - not ready\n"); | 4709 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
6599 | ret = -EIO; | 4710 | ret = -EIO; |
6600 | goto out; | 4711 | goto out; |
6601 | } | 4712 | } |
6602 | 4713 | ||
6603 | if (unlikely(!iwl3945_param_disable_hw_scan && | 4714 | if (unlikely(!iwl3945_mod_params.disable_hw_scan && |
6604 | test_bit(STATUS_SCANNING, &priv->status))) { | 4715 | test_bit(STATUS_SCANNING, &priv->status))) { |
6605 | IWL_DEBUG_MAC80211("leave - scanning\n"); | 4716 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
6606 | set_bit(STATUS_CONF_PENDING, &priv->status); | 4717 | set_bit(STATUS_CONF_PENDING, &priv->status); |
@@ -6610,8 +4721,8 @@ static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
6610 | 4721 | ||
6611 | spin_lock_irqsave(&priv->lock, flags); | 4722 | spin_lock_irqsave(&priv->lock, flags); |
6612 | 4723 | ||
6613 | ch_info = iwl3945_get_channel_info(priv, conf->channel->band, | 4724 | ch_info = iwl_get_channel_info(priv, conf->channel->band, |
6614 | conf->channel->hw_value); | 4725 | conf->channel->hw_value); |
6615 | if (!is_channel_valid(ch_info)) { | 4726 | if (!is_channel_valid(ch_info)) { |
6616 | IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n", | 4727 | IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n", |
6617 | conf->channel->hw_value, conf->channel->band); | 4728 | conf->channel->hw_value, conf->channel->band); |
@@ -6646,7 +4757,7 @@ static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
6646 | goto out; | 4757 | goto out; |
6647 | } | 4758 | } |
6648 | 4759 | ||
6649 | if (iwl3945_is_rfkill(priv)) { | 4760 | if (iwl_is_rfkill(priv)) { |
6650 | IWL_DEBUG_MAC80211("leave - RF kill\n"); | 4761 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
6651 | ret = -EIO; | 4762 | ret = -EIO; |
6652 | goto out; | 4763 | goto out; |
@@ -6654,8 +4765,8 @@ static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
6654 | 4765 | ||
6655 | iwl3945_set_rate(priv); | 4766 | iwl3945_set_rate(priv); |
6656 | 4767 | ||
6657 | if (memcmp(&priv->active_rxon, | 4768 | if (memcmp(&priv->active39_rxon, |
6658 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | 4769 | &priv->staging39_rxon, sizeof(priv->staging39_rxon))) |
6659 | iwl3945_commit_rxon(priv); | 4770 | iwl3945_commit_rxon(priv); |
6660 | else | 4771 | else |
6661 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | 4772 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); |
@@ -6668,7 +4779,7 @@ out: | |||
6668 | return ret; | 4779 | return ret; |
6669 | } | 4780 | } |
6670 | 4781 | ||
6671 | static void iwl3945_config_ap(struct iwl3945_priv *priv) | 4782 | static void iwl3945_config_ap(struct iwl_priv *priv) |
6672 | { | 4783 | { |
6673 | int rc = 0; | 4784 | int rc = 0; |
6674 | 4785 | ||
@@ -6679,44 +4790,45 @@ static void iwl3945_config_ap(struct iwl3945_priv *priv) | |||
6679 | if (!(iwl3945_is_associated(priv))) { | 4790 | if (!(iwl3945_is_associated(priv))) { |
6680 | 4791 | ||
6681 | /* RXON - unassoc (to set timing command) */ | 4792 | /* RXON - unassoc (to set timing command) */ |
6682 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | 4793 | priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
6683 | iwl3945_commit_rxon(priv); | 4794 | iwl3945_commit_rxon(priv); |
6684 | 4795 | ||
6685 | /* RXON Timing */ | 4796 | /* RXON Timing */ |
6686 | memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd)); | 4797 | memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd)); |
6687 | iwl3945_setup_rxon_timing(priv); | 4798 | iwl3945_setup_rxon_timing(priv); |
6688 | rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING, | 4799 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
6689 | sizeof(priv->rxon_timing), &priv->rxon_timing); | 4800 | sizeof(priv->rxon_timing), |
4801 | &priv->rxon_timing); | ||
6690 | if (rc) | 4802 | if (rc) |
6691 | IWL_WARNING("REPLY_RXON_TIMING failed - " | 4803 | IWL_WARN(priv, "REPLY_RXON_TIMING failed - " |
6692 | "Attempting to continue.\n"); | 4804 | "Attempting to continue.\n"); |
6693 | 4805 | ||
6694 | /* FIXME: what should be the assoc_id for AP? */ | 4806 | /* FIXME: what should be the assoc_id for AP? */ |
6695 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | 4807 | priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
6696 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | 4808 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) |
6697 | priv->staging_rxon.flags |= | 4809 | priv->staging39_rxon.flags |= |
6698 | RXON_FLG_SHORT_PREAMBLE_MSK; | 4810 | RXON_FLG_SHORT_PREAMBLE_MSK; |
6699 | else | 4811 | else |
6700 | priv->staging_rxon.flags &= | 4812 | priv->staging39_rxon.flags &= |
6701 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | 4813 | ~RXON_FLG_SHORT_PREAMBLE_MSK; |
6702 | 4814 | ||
6703 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | 4815 | if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) { |
6704 | if (priv->assoc_capability & | 4816 | if (priv->assoc_capability & |
6705 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | 4817 | WLAN_CAPABILITY_SHORT_SLOT_TIME) |
6706 | priv->staging_rxon.flags |= | 4818 | priv->staging39_rxon.flags |= |
6707 | RXON_FLG_SHORT_SLOT_MSK; | 4819 | RXON_FLG_SHORT_SLOT_MSK; |
6708 | else | 4820 | else |
6709 | priv->staging_rxon.flags &= | 4821 | priv->staging39_rxon.flags &= |
6710 | ~RXON_FLG_SHORT_SLOT_MSK; | 4822 | ~RXON_FLG_SHORT_SLOT_MSK; |
6711 | 4823 | ||
6712 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) | 4824 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
6713 | priv->staging_rxon.flags &= | 4825 | priv->staging39_rxon.flags &= |
6714 | ~RXON_FLG_SHORT_SLOT_MSK; | 4826 | ~RXON_FLG_SHORT_SLOT_MSK; |
6715 | } | 4827 | } |
6716 | /* restore RXON assoc */ | 4828 | /* restore RXON assoc */ |
6717 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | 4829 | priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; |
6718 | iwl3945_commit_rxon(priv); | 4830 | iwl3945_commit_rxon(priv); |
6719 | iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0); | 4831 | iwl3945_add_station(priv, iwl_bcast_addr, 0, 0); |
6720 | } | 4832 | } |
6721 | iwl3945_send_beacon_cmd(priv); | 4833 | iwl3945_send_beacon_cmd(priv); |
6722 | 4834 | ||
@@ -6727,9 +4839,9 @@ static void iwl3945_config_ap(struct iwl3945_priv *priv) | |||
6727 | 4839 | ||
6728 | static int iwl3945_mac_config_interface(struct ieee80211_hw *hw, | 4840 | static int iwl3945_mac_config_interface(struct ieee80211_hw *hw, |
6729 | struct ieee80211_vif *vif, | 4841 | struct ieee80211_vif *vif, |
6730 | struct ieee80211_if_conf *conf) | 4842 | struct ieee80211_if_conf *conf) |
6731 | { | 4843 | { |
6732 | struct iwl3945_priv *priv = hw->priv; | 4844 | struct iwl_priv *priv = hw->priv; |
6733 | int rc; | 4845 | int rc; |
6734 | 4846 | ||
6735 | if (conf == NULL) | 4847 | if (conf == NULL) |
@@ -6753,7 +4865,7 @@ static int iwl3945_mac_config_interface(struct ieee80211_hw *hw, | |||
6753 | return rc; | 4865 | return rc; |
6754 | } | 4866 | } |
6755 | 4867 | ||
6756 | if (!iwl3945_is_alive(priv)) | 4868 | if (!iwl_is_alive(priv)) |
6757 | return -EAGAIN; | 4869 | return -EAGAIN; |
6758 | 4870 | ||
6759 | mutex_lock(&priv->mutex); | 4871 | mutex_lock(&priv->mutex); |
@@ -6781,21 +4893,21 @@ static int iwl3945_mac_config_interface(struct ieee80211_hw *hw, | |||
6781 | priv->ibss_beacon = ieee80211_beacon_get(hw, vif); | 4893 | priv->ibss_beacon = ieee80211_beacon_get(hw, vif); |
6782 | } | 4894 | } |
6783 | 4895 | ||
6784 | if (iwl3945_is_rfkill(priv)) | 4896 | if (iwl_is_rfkill(priv)) |
6785 | goto done; | 4897 | goto done; |
6786 | 4898 | ||
6787 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && | 4899 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
6788 | !is_multicast_ether_addr(conf->bssid)) { | 4900 | !is_multicast_ether_addr(conf->bssid)) { |
6789 | /* If there is currently a HW scan going on in the background | 4901 | /* If there is currently a HW scan going on in the background |
6790 | * then we need to cancel it else the RXON below will fail. */ | 4902 | * then we need to cancel it else the RXON below will fail. */ |
6791 | if (iwl3945_scan_cancel_timeout(priv, 100)) { | 4903 | if (iwl_scan_cancel_timeout(priv, 100)) { |
6792 | IWL_WARNING("Aborted scan still in progress " | 4904 | IWL_WARN(priv, "Aborted scan still in progress " |
6793 | "after 100ms\n"); | 4905 | "after 100ms\n"); |
6794 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | 4906 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); |
6795 | mutex_unlock(&priv->mutex); | 4907 | mutex_unlock(&priv->mutex); |
6796 | return -EAGAIN; | 4908 | return -EAGAIN; |
6797 | } | 4909 | } |
6798 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | 4910 | memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN); |
6799 | 4911 | ||
6800 | /* TODO: Audit driver for usage of these members and see | 4912 | /* TODO: Audit driver for usage of these members and see |
6801 | * if mac80211 deprecates them (priv->bssid looks like it | 4913 | * if mac80211 deprecates them (priv->bssid looks like it |
@@ -6809,12 +4921,12 @@ static int iwl3945_mac_config_interface(struct ieee80211_hw *hw, | |||
6809 | rc = iwl3945_commit_rxon(priv); | 4921 | rc = iwl3945_commit_rxon(priv); |
6810 | if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc) | 4922 | if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc) |
6811 | iwl3945_add_station(priv, | 4923 | iwl3945_add_station(priv, |
6812 | priv->active_rxon.bssid_addr, 1, 0); | 4924 | priv->active39_rxon.bssid_addr, 1, 0); |
6813 | } | 4925 | } |
6814 | 4926 | ||
6815 | } else { | 4927 | } else { |
6816 | iwl3945_scan_cancel_timeout(priv, 100); | 4928 | iwl_scan_cancel_timeout(priv, 100); |
6817 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | 4929 | priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
6818 | iwl3945_commit_rxon(priv); | 4930 | iwl3945_commit_rxon(priv); |
6819 | } | 4931 | } |
6820 | 4932 | ||
@@ -6830,8 +4942,8 @@ static void iwl3945_configure_filter(struct ieee80211_hw *hw, | |||
6830 | unsigned int *total_flags, | 4942 | unsigned int *total_flags, |
6831 | int mc_count, struct dev_addr_list *mc_list) | 4943 | int mc_count, struct dev_addr_list *mc_list) |
6832 | { | 4944 | { |
6833 | struct iwl3945_priv *priv = hw->priv; | 4945 | struct iwl_priv *priv = hw->priv; |
6834 | __le32 *filter_flags = &priv->staging_rxon.filter_flags; | 4946 | __le32 *filter_flags = &priv->staging39_rxon.filter_flags; |
6835 | 4947 | ||
6836 | IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", | 4948 | IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", |
6837 | changed_flags, *total_flags); | 4949 | changed_flags, *total_flags); |
@@ -6874,15 +4986,15 @@ static void iwl3945_configure_filter(struct ieee80211_hw *hw, | |||
6874 | static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw, | 4986 | static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw, |
6875 | struct ieee80211_if_init_conf *conf) | 4987 | struct ieee80211_if_init_conf *conf) |
6876 | { | 4988 | { |
6877 | struct iwl3945_priv *priv = hw->priv; | 4989 | struct iwl_priv *priv = hw->priv; |
6878 | 4990 | ||
6879 | IWL_DEBUG_MAC80211("enter\n"); | 4991 | IWL_DEBUG_MAC80211("enter\n"); |
6880 | 4992 | ||
6881 | mutex_lock(&priv->mutex); | 4993 | mutex_lock(&priv->mutex); |
6882 | 4994 | ||
6883 | if (iwl3945_is_ready_rf(priv)) { | 4995 | if (iwl_is_ready_rf(priv)) { |
6884 | iwl3945_scan_cancel_timeout(priv, 100); | 4996 | iwl_scan_cancel_timeout(priv, 100); |
6885 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | 4997 | priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
6886 | iwl3945_commit_rxon(priv); | 4998 | iwl3945_commit_rxon(priv); |
6887 | } | 4999 | } |
6888 | if (priv->vif == conf->vif) { | 5000 | if (priv->vif == conf->vif) { |
@@ -6901,7 +5013,7 @@ static void iwl3945_bss_info_changed(struct ieee80211_hw *hw, | |||
6901 | struct ieee80211_bss_conf *bss_conf, | 5013 | struct ieee80211_bss_conf *bss_conf, |
6902 | u32 changes) | 5014 | u32 changes) |
6903 | { | 5015 | { |
6904 | struct iwl3945_priv *priv = hw->priv; | 5016 | struct iwl_priv *priv = hw->priv; |
6905 | 5017 | ||
6906 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); | 5018 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
6907 | 5019 | ||
@@ -6909,17 +5021,17 @@ static void iwl3945_bss_info_changed(struct ieee80211_hw *hw, | |||
6909 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", | 5021 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
6910 | bss_conf->use_short_preamble); | 5022 | bss_conf->use_short_preamble); |
6911 | if (bss_conf->use_short_preamble) | 5023 | if (bss_conf->use_short_preamble) |
6912 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | 5024 | priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
6913 | else | 5025 | else |
6914 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | 5026 | priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; |
6915 | } | 5027 | } |
6916 | 5028 | ||
6917 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { | 5029 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
6918 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); | 5030 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
6919 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) | 5031 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
6920 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; | 5032 | priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
6921 | else | 5033 | else |
6922 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | 5034 | priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; |
6923 | } | 5035 | } |
6924 | 5036 | ||
6925 | if (changes & BSS_CHANGED_ASSOC) { | 5037 | if (changes & BSS_CHANGED_ASSOC) { |
@@ -6931,10 +5043,9 @@ static void iwl3945_bss_info_changed(struct ieee80211_hw *hw, | |||
6931 | if (bss_conf->assoc) { | 5043 | if (bss_conf->assoc) { |
6932 | priv->assoc_id = bss_conf->aid; | 5044 | priv->assoc_id = bss_conf->aid; |
6933 | priv->beacon_int = bss_conf->beacon_int; | 5045 | priv->beacon_int = bss_conf->beacon_int; |
6934 | priv->timestamp0 = bss_conf->timestamp & 0xFFFFFFFF; | 5046 | priv->timestamp = bss_conf->timestamp; |
6935 | priv->timestamp1 = (bss_conf->timestamp >> 32) & | ||
6936 | 0xFFFFFFFF; | ||
6937 | priv->assoc_capability = bss_conf->assoc_capability; | 5047 | priv->assoc_capability = bss_conf->assoc_capability; |
5048 | priv->power_data.dtim_period = bss_conf->dtim_period; | ||
6938 | priv->next_scan_jiffies = jiffies + | 5049 | priv->next_scan_jiffies = jiffies + |
6939 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | 5050 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; |
6940 | mutex_lock(&priv->mutex); | 5051 | mutex_lock(&priv->mutex); |
@@ -6955,7 +5066,7 @@ static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len) | |||
6955 | { | 5066 | { |
6956 | int rc = 0; | 5067 | int rc = 0; |
6957 | unsigned long flags; | 5068 | unsigned long flags; |
6958 | struct iwl3945_priv *priv = hw->priv; | 5069 | struct iwl_priv *priv = hw->priv; |
6959 | DECLARE_SSID_BUF(ssid_buf); | 5070 | DECLARE_SSID_BUF(ssid_buf); |
6960 | 5071 | ||
6961 | IWL_DEBUG_MAC80211("enter\n"); | 5072 | IWL_DEBUG_MAC80211("enter\n"); |
@@ -6963,7 +5074,7 @@ static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len) | |||
6963 | mutex_lock(&priv->mutex); | 5074 | mutex_lock(&priv->mutex); |
6964 | spin_lock_irqsave(&priv->lock, flags); | 5075 | spin_lock_irqsave(&priv->lock, flags); |
6965 | 5076 | ||
6966 | if (!iwl3945_is_ready_rf(priv)) { | 5077 | if (!iwl_is_ready_rf(priv)) { |
6967 | rc = -EIO; | 5078 | rc = -EIO; |
6968 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); | 5079 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); |
6969 | goto out_unlock; | 5080 | goto out_unlock; |
@@ -7005,24 +5116,23 @@ out_unlock: | |||
7005 | } | 5116 | } |
7006 | 5117 | ||
7007 | static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | 5118 | static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
7008 | const u8 *local_addr, const u8 *addr, | 5119 | struct ieee80211_vif *vif, |
7009 | struct ieee80211_key_conf *key) | 5120 | struct ieee80211_sta *sta, |
5121 | struct ieee80211_key_conf *key) | ||
7010 | { | 5122 | { |
7011 | struct iwl3945_priv *priv = hw->priv; | 5123 | struct iwl_priv *priv = hw->priv; |
7012 | int rc = 0; | 5124 | const u8 *addr; |
5125 | int ret; | ||
7013 | u8 sta_id; | 5126 | u8 sta_id; |
7014 | 5127 | ||
7015 | IWL_DEBUG_MAC80211("enter\n"); | 5128 | IWL_DEBUG_MAC80211("enter\n"); |
7016 | 5129 | ||
7017 | if (!iwl3945_param_hwcrypto) { | 5130 | if (iwl3945_mod_params.sw_crypto) { |
7018 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); | 5131 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
7019 | return -EOPNOTSUPP; | 5132 | return -EOPNOTSUPP; |
7020 | } | 5133 | } |
7021 | 5134 | ||
7022 | if (is_zero_ether_addr(addr)) | 5135 | addr = sta ? sta->addr : iwl_bcast_addr; |
7023 | /* only support pairwise keys */ | ||
7024 | return -EOPNOTSUPP; | ||
7025 | |||
7026 | sta_id = iwl3945_hw_find_station(priv, addr); | 5136 | sta_id = iwl3945_hw_find_station(priv, addr); |
7027 | if (sta_id == IWL_INVALID_STATION) { | 5137 | if (sta_id == IWL_INVALID_STATION) { |
7028 | IWL_DEBUG_MAC80211("leave - %pM not in station map.\n", | 5138 | IWL_DEBUG_MAC80211("leave - %pM not in station map.\n", |
@@ -7032,12 +5142,12 @@ static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
7032 | 5142 | ||
7033 | mutex_lock(&priv->mutex); | 5143 | mutex_lock(&priv->mutex); |
7034 | 5144 | ||
7035 | iwl3945_scan_cancel_timeout(priv, 100); | 5145 | iwl_scan_cancel_timeout(priv, 100); |
7036 | 5146 | ||
7037 | switch (cmd) { | 5147 | switch (cmd) { |
7038 | case SET_KEY: | 5148 | case SET_KEY: |
7039 | rc = iwl3945_update_sta_key_info(priv, key, sta_id); | 5149 | ret = iwl3945_update_sta_key_info(priv, key, sta_id); |
7040 | if (!rc) { | 5150 | if (!ret) { |
7041 | iwl3945_set_rxon_hwcrypto(priv, 1); | 5151 | iwl3945_set_rxon_hwcrypto(priv, 1); |
7042 | iwl3945_commit_rxon(priv); | 5152 | iwl3945_commit_rxon(priv); |
7043 | key->hw_key_idx = sta_id; | 5153 | key->hw_key_idx = sta_id; |
@@ -7046,33 +5156,33 @@ static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
7046 | } | 5156 | } |
7047 | break; | 5157 | break; |
7048 | case DISABLE_KEY: | 5158 | case DISABLE_KEY: |
7049 | rc = iwl3945_clear_sta_key_info(priv, sta_id); | 5159 | ret = iwl3945_clear_sta_key_info(priv, sta_id); |
7050 | if (!rc) { | 5160 | if (!ret) { |
7051 | iwl3945_set_rxon_hwcrypto(priv, 0); | 5161 | iwl3945_set_rxon_hwcrypto(priv, 0); |
7052 | iwl3945_commit_rxon(priv); | 5162 | iwl3945_commit_rxon(priv); |
7053 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | 5163 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); |
7054 | } | 5164 | } |
7055 | break; | 5165 | break; |
7056 | default: | 5166 | default: |
7057 | rc = -EINVAL; | 5167 | ret = -EINVAL; |
7058 | } | 5168 | } |
7059 | 5169 | ||
7060 | IWL_DEBUG_MAC80211("leave\n"); | 5170 | IWL_DEBUG_MAC80211("leave\n"); |
7061 | mutex_unlock(&priv->mutex); | 5171 | mutex_unlock(&priv->mutex); |
7062 | 5172 | ||
7063 | return rc; | 5173 | return ret; |
7064 | } | 5174 | } |
7065 | 5175 | ||
7066 | static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, | 5176 | static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
7067 | const struct ieee80211_tx_queue_params *params) | 5177 | const struct ieee80211_tx_queue_params *params) |
7068 | { | 5178 | { |
7069 | struct iwl3945_priv *priv = hw->priv; | 5179 | struct iwl_priv *priv = hw->priv; |
7070 | unsigned long flags; | 5180 | unsigned long flags; |
7071 | int q; | 5181 | int q; |
7072 | 5182 | ||
7073 | IWL_DEBUG_MAC80211("enter\n"); | 5183 | IWL_DEBUG_MAC80211("enter\n"); |
7074 | 5184 | ||
7075 | if (!iwl3945_is_ready_rf(priv)) { | 5185 | if (!iwl_is_ready_rf(priv)) { |
7076 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); | 5186 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
7077 | return -EIO; | 5187 | return -EIO; |
7078 | } | 5188 | } |
@@ -7112,15 +5222,15 @@ static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, | |||
7112 | static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw, | 5222 | static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw, |
7113 | struct ieee80211_tx_queue_stats *stats) | 5223 | struct ieee80211_tx_queue_stats *stats) |
7114 | { | 5224 | { |
7115 | struct iwl3945_priv *priv = hw->priv; | 5225 | struct iwl_priv *priv = hw->priv; |
7116 | int i, avail; | 5226 | int i, avail; |
7117 | struct iwl3945_tx_queue *txq; | 5227 | struct iwl_tx_queue *txq; |
7118 | struct iwl3945_queue *q; | 5228 | struct iwl_queue *q; |
7119 | unsigned long flags; | 5229 | unsigned long flags; |
7120 | 5230 | ||
7121 | IWL_DEBUG_MAC80211("enter\n"); | 5231 | IWL_DEBUG_MAC80211("enter\n"); |
7122 | 5232 | ||
7123 | if (!iwl3945_is_ready_rf(priv)) { | 5233 | if (!iwl_is_ready_rf(priv)) { |
7124 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); | 5234 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
7125 | return -EIO; | 5235 | return -EIO; |
7126 | } | 5236 | } |
@@ -7130,7 +5240,7 @@ static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw, | |||
7130 | for (i = 0; i < AC_NUM; i++) { | 5240 | for (i = 0; i < AC_NUM; i++) { |
7131 | txq = &priv->txq[i]; | 5241 | txq = &priv->txq[i]; |
7132 | q = &txq->q; | 5242 | q = &txq->q; |
7133 | avail = iwl3945_queue_space(q); | 5243 | avail = iwl_queue_space(q); |
7134 | 5244 | ||
7135 | stats[i].len = q->n_window - avail; | 5245 | stats[i].len = q->n_window - avail; |
7136 | stats[i].limit = q->n_window - q->high_mark; | 5246 | stats[i].limit = q->n_window - q->high_mark; |
@@ -7144,29 +5254,19 @@ static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw, | |||
7144 | return 0; | 5254 | return 0; |
7145 | } | 5255 | } |
7146 | 5256 | ||
7147 | static int iwl3945_mac_get_stats(struct ieee80211_hw *hw, | ||
7148 | struct ieee80211_low_level_stats *stats) | ||
7149 | { | ||
7150 | IWL_DEBUG_MAC80211("enter\n"); | ||
7151 | IWL_DEBUG_MAC80211("leave\n"); | ||
7152 | |||
7153 | return 0; | ||
7154 | } | ||
7155 | |||
7156 | static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw) | 5257 | static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw) |
7157 | { | 5258 | { |
7158 | struct iwl3945_priv *priv = hw->priv; | 5259 | struct iwl_priv *priv = hw->priv; |
7159 | unsigned long flags; | 5260 | unsigned long flags; |
7160 | 5261 | ||
7161 | mutex_lock(&priv->mutex); | 5262 | mutex_lock(&priv->mutex); |
7162 | IWL_DEBUG_MAC80211("enter\n"); | 5263 | IWL_DEBUG_MAC80211("enter\n"); |
7163 | 5264 | ||
7164 | iwl3945_reset_qos(priv); | 5265 | iwl_reset_qos(priv); |
7165 | 5266 | ||
7166 | spin_lock_irqsave(&priv->lock, flags); | 5267 | spin_lock_irqsave(&priv->lock, flags); |
7167 | priv->assoc_id = 0; | 5268 | priv->assoc_id = 0; |
7168 | priv->assoc_capability = 0; | 5269 | priv->assoc_capability = 0; |
7169 | priv->call_post_assoc_from_beacon = 0; | ||
7170 | 5270 | ||
7171 | /* new association get rid of ibss beacon skb */ | 5271 | /* new association get rid of ibss beacon skb */ |
7172 | if (priv->ibss_beacon) | 5272 | if (priv->ibss_beacon) |
@@ -7175,14 +5275,13 @@ static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw) | |||
7175 | priv->ibss_beacon = NULL; | 5275 | priv->ibss_beacon = NULL; |
7176 | 5276 | ||
7177 | priv->beacon_int = priv->hw->conf.beacon_int; | 5277 | priv->beacon_int = priv->hw->conf.beacon_int; |
7178 | priv->timestamp1 = 0; | 5278 | priv->timestamp = 0; |
7179 | priv->timestamp0 = 0; | ||
7180 | if ((priv->iw_mode == NL80211_IFTYPE_STATION)) | 5279 | if ((priv->iw_mode == NL80211_IFTYPE_STATION)) |
7181 | priv->beacon_int = 0; | 5280 | priv->beacon_int = 0; |
7182 | 5281 | ||
7183 | spin_unlock_irqrestore(&priv->lock, flags); | 5282 | spin_unlock_irqrestore(&priv->lock, flags); |
7184 | 5283 | ||
7185 | if (!iwl3945_is_ready_rf(priv)) { | 5284 | if (!iwl_is_ready_rf(priv)) { |
7186 | IWL_DEBUG_MAC80211("leave - not ready\n"); | 5285 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
7187 | mutex_unlock(&priv->mutex); | 5286 | mutex_unlock(&priv->mutex); |
7188 | return; | 5287 | return; |
@@ -7192,8 +5291,8 @@ static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw) | |||
7192 | * clear RXON_FILTER_ASSOC_MSK bit | 5291 | * clear RXON_FILTER_ASSOC_MSK bit |
7193 | */ | 5292 | */ |
7194 | if (priv->iw_mode != NL80211_IFTYPE_AP) { | 5293 | if (priv->iw_mode != NL80211_IFTYPE_AP) { |
7195 | iwl3945_scan_cancel_timeout(priv, 100); | 5294 | iwl_scan_cancel_timeout(priv, 100); |
7196 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | 5295 | priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
7197 | iwl3945_commit_rxon(priv); | 5296 | iwl3945_commit_rxon(priv); |
7198 | } | 5297 | } |
7199 | 5298 | ||
@@ -7215,12 +5314,12 @@ static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw) | |||
7215 | 5314 | ||
7216 | static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) | 5315 | static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) |
7217 | { | 5316 | { |
7218 | struct iwl3945_priv *priv = hw->priv; | 5317 | struct iwl_priv *priv = hw->priv; |
7219 | unsigned long flags; | 5318 | unsigned long flags; |
7220 | 5319 | ||
7221 | IWL_DEBUG_MAC80211("enter\n"); | 5320 | IWL_DEBUG_MAC80211("enter\n"); |
7222 | 5321 | ||
7223 | if (!iwl3945_is_ready_rf(priv)) { | 5322 | if (!iwl_is_ready_rf(priv)) { |
7224 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); | 5323 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
7225 | return -EIO; | 5324 | return -EIO; |
7226 | } | 5325 | } |
@@ -7242,7 +5341,7 @@ static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *sk | |||
7242 | IWL_DEBUG_MAC80211("leave\n"); | 5341 | IWL_DEBUG_MAC80211("leave\n"); |
7243 | spin_unlock_irqrestore(&priv->lock, flags); | 5342 | spin_unlock_irqrestore(&priv->lock, flags); |
7244 | 5343 | ||
7245 | iwl3945_reset_qos(priv); | 5344 | iwl_reset_qos(priv); |
7246 | 5345 | ||
7247 | iwl3945_post_associate(priv); | 5346 | iwl3945_post_associate(priv); |
7248 | 5347 | ||
@@ -7256,7 +5355,7 @@ static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *sk | |||
7256 | * | 5355 | * |
7257 | *****************************************************************************/ | 5356 | *****************************************************************************/ |
7258 | 5357 | ||
7259 | #ifdef CONFIG_IWL3945_DEBUG | 5358 | #ifdef CONFIG_IWLWIFI_DEBUG |
7260 | 5359 | ||
7261 | /* | 5360 | /* |
7262 | * The following adds a new attribute to the sysfs representation | 5361 | * The following adds a new attribute to the sysfs representation |
@@ -7265,38 +5364,41 @@ static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *sk | |||
7265 | * | 5364 | * |
7266 | * See the level definitions in iwl for details. | 5365 | * See the level definitions in iwl for details. |
7267 | */ | 5366 | */ |
7268 | 5367 | static ssize_t show_debug_level(struct device *d, | |
7269 | static ssize_t show_debug_level(struct device_driver *d, char *buf) | 5368 | struct device_attribute *attr, char *buf) |
7270 | { | 5369 | { |
7271 | return sprintf(buf, "0x%08X\n", iwl3945_debug_level); | 5370 | struct iwl_priv *priv = d->driver_data; |
5371 | |||
5372 | return sprintf(buf, "0x%08X\n", priv->debug_level); | ||
7272 | } | 5373 | } |
7273 | static ssize_t store_debug_level(struct device_driver *d, | 5374 | static ssize_t store_debug_level(struct device *d, |
5375 | struct device_attribute *attr, | ||
7274 | const char *buf, size_t count) | 5376 | const char *buf, size_t count) |
7275 | { | 5377 | { |
7276 | char *p = (char *)buf; | 5378 | struct iwl_priv *priv = d->driver_data; |
7277 | u32 val; | 5379 | unsigned long val; |
5380 | int ret; | ||
7278 | 5381 | ||
7279 | val = simple_strtoul(p, &p, 0); | 5382 | ret = strict_strtoul(buf, 0, &val); |
7280 | if (p == buf) | 5383 | if (ret) |
7281 | printk(KERN_INFO DRV_NAME | 5384 | IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf); |
7282 | ": %s is not in hex or decimal form.\n", buf); | ||
7283 | else | 5385 | else |
7284 | iwl3945_debug_level = val; | 5386 | priv->debug_level = val; |
7285 | 5387 | ||
7286 | return strnlen(buf, count); | 5388 | return strnlen(buf, count); |
7287 | } | 5389 | } |
7288 | 5390 | ||
7289 | static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO, | 5391 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, |
7290 | show_debug_level, store_debug_level); | 5392 | show_debug_level, store_debug_level); |
7291 | 5393 | ||
7292 | #endif /* CONFIG_IWL3945_DEBUG */ | 5394 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
7293 | 5395 | ||
7294 | static ssize_t show_temperature(struct device *d, | 5396 | static ssize_t show_temperature(struct device *d, |
7295 | struct device_attribute *attr, char *buf) | 5397 | struct device_attribute *attr, char *buf) |
7296 | { | 5398 | { |
7297 | struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data; | 5399 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
7298 | 5400 | ||
7299 | if (!iwl3945_is_alive(priv)) | 5401 | if (!iwl_is_alive(priv)) |
7300 | return -EAGAIN; | 5402 | return -EAGAIN; |
7301 | 5403 | ||
7302 | return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv)); | 5404 | return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv)); |
@@ -7307,22 +5409,21 @@ static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |||
7307 | static ssize_t show_tx_power(struct device *d, | 5409 | static ssize_t show_tx_power(struct device *d, |
7308 | struct device_attribute *attr, char *buf) | 5410 | struct device_attribute *attr, char *buf) |
7309 | { | 5411 | { |
7310 | struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data; | 5412 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
7311 | return sprintf(buf, "%d\n", priv->user_txpower_limit); | 5413 | return sprintf(buf, "%d\n", priv->tx_power_user_lmt); |
7312 | } | 5414 | } |
7313 | 5415 | ||
7314 | static ssize_t store_tx_power(struct device *d, | 5416 | static ssize_t store_tx_power(struct device *d, |
7315 | struct device_attribute *attr, | 5417 | struct device_attribute *attr, |
7316 | const char *buf, size_t count) | 5418 | const char *buf, size_t count) |
7317 | { | 5419 | { |
7318 | struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data; | 5420 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
7319 | char *p = (char *)buf; | 5421 | char *p = (char *)buf; |
7320 | u32 val; | 5422 | u32 val; |
7321 | 5423 | ||
7322 | val = simple_strtoul(p, &p, 10); | 5424 | val = simple_strtoul(p, &p, 10); |
7323 | if (p == buf) | 5425 | if (p == buf) |
7324 | printk(KERN_INFO DRV_NAME | 5426 | IWL_INFO(priv, ": %s is not in decimal form.\n", buf); |
7325 | ": %s is not in decimal form.\n", buf); | ||
7326 | else | 5427 | else |
7327 | iwl3945_hw_reg_set_txpower(priv, val); | 5428 | iwl3945_hw_reg_set_txpower(priv, val); |
7328 | 5429 | ||
@@ -7334,27 +5435,27 @@ static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |||
7334 | static ssize_t show_flags(struct device *d, | 5435 | static ssize_t show_flags(struct device *d, |
7335 | struct device_attribute *attr, char *buf) | 5436 | struct device_attribute *attr, char *buf) |
7336 | { | 5437 | { |
7337 | struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data; | 5438 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
7338 | 5439 | ||
7339 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | 5440 | return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags); |
7340 | } | 5441 | } |
7341 | 5442 | ||
7342 | static ssize_t store_flags(struct device *d, | 5443 | static ssize_t store_flags(struct device *d, |
7343 | struct device_attribute *attr, | 5444 | struct device_attribute *attr, |
7344 | const char *buf, size_t count) | 5445 | const char *buf, size_t count) |
7345 | { | 5446 | { |
7346 | struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data; | 5447 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
7347 | u32 flags = simple_strtoul(buf, NULL, 0); | 5448 | u32 flags = simple_strtoul(buf, NULL, 0); |
7348 | 5449 | ||
7349 | mutex_lock(&priv->mutex); | 5450 | mutex_lock(&priv->mutex); |
7350 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | 5451 | if (le32_to_cpu(priv->staging39_rxon.flags) != flags) { |
7351 | /* Cancel any currently running scans... */ | 5452 | /* Cancel any currently running scans... */ |
7352 | if (iwl3945_scan_cancel_timeout(priv, 100)) | 5453 | if (iwl_scan_cancel_timeout(priv, 100)) |
7353 | IWL_WARNING("Could not cancel scan.\n"); | 5454 | IWL_WARN(priv, "Could not cancel scan.\n"); |
7354 | else { | 5455 | else { |
7355 | IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n", | 5456 | IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n", |
7356 | flags); | 5457 | flags); |
7357 | priv->staging_rxon.flags = cpu_to_le32(flags); | 5458 | priv->staging39_rxon.flags = cpu_to_le32(flags); |
7358 | iwl3945_commit_rxon(priv); | 5459 | iwl3945_commit_rxon(priv); |
7359 | } | 5460 | } |
7360 | } | 5461 | } |
@@ -7368,28 +5469,28 @@ static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |||
7368 | static ssize_t show_filter_flags(struct device *d, | 5469 | static ssize_t show_filter_flags(struct device *d, |
7369 | struct device_attribute *attr, char *buf) | 5470 | struct device_attribute *attr, char *buf) |
7370 | { | 5471 | { |
7371 | struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data; | 5472 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
7372 | 5473 | ||
7373 | return sprintf(buf, "0x%04X\n", | 5474 | return sprintf(buf, "0x%04X\n", |
7374 | le32_to_cpu(priv->active_rxon.filter_flags)); | 5475 | le32_to_cpu(priv->active39_rxon.filter_flags)); |
7375 | } | 5476 | } |
7376 | 5477 | ||
7377 | static ssize_t store_filter_flags(struct device *d, | 5478 | static ssize_t store_filter_flags(struct device *d, |
7378 | struct device_attribute *attr, | 5479 | struct device_attribute *attr, |
7379 | const char *buf, size_t count) | 5480 | const char *buf, size_t count) |
7380 | { | 5481 | { |
7381 | struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data; | 5482 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
7382 | u32 filter_flags = simple_strtoul(buf, NULL, 0); | 5483 | u32 filter_flags = simple_strtoul(buf, NULL, 0); |
7383 | 5484 | ||
7384 | mutex_lock(&priv->mutex); | 5485 | mutex_lock(&priv->mutex); |
7385 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | 5486 | if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) { |
7386 | /* Cancel any currently running scans... */ | 5487 | /* Cancel any currently running scans... */ |
7387 | if (iwl3945_scan_cancel_timeout(priv, 100)) | 5488 | if (iwl_scan_cancel_timeout(priv, 100)) |
7388 | IWL_WARNING("Could not cancel scan.\n"); | 5489 | IWL_WARN(priv, "Could not cancel scan.\n"); |
7389 | else { | 5490 | else { |
7390 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | 5491 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " |
7391 | "0x%04X\n", filter_flags); | 5492 | "0x%04X\n", filter_flags); |
7392 | priv->staging_rxon.filter_flags = | 5493 | priv->staging39_rxon.filter_flags = |
7393 | cpu_to_le32(filter_flags); | 5494 | cpu_to_le32(filter_flags); |
7394 | iwl3945_commit_rxon(priv); | 5495 | iwl3945_commit_rxon(priv); |
7395 | } | 5496 | } |
@@ -7407,8 +5508,8 @@ static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |||
7407 | static ssize_t show_measurement(struct device *d, | 5508 | static ssize_t show_measurement(struct device *d, |
7408 | struct device_attribute *attr, char *buf) | 5509 | struct device_attribute *attr, char *buf) |
7409 | { | 5510 | { |
7410 | struct iwl3945_priv *priv = dev_get_drvdata(d); | 5511 | struct iwl_priv *priv = dev_get_drvdata(d); |
7411 | struct iwl3945_spectrum_notification measure_report; | 5512 | struct iwl_spectrum_notification measure_report; |
7412 | u32 size = sizeof(measure_report), len = 0, ofs = 0; | 5513 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
7413 | u8 *data = (u8 *)&measure_report; | 5514 | u8 *data = (u8 *)&measure_report; |
7414 | unsigned long flags; | 5515 | unsigned long flags; |
@@ -7440,9 +5541,9 @@ static ssize_t store_measurement(struct device *d, | |||
7440 | struct device_attribute *attr, | 5541 | struct device_attribute *attr, |
7441 | const char *buf, size_t count) | 5542 | const char *buf, size_t count) |
7442 | { | 5543 | { |
7443 | struct iwl3945_priv *priv = dev_get_drvdata(d); | 5544 | struct iwl_priv *priv = dev_get_drvdata(d); |
7444 | struct ieee80211_measurement_params params = { | 5545 | struct ieee80211_measurement_params params = { |
7445 | .channel = le16_to_cpu(priv->active_rxon.channel), | 5546 | .channel = le16_to_cpu(priv->active39_rxon.channel), |
7446 | .start_time = cpu_to_le64(priv->last_tsf), | 5547 | .start_time = cpu_to_le64(priv->last_tsf), |
7447 | .duration = cpu_to_le16(1), | 5548 | .duration = cpu_to_le16(1), |
7448 | }; | 5549 | }; |
@@ -7479,7 +5580,7 @@ static ssize_t store_retry_rate(struct device *d, | |||
7479 | struct device_attribute *attr, | 5580 | struct device_attribute *attr, |
7480 | const char *buf, size_t count) | 5581 | const char *buf, size_t count) |
7481 | { | 5582 | { |
7482 | struct iwl3945_priv *priv = dev_get_drvdata(d); | 5583 | struct iwl_priv *priv = dev_get_drvdata(d); |
7483 | 5584 | ||
7484 | priv->retry_rate = simple_strtoul(buf, NULL, 0); | 5585 | priv->retry_rate = simple_strtoul(buf, NULL, 0); |
7485 | if (priv->retry_rate <= 0) | 5586 | if (priv->retry_rate <= 0) |
@@ -7491,7 +5592,7 @@ static ssize_t store_retry_rate(struct device *d, | |||
7491 | static ssize_t show_retry_rate(struct device *d, | 5592 | static ssize_t show_retry_rate(struct device *d, |
7492 | struct device_attribute *attr, char *buf) | 5593 | struct device_attribute *attr, char *buf) |
7493 | { | 5594 | { |
7494 | struct iwl3945_priv *priv = dev_get_drvdata(d); | 5595 | struct iwl_priv *priv = dev_get_drvdata(d); |
7495 | return sprintf(buf, "%d", priv->retry_rate); | 5596 | return sprintf(buf, "%d", priv->retry_rate); |
7496 | } | 5597 | } |
7497 | 5598 | ||
@@ -7502,20 +5603,21 @@ static ssize_t store_power_level(struct device *d, | |||
7502 | struct device_attribute *attr, | 5603 | struct device_attribute *attr, |
7503 | const char *buf, size_t count) | 5604 | const char *buf, size_t count) |
7504 | { | 5605 | { |
7505 | struct iwl3945_priv *priv = dev_get_drvdata(d); | 5606 | struct iwl_priv *priv = dev_get_drvdata(d); |
7506 | int rc; | 5607 | int rc; |
7507 | int mode; | 5608 | int mode; |
7508 | 5609 | ||
7509 | mode = simple_strtoul(buf, NULL, 0); | 5610 | mode = simple_strtoul(buf, NULL, 0); |
7510 | mutex_lock(&priv->mutex); | 5611 | mutex_lock(&priv->mutex); |
7511 | 5612 | ||
7512 | if (!iwl3945_is_ready(priv)) { | 5613 | if (!iwl_is_ready(priv)) { |
7513 | rc = -EAGAIN; | 5614 | rc = -EAGAIN; |
7514 | goto out; | 5615 | goto out; |
7515 | } | 5616 | } |
7516 | 5617 | ||
7517 | if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC)) | 5618 | if ((mode < 1) || (mode > IWL39_POWER_LIMIT) || |
7518 | mode = IWL_POWER_AC; | 5619 | (mode == IWL39_POWER_AC)) |
5620 | mode = IWL39_POWER_AC; | ||
7519 | else | 5621 | else |
7520 | mode |= IWL_POWER_ENABLED; | 5622 | mode |= IWL_POWER_ENABLED; |
7521 | 5623 | ||
@@ -7556,17 +5658,17 @@ static const s32 period_duration[] = { | |||
7556 | static ssize_t show_power_level(struct device *d, | 5658 | static ssize_t show_power_level(struct device *d, |
7557 | struct device_attribute *attr, char *buf) | 5659 | struct device_attribute *attr, char *buf) |
7558 | { | 5660 | { |
7559 | struct iwl3945_priv *priv = dev_get_drvdata(d); | 5661 | struct iwl_priv *priv = dev_get_drvdata(d); |
7560 | int level = IWL_POWER_LEVEL(priv->power_mode); | 5662 | int level = IWL_POWER_LEVEL(priv->power_mode); |
7561 | char *p = buf; | 5663 | char *p = buf; |
7562 | 5664 | ||
7563 | p += sprintf(p, "%d ", level); | 5665 | p += sprintf(p, "%d ", level); |
7564 | switch (level) { | 5666 | switch (level) { |
7565 | case IWL_POWER_MODE_CAM: | 5667 | case IWL_POWER_MODE_CAM: |
7566 | case IWL_POWER_AC: | 5668 | case IWL39_POWER_AC: |
7567 | p += sprintf(p, "(AC)"); | 5669 | p += sprintf(p, "(AC)"); |
7568 | break; | 5670 | break; |
7569 | case IWL_POWER_BATTERY: | 5671 | case IWL39_POWER_BATTERY: |
7570 | p += sprintf(p, "(BATTERY)"); | 5672 | p += sprintf(p, "(BATTERY)"); |
7571 | break; | 5673 | break; |
7572 | default: | 5674 | default: |
@@ -7600,17 +5702,17 @@ static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |||
7600 | static ssize_t show_statistics(struct device *d, | 5702 | static ssize_t show_statistics(struct device *d, |
7601 | struct device_attribute *attr, char *buf) | 5703 | struct device_attribute *attr, char *buf) |
7602 | { | 5704 | { |
7603 | struct iwl3945_priv *priv = dev_get_drvdata(d); | 5705 | struct iwl_priv *priv = dev_get_drvdata(d); |
7604 | u32 size = sizeof(struct iwl3945_notif_statistics); | 5706 | u32 size = sizeof(struct iwl3945_notif_statistics); |
7605 | u32 len = 0, ofs = 0; | 5707 | u32 len = 0, ofs = 0; |
7606 | u8 *data = (u8 *)&priv->statistics; | 5708 | u8 *data = (u8 *)&priv->statistics_39; |
7607 | int rc = 0; | 5709 | int rc = 0; |
7608 | 5710 | ||
7609 | if (!iwl3945_is_alive(priv)) | 5711 | if (!iwl_is_alive(priv)) |
7610 | return -EAGAIN; | 5712 | return -EAGAIN; |
7611 | 5713 | ||
7612 | mutex_lock(&priv->mutex); | 5714 | mutex_lock(&priv->mutex); |
7613 | rc = iwl3945_send_statistics_request(priv); | 5715 | rc = iwl_send_statistics_request(priv, 0); |
7614 | mutex_unlock(&priv->mutex); | 5716 | mutex_unlock(&priv->mutex); |
7615 | 5717 | ||
7616 | if (rc) { | 5718 | if (rc) { |
@@ -7638,12 +5740,12 @@ static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |||
7638 | static ssize_t show_antenna(struct device *d, | 5740 | static ssize_t show_antenna(struct device *d, |
7639 | struct device_attribute *attr, char *buf) | 5741 | struct device_attribute *attr, char *buf) |
7640 | { | 5742 | { |
7641 | struct iwl3945_priv *priv = dev_get_drvdata(d); | 5743 | struct iwl_priv *priv = dev_get_drvdata(d); |
7642 | 5744 | ||
7643 | if (!iwl3945_is_alive(priv)) | 5745 | if (!iwl_is_alive(priv)) |
7644 | return -EAGAIN; | 5746 | return -EAGAIN; |
7645 | 5747 | ||
7646 | return sprintf(buf, "%d\n", priv->antenna); | 5748 | return sprintf(buf, "%d\n", iwl3945_mod_params.antenna); |
7647 | } | 5749 | } |
7648 | 5750 | ||
7649 | static ssize_t store_antenna(struct device *d, | 5751 | static ssize_t store_antenna(struct device *d, |
@@ -7651,7 +5753,7 @@ static ssize_t store_antenna(struct device *d, | |||
7651 | const char *buf, size_t count) | 5753 | const char *buf, size_t count) |
7652 | { | 5754 | { |
7653 | int ant; | 5755 | int ant; |
7654 | struct iwl3945_priv *priv = dev_get_drvdata(d); | 5756 | struct iwl_priv *priv = dev_get_drvdata(d); |
7655 | 5757 | ||
7656 | if (count == 0) | 5758 | if (count == 0) |
7657 | return 0; | 5759 | return 0; |
@@ -7663,7 +5765,7 @@ static ssize_t store_antenna(struct device *d, | |||
7663 | 5765 | ||
7664 | if ((ant >= 0) && (ant <= 2)) { | 5766 | if ((ant >= 0) && (ant <= 2)) { |
7665 | IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant); | 5767 | IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant); |
7666 | priv->antenna = (enum iwl3945_antenna)ant; | 5768 | iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant; |
7667 | } else | 5769 | } else |
7668 | IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant); | 5770 | IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant); |
7669 | 5771 | ||
@@ -7676,8 +5778,8 @@ static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna); | |||
7676 | static ssize_t show_status(struct device *d, | 5778 | static ssize_t show_status(struct device *d, |
7677 | struct device_attribute *attr, char *buf) | 5779 | struct device_attribute *attr, char *buf) |
7678 | { | 5780 | { |
7679 | struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data; | 5781 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
7680 | if (!iwl3945_is_alive(priv)) | 5782 | if (!iwl_is_alive(priv)) |
7681 | return -EAGAIN; | 5783 | return -EAGAIN; |
7682 | return sprintf(buf, "0x%08x\n", (int)priv->status); | 5784 | return sprintf(buf, "0x%08x\n", (int)priv->status); |
7683 | } | 5785 | } |
@@ -7691,7 +5793,7 @@ static ssize_t dump_error_log(struct device *d, | |||
7691 | char *p = (char *)buf; | 5793 | char *p = (char *)buf; |
7692 | 5794 | ||
7693 | if (p[0] == '1') | 5795 | if (p[0] == '1') |
7694 | iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data); | 5796 | iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data); |
7695 | 5797 | ||
7696 | return strnlen(buf, count); | 5798 | return strnlen(buf, count); |
7697 | } | 5799 | } |
@@ -7705,7 +5807,7 @@ static ssize_t dump_event_log(struct device *d, | |||
7705 | char *p = (char *)buf; | 5807 | char *p = (char *)buf; |
7706 | 5808 | ||
7707 | if (p[0] == '1') | 5809 | if (p[0] == '1') |
7708 | iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data); | 5810 | iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data); |
7709 | 5811 | ||
7710 | return strnlen(buf, count); | 5812 | return strnlen(buf, count); |
7711 | } | 5813 | } |
@@ -7718,7 +5820,7 @@ static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log); | |||
7718 | * | 5820 | * |
7719 | *****************************************************************************/ | 5821 | *****************************************************************************/ |
7720 | 5822 | ||
7721 | static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv) | 5823 | static void iwl3945_setup_deferred_work(struct iwl_priv *priv) |
7722 | { | 5824 | { |
7723 | priv->workqueue = create_workqueue(DRV_NAME); | 5825 | priv->workqueue = create_workqueue(DRV_NAME); |
7724 | 5826 | ||
@@ -7727,14 +5829,15 @@ static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv) | |||
7727 | INIT_WORK(&priv->up, iwl3945_bg_up); | 5829 | INIT_WORK(&priv->up, iwl3945_bg_up); |
7728 | INIT_WORK(&priv->restart, iwl3945_bg_restart); | 5830 | INIT_WORK(&priv->restart, iwl3945_bg_restart); |
7729 | INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish); | 5831 | INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish); |
7730 | INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed); | 5832 | INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill); |
7731 | INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan); | ||
7732 | INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan); | ||
7733 | INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill); | ||
7734 | INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update); | 5833 | INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update); |
7735 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start); | 5834 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start); |
7736 | INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start); | 5835 | INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start); |
7737 | INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check); | 5836 | INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll); |
5837 | INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed); | ||
5838 | INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan); | ||
5839 | INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan); | ||
5840 | INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check); | ||
7738 | 5841 | ||
7739 | iwl3945_hw_setup_deferred_work(priv); | 5842 | iwl3945_hw_setup_deferred_work(priv); |
7740 | 5843 | ||
@@ -7742,7 +5845,7 @@ static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv) | |||
7742 | iwl3945_irq_tasklet, (unsigned long)priv); | 5845 | iwl3945_irq_tasklet, (unsigned long)priv); |
7743 | } | 5846 | } |
7744 | 5847 | ||
7745 | static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv) | 5848 | static void iwl3945_cancel_deferred_work(struct iwl_priv *priv) |
7746 | { | 5849 | { |
7747 | iwl3945_hw_cancel_deferred_work(priv); | 5850 | iwl3945_hw_cancel_deferred_work(priv); |
7748 | 5851 | ||
@@ -7768,7 +5871,9 @@ static struct attribute *iwl3945_sysfs_entries[] = { | |||
7768 | &dev_attr_status.attr, | 5871 | &dev_attr_status.attr, |
7769 | &dev_attr_temperature.attr, | 5872 | &dev_attr_temperature.attr, |
7770 | &dev_attr_tx_power.attr, | 5873 | &dev_attr_tx_power.attr, |
7771 | 5874 | #ifdef CONFIG_IWLWIFI_DEBUG | |
5875 | &dev_attr_debug_level.attr, | ||
5876 | #endif | ||
7772 | NULL | 5877 | NULL |
7773 | }; | 5878 | }; |
7774 | 5879 | ||
@@ -7787,7 +5892,6 @@ static struct ieee80211_ops iwl3945_hw_ops = { | |||
7787 | .config_interface = iwl3945_mac_config_interface, | 5892 | .config_interface = iwl3945_mac_config_interface, |
7788 | .configure_filter = iwl3945_configure_filter, | 5893 | .configure_filter = iwl3945_configure_filter, |
7789 | .set_key = iwl3945_mac_set_key, | 5894 | .set_key = iwl3945_mac_set_key, |
7790 | .get_stats = iwl3945_mac_get_stats, | ||
7791 | .get_tx_stats = iwl3945_mac_get_tx_stats, | 5895 | .get_tx_stats = iwl3945_mac_get_tx_stats, |
7792 | .conf_tx = iwl3945_mac_conf_tx, | 5896 | .conf_tx = iwl3945_mac_conf_tx, |
7793 | .reset_tsf = iwl3945_mac_reset_tsf, | 5897 | .reset_tsf = iwl3945_mac_reset_tsf, |
@@ -7795,59 +5899,136 @@ static struct ieee80211_ops iwl3945_hw_ops = { | |||
7795 | .hw_scan = iwl3945_mac_hw_scan | 5899 | .hw_scan = iwl3945_mac_hw_scan |
7796 | }; | 5900 | }; |
7797 | 5901 | ||
5902 | static int iwl3945_init_drv(struct iwl_priv *priv) | ||
5903 | { | ||
5904 | int ret; | ||
5905 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; | ||
5906 | |||
5907 | priv->retry_rate = 1; | ||
5908 | priv->ibss_beacon = NULL; | ||
5909 | |||
5910 | spin_lock_init(&priv->lock); | ||
5911 | spin_lock_init(&priv->power_data.lock); | ||
5912 | spin_lock_init(&priv->sta_lock); | ||
5913 | spin_lock_init(&priv->hcmd_lock); | ||
5914 | |||
5915 | INIT_LIST_HEAD(&priv->free_frames); | ||
5916 | |||
5917 | mutex_init(&priv->mutex); | ||
5918 | |||
5919 | /* Clear the driver's (not device's) station table */ | ||
5920 | iwl3945_clear_stations_table(priv); | ||
5921 | |||
5922 | priv->data_retry_limit = -1; | ||
5923 | priv->ieee_channels = NULL; | ||
5924 | priv->ieee_rates = NULL; | ||
5925 | priv->band = IEEE80211_BAND_2GHZ; | ||
5926 | |||
5927 | priv->iw_mode = NL80211_IFTYPE_STATION; | ||
5928 | |||
5929 | iwl_reset_qos(priv); | ||
5930 | |||
5931 | priv->qos_data.qos_active = 0; | ||
5932 | priv->qos_data.qos_cap.val = 0; | ||
5933 | |||
5934 | priv->rates_mask = IWL_RATES_MASK; | ||
5935 | /* If power management is turned on, default to AC mode */ | ||
5936 | priv->power_mode = IWL39_POWER_AC; | ||
5937 | priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER; | ||
5938 | |||
5939 | if (eeprom->version < EEPROM_3945_EEPROM_VERSION) { | ||
5940 | IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n", | ||
5941 | eeprom->version); | ||
5942 | ret = -EINVAL; | ||
5943 | goto err; | ||
5944 | } | ||
5945 | ret = iwl_init_channel_map(priv); | ||
5946 | if (ret) { | ||
5947 | IWL_ERR(priv, "initializing regulatory failed: %d\n", ret); | ||
5948 | goto err; | ||
5949 | } | ||
5950 | |||
5951 | /* Set up txpower settings in driver for all channels */ | ||
5952 | if (iwl3945_txpower_set_from_eeprom(priv)) { | ||
5953 | ret = -EIO; | ||
5954 | goto err_free_channel_map; | ||
5955 | } | ||
5956 | |||
5957 | ret = iwlcore_init_geos(priv); | ||
5958 | if (ret) { | ||
5959 | IWL_ERR(priv, "initializing geos failed: %d\n", ret); | ||
5960 | goto err_free_channel_map; | ||
5961 | } | ||
5962 | iwl3945_init_hw_rates(priv, priv->ieee_rates); | ||
5963 | |||
5964 | if (priv->bands[IEEE80211_BAND_2GHZ].n_channels) | ||
5965 | priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | ||
5966 | &priv->bands[IEEE80211_BAND_2GHZ]; | ||
5967 | if (priv->bands[IEEE80211_BAND_5GHZ].n_channels) | ||
5968 | priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = | ||
5969 | &priv->bands[IEEE80211_BAND_5GHZ]; | ||
5970 | |||
5971 | return 0; | ||
5972 | |||
5973 | err_free_channel_map: | ||
5974 | iwl_free_channel_map(priv); | ||
5975 | err: | ||
5976 | return ret; | ||
5977 | } | ||
5978 | |||
7798 | static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | 5979 | static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
7799 | { | 5980 | { |
7800 | int err = 0; | 5981 | int err = 0; |
7801 | struct iwl3945_priv *priv; | 5982 | struct iwl_priv *priv; |
7802 | struct ieee80211_hw *hw; | 5983 | struct ieee80211_hw *hw; |
7803 | struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data); | 5984 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
5985 | struct iwl3945_eeprom *eeprom; | ||
7804 | unsigned long flags; | 5986 | unsigned long flags; |
7805 | 5987 | ||
7806 | /*********************** | 5988 | /*********************** |
7807 | * 1. Allocating HW data | 5989 | * 1. Allocating HW data |
7808 | * ********************/ | 5990 | * ********************/ |
7809 | 5991 | ||
7810 | /* Disabling hardware scan means that mac80211 will perform scans | ||
7811 | * "the hard way", rather than using device's scan. */ | ||
7812 | if (iwl3945_param_disable_hw_scan) { | ||
7813 | IWL_DEBUG_INFO("Disabling hw_scan\n"); | ||
7814 | iwl3945_hw_ops.hw_scan = NULL; | ||
7815 | } | ||
7816 | |||
7817 | if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) || | ||
7818 | (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) { | ||
7819 | IWL_ERROR("invalid queues_num, should be between %d and %d\n", | ||
7820 | IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES); | ||
7821 | err = -EINVAL; | ||
7822 | goto out; | ||
7823 | } | ||
7824 | |||
7825 | /* mac80211 allocates memory for this device instance, including | 5992 | /* mac80211 allocates memory for this device instance, including |
7826 | * space for this driver's private structure */ | 5993 | * space for this driver's private structure */ |
7827 | hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops); | 5994 | hw = iwl_alloc_all(cfg, &iwl3945_hw_ops); |
7828 | if (hw == NULL) { | 5995 | if (hw == NULL) { |
7829 | IWL_ERROR("Can not allocate network device\n"); | 5996 | printk(KERN_ERR DRV_NAME "Can not allocate network device\n"); |
7830 | err = -ENOMEM; | 5997 | err = -ENOMEM; |
7831 | goto out; | 5998 | goto out; |
7832 | } | 5999 | } |
7833 | 6000 | priv = hw->priv; | |
7834 | SET_IEEE80211_DEV(hw, &pdev->dev); | 6001 | SET_IEEE80211_DEV(hw, &pdev->dev); |
7835 | 6002 | ||
7836 | priv = hw->priv; | 6003 | if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) || |
7837 | priv->hw = hw; | 6004 | (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) { |
7838 | priv->pci_dev = pdev; | 6005 | IWL_ERR(priv, |
7839 | priv->cfg = cfg; | 6006 | "invalid queues_num, should be between %d and %d\n", |
6007 | IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES); | ||
6008 | err = -EINVAL; | ||
6009 | goto out; | ||
6010 | } | ||
6011 | |||
6012 | /* | ||
6013 | * Disabling hardware scan means that mac80211 will perform scans | ||
6014 | * "the hard way", rather than using device's scan. | ||
6015 | */ | ||
6016 | if (iwl3945_mod_params.disable_hw_scan) { | ||
6017 | IWL_DEBUG_INFO("Disabling hw_scan\n"); | ||
6018 | iwl3945_hw_ops.hw_scan = NULL; | ||
6019 | } | ||
6020 | |||
7840 | 6021 | ||
7841 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | 6022 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); |
7842 | hw->rate_control_algorithm = "iwl-3945-rs"; | 6023 | priv->cfg = cfg; |
7843 | hw->sta_data_size = sizeof(struct iwl3945_sta_priv); | 6024 | priv->pci_dev = pdev; |
7844 | 6025 | ||
7845 | /* Select antenna (may be helpful if only one antenna is connected) */ | 6026 | #ifdef CONFIG_IWLWIFI_DEBUG |
7846 | priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna; | 6027 | priv->debug_level = iwl3945_mod_params.debug; |
7847 | #ifdef CONFIG_IWL3945_DEBUG | ||
7848 | iwl3945_debug_level = iwl3945_param_debug; | ||
7849 | atomic_set(&priv->restrict_refcnt, 0); | 6028 | atomic_set(&priv->restrict_refcnt, 0); |
7850 | #endif | 6029 | #endif |
6030 | hw->rate_control_algorithm = "iwl-3945-rs"; | ||
6031 | hw->sta_data_size = sizeof(struct iwl3945_sta_priv); | ||
7851 | 6032 | ||
7852 | /* Tell mac80211 our characteristics */ | 6033 | /* Tell mac80211 our characteristics */ |
7853 | hw->flags = IEEE80211_HW_SIGNAL_DBM | | 6034 | hw->flags = IEEE80211_HW_SIGNAL_DBM | |
@@ -7857,7 +6038,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
7857 | BIT(NL80211_IFTYPE_STATION) | | 6038 | BIT(NL80211_IFTYPE_STATION) | |
7858 | BIT(NL80211_IFTYPE_ADHOC); | 6039 | BIT(NL80211_IFTYPE_ADHOC); |
7859 | 6040 | ||
7860 | hw->wiphy->fw_handles_regulatory = true; | 6041 | hw->wiphy->custom_regulatory = true; |
7861 | 6042 | ||
7862 | /* 4 EDCA QOS priorities */ | 6043 | /* 4 EDCA QOS priorities */ |
7863 | hw->queues = 4; | 6044 | hw->queues = 4; |
@@ -7876,7 +6057,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
7876 | if (!err) | 6057 | if (!err) |
7877 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | 6058 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); |
7878 | if (err) { | 6059 | if (err) { |
7879 | printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n"); | 6060 | IWL_WARN(priv, "No suitable DMA available.\n"); |
7880 | goto out_pci_disable_device; | 6061 | goto out_pci_disable_device; |
7881 | } | 6062 | } |
7882 | 6063 | ||
@@ -7902,29 +6083,26 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
7902 | * PCI Tx retries from interfering with C3 CPU state */ | 6083 | * PCI Tx retries from interfering with C3 CPU state */ |
7903 | pci_write_config_byte(pdev, 0x41, 0x00); | 6084 | pci_write_config_byte(pdev, 0x41, 0x00); |
7904 | 6085 | ||
7905 | /* nic init */ | 6086 | /* amp init */ |
7906 | iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS, | 6087 | err = priv->cfg->ops->lib->apm_ops.init(priv); |
7907 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); | ||
7908 | |||
7909 | iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); | ||
7910 | err = iwl3945_poll_direct_bit(priv, CSR_GP_CNTRL, | ||
7911 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); | ||
7912 | if (err < 0) { | 6088 | if (err < 0) { |
7913 | IWL_DEBUG_INFO("Failed to init the card\n"); | 6089 | IWL_DEBUG_INFO("Failed to init APMG\n"); |
7914 | goto out_remove_sysfs; | 6090 | goto out_iounmap; |
7915 | } | 6091 | } |
7916 | 6092 | ||
7917 | /*********************** | 6093 | /*********************** |
7918 | * 4. Read EEPROM | 6094 | * 4. Read EEPROM |
7919 | * ********************/ | 6095 | * ********************/ |
6096 | |||
7920 | /* Read the EEPROM */ | 6097 | /* Read the EEPROM */ |
7921 | err = iwl3945_eeprom_init(priv); | 6098 | err = iwl_eeprom_init(priv); |
7922 | if (err) { | 6099 | if (err) { |
7923 | IWL_ERROR("Unable to init EEPROM\n"); | 6100 | IWL_ERR(priv, "Unable to init EEPROM\n"); |
7924 | goto out_remove_sysfs; | 6101 | goto out_remove_sysfs; |
7925 | } | 6102 | } |
7926 | /* MAC Address location in EEPROM same for 3945/4965 */ | 6103 | /* MAC Address location in EEPROM same for 3945/4965 */ |
7927 | get_eeprom_mac(priv, priv->mac_addr); | 6104 | eeprom = (struct iwl3945_eeprom *)priv->eeprom; |
6105 | memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN); | ||
7928 | IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr); | 6106 | IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr); |
7929 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | 6107 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); |
7930 | 6108 | ||
@@ -7932,60 +6110,23 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
7932 | * 5. Setup HW Constants | 6110 | * 5. Setup HW Constants |
7933 | * ********************/ | 6111 | * ********************/ |
7934 | /* Device-specific setup */ | 6112 | /* Device-specific setup */ |
7935 | if (iwl3945_hw_set_hw_setting(priv)) { | 6113 | if (iwl3945_hw_set_hw_params(priv)) { |
7936 | IWL_ERROR("failed to set hw settings\n"); | 6114 | IWL_ERR(priv, "failed to set hw settings\n"); |
7937 | goto out_iounmap; | 6115 | goto out_iounmap; |
7938 | } | 6116 | } |
7939 | 6117 | ||
7940 | /*********************** | 6118 | /*********************** |
7941 | * 6. Setup priv | 6119 | * 6. Setup priv |
7942 | * ********************/ | 6120 | * ********************/ |
7943 | priv->retry_rate = 1; | ||
7944 | priv->ibss_beacon = NULL; | ||
7945 | |||
7946 | spin_lock_init(&priv->lock); | ||
7947 | spin_lock_init(&priv->power_data.lock); | ||
7948 | spin_lock_init(&priv->sta_lock); | ||
7949 | spin_lock_init(&priv->hcmd_lock); | ||
7950 | |||
7951 | INIT_LIST_HEAD(&priv->free_frames); | ||
7952 | mutex_init(&priv->mutex); | ||
7953 | |||
7954 | /* Clear the driver's (not device's) station table */ | ||
7955 | iwl3945_clear_stations_table(priv); | ||
7956 | |||
7957 | priv->data_retry_limit = -1; | ||
7958 | priv->ieee_channels = NULL; | ||
7959 | priv->ieee_rates = NULL; | ||
7960 | priv->band = IEEE80211_BAND_2GHZ; | ||
7961 | |||
7962 | priv->iw_mode = NL80211_IFTYPE_STATION; | ||
7963 | |||
7964 | iwl3945_reset_qos(priv); | ||
7965 | |||
7966 | priv->qos_data.qos_active = 0; | ||
7967 | priv->qos_data.qos_cap.val = 0; | ||
7968 | |||
7969 | |||
7970 | priv->rates_mask = IWL_RATES_MASK; | ||
7971 | /* If power management is turned on, default to AC mode */ | ||
7972 | priv->power_mode = IWL_POWER_AC; | ||
7973 | priv->user_txpower_limit = IWL_DEFAULT_TX_POWER; | ||
7974 | 6121 | ||
7975 | err = iwl3945_init_channel_map(priv); | 6122 | err = iwl3945_init_drv(priv); |
7976 | if (err) { | 6123 | if (err) { |
7977 | IWL_ERROR("initializing regulatory failed: %d\n", err); | 6124 | IWL_ERR(priv, "initializing driver failed\n"); |
7978 | goto out_release_irq; | 6125 | goto out_free_geos; |
7979 | } | ||
7980 | |||
7981 | err = iwl3945_init_geos(priv); | ||
7982 | if (err) { | ||
7983 | IWL_ERROR("initializing geos failed: %d\n", err); | ||
7984 | goto out_free_channel_map; | ||
7985 | } | 6126 | } |
7986 | 6127 | ||
7987 | printk(KERN_INFO DRV_NAME | 6128 | IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n", |
7988 | ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name); | 6129 | priv->cfg->name); |
7989 | 6130 | ||
7990 | /*********************************** | 6131 | /*********************************** |
7991 | * 7. Initialize Module Parameters | 6132 | * 7. Initialize Module Parameters |
@@ -7993,7 +6134,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
7993 | 6134 | ||
7994 | /* Initialize module parameter values here */ | 6135 | /* Initialize module parameter values here */ |
7995 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | 6136 | /* Disable radio (SW RF KILL) via parameter when loading driver */ |
7996 | if (iwl3945_param_disable) { | 6137 | if (iwl3945_mod_params.disable) { |
7997 | set_bit(STATUS_RF_KILL_SW, &priv->status); | 6138 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
7998 | IWL_DEBUG_INFO("Radio disabled.\n"); | 6139 | IWL_DEBUG_INFO("Radio disabled.\n"); |
7999 | } | 6140 | } |
@@ -8007,56 +6148,61 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
8007 | iwl3945_disable_interrupts(priv); | 6148 | iwl3945_disable_interrupts(priv); |
8008 | spin_unlock_irqrestore(&priv->lock, flags); | 6149 | spin_unlock_irqrestore(&priv->lock, flags); |
8009 | 6150 | ||
6151 | pci_enable_msi(priv->pci_dev); | ||
6152 | |||
6153 | err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED, | ||
6154 | DRV_NAME, priv); | ||
6155 | if (err) { | ||
6156 | IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq); | ||
6157 | goto out_disable_msi; | ||
6158 | } | ||
6159 | |||
8010 | err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group); | 6160 | err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group); |
8011 | if (err) { | 6161 | if (err) { |
8012 | IWL_ERROR("failed to create sysfs device attributes\n"); | 6162 | IWL_ERR(priv, "failed to create sysfs device attributes\n"); |
8013 | goto out_free_geos; | 6163 | goto out_release_irq; |
8014 | } | 6164 | } |
8015 | 6165 | ||
8016 | iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6); | 6166 | iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6); |
8017 | iwl3945_setup_deferred_work(priv); | 6167 | iwl3945_setup_deferred_work(priv); |
8018 | iwl3945_setup_rx_handlers(priv); | 6168 | iwl3945_setup_rx_handlers(priv); |
8019 | 6169 | ||
8020 | /*********************** | ||
8021 | * 9. Conclude | ||
8022 | * ********************/ | ||
8023 | pci_save_state(pdev); | ||
8024 | pci_disable_device(pdev); | ||
8025 | |||
8026 | /********************************* | 6170 | /********************************* |
8027 | * 10. Setup and Register mac80211 | 6171 | * 9. Setup and Register mac80211 |
8028 | * *******************************/ | 6172 | * *******************************/ |
8029 | 6173 | ||
8030 | err = ieee80211_register_hw(priv->hw); | 6174 | err = ieee80211_register_hw(priv->hw); |
8031 | if (err) { | 6175 | if (err) { |
8032 | IWL_ERROR("Failed to register network device (error %d)\n", err); | 6176 | IWL_ERR(priv, "Failed to register network device: %d\n", err); |
8033 | goto out_remove_sysfs; | 6177 | goto out_remove_sysfs; |
8034 | } | 6178 | } |
8035 | 6179 | ||
8036 | priv->hw->conf.beacon_int = 100; | 6180 | priv->hw->conf.beacon_int = 100; |
8037 | priv->mac80211_registered = 1; | 6181 | priv->mac80211_registered = 1; |
8038 | 6182 | ||
8039 | 6183 | err = iwl_rfkill_init(priv); | |
8040 | err = iwl3945_rfkill_init(priv); | ||
8041 | if (err) | 6184 | if (err) |
8042 | IWL_ERROR("Unable to initialize RFKILL system. " | 6185 | IWL_ERR(priv, "Unable to initialize RFKILL system. " |
8043 | "Ignoring error: %d\n", err); | 6186 | "Ignoring error: %d\n", err); |
8044 | 6187 | ||
6188 | /* Start monitoring the killswitch */ | ||
6189 | queue_delayed_work(priv->workqueue, &priv->rfkill_poll, | ||
6190 | 2 * HZ); | ||
6191 | |||
8045 | return 0; | 6192 | return 0; |
8046 | 6193 | ||
8047 | out_remove_sysfs: | 6194 | out_remove_sysfs: |
8048 | sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group); | 6195 | sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group); |
8049 | out_free_geos: | 6196 | out_free_geos: |
8050 | iwl3945_free_geos(priv); | 6197 | iwlcore_free_geos(priv); |
8051 | out_free_channel_map: | ||
8052 | iwl3945_free_channel_map(priv); | ||
8053 | |||
8054 | 6198 | ||
8055 | out_release_irq: | 6199 | out_release_irq: |
6200 | free_irq(priv->pci_dev->irq, priv); | ||
8056 | destroy_workqueue(priv->workqueue); | 6201 | destroy_workqueue(priv->workqueue); |
8057 | priv->workqueue = NULL; | 6202 | priv->workqueue = NULL; |
8058 | iwl3945_unset_hw_setting(priv); | 6203 | iwl3945_unset_hw_params(priv); |
8059 | 6204 | out_disable_msi: | |
6205 | pci_disable_msi(priv->pci_dev); | ||
8060 | out_iounmap: | 6206 | out_iounmap: |
8061 | pci_iounmap(pdev, priv->hw_base); | 6207 | pci_iounmap(pdev, priv->hw_base); |
8062 | out_pci_release_regions: | 6208 | out_pci_release_regions: |
@@ -8072,7 +6218,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
8072 | 6218 | ||
8073 | static void __devexit iwl3945_pci_remove(struct pci_dev *pdev) | 6219 | static void __devexit iwl3945_pci_remove(struct pci_dev *pdev) |
8074 | { | 6220 | { |
8075 | struct iwl3945_priv *priv = pci_get_drvdata(pdev); | 6221 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
8076 | unsigned long flags; | 6222 | unsigned long flags; |
8077 | 6223 | ||
8078 | if (!priv) | 6224 | if (!priv) |
@@ -8082,7 +6228,12 @@ static void __devexit iwl3945_pci_remove(struct pci_dev *pdev) | |||
8082 | 6228 | ||
8083 | set_bit(STATUS_EXIT_PENDING, &priv->status); | 6229 | set_bit(STATUS_EXIT_PENDING, &priv->status); |
8084 | 6230 | ||
8085 | iwl3945_down(priv); | 6231 | if (priv->mac80211_registered) { |
6232 | ieee80211_unregister_hw(priv->hw); | ||
6233 | priv->mac80211_registered = 0; | ||
6234 | } else { | ||
6235 | iwl3945_down(priv); | ||
6236 | } | ||
8086 | 6237 | ||
8087 | /* make sure we flush any pending irq or | 6238 | /* make sure we flush any pending irq or |
8088 | * tasklet for the driver | 6239 | * tasklet for the driver |
@@ -8095,19 +6246,18 @@ static void __devexit iwl3945_pci_remove(struct pci_dev *pdev) | |||
8095 | 6246 | ||
8096 | sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group); | 6247 | sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group); |
8097 | 6248 | ||
8098 | iwl3945_rfkill_unregister(priv); | 6249 | iwl_rfkill_unregister(priv); |
6250 | cancel_delayed_work(&priv->rfkill_poll); | ||
6251 | |||
8099 | iwl3945_dealloc_ucode_pci(priv); | 6252 | iwl3945_dealloc_ucode_pci(priv); |
8100 | 6253 | ||
8101 | if (priv->rxq.bd) | 6254 | if (priv->rxq.bd) |
8102 | iwl3945_rx_queue_free(priv, &priv->rxq); | 6255 | iwl_rx_queue_free(priv, &priv->rxq); |
8103 | iwl3945_hw_txq_ctx_free(priv); | 6256 | iwl3945_hw_txq_ctx_free(priv); |
8104 | 6257 | ||
8105 | iwl3945_unset_hw_setting(priv); | 6258 | iwl3945_unset_hw_params(priv); |
8106 | iwl3945_clear_stations_table(priv); | 6259 | iwl3945_clear_stations_table(priv); |
8107 | 6260 | ||
8108 | if (priv->mac80211_registered) | ||
8109 | ieee80211_unregister_hw(priv->hw); | ||
8110 | |||
8111 | /*netif_stop_queue(dev); */ | 6261 | /*netif_stop_queue(dev); */ |
8112 | flush_workqueue(priv->workqueue); | 6262 | flush_workqueue(priv->workqueue); |
8113 | 6263 | ||
@@ -8117,13 +6267,16 @@ static void __devexit iwl3945_pci_remove(struct pci_dev *pdev) | |||
8117 | destroy_workqueue(priv->workqueue); | 6267 | destroy_workqueue(priv->workqueue); |
8118 | priv->workqueue = NULL; | 6268 | priv->workqueue = NULL; |
8119 | 6269 | ||
6270 | free_irq(pdev->irq, priv); | ||
6271 | pci_disable_msi(pdev); | ||
6272 | |||
8120 | pci_iounmap(pdev, priv->hw_base); | 6273 | pci_iounmap(pdev, priv->hw_base); |
8121 | pci_release_regions(pdev); | 6274 | pci_release_regions(pdev); |
8122 | pci_disable_device(pdev); | 6275 | pci_disable_device(pdev); |
8123 | pci_set_drvdata(pdev, NULL); | 6276 | pci_set_drvdata(pdev, NULL); |
8124 | 6277 | ||
8125 | iwl3945_free_channel_map(priv); | 6278 | iwl_free_channel_map(priv); |
8126 | iwl3945_free_geos(priv); | 6279 | iwlcore_free_geos(priv); |
8127 | kfree(priv->scan); | 6280 | kfree(priv->scan); |
8128 | if (priv->ibss_beacon) | 6281 | if (priv->ibss_beacon) |
8129 | dev_kfree_skb(priv->ibss_beacon); | 6282 | dev_kfree_skb(priv->ibss_beacon); |
@@ -8135,14 +6288,15 @@ static void __devexit iwl3945_pci_remove(struct pci_dev *pdev) | |||
8135 | 6288 | ||
8136 | static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state) | 6289 | static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
8137 | { | 6290 | { |
8138 | struct iwl3945_priv *priv = pci_get_drvdata(pdev); | 6291 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
8139 | 6292 | ||
8140 | if (priv->is_open) { | 6293 | if (priv->is_open) { |
8141 | set_bit(STATUS_IN_SUSPEND, &priv->status); | 6294 | set_bit(STATUS_IN_SUSPEND, &priv->status); |
8142 | iwl3945_mac_stop(priv->hw); | 6295 | iwl3945_mac_stop(priv->hw); |
8143 | priv->is_open = 1; | 6296 | priv->is_open = 1; |
8144 | } | 6297 | } |
8145 | 6298 | pci_save_state(pdev); | |
6299 | pci_disable_device(pdev); | ||
8146 | pci_set_power_state(pdev, PCI_D3hot); | 6300 | pci_set_power_state(pdev, PCI_D3hot); |
8147 | 6301 | ||
8148 | return 0; | 6302 | return 0; |
@@ -8150,9 +6304,11 @@ static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state) | |||
8150 | 6304 | ||
8151 | static int iwl3945_pci_resume(struct pci_dev *pdev) | 6305 | static int iwl3945_pci_resume(struct pci_dev *pdev) |
8152 | { | 6306 | { |
8153 | struct iwl3945_priv *priv = pci_get_drvdata(pdev); | 6307 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
8154 | 6308 | ||
8155 | pci_set_power_state(pdev, PCI_D0); | 6309 | pci_set_power_state(pdev, PCI_D0); |
6310 | pci_enable_device(pdev); | ||
6311 | pci_restore_state(pdev); | ||
8156 | 6312 | ||
8157 | if (priv->is_open) | 6313 | if (priv->is_open) |
8158 | iwl3945_mac_start(priv->hw); | 6314 | iwl3945_mac_start(priv->hw); |
@@ -8163,114 +6319,6 @@ static int iwl3945_pci_resume(struct pci_dev *pdev) | |||
8163 | 6319 | ||
8164 | #endif /* CONFIG_PM */ | 6320 | #endif /* CONFIG_PM */ |
8165 | 6321 | ||
8166 | /*************** RFKILL FUNCTIONS **********/ | ||
8167 | #ifdef CONFIG_IWL3945_RFKILL | ||
8168 | /* software rf-kill from user */ | ||
8169 | static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state) | ||
8170 | { | ||
8171 | struct iwl3945_priv *priv = data; | ||
8172 | int err = 0; | ||
8173 | |||
8174 | if (!priv->rfkill) | ||
8175 | return 0; | ||
8176 | |||
8177 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
8178 | return 0; | ||
8179 | |||
8180 | IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state); | ||
8181 | mutex_lock(&priv->mutex); | ||
8182 | |||
8183 | switch (state) { | ||
8184 | case RFKILL_STATE_UNBLOCKED: | ||
8185 | if (iwl3945_is_rfkill_hw(priv)) { | ||
8186 | err = -EBUSY; | ||
8187 | goto out_unlock; | ||
8188 | } | ||
8189 | iwl3945_radio_kill_sw(priv, 0); | ||
8190 | break; | ||
8191 | case RFKILL_STATE_SOFT_BLOCKED: | ||
8192 | iwl3945_radio_kill_sw(priv, 1); | ||
8193 | break; | ||
8194 | default: | ||
8195 | IWL_WARNING("we received unexpected RFKILL state %d\n", state); | ||
8196 | break; | ||
8197 | } | ||
8198 | out_unlock: | ||
8199 | mutex_unlock(&priv->mutex); | ||
8200 | |||
8201 | return err; | ||
8202 | } | ||
8203 | |||
8204 | int iwl3945_rfkill_init(struct iwl3945_priv *priv) | ||
8205 | { | ||
8206 | struct device *device = wiphy_dev(priv->hw->wiphy); | ||
8207 | int ret = 0; | ||
8208 | |||
8209 | BUG_ON(device == NULL); | ||
8210 | |||
8211 | IWL_DEBUG_RF_KILL("Initializing RFKILL.\n"); | ||
8212 | priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN); | ||
8213 | if (!priv->rfkill) { | ||
8214 | IWL_ERROR("Unable to allocate rfkill device.\n"); | ||
8215 | ret = -ENOMEM; | ||
8216 | goto error; | ||
8217 | } | ||
8218 | |||
8219 | priv->rfkill->name = priv->cfg->name; | ||
8220 | priv->rfkill->data = priv; | ||
8221 | priv->rfkill->state = RFKILL_STATE_UNBLOCKED; | ||
8222 | priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill; | ||
8223 | priv->rfkill->user_claim_unsupported = 1; | ||
8224 | |||
8225 | priv->rfkill->dev.class->suspend = NULL; | ||
8226 | priv->rfkill->dev.class->resume = NULL; | ||
8227 | |||
8228 | ret = rfkill_register(priv->rfkill); | ||
8229 | if (ret) { | ||
8230 | IWL_ERROR("Unable to register rfkill: %d\n", ret); | ||
8231 | goto freed_rfkill; | ||
8232 | } | ||
8233 | |||
8234 | IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n"); | ||
8235 | return ret; | ||
8236 | |||
8237 | freed_rfkill: | ||
8238 | if (priv->rfkill != NULL) | ||
8239 | rfkill_free(priv->rfkill); | ||
8240 | priv->rfkill = NULL; | ||
8241 | |||
8242 | error: | ||
8243 | IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n"); | ||
8244 | return ret; | ||
8245 | } | ||
8246 | |||
8247 | void iwl3945_rfkill_unregister(struct iwl3945_priv *priv) | ||
8248 | { | ||
8249 | if (priv->rfkill) | ||
8250 | rfkill_unregister(priv->rfkill); | ||
8251 | |||
8252 | priv->rfkill = NULL; | ||
8253 | } | ||
8254 | |||
8255 | /* set rf-kill to the right state. */ | ||
8256 | void iwl3945_rfkill_set_hw_state(struct iwl3945_priv *priv) | ||
8257 | { | ||
8258 | |||
8259 | if (!priv->rfkill) | ||
8260 | return; | ||
8261 | |||
8262 | if (iwl3945_is_rfkill_hw(priv)) { | ||
8263 | rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED); | ||
8264 | return; | ||
8265 | } | ||
8266 | |||
8267 | if (!iwl3945_is_rfkill_sw(priv)) | ||
8268 | rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED); | ||
8269 | else | ||
8270 | rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED); | ||
8271 | } | ||
8272 | #endif | ||
8273 | |||
8274 | /***************************************************************************** | 6322 | /***************************************************************************** |
8275 | * | 6323 | * |
8276 | * driver and module entry point | 6324 | * driver and module entry point |
@@ -8297,29 +6345,19 @@ static int __init iwl3945_init(void) | |||
8297 | 6345 | ||
8298 | ret = iwl3945_rate_control_register(); | 6346 | ret = iwl3945_rate_control_register(); |
8299 | if (ret) { | 6347 | if (ret) { |
8300 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | 6348 | printk(KERN_ERR DRV_NAME |
6349 | "Unable to register rate control algorithm: %d\n", ret); | ||
8301 | return ret; | 6350 | return ret; |
8302 | } | 6351 | } |
8303 | 6352 | ||
8304 | ret = pci_register_driver(&iwl3945_driver); | 6353 | ret = pci_register_driver(&iwl3945_driver); |
8305 | if (ret) { | 6354 | if (ret) { |
8306 | IWL_ERROR("Unable to initialize PCI module\n"); | 6355 | printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n"); |
8307 | goto error_register; | 6356 | goto error_register; |
8308 | } | 6357 | } |
8309 | #ifdef CONFIG_IWL3945_DEBUG | ||
8310 | ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level); | ||
8311 | if (ret) { | ||
8312 | IWL_ERROR("Unable to create driver sysfs file\n"); | ||
8313 | goto error_debug; | ||
8314 | } | ||
8315 | #endif | ||
8316 | 6358 | ||
8317 | return ret; | 6359 | return ret; |
8318 | 6360 | ||
8319 | #ifdef CONFIG_IWL3945_DEBUG | ||
8320 | error_debug: | ||
8321 | pci_unregister_driver(&iwl3945_driver); | ||
8322 | #endif | ||
8323 | error_register: | 6361 | error_register: |
8324 | iwl3945_rate_control_unregister(); | 6362 | iwl3945_rate_control_unregister(); |
8325 | return ret; | 6363 | return ret; |
@@ -8327,29 +6365,29 @@ error_register: | |||
8327 | 6365 | ||
8328 | static void __exit iwl3945_exit(void) | 6366 | static void __exit iwl3945_exit(void) |
8329 | { | 6367 | { |
8330 | #ifdef CONFIG_IWL3945_DEBUG | ||
8331 | driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level); | ||
8332 | #endif | ||
8333 | pci_unregister_driver(&iwl3945_driver); | 6368 | pci_unregister_driver(&iwl3945_driver); |
8334 | iwl3945_rate_control_unregister(); | 6369 | iwl3945_rate_control_unregister(); |
8335 | } | 6370 | } |
8336 | 6371 | ||
8337 | MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX)); | 6372 | MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX)); |
8338 | 6373 | ||
8339 | module_param_named(antenna, iwl3945_param_antenna, int, 0444); | 6374 | module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444); |
8340 | MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); | 6375 | MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); |
8341 | module_param_named(disable, iwl3945_param_disable, int, 0444); | 6376 | module_param_named(disable, iwl3945_mod_params.disable, int, 0444); |
8342 | MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])"); | 6377 | MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])"); |
8343 | module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444); | 6378 | module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444); |
8344 | MODULE_PARM_DESC(hwcrypto, | 6379 | MODULE_PARM_DESC(swcrypto, |
8345 | "using hardware crypto engine (default 0 [software])\n"); | 6380 | "using software crypto (default 1 [software])\n"); |
8346 | module_param_named(debug, iwl3945_param_debug, uint, 0444); | 6381 | module_param_named(debug, iwl3945_mod_params.debug, uint, 0444); |
8347 | MODULE_PARM_DESC(debug, "debug output mask"); | 6382 | MODULE_PARM_DESC(debug, "debug output mask"); |
8348 | module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444); | 6383 | module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444); |
8349 | MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)"); | 6384 | MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)"); |
8350 | 6385 | ||
8351 | module_param_named(queues_num, iwl3945_param_queues_num, int, 0444); | 6386 | module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444); |
8352 | MODULE_PARM_DESC(queues_num, "number of hw queues."); | 6387 | MODULE_PARM_DESC(queues_num, "number of hw queues."); |
8353 | 6388 | ||
6389 | module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444); | ||
6390 | MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error"); | ||
6391 | |||
8354 | module_exit(iwl3945_exit); | 6392 | module_exit(iwl3945_exit); |
8355 | module_init(iwl3945_init); | 6393 | module_init(iwl3945_init); |