diff options
author | John W. Linville <linville@tuxdriver.com> | 2011-04-12 16:18:44 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-04-12 16:18:44 -0400 |
commit | 252f4bf400df1712408fe83ba199a66a1b57ab1d (patch) | |
tree | e07fa00abdd55b31e22567786c78635f32c6a66c /drivers/net/wireless/iwlwifi | |
parent | 6ba1037c3d871ab70e342631516dbf841c35b086 (diff) | |
parent | b37e3b6d64358604960b35e8ecbb7aed22e0926e (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 into for-davem
Conflicts:
drivers/net/wireless/ath/ar9170/main.c
drivers/net/wireless/ath/ar9170/phy.c
drivers/net/wireless/zd1211rw/zd_rf_rf2959.c
Diffstat (limited to 'drivers/net/wireless/iwlwifi')
55 files changed, 885 insertions, 2869 deletions
diff --git a/drivers/net/wireless/iwlwifi/Makefile b/drivers/net/wireless/iwlwifi/Makefile index 9d6ee836426c..3652931753e0 100644 --- a/drivers/net/wireless/iwlwifi/Makefile +++ b/drivers/net/wireless/iwlwifi/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | obj-$(CONFIG_IWLAGN) += iwlagn.o | 2 | obj-$(CONFIG_IWLAGN) += iwlagn.o |
3 | iwlagn-objs := iwl-agn.o iwl-agn-rs.o iwl-agn-led.o | 3 | iwlagn-objs := iwl-agn.o iwl-agn-rs.o iwl-agn-led.o |
4 | iwlagn-objs += iwl-agn-ucode.o iwl-agn-tx.o | 4 | iwlagn-objs += iwl-agn-ucode.o iwl-agn-tx.o |
5 | iwlagn-objs += iwl-agn-lib.o iwl-agn-calib.o | 5 | iwlagn-objs += iwl-agn-lib.o iwl-agn-calib.o iwl-io.o |
6 | iwlagn-objs += iwl-agn-tt.o iwl-agn-sta.o iwl-agn-eeprom.o | 6 | iwlagn-objs += iwl-agn-tt.o iwl-agn-sta.o iwl-agn-eeprom.o |
7 | 7 | ||
8 | iwlagn-objs += iwl-core.o iwl-eeprom.o iwl-hcmd.o iwl-power.o | 8 | iwlagn-objs += iwl-core.o iwl-eeprom.o iwl-hcmd.o iwl-power.o |
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c index 27c5007e577c..1b2799291834 100644 --- a/drivers/net/wireless/iwlwifi/iwl-1000.c +++ b/drivers/net/wireless/iwlwifi/iwl-1000.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -141,7 +141,6 @@ static int iwl1000_hw_set_hw_params(struct iwl_priv *priv) | |||
141 | priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE; | 141 | priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE; |
142 | priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE; | 142 | priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE; |
143 | 143 | ||
144 | priv->hw_params.max_bsm_size = 0; | ||
145 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | | 144 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | |
146 | BIT(IEEE80211_BAND_5GHZ); | 145 | BIT(IEEE80211_BAND_5GHZ); |
147 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; | 146 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; |
@@ -179,21 +178,16 @@ static struct iwl_lib_ops iwl1000_lib = { | |||
179 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, | 178 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, |
180 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, | 179 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, |
181 | .txq_set_sched = iwlagn_txq_set_sched, | 180 | .txq_set_sched = iwlagn_txq_set_sched, |
182 | .txq_agg_enable = iwlagn_txq_agg_enable, | ||
183 | .txq_agg_disable = iwlagn_txq_agg_disable, | ||
184 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, | 181 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, |
185 | .txq_free_tfd = iwl_hw_txq_free_tfd, | 182 | .txq_free_tfd = iwl_hw_txq_free_tfd, |
186 | .txq_init = iwl_hw_tx_queue_init, | 183 | .txq_init = iwl_hw_tx_queue_init, |
187 | .rx_handler_setup = iwlagn_rx_handler_setup, | 184 | .rx_handler_setup = iwlagn_rx_handler_setup, |
188 | .setup_deferred_work = iwlagn_setup_deferred_work, | 185 | .setup_deferred_work = iwlagn_setup_deferred_work, |
189 | .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr, | 186 | .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr, |
190 | .load_ucode = iwlagn_load_ucode, | ||
191 | .dump_nic_event_log = iwl_dump_nic_event_log, | 187 | .dump_nic_event_log = iwl_dump_nic_event_log, |
192 | .dump_nic_error_log = iwl_dump_nic_error_log, | 188 | .dump_nic_error_log = iwl_dump_nic_error_log, |
193 | .dump_csr = iwl_dump_csr, | 189 | .dump_csr = iwl_dump_csr, |
194 | .dump_fh = iwl_dump_fh, | 190 | .dump_fh = iwl_dump_fh, |
195 | .init_alive_start = iwlagn_init_alive_start, | ||
196 | .alive_notify = iwlagn_alive_notify, | ||
197 | .send_tx_power = iwlagn_send_tx_power, | 191 | .send_tx_power = iwlagn_send_tx_power, |
198 | .update_chain_flags = iwl_update_chain_flags, | 192 | .update_chain_flags = iwl_update_chain_flags, |
199 | .apm_ops = { | 193 | .apm_ops = { |
@@ -215,13 +209,6 @@ static struct iwl_lib_ops iwl1000_lib = { | |||
215 | .calib_version = iwlagn_eeprom_calib_version, | 209 | .calib_version = iwlagn_eeprom_calib_version, |
216 | .query_addr = iwlagn_eeprom_query_addr, | 210 | .query_addr = iwlagn_eeprom_query_addr, |
217 | }, | 211 | }, |
218 | .isr_ops = { | ||
219 | .isr = iwl_isr_ict, | ||
220 | .free = iwl_free_isr_ict, | ||
221 | .alloc = iwl_alloc_isr_ict, | ||
222 | .reset = iwl_reset_ict, | ||
223 | .disable = iwl_disable_ict, | ||
224 | }, | ||
225 | .temp_ops = { | 212 | .temp_ops = { |
226 | .temperature = iwlagn_temperature, | 213 | .temperature = iwlagn_temperature, |
227 | }, | 214 | }, |
@@ -255,7 +242,6 @@ static struct iwl_base_params iwl1000_base_params = { | |||
255 | .eeprom_size = OTP_LOW_IMAGE_SIZE, | 242 | .eeprom_size = OTP_LOW_IMAGE_SIZE, |
256 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, | 243 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, |
257 | .set_l0s = true, | 244 | .set_l0s = true, |
258 | .use_bsm = false, | ||
259 | .max_ll_items = OTP_MAX_LL_ITEMS_1000, | 245 | .max_ll_items = OTP_MAX_LL_ITEMS_1000, |
260 | .shadow_ram_support = false, | 246 | .shadow_ram_support = false, |
261 | .led_compensation = 51, | 247 | .led_compensation = 51, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-2000.c b/drivers/net/wireless/iwlwifi/iwl-2000.c index d7b6126408c9..f602af4b9408 100644 --- a/drivers/net/wireless/iwlwifi/iwl-2000.c +++ b/drivers/net/wireless/iwlwifi/iwl-2000.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -147,7 +147,6 @@ static int iwl2000_hw_set_hw_params(struct iwl_priv *priv) | |||
147 | priv->hw_params.max_data_size = IWL60_RTC_DATA_SIZE; | 147 | priv->hw_params.max_data_size = IWL60_RTC_DATA_SIZE; |
148 | priv->hw_params.max_inst_size = IWL60_RTC_INST_SIZE; | 148 | priv->hw_params.max_inst_size = IWL60_RTC_INST_SIZE; |
149 | 149 | ||
150 | priv->hw_params.max_bsm_size = 0; | ||
151 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | | 150 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | |
152 | BIT(IEEE80211_BAND_5GHZ); | 151 | BIT(IEEE80211_BAND_5GHZ); |
153 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; | 152 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; |
@@ -259,8 +258,6 @@ static struct iwl_lib_ops iwl2000_lib = { | |||
259 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, | 258 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, |
260 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, | 259 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, |
261 | .txq_set_sched = iwlagn_txq_set_sched, | 260 | .txq_set_sched = iwlagn_txq_set_sched, |
262 | .txq_agg_enable = iwlagn_txq_agg_enable, | ||
263 | .txq_agg_disable = iwlagn_txq_agg_disable, | ||
264 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, | 261 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, |
265 | .txq_free_tfd = iwl_hw_txq_free_tfd, | 262 | .txq_free_tfd = iwl_hw_txq_free_tfd, |
266 | .txq_init = iwl_hw_tx_queue_init, | 263 | .txq_init = iwl_hw_tx_queue_init, |
@@ -268,13 +265,10 @@ static struct iwl_lib_ops iwl2000_lib = { | |||
268 | .setup_deferred_work = iwlagn_bt_setup_deferred_work, | 265 | .setup_deferred_work = iwlagn_bt_setup_deferred_work, |
269 | .cancel_deferred_work = iwlagn_bt_cancel_deferred_work, | 266 | .cancel_deferred_work = iwlagn_bt_cancel_deferred_work, |
270 | .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr, | 267 | .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr, |
271 | .load_ucode = iwlagn_load_ucode, | ||
272 | .dump_nic_event_log = iwl_dump_nic_event_log, | 268 | .dump_nic_event_log = iwl_dump_nic_event_log, |
273 | .dump_nic_error_log = iwl_dump_nic_error_log, | 269 | .dump_nic_error_log = iwl_dump_nic_error_log, |
274 | .dump_csr = iwl_dump_csr, | 270 | .dump_csr = iwl_dump_csr, |
275 | .dump_fh = iwl_dump_fh, | 271 | .dump_fh = iwl_dump_fh, |
276 | .init_alive_start = iwlagn_init_alive_start, | ||
277 | .alive_notify = iwlagn_alive_notify, | ||
278 | .send_tx_power = iwlagn_send_tx_power, | 272 | .send_tx_power = iwlagn_send_tx_power, |
279 | .update_chain_flags = iwl_update_chain_flags, | 273 | .update_chain_flags = iwl_update_chain_flags, |
280 | .set_channel_switch = iwl2030_hw_channel_switch, | 274 | .set_channel_switch = iwl2030_hw_channel_switch, |
@@ -298,13 +292,6 @@ static struct iwl_lib_ops iwl2000_lib = { | |||
298 | .query_addr = iwlagn_eeprom_query_addr, | 292 | .query_addr = iwlagn_eeprom_query_addr, |
299 | .update_enhanced_txpower = iwlcore_eeprom_enhanced_txpower, | 293 | .update_enhanced_txpower = iwlcore_eeprom_enhanced_txpower, |
300 | }, | 294 | }, |
301 | .isr_ops = { | ||
302 | .isr = iwl_isr_ict, | ||
303 | .free = iwl_free_isr_ict, | ||
304 | .alloc = iwl_alloc_isr_ict, | ||
305 | .reset = iwl_reset_ict, | ||
306 | .disable = iwl_disable_ict, | ||
307 | }, | ||
308 | .temp_ops = { | 295 | .temp_ops = { |
309 | .temperature = iwlagn_temperature, | 296 | .temperature = iwlagn_temperature, |
310 | }, | 297 | }, |
@@ -362,7 +349,6 @@ static struct iwl_base_params iwl2000_base_params = { | |||
362 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | 349 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, |
363 | .pll_cfg_val = 0, | 350 | .pll_cfg_val = 0, |
364 | .set_l0s = true, | 351 | .set_l0s = true, |
365 | .use_bsm = false, | ||
366 | .max_ll_items = OTP_MAX_LL_ITEMS_2x00, | 352 | .max_ll_items = OTP_MAX_LL_ITEMS_2x00, |
367 | .shadow_ram_support = true, | 353 | .shadow_ram_support = true, |
368 | .led_compensation = 51, | 354 | .led_compensation = 51, |
@@ -386,7 +372,6 @@ static struct iwl_base_params iwl2030_base_params = { | |||
386 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | 372 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, |
387 | .pll_cfg_val = 0, | 373 | .pll_cfg_val = 0, |
388 | .set_l0s = true, | 374 | .set_l0s = true, |
389 | .use_bsm = false, | ||
390 | .max_ll_items = OTP_MAX_LL_ITEMS_2x00, | 375 | .max_ll_items = OTP_MAX_LL_ITEMS_2x00, |
391 | .shadow_ram_support = true, | 376 | .shadow_ram_support = true, |
392 | .led_compensation = 57, | 377 | .led_compensation = 57, |
@@ -471,37 +456,6 @@ struct iwl_cfg iwl2030_2bg_cfg = { | |||
471 | IWL_DEVICE_2030, | 456 | IWL_DEVICE_2030, |
472 | }; | 457 | }; |
473 | 458 | ||
474 | #define IWL_DEVICE_6035 \ | ||
475 | .fw_name_pre = IWL2030_FW_PRE, \ | ||
476 | .ucode_api_max = IWL2030_UCODE_API_MAX, \ | ||
477 | .ucode_api_min = IWL2030_UCODE_API_MIN, \ | ||
478 | .eeprom_ver = EEPROM_6035_EEPROM_VERSION, \ | ||
479 | .eeprom_calib_ver = EEPROM_6035_TX_POWER_VERSION, \ | ||
480 | .ops = &iwl2030_ops, \ | ||
481 | .mod_params = &iwlagn_mod_params, \ | ||
482 | .base_params = &iwl2030_base_params, \ | ||
483 | .bt_params = &iwl2030_bt_params, \ | ||
484 | .need_dc_calib = true, \ | ||
485 | .need_temp_offset_calib = true, \ | ||
486 | .led_mode = IWL_LED_RF_STATE, \ | ||
487 | .adv_pm = true \ | ||
488 | |||
489 | struct iwl_cfg iwl6035_2agn_cfg = { | ||
490 | .name = "2000 Series 2x2 AGN/BT", | ||
491 | IWL_DEVICE_6035, | ||
492 | .ht_params = &iwl2000_ht_params, | ||
493 | }; | ||
494 | |||
495 | struct iwl_cfg iwl6035_2abg_cfg = { | ||
496 | .name = "2000 Series 2x2 ABG/BT", | ||
497 | IWL_DEVICE_6035, | ||
498 | }; | ||
499 | |||
500 | struct iwl_cfg iwl6035_2bg_cfg = { | ||
501 | .name = "2000 Series 2x2 BG/BT", | ||
502 | IWL_DEVICE_6035, | ||
503 | }; | ||
504 | |||
505 | #define IWL_DEVICE_200 \ | 459 | #define IWL_DEVICE_200 \ |
506 | .fw_name_pre = IWL200_FW_PRE, \ | 460 | .fw_name_pre = IWL200_FW_PRE, \ |
507 | .ucode_api_max = IWL200_UCODE_API_MAX, \ | 461 | .ucode_api_max = IWL200_UCODE_API_MAX, \ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h index 3975e45e7500..05ad47628b63 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h +++ b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c index 22e045b5bcee..66f5fe8fe1ac 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000.c +++ b/drivers/net/wireless/iwlwifi/iwl-5000.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -185,7 +185,6 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv) | |||
185 | priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE; | 185 | priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE; |
186 | priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE; | 186 | priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE; |
187 | 187 | ||
188 | priv->hw_params.max_bsm_size = 0; | ||
189 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | | 188 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | |
190 | BIT(IEEE80211_BAND_5GHZ); | 189 | BIT(IEEE80211_BAND_5GHZ); |
191 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; | 190 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; |
@@ -231,7 +230,6 @@ static int iwl5150_hw_set_hw_params(struct iwl_priv *priv) | |||
231 | priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE; | 230 | priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE; |
232 | priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE; | 231 | priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE; |
233 | 232 | ||
234 | priv->hw_params.max_bsm_size = 0; | ||
235 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | | 233 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | |
236 | BIT(IEEE80211_BAND_5GHZ); | 234 | BIT(IEEE80211_BAND_5GHZ); |
237 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; | 235 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; |
@@ -348,8 +346,6 @@ static struct iwl_lib_ops iwl5000_lib = { | |||
348 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, | 346 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, |
349 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, | 347 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, |
350 | .txq_set_sched = iwlagn_txq_set_sched, | 348 | .txq_set_sched = iwlagn_txq_set_sched, |
351 | .txq_agg_enable = iwlagn_txq_agg_enable, | ||
352 | .txq_agg_disable = iwlagn_txq_agg_disable, | ||
353 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, | 349 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, |
354 | .txq_free_tfd = iwl_hw_txq_free_tfd, | 350 | .txq_free_tfd = iwl_hw_txq_free_tfd, |
355 | .txq_init = iwl_hw_tx_queue_init, | 351 | .txq_init = iwl_hw_tx_queue_init, |
@@ -360,9 +356,6 @@ static struct iwl_lib_ops iwl5000_lib = { | |||
360 | .dump_nic_error_log = iwl_dump_nic_error_log, | 356 | .dump_nic_error_log = iwl_dump_nic_error_log, |
361 | .dump_csr = iwl_dump_csr, | 357 | .dump_csr = iwl_dump_csr, |
362 | .dump_fh = iwl_dump_fh, | 358 | .dump_fh = iwl_dump_fh, |
363 | .load_ucode = iwlagn_load_ucode, | ||
364 | .init_alive_start = iwlagn_init_alive_start, | ||
365 | .alive_notify = iwlagn_alive_notify, | ||
366 | .send_tx_power = iwlagn_send_tx_power, | 359 | .send_tx_power = iwlagn_send_tx_power, |
367 | .update_chain_flags = iwl_update_chain_flags, | 360 | .update_chain_flags = iwl_update_chain_flags, |
368 | .set_channel_switch = iwl5000_hw_channel_switch, | 361 | .set_channel_switch = iwl5000_hw_channel_switch, |
@@ -385,13 +378,6 @@ static struct iwl_lib_ops iwl5000_lib = { | |||
385 | .calib_version = iwlagn_eeprom_calib_version, | 378 | .calib_version = iwlagn_eeprom_calib_version, |
386 | .query_addr = iwlagn_eeprom_query_addr, | 379 | .query_addr = iwlagn_eeprom_query_addr, |
387 | }, | 380 | }, |
388 | .isr_ops = { | ||
389 | .isr = iwl_isr_ict, | ||
390 | .free = iwl_free_isr_ict, | ||
391 | .alloc = iwl_alloc_isr_ict, | ||
392 | .reset = iwl_reset_ict, | ||
393 | .disable = iwl_disable_ict, | ||
394 | }, | ||
395 | .temp_ops = { | 381 | .temp_ops = { |
396 | .temperature = iwlagn_temperature, | 382 | .temperature = iwlagn_temperature, |
397 | }, | 383 | }, |
@@ -416,8 +402,6 @@ static struct iwl_lib_ops iwl5150_lib = { | |||
416 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, | 402 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, |
417 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, | 403 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, |
418 | .txq_set_sched = iwlagn_txq_set_sched, | 404 | .txq_set_sched = iwlagn_txq_set_sched, |
419 | .txq_agg_enable = iwlagn_txq_agg_enable, | ||
420 | .txq_agg_disable = iwlagn_txq_agg_disable, | ||
421 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, | 405 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, |
422 | .txq_free_tfd = iwl_hw_txq_free_tfd, | 406 | .txq_free_tfd = iwl_hw_txq_free_tfd, |
423 | .txq_init = iwl_hw_tx_queue_init, | 407 | .txq_init = iwl_hw_tx_queue_init, |
@@ -427,9 +411,6 @@ static struct iwl_lib_ops iwl5150_lib = { | |||
427 | .dump_nic_event_log = iwl_dump_nic_event_log, | 411 | .dump_nic_event_log = iwl_dump_nic_event_log, |
428 | .dump_nic_error_log = iwl_dump_nic_error_log, | 412 | .dump_nic_error_log = iwl_dump_nic_error_log, |
429 | .dump_csr = iwl_dump_csr, | 413 | .dump_csr = iwl_dump_csr, |
430 | .load_ucode = iwlagn_load_ucode, | ||
431 | .init_alive_start = iwlagn_init_alive_start, | ||
432 | .alive_notify = iwlagn_alive_notify, | ||
433 | .send_tx_power = iwlagn_send_tx_power, | 414 | .send_tx_power = iwlagn_send_tx_power, |
434 | .update_chain_flags = iwl_update_chain_flags, | 415 | .update_chain_flags = iwl_update_chain_flags, |
435 | .set_channel_switch = iwl5000_hw_channel_switch, | 416 | .set_channel_switch = iwl5000_hw_channel_switch, |
@@ -452,13 +433,6 @@ static struct iwl_lib_ops iwl5150_lib = { | |||
452 | .calib_version = iwlagn_eeprom_calib_version, | 433 | .calib_version = iwlagn_eeprom_calib_version, |
453 | .query_addr = iwlagn_eeprom_query_addr, | 434 | .query_addr = iwlagn_eeprom_query_addr, |
454 | }, | 435 | }, |
455 | .isr_ops = { | ||
456 | .isr = iwl_isr_ict, | ||
457 | .free = iwl_free_isr_ict, | ||
458 | .alloc = iwl_alloc_isr_ict, | ||
459 | .reset = iwl_reset_ict, | ||
460 | .disable = iwl_disable_ict, | ||
461 | }, | ||
462 | .temp_ops = { | 436 | .temp_ops = { |
463 | .temperature = iwl5150_temperature, | 437 | .temperature = iwl5150_temperature, |
464 | }, | 438 | }, |
@@ -500,7 +474,6 @@ static struct iwl_base_params iwl5000_base_params = { | |||
500 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | 474 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, |
501 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, | 475 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, |
502 | .set_l0s = true, | 476 | .set_l0s = true, |
503 | .use_bsm = false, | ||
504 | .led_compensation = 51, | 477 | .led_compensation = 51, |
505 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | 478 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
506 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, | 479 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000-hw.h b/drivers/net/wireless/iwlwifi/iwl-6000-hw.h index 47891e16a758..b27986e57c92 100644 --- a/drivers/net/wireless/iwlwifi/iwl-6000-hw.h +++ b/drivers/net/wireless/iwlwifi/iwl-6000-hw.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c index a745b01c0ec1..24d105b29aec 100644 --- a/drivers/net/wireless/iwlwifi/iwl-6000.c +++ b/drivers/net/wireless/iwlwifi/iwl-6000.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -176,7 +176,6 @@ static int iwl6000_hw_set_hw_params(struct iwl_priv *priv) | |||
176 | priv->hw_params.max_data_size = IWL60_RTC_DATA_SIZE; | 176 | priv->hw_params.max_data_size = IWL60_RTC_DATA_SIZE; |
177 | priv->hw_params.max_inst_size = IWL60_RTC_INST_SIZE; | 177 | priv->hw_params.max_inst_size = IWL60_RTC_INST_SIZE; |
178 | 178 | ||
179 | priv->hw_params.max_bsm_size = 0; | ||
180 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | | 179 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | |
181 | BIT(IEEE80211_BAND_5GHZ); | 180 | BIT(IEEE80211_BAND_5GHZ); |
182 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; | 181 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; |
@@ -288,21 +287,16 @@ static struct iwl_lib_ops iwl6000_lib = { | |||
288 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, | 287 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, |
289 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, | 288 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, |
290 | .txq_set_sched = iwlagn_txq_set_sched, | 289 | .txq_set_sched = iwlagn_txq_set_sched, |
291 | .txq_agg_enable = iwlagn_txq_agg_enable, | ||
292 | .txq_agg_disable = iwlagn_txq_agg_disable, | ||
293 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, | 290 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, |
294 | .txq_free_tfd = iwl_hw_txq_free_tfd, | 291 | .txq_free_tfd = iwl_hw_txq_free_tfd, |
295 | .txq_init = iwl_hw_tx_queue_init, | 292 | .txq_init = iwl_hw_tx_queue_init, |
296 | .rx_handler_setup = iwlagn_rx_handler_setup, | 293 | .rx_handler_setup = iwlagn_rx_handler_setup, |
297 | .setup_deferred_work = iwlagn_setup_deferred_work, | 294 | .setup_deferred_work = iwlagn_setup_deferred_work, |
298 | .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr, | 295 | .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr, |
299 | .load_ucode = iwlagn_load_ucode, | ||
300 | .dump_nic_event_log = iwl_dump_nic_event_log, | 296 | .dump_nic_event_log = iwl_dump_nic_event_log, |
301 | .dump_nic_error_log = iwl_dump_nic_error_log, | 297 | .dump_nic_error_log = iwl_dump_nic_error_log, |
302 | .dump_csr = iwl_dump_csr, | 298 | .dump_csr = iwl_dump_csr, |
303 | .dump_fh = iwl_dump_fh, | 299 | .dump_fh = iwl_dump_fh, |
304 | .init_alive_start = iwlagn_init_alive_start, | ||
305 | .alive_notify = iwlagn_alive_notify, | ||
306 | .send_tx_power = iwlagn_send_tx_power, | 300 | .send_tx_power = iwlagn_send_tx_power, |
307 | .update_chain_flags = iwl_update_chain_flags, | 301 | .update_chain_flags = iwl_update_chain_flags, |
308 | .set_channel_switch = iwl6000_hw_channel_switch, | 302 | .set_channel_switch = iwl6000_hw_channel_switch, |
@@ -326,13 +320,6 @@ static struct iwl_lib_ops iwl6000_lib = { | |||
326 | .query_addr = iwlagn_eeprom_query_addr, | 320 | .query_addr = iwlagn_eeprom_query_addr, |
327 | .update_enhanced_txpower = iwlcore_eeprom_enhanced_txpower, | 321 | .update_enhanced_txpower = iwlcore_eeprom_enhanced_txpower, |
328 | }, | 322 | }, |
329 | .isr_ops = { | ||
330 | .isr = iwl_isr_ict, | ||
331 | .free = iwl_free_isr_ict, | ||
332 | .alloc = iwl_alloc_isr_ict, | ||
333 | .reset = iwl_reset_ict, | ||
334 | .disable = iwl_disable_ict, | ||
335 | }, | ||
336 | .temp_ops = { | 323 | .temp_ops = { |
337 | .temperature = iwlagn_temperature, | 324 | .temperature = iwlagn_temperature, |
338 | }, | 325 | }, |
@@ -357,8 +344,6 @@ static struct iwl_lib_ops iwl6030_lib = { | |||
357 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, | 344 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, |
358 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, | 345 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, |
359 | .txq_set_sched = iwlagn_txq_set_sched, | 346 | .txq_set_sched = iwlagn_txq_set_sched, |
360 | .txq_agg_enable = iwlagn_txq_agg_enable, | ||
361 | .txq_agg_disable = iwlagn_txq_agg_disable, | ||
362 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, | 347 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, |
363 | .txq_free_tfd = iwl_hw_txq_free_tfd, | 348 | .txq_free_tfd = iwl_hw_txq_free_tfd, |
364 | .txq_init = iwl_hw_tx_queue_init, | 349 | .txq_init = iwl_hw_tx_queue_init, |
@@ -366,13 +351,10 @@ static struct iwl_lib_ops iwl6030_lib = { | |||
366 | .setup_deferred_work = iwlagn_bt_setup_deferred_work, | 351 | .setup_deferred_work = iwlagn_bt_setup_deferred_work, |
367 | .cancel_deferred_work = iwlagn_bt_cancel_deferred_work, | 352 | .cancel_deferred_work = iwlagn_bt_cancel_deferred_work, |
368 | .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr, | 353 | .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr, |
369 | .load_ucode = iwlagn_load_ucode, | ||
370 | .dump_nic_event_log = iwl_dump_nic_event_log, | 354 | .dump_nic_event_log = iwl_dump_nic_event_log, |
371 | .dump_nic_error_log = iwl_dump_nic_error_log, | 355 | .dump_nic_error_log = iwl_dump_nic_error_log, |
372 | .dump_csr = iwl_dump_csr, | 356 | .dump_csr = iwl_dump_csr, |
373 | .dump_fh = iwl_dump_fh, | 357 | .dump_fh = iwl_dump_fh, |
374 | .init_alive_start = iwlagn_init_alive_start, | ||
375 | .alive_notify = iwlagn_alive_notify, | ||
376 | .send_tx_power = iwlagn_send_tx_power, | 358 | .send_tx_power = iwlagn_send_tx_power, |
377 | .update_chain_flags = iwl_update_chain_flags, | 359 | .update_chain_flags = iwl_update_chain_flags, |
378 | .set_channel_switch = iwl6000_hw_channel_switch, | 360 | .set_channel_switch = iwl6000_hw_channel_switch, |
@@ -396,13 +378,6 @@ static struct iwl_lib_ops iwl6030_lib = { | |||
396 | .query_addr = iwlagn_eeprom_query_addr, | 378 | .query_addr = iwlagn_eeprom_query_addr, |
397 | .update_enhanced_txpower = iwlcore_eeprom_enhanced_txpower, | 379 | .update_enhanced_txpower = iwlcore_eeprom_enhanced_txpower, |
398 | }, | 380 | }, |
399 | .isr_ops = { | ||
400 | .isr = iwl_isr_ict, | ||
401 | .free = iwl_free_isr_ict, | ||
402 | .alloc = iwl_alloc_isr_ict, | ||
403 | .reset = iwl_reset_ict, | ||
404 | .disable = iwl_disable_ict, | ||
405 | }, | ||
406 | .temp_ops = { | 381 | .temp_ops = { |
407 | .temperature = iwlagn_temperature, | 382 | .temperature = iwlagn_temperature, |
408 | }, | 383 | }, |
@@ -470,7 +445,6 @@ static struct iwl_base_params iwl6000_base_params = { | |||
470 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | 445 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, |
471 | .pll_cfg_val = 0, | 446 | .pll_cfg_val = 0, |
472 | .set_l0s = true, | 447 | .set_l0s = true, |
473 | .use_bsm = false, | ||
474 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | 448 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, |
475 | .shadow_ram_support = true, | 449 | .shadow_ram_support = true, |
476 | .led_compensation = 51, | 450 | .led_compensation = 51, |
@@ -493,7 +467,6 @@ static struct iwl_base_params iwl6050_base_params = { | |||
493 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | 467 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, |
494 | .pll_cfg_val = 0, | 468 | .pll_cfg_val = 0, |
495 | .set_l0s = true, | 469 | .set_l0s = true, |
496 | .use_bsm = false, | ||
497 | .max_ll_items = OTP_MAX_LL_ITEMS_6x50, | 470 | .max_ll_items = OTP_MAX_LL_ITEMS_6x50, |
498 | .shadow_ram_support = true, | 471 | .shadow_ram_support = true, |
499 | .led_compensation = 51, | 472 | .led_compensation = 51, |
@@ -515,7 +488,6 @@ static struct iwl_base_params iwl6000_g2_base_params = { | |||
515 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | 488 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, |
516 | .pll_cfg_val = 0, | 489 | .pll_cfg_val = 0, |
517 | .set_l0s = true, | 490 | .set_l0s = true, |
518 | .use_bsm = false, | ||
519 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | 491 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, |
520 | .shadow_ram_support = true, | 492 | .shadow_ram_support = true, |
521 | .led_compensation = 57, | 493 | .led_compensation = 57, |
@@ -613,6 +585,22 @@ struct iwl_cfg iwl6030_2bg_cfg = { | |||
613 | IWL_DEVICE_6030, | 585 | IWL_DEVICE_6030, |
614 | }; | 586 | }; |
615 | 587 | ||
588 | struct iwl_cfg iwl6035_2agn_cfg = { | ||
589 | .name = "6035 Series 2x2 AGN/BT", | ||
590 | IWL_DEVICE_6030, | ||
591 | .ht_params = &iwl6000_ht_params, | ||
592 | }; | ||
593 | |||
594 | struct iwl_cfg iwl6035_2abg_cfg = { | ||
595 | .name = "6035 Series 2x2 ABG/BT", | ||
596 | IWL_DEVICE_6030, | ||
597 | }; | ||
598 | |||
599 | struct iwl_cfg iwl6035_2bg_cfg = { | ||
600 | .name = "6035 Series 2x2 BG/BT", | ||
601 | IWL_DEVICE_6030, | ||
602 | }; | ||
603 | |||
616 | struct iwl_cfg iwl1030_bgn_cfg = { | 604 | struct iwl_cfg iwl1030_bgn_cfg = { |
617 | .name = "Intel(R) Centrino(R) Wireless-N 1030 BGN", | 605 | .name = "Intel(R) Centrino(R) Wireless-N 1030 BGN", |
618 | IWL_DEVICE_6030, | 606 | IWL_DEVICE_6030, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-calib.c b/drivers/net/wireless/iwlwifi/iwl-agn-calib.c index 9006293e740c..7b761de77b0a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-calib.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-calib.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-calib.h b/drivers/net/wireless/iwlwifi/iwl-agn-calib.h index e37ae7261630..ef4d5079a7ed 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-calib.h +++ b/drivers/net/wireless/iwlwifi/iwl-agn-calib.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c index b500aaae53ec..d1834aa7edf0 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c | |||
@@ -1,30 +1,30 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | * | 10 | * |
11 | * This program is distributed in the hope that it will be useful, but | 11 | * This program is distributed in the hope that it will be useful, but |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | 12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
14 | * General Public License for more details. | 14 | * General Public License for more details. |
15 | * | 15 | * |
16 | * You should have received a copy of the GNU General Public License | 16 | * You should have received a copy of the GNU General Public License |
17 | * along with this program; if not, write to the Free Software | 17 | * along with this program; if not, write to the Free Software |
18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, |
19 | * USA | 19 | * USA |
20 | * | 20 | * |
21 | * The full GNU General Public License is included in this distribution | 21 | * The full GNU General Public License is included in this distribution |
22 | * in the file called LICENSE.GPL. | 22 | * in the file called LICENSE.GPL. |
23 | * | 23 | * |
24 | * Contact Information: | 24 | * Contact Information: |
25 | * Intel Linux Wireless <ilw@linux.intel.com> | 25 | * Intel Linux Wireless <ilw@linux.intel.com> |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | *****************************************************************************/ | 27 | *****************************************************************************/ |
28 | #include "iwl-agn.h" | 28 | #include "iwl-agn.h" |
29 | #include "iwl-agn-debugfs.h" | 29 | #include "iwl-agn-debugfs.h" |
30 | 30 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.h b/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.h index f2573b5486cd..9a3f329e508f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.h +++ b/drivers/net/wireless/iwlwifi/iwl-agn-debugfs.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c index 27b5a3eec9dc..3bcaa10f9929 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -103,7 +103,7 @@ int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv) | |||
103 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, | 103 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, |
104 | EEPROM_SEM_TIMEOUT); | 104 | EEPROM_SEM_TIMEOUT); |
105 | if (ret >= 0) { | 105 | if (ret >= 0) { |
106 | IWL_DEBUG_IO(priv, | 106 | IWL_DEBUG_EEPROM(priv, |
107 | "Acquired semaphore after %d tries.\n", | 107 | "Acquired semaphore after %d tries.\n", |
108 | count+1); | 108 | count+1); |
109 | return ret; | 109 | return ret; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c index 41543ad4cb84..861cc93957a9 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-hw.h b/drivers/net/wireless/iwlwifi/iwl-agn-hw.h index a52b82c8e7a6..7bd19f4e66de 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-hw.h +++ b/drivers/net/wireless/iwlwifi/iwl-agn-hw.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-ict.c b/drivers/net/wireless/iwlwifi/iwl-agn-ict.c index ed0148d714de..0d5fda44c3a3 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-ict.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-ict.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -59,8 +59,6 @@ void iwl_free_isr_ict(struct iwl_priv *priv) | |||
59 | int iwl_alloc_isr_ict(struct iwl_priv *priv) | 59 | int iwl_alloc_isr_ict(struct iwl_priv *priv) |
60 | { | 60 | { |
61 | 61 | ||
62 | if (priv->cfg->base_params->use_isr_legacy) | ||
63 | return 0; | ||
64 | /* allocate shrared data table */ | 62 | /* allocate shrared data table */ |
65 | priv->_agn.ict_tbl_vir = | 63 | priv->_agn.ict_tbl_vir = |
66 | dma_alloc_coherent(&priv->pci_dev->dev, | 64 | dma_alloc_coherent(&priv->pci_dev->dev, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-led.c b/drivers/net/wireless/iwlwifi/iwl-agn-led.c index c1190d965614..4bb877e600c7 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-led.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-led.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-led.h b/drivers/net/wireless/iwlwifi/iwl-agn-led.h index 96f323dc5dd6..c0b7611b72c3 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-led.h +++ b/drivers/net/wireless/iwlwifi/iwl-agn-led.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c index 08ccb9496f76..9e47be6a7393 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -652,8 +652,7 @@ int iwlagn_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq) | |||
652 | const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */ | 652 | const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */ |
653 | u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */ | 653 | u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */ |
654 | 654 | ||
655 | if (!priv->cfg->base_params->use_isr_legacy) | 655 | rb_timeout = RX_RB_TIMEOUT; |
656 | rb_timeout = RX_RB_TIMEOUT; | ||
657 | 656 | ||
658 | if (priv->cfg->mod_params->amsdu_size_8K) | 657 | if (priv->cfg->mod_params->amsdu_size_8K) |
659 | rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K; | 658 | rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K; |
@@ -913,7 +912,6 @@ void iwlagn_rx_allocate(struct iwl_priv *priv, gfp_t priority) | |||
913 | 912 | ||
914 | list_add_tail(&rxb->list, &rxq->rx_free); | 913 | list_add_tail(&rxb->list, &rxq->rx_free); |
915 | rxq->free_count++; | 914 | rxq->free_count++; |
916 | priv->alloc_rxb_page++; | ||
917 | 915 | ||
918 | spin_unlock_irqrestore(&rxq->lock, flags); | 916 | spin_unlock_irqrestore(&rxq->lock, flags); |
919 | } | 917 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c index d03b4734c892..dbe6295bbf23 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -115,13 +115,18 @@ const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = { | |||
115 | /* FIXME:RS: ^^ should be INV (legacy) */ | 115 | /* FIXME:RS: ^^ should be INV (legacy) */ |
116 | }; | 116 | }; |
117 | 117 | ||
118 | static inline u8 rs_extract_rate(u32 rate_n_flags) | ||
119 | { | ||
120 | return (u8)(rate_n_flags & RATE_MCS_RATE_MSK); | ||
121 | } | ||
122 | |||
118 | static int iwl_hwrate_to_plcp_idx(u32 rate_n_flags) | 123 | static int iwl_hwrate_to_plcp_idx(u32 rate_n_flags) |
119 | { | 124 | { |
120 | int idx = 0; | 125 | int idx = 0; |
121 | 126 | ||
122 | /* HT rate format */ | 127 | /* HT rate format */ |
123 | if (rate_n_flags & RATE_MCS_HT_MSK) { | 128 | if (rate_n_flags & RATE_MCS_HT_MSK) { |
124 | idx = (rate_n_flags & 0xff); | 129 | idx = rs_extract_rate(rate_n_flags); |
125 | 130 | ||
126 | if (idx >= IWL_RATE_MIMO3_6M_PLCP) | 131 | if (idx >= IWL_RATE_MIMO3_6M_PLCP) |
127 | idx = idx - IWL_RATE_MIMO3_6M_PLCP; | 132 | idx = idx - IWL_RATE_MIMO3_6M_PLCP; |
@@ -138,7 +143,8 @@ static int iwl_hwrate_to_plcp_idx(u32 rate_n_flags) | |||
138 | /* legacy rate format, search for match in table */ | 143 | /* legacy rate format, search for match in table */ |
139 | } else { | 144 | } else { |
140 | for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++) | 145 | for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++) |
141 | if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF)) | 146 | if (iwl_rates[idx].plcp == |
147 | rs_extract_rate(rate_n_flags)) | ||
142 | return idx; | 148 | return idx; |
143 | } | 149 | } |
144 | 150 | ||
@@ -239,11 +245,6 @@ static const struct iwl_rate_mcs_info iwl_rate_mcs[IWL_RATE_COUNT] = { | |||
239 | 245 | ||
240 | #define MCS_INDEX_PER_STREAM (8) | 246 | #define MCS_INDEX_PER_STREAM (8) |
241 | 247 | ||
242 | static inline u8 rs_extract_rate(u32 rate_n_flags) | ||
243 | { | ||
244 | return (u8)(rate_n_flags & 0xFF); | ||
245 | } | ||
246 | |||
247 | static void rs_rate_scale_clear_window(struct iwl_rate_scale_data *window) | 248 | static void rs_rate_scale_clear_window(struct iwl_rate_scale_data *window) |
248 | { | 249 | { |
249 | window->data = 0; | 250 | window->data = 0; |
@@ -2770,16 +2771,13 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta, void *priv_sta, | |||
2770 | static void *rs_alloc_sta(void *priv_rate, struct ieee80211_sta *sta, | 2771 | static void *rs_alloc_sta(void *priv_rate, struct ieee80211_sta *sta, |
2771 | gfp_t gfp) | 2772 | gfp_t gfp) |
2772 | { | 2773 | { |
2773 | struct iwl_lq_sta *lq_sta; | ||
2774 | struct iwl_station_priv *sta_priv = (struct iwl_station_priv *) sta->drv_priv; | 2774 | struct iwl_station_priv *sta_priv = (struct iwl_station_priv *) sta->drv_priv; |
2775 | struct iwl_priv *priv; | 2775 | struct iwl_priv *priv; |
2776 | 2776 | ||
2777 | priv = (struct iwl_priv *)priv_rate; | 2777 | priv = (struct iwl_priv *)priv_rate; |
2778 | IWL_DEBUG_RATE(priv, "create station rate scale window\n"); | 2778 | IWL_DEBUG_RATE(priv, "create station rate scale window\n"); |
2779 | 2779 | ||
2780 | lq_sta = &sta_priv->lq_sta; | 2780 | return &sta_priv->lq_sta; |
2781 | |||
2782 | return lq_sta; | ||
2783 | } | 2781 | } |
2784 | 2782 | ||
2785 | /* | 2783 | /* |
@@ -2912,7 +2910,8 @@ static void rs_fill_link_cmd(struct iwl_priv *priv, | |||
2912 | ant_toggle_cnt = 1; | 2910 | ant_toggle_cnt = 1; |
2913 | repeat_rate = IWL_NUMBER_TRY; | 2911 | repeat_rate = IWL_NUMBER_TRY; |
2914 | } else { | 2912 | } else { |
2915 | repeat_rate = IWL_HT_NUMBER_TRY; | 2913 | repeat_rate = min(IWL_HT_NUMBER_TRY, |
2914 | LINK_QUAL_AGG_DISABLE_START_DEF - 1); | ||
2916 | } | 2915 | } |
2917 | 2916 | ||
2918 | lq_cmd->general_params.mimo_delimiter = | 2917 | lq_cmd->general_params.mimo_delimiter = |
@@ -3257,7 +3256,6 @@ static ssize_t rs_sta_dbgfs_rate_scale_data_read(struct file *file, | |||
3257 | { | 3256 | { |
3258 | char buff[120]; | 3257 | char buff[120]; |
3259 | int desc = 0; | 3258 | int desc = 0; |
3260 | ssize_t ret; | ||
3261 | 3259 | ||
3262 | struct iwl_lq_sta *lq_sta = file->private_data; | 3260 | struct iwl_lq_sta *lq_sta = file->private_data; |
3263 | struct iwl_priv *priv; | 3261 | struct iwl_priv *priv; |
@@ -3274,8 +3272,7 @@ static ssize_t rs_sta_dbgfs_rate_scale_data_read(struct file *file, | |||
3274 | "Bit Rate= %d Mb/s\n", | 3272 | "Bit Rate= %d Mb/s\n", |
3275 | iwl_rates[lq_sta->last_txrate_idx].ieee >> 1); | 3273 | iwl_rates[lq_sta->last_txrate_idx].ieee >> 1); |
3276 | 3274 | ||
3277 | ret = simple_read_from_buffer(user_buf, count, ppos, buff, desc); | 3275 | return simple_read_from_buffer(user_buf, count, ppos, buff, desc); |
3278 | return ret; | ||
3279 | } | 3276 | } |
3280 | 3277 | ||
3281 | static const struct file_operations rs_sta_dbgfs_rate_scale_data_ops = { | 3278 | static const struct file_operations rs_sta_dbgfs_rate_scale_data_ops = { |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.h b/drivers/net/wireless/iwlwifi/iwl-agn-rs.h index 184828c72b31..69a29932babc 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.h +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -41,20 +41,6 @@ struct iwl_rate_info { | |||
41 | u8 next_rs_tgg; /* next rate used in TGG rs algo */ | 41 | u8 next_rs_tgg; /* next rate used in TGG rs algo */ |
42 | }; | 42 | }; |
43 | 43 | ||
44 | struct iwl3945_rate_info { | ||
45 | u8 plcp; /* uCode API: IWL_RATE_6M_PLCP, etc. */ | ||
46 | u8 ieee; /* MAC header: IWL_RATE_6M_IEEE, etc. */ | ||
47 | u8 prev_ieee; /* previous rate in IEEE speeds */ | ||
48 | u8 next_ieee; /* next rate in IEEE speeds */ | ||
49 | u8 prev_rs; /* previous rate used in rs algo */ | ||
50 | u8 next_rs; /* next rate used in rs algo */ | ||
51 | u8 prev_rs_tgg; /* previous rate used in TGG rs algo */ | ||
52 | u8 next_rs_tgg; /* next rate used in TGG rs algo */ | ||
53 | u8 table_rs_index; /* index in rate scale table cmd */ | ||
54 | u8 prev_table_rs; /* prev in rate table cmd */ | ||
55 | }; | ||
56 | |||
57 | |||
58 | /* | 44 | /* |
59 | * These serve as indexes into | 45 | * These serve as indexes into |
60 | * struct iwl_rate_info iwl_rates[IWL_RATE_COUNT]; | 46 | * struct iwl_rate_info iwl_rates[IWL_RATE_COUNT]; |
@@ -75,7 +61,6 @@ enum { | |||
75 | IWL_RATE_60M_INDEX, | 61 | IWL_RATE_60M_INDEX, |
76 | IWL_RATE_COUNT, /*FIXME:RS:change to IWL_RATE_INDEX_COUNT,*/ | 62 | IWL_RATE_COUNT, /*FIXME:RS:change to IWL_RATE_INDEX_COUNT,*/ |
77 | IWL_RATE_COUNT_LEGACY = IWL_RATE_COUNT - 1, /* Excluding 60M */ | 63 | IWL_RATE_COUNT_LEGACY = IWL_RATE_COUNT - 1, /* Excluding 60M */ |
78 | IWL_RATE_COUNT_3945 = IWL_RATE_COUNT - 1, | ||
79 | IWL_RATE_INVM_INDEX = IWL_RATE_COUNT, | 64 | IWL_RATE_INVM_INDEX = IWL_RATE_COUNT, |
80 | IWL_RATE_INVALID = IWL_RATE_COUNT, | 65 | IWL_RATE_INVALID = IWL_RATE_COUNT, |
81 | }; | 66 | }; |
@@ -213,7 +198,6 @@ enum { | |||
213 | IWL_CCK_BASIC_RATES_MASK) | 198 | IWL_CCK_BASIC_RATES_MASK) |
214 | 199 | ||
215 | #define IWL_RATES_MASK ((1 << IWL_RATE_COUNT) - 1) | 200 | #define IWL_RATES_MASK ((1 << IWL_RATE_COUNT) - 1) |
216 | #define IWL_RATES_MASK_3945 ((1 << IWL_RATE_COUNT_3945) - 1) | ||
217 | 201 | ||
218 | #define IWL_INVALID_VALUE -1 | 202 | #define IWL_INVALID_VALUE -1 |
219 | 203 | ||
@@ -453,19 +437,9 @@ static inline u8 first_antenna(u8 mask) | |||
453 | } | 437 | } |
454 | 438 | ||
455 | 439 | ||
456 | /** | ||
457 | * iwl3945_rate_scale_init - Initialize the rate scale table based on assoc info | ||
458 | * | ||
459 | * The specific throughput table used is based on the type of network | ||
460 | * the associated with, including A, B, G, and G w/ TGG protection | ||
461 | */ | ||
462 | extern void iwl3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id); | ||
463 | |||
464 | /* Initialize station's rate scaling information after adding station */ | 440 | /* Initialize station's rate scaling information after adding station */ |
465 | extern void iwl_rs_rate_init(struct iwl_priv *priv, | 441 | extern void iwl_rs_rate_init(struct iwl_priv *priv, |
466 | struct ieee80211_sta *sta, u8 sta_id); | 442 | struct ieee80211_sta *sta, u8 sta_id); |
467 | extern void iwl3945_rs_rate_init(struct iwl_priv *priv, | ||
468 | struct ieee80211_sta *sta, u8 sta_id); | ||
469 | 443 | ||
470 | /** | 444 | /** |
471 | * iwl_rate_control_register - Register the rate control algorithm callbacks | 445 | * iwl_rate_control_register - Register the rate control algorithm callbacks |
@@ -478,7 +452,6 @@ extern void iwl3945_rs_rate_init(struct iwl_priv *priv, | |||
478 | * | 452 | * |
479 | */ | 453 | */ |
480 | extern int iwlagn_rate_control_register(void); | 454 | extern int iwlagn_rate_control_register(void); |
481 | extern int iwl3945_rate_control_register(void); | ||
482 | 455 | ||
483 | /** | 456 | /** |
484 | * iwl_rate_control_unregister - Unregister the rate control callbacks | 457 | * iwl_rate_control_unregister - Unregister the rate control callbacks |
@@ -487,6 +460,5 @@ extern int iwl3945_rate_control_register(void); | |||
487 | * the driver is unloaded. | 460 | * the driver is unloaded. |
488 | */ | 461 | */ |
489 | extern void iwlagn_rate_control_unregister(void); | 462 | extern void iwlagn_rate_control_unregister(void); |
490 | extern void iwl3945_rate_control_unregister(void); | ||
491 | 463 | ||
492 | #endif /* __iwl_agn__rs__ */ | 464 | #endif /* __iwl_agn__rs__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c index dfdbea6e8f99..c335ee6883ee 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-sta.c b/drivers/net/wireless/iwlwifi/iwl-agn-sta.c index 35f085ac336b..079275f2c64d 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-sta.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-sta.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -474,7 +474,7 @@ int iwl_remove_dynamic_key(struct iwl_priv *priv, | |||
474 | memset(&priv->stations[sta_id].keyinfo, 0, | 474 | memset(&priv->stations[sta_id].keyinfo, 0, |
475 | sizeof(struct iwl_hw_key)); | 475 | sizeof(struct iwl_hw_key)); |
476 | memset(&priv->stations[sta_id].sta.key, 0, | 476 | memset(&priv->stations[sta_id].sta.key, 0, |
477 | sizeof(struct iwl4965_keyinfo)); | 477 | sizeof(struct iwl_keyinfo)); |
478 | priv->stations[sta_id].sta.key.key_flags = | 478 | priv->stations[sta_id].sta.key.key_flags = |
479 | STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID; | 479 | STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID; |
480 | priv->stations[sta_id].sta.key.key_offset = WEP_INVALID_OFFSET; | 480 | priv->stations[sta_id].sta.key.key_offset = WEP_INVALID_OFFSET; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tt.c b/drivers/net/wireless/iwlwifi/iwl-agn-tt.c index e3a8216a033c..348f74f1c8e8 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-tt.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-tt.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tt.h b/drivers/net/wireless/iwlwifi/iwl-agn-tt.h index d55060427cac..d118ed29bf3f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-tt.h +++ b/drivers/net/wireless/iwlwifi/iwl-agn-tt.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c index a709d05c5868..2816b432c62f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -222,13 +222,8 @@ void iwlagn_tx_queue_set_status(struct iwl_priv *priv, | |||
222 | scd_retry ? "BA" : "AC/CMD", txq_id, tx_fifo_id); | 222 | scd_retry ? "BA" : "AC/CMD", txq_id, tx_fifo_id); |
223 | } | 223 | } |
224 | 224 | ||
225 | int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, | 225 | static int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, int sta_id, int tid) |
226 | int tx_fifo, int sta_id, int tid, u16 ssn_idx) | ||
227 | { | 226 | { |
228 | unsigned long flags; | ||
229 | u16 ra_tid; | ||
230 | int ret; | ||
231 | |||
232 | if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) || | 227 | if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) || |
233 | (IWLAGN_FIRST_AMPDU_QUEUE + | 228 | (IWLAGN_FIRST_AMPDU_QUEUE + |
234 | priv->cfg->base_params->num_of_ampdu_queues <= txq_id)) { | 229 | priv->cfg->base_params->num_of_ampdu_queues <= txq_id)) { |
@@ -240,12 +235,33 @@ int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, | |||
240 | return -EINVAL; | 235 | return -EINVAL; |
241 | } | 236 | } |
242 | 237 | ||
243 | ra_tid = BUILD_RAxTID(sta_id, tid); | ||
244 | |||
245 | /* Modify device's station table to Tx this TID */ | 238 | /* Modify device's station table to Tx this TID */ |
246 | ret = iwl_sta_tx_modify_enable_tid(priv, sta_id, tid); | 239 | return iwl_sta_tx_modify_enable_tid(priv, sta_id, tid); |
247 | if (ret) | 240 | } |
248 | return ret; | 241 | |
242 | void iwlagn_txq_agg_queue_setup(struct iwl_priv *priv, | ||
243 | struct ieee80211_sta *sta, | ||
244 | int tid, int frame_limit) | ||
245 | { | ||
246 | int sta_id, tx_fifo, txq_id, ssn_idx; | ||
247 | u16 ra_tid; | ||
248 | unsigned long flags; | ||
249 | struct iwl_tid_data *tid_data; | ||
250 | |||
251 | sta_id = iwl_sta_id(sta); | ||
252 | if (WARN_ON(sta_id == IWL_INVALID_STATION)) | ||
253 | return; | ||
254 | if (WARN_ON(tid >= MAX_TID_COUNT)) | ||
255 | return; | ||
256 | |||
257 | spin_lock_irqsave(&priv->sta_lock, flags); | ||
258 | tid_data = &priv->stations[sta_id].tid[tid]; | ||
259 | ssn_idx = SEQ_TO_SN(tid_data->seq_number); | ||
260 | txq_id = tid_data->agg.txq_id; | ||
261 | tx_fifo = tid_data->agg.tx_fifo; | ||
262 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
263 | |||
264 | ra_tid = BUILD_RAxTID(sta_id, tid); | ||
249 | 265 | ||
250 | spin_lock_irqsave(&priv->lock, flags); | 266 | spin_lock_irqsave(&priv->lock, flags); |
251 | 267 | ||
@@ -271,10 +287,10 @@ int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, | |||
271 | iwl_write_targ_mem(priv, priv->scd_base_addr + | 287 | iwl_write_targ_mem(priv, priv->scd_base_addr + |
272 | IWLAGN_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + | 288 | IWLAGN_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + |
273 | sizeof(u32), | 289 | sizeof(u32), |
274 | ((SCD_WIN_SIZE << | 290 | ((frame_limit << |
275 | IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) & | 291 | IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) & |
276 | IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) | | 292 | IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) | |
277 | ((SCD_FRAME_LIMIT << | 293 | ((frame_limit << |
278 | IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & | 294 | IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & |
279 | IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK)); | 295 | IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK)); |
280 | 296 | ||
@@ -284,12 +300,10 @@ int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, | |||
284 | iwlagn_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1); | 300 | iwlagn_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1); |
285 | 301 | ||
286 | spin_unlock_irqrestore(&priv->lock, flags); | 302 | spin_unlock_irqrestore(&priv->lock, flags); |
287 | |||
288 | return 0; | ||
289 | } | 303 | } |
290 | 304 | ||
291 | int iwlagn_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, | 305 | static int iwlagn_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, |
292 | u16 ssn_idx, u8 tx_fifo) | 306 | u16 ssn_idx, u8 tx_fifo) |
293 | { | 307 | { |
294 | if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) || | 308 | if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) || |
295 | (IWLAGN_FIRST_AMPDU_QUEUE + | 309 | (IWLAGN_FIRST_AMPDU_QUEUE + |
@@ -1034,11 +1048,11 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif, | |||
1034 | tid_data = &priv->stations[sta_id].tid[tid]; | 1048 | tid_data = &priv->stations[sta_id].tid[tid]; |
1035 | *ssn = SEQ_TO_SN(tid_data->seq_number); | 1049 | *ssn = SEQ_TO_SN(tid_data->seq_number); |
1036 | tid_data->agg.txq_id = txq_id; | 1050 | tid_data->agg.txq_id = txq_id; |
1051 | tid_data->agg.tx_fifo = tx_fifo; | ||
1037 | iwl_set_swq_id(&priv->txq[txq_id], get_ac_from_tid(tid), txq_id); | 1052 | iwl_set_swq_id(&priv->txq[txq_id], get_ac_from_tid(tid), txq_id); |
1038 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 1053 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
1039 | 1054 | ||
1040 | ret = priv->cfg->ops->lib->txq_agg_enable(priv, txq_id, tx_fifo, | 1055 | ret = iwlagn_txq_agg_enable(priv, txq_id, sta_id, tid); |
1041 | sta_id, tid, *ssn); | ||
1042 | if (ret) | 1056 | if (ret) |
1043 | return ret; | 1057 | return ret; |
1044 | 1058 | ||
@@ -1125,8 +1139,7 @@ int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif, | |||
1125 | * to deactivate the uCode queue, just return "success" to allow | 1139 | * to deactivate the uCode queue, just return "success" to allow |
1126 | * mac80211 to clean up it own data. | 1140 | * mac80211 to clean up it own data. |
1127 | */ | 1141 | */ |
1128 | priv->cfg->ops->lib->txq_agg_disable(priv, txq_id, ssn, | 1142 | iwlagn_txq_agg_disable(priv, txq_id, ssn, tx_fifo_id); |
1129 | tx_fifo_id); | ||
1130 | spin_unlock_irqrestore(&priv->lock, flags); | 1143 | spin_unlock_irqrestore(&priv->lock, flags); |
1131 | 1144 | ||
1132 | ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); | 1145 | ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); |
@@ -1155,8 +1168,7 @@ int iwlagn_txq_check_empty(struct iwl_priv *priv, | |||
1155 | u16 ssn = SEQ_TO_SN(tid_data->seq_number); | 1168 | u16 ssn = SEQ_TO_SN(tid_data->seq_number); |
1156 | int tx_fifo = get_fifo_from_tid(ctx, tid); | 1169 | int tx_fifo = get_fifo_from_tid(ctx, tid); |
1157 | IWL_DEBUG_HT(priv, "HW queue empty: continue DELBA flow\n"); | 1170 | IWL_DEBUG_HT(priv, "HW queue empty: continue DELBA flow\n"); |
1158 | priv->cfg->ops->lib->txq_agg_disable(priv, txq_id, | 1171 | iwlagn_txq_agg_disable(priv, txq_id, ssn, tx_fifo); |
1159 | ssn, tx_fifo); | ||
1160 | tid_data->agg.state = IWL_AGG_OFF; | 1172 | tid_data->agg.state = IWL_AGG_OFF; |
1161 | ieee80211_stop_tx_ba_cb_irqsafe(ctx->vif, addr, tid); | 1173 | ieee80211_stop_tx_ba_cb_irqsafe(ctx->vif, addr, tid); |
1162 | } | 1174 | } |
@@ -1251,11 +1263,11 @@ static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv, | |||
1251 | struct iwl_compressed_ba_resp *ba_resp) | 1263 | struct iwl_compressed_ba_resp *ba_resp) |
1252 | 1264 | ||
1253 | { | 1265 | { |
1254 | int i, sh, ack; | 1266 | int sh; |
1255 | u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl); | 1267 | u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl); |
1256 | u16 scd_flow = le16_to_cpu(ba_resp->scd_flow); | 1268 | u16 scd_flow = le16_to_cpu(ba_resp->scd_flow); |
1257 | int successes = 0; | ||
1258 | struct ieee80211_tx_info *info; | 1269 | struct ieee80211_tx_info *info; |
1270 | u64 bitmap, sent_bitmap; | ||
1259 | 1271 | ||
1260 | if (unlikely(!agg->wait_for_ba)) { | 1272 | if (unlikely(!agg->wait_for_ba)) { |
1261 | if (unlikely(ba_resp->bitmap)) | 1273 | if (unlikely(ba_resp->bitmap)) |
@@ -1269,70 +1281,42 @@ static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv, | |||
1269 | 1281 | ||
1270 | /* Calculate shift to align block-ack bits with our Tx window bits */ | 1282 | /* Calculate shift to align block-ack bits with our Tx window bits */ |
1271 | sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl >> 4); | 1283 | sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl >> 4); |
1272 | if (sh < 0) /* tbw something is wrong with indices */ | 1284 | if (sh < 0) |
1273 | sh += 0x100; | 1285 | sh += 0x100; |
1274 | 1286 | ||
1275 | if (agg->frame_count > (64 - sh)) { | 1287 | /* |
1276 | IWL_DEBUG_TX_REPLY(priv, "more frames than bitmap size"); | 1288 | * Check for success or failure according to the |
1277 | return -1; | 1289 | * transmitted bitmap and block-ack bitmap |
1278 | } | 1290 | */ |
1279 | if (!priv->cfg->base_params->no_agg_framecnt_info && ba_resp->txed) { | 1291 | bitmap = le64_to_cpu(ba_resp->bitmap) >> sh; |
1292 | sent_bitmap = bitmap & agg->bitmap; | ||
1293 | |||
1294 | /* Sanity check values reported by uCode */ | ||
1295 | if (ba_resp->txed_2_done > ba_resp->txed) { | ||
1296 | IWL_DEBUG_TX_REPLY(priv, | ||
1297 | "bogus sent(%d) and ack(%d) count\n", | ||
1298 | ba_resp->txed, ba_resp->txed_2_done); | ||
1280 | /* | 1299 | /* |
1281 | * sent and ack information provided by uCode | 1300 | * set txed_2_done = txed, |
1282 | * use it instead of figure out ourself | 1301 | * so it won't impact rate scale |
1283 | */ | 1302 | */ |
1284 | if (ba_resp->txed_2_done > ba_resp->txed) { | 1303 | ba_resp->txed = ba_resp->txed_2_done; |
1285 | IWL_DEBUG_TX_REPLY(priv, | 1304 | } |
1286 | "bogus sent(%d) and ack(%d) count\n", | 1305 | IWL_DEBUG_HT(priv, "agg frames sent:%d, acked:%d\n", |
1287 | ba_resp->txed, ba_resp->txed_2_done); | 1306 | ba_resp->txed, ba_resp->txed_2_done); |
1288 | /* | ||
1289 | * set txed_2_done = txed, | ||
1290 | * so it won't impact rate scale | ||
1291 | */ | ||
1292 | ba_resp->txed = ba_resp->txed_2_done; | ||
1293 | } | ||
1294 | IWL_DEBUG_HT(priv, "agg frames sent:%d, acked:%d\n", | ||
1295 | ba_resp->txed, ba_resp->txed_2_done); | ||
1296 | } else { | ||
1297 | u64 bitmap, sent_bitmap; | ||
1298 | |||
1299 | /* don't use 64-bit values for now */ | ||
1300 | bitmap = le64_to_cpu(ba_resp->bitmap) >> sh; | ||
1301 | |||
1302 | /* check for success or failure according to the | ||
1303 | * transmitted bitmap and block-ack bitmap */ | ||
1304 | sent_bitmap = bitmap & agg->bitmap; | ||
1305 | |||
1306 | /* For each frame attempted in aggregation, | ||
1307 | * update driver's record of tx frame's status. */ | ||
1308 | i = 0; | ||
1309 | while (sent_bitmap) { | ||
1310 | ack = sent_bitmap & 1ULL; | ||
1311 | successes += ack; | ||
1312 | IWL_DEBUG_TX_REPLY(priv, "%s ON i=%d idx=%d raw=%d\n", | ||
1313 | ack ? "ACK" : "NACK", i, | ||
1314 | (agg->start_idx + i) & 0xff, | ||
1315 | agg->start_idx + i); | ||
1316 | sent_bitmap >>= 1; | ||
1317 | ++i; | ||
1318 | } | ||
1319 | 1307 | ||
1320 | IWL_DEBUG_TX_REPLY(priv, "Bitmap %llx\n", | 1308 | /* Find the first ACKed frame to store the TX status */ |
1321 | (unsigned long long)bitmap); | 1309 | while (sent_bitmap && !(sent_bitmap & 1)) { |
1310 | agg->start_idx = (agg->start_idx + 1) & 0xff; | ||
1311 | sent_bitmap >>= 1; | ||
1322 | } | 1312 | } |
1323 | 1313 | ||
1324 | info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb); | 1314 | info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb); |
1325 | memset(&info->status, 0, sizeof(info->status)); | 1315 | memset(&info->status, 0, sizeof(info->status)); |
1326 | info->flags |= IEEE80211_TX_STAT_ACK; | 1316 | info->flags |= IEEE80211_TX_STAT_ACK; |
1327 | info->flags |= IEEE80211_TX_STAT_AMPDU; | 1317 | info->flags |= IEEE80211_TX_STAT_AMPDU; |
1328 | if (!priv->cfg->base_params->no_agg_framecnt_info && ba_resp->txed) { | 1318 | info->status.ampdu_ack_len = ba_resp->txed_2_done; |
1329 | info->status.ampdu_ack_len = ba_resp->txed_2_done; | 1319 | info->status.ampdu_len = ba_resp->txed; |
1330 | info->status.ampdu_len = ba_resp->txed; | ||
1331 | |||
1332 | } else { | ||
1333 | info->status.ampdu_ack_len = successes; | ||
1334 | info->status.ampdu_len = agg->frame_count; | ||
1335 | } | ||
1336 | iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags, info); | 1320 | iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags, info); |
1337 | 1321 | ||
1338 | return 0; | 1322 | return 0; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c index d807e5e2b718..01a6d2fc795c 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -311,14 +311,14 @@ void iwlagn_init_alive_start(struct iwl_priv *priv) | |||
311 | /* initialize uCode was loaded... verify inst image. | 311 | /* initialize uCode was loaded... verify inst image. |
312 | * This is a paranoid check, because we would not have gotten the | 312 | * This is a paranoid check, because we would not have gotten the |
313 | * "initialize" alive if code weren't properly loaded. */ | 313 | * "initialize" alive if code weren't properly loaded. */ |
314 | if (iwl_verify_ucode(priv)) { | 314 | if (iwl_verify_ucode(priv, &priv->ucode_init)) { |
315 | /* Runtime instruction load was bad; | 315 | /* Runtime instruction load was bad; |
316 | * take it all the way back down so we can try again */ | 316 | * take it all the way back down so we can try again */ |
317 | IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n"); | 317 | IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n"); |
318 | goto restart; | 318 | goto restart; |
319 | } | 319 | } |
320 | 320 | ||
321 | ret = priv->cfg->ops->lib->alive_notify(priv); | 321 | ret = iwlagn_alive_notify(priv); |
322 | if (ret) { | 322 | if (ret) { |
323 | IWL_WARN(priv, | 323 | IWL_WARN(priv, |
324 | "Could not complete ALIVE transition: %d\n", ret); | 324 | "Could not complete ALIVE transition: %d\n", ret); |
@@ -432,6 +432,7 @@ int iwlagn_alive_notify(struct iwl_priv *priv) | |||
432 | unsigned long flags; | 432 | unsigned long flags; |
433 | int i, chan; | 433 | int i, chan; |
434 | u32 reg_val; | 434 | u32 reg_val; |
435 | int ret; | ||
435 | 436 | ||
436 | spin_lock_irqsave(&priv->lock, flags); | 437 | spin_lock_irqsave(&priv->lock, flags); |
437 | 438 | ||
@@ -527,12 +528,15 @@ int iwlagn_alive_notify(struct iwl_priv *priv) | |||
527 | iwl_clear_bits_prph(priv, APMG_PCIDEV_STT_REG, | 528 | iwl_clear_bits_prph(priv, APMG_PCIDEV_STT_REG, |
528 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); | 529 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); |
529 | 530 | ||
530 | iwlagn_send_wimax_coex(priv); | 531 | ret = iwlagn_send_wimax_coex(priv); |
532 | if (ret) | ||
533 | return ret; | ||
531 | 534 | ||
532 | iwlagn_set_Xtal_calib(priv); | 535 | ret = iwlagn_set_Xtal_calib(priv); |
533 | iwl_send_calib_results(priv); | 536 | if (ret) |
537 | return ret; | ||
534 | 538 | ||
535 | return 0; | 539 | return iwl_send_calib_results(priv); |
536 | } | 540 | } |
537 | 541 | ||
538 | 542 | ||
@@ -541,11 +545,12 @@ int iwlagn_alive_notify(struct iwl_priv *priv) | |||
541 | * using sample data 100 bytes apart. If these sample points are good, | 545 | * using sample data 100 bytes apart. If these sample points are good, |
542 | * it's a pretty good bet that everything between them is good, too. | 546 | * it's a pretty good bet that everything between them is good, too. |
543 | */ | 547 | */ |
544 | static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len) | 548 | static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, |
549 | struct fw_desc *fw_desc) | ||
545 | { | 550 | { |
551 | __le32 *image = (__le32 *)fw_desc->v_addr; | ||
552 | u32 len = fw_desc->len; | ||
546 | u32 val; | 553 | u32 val; |
547 | int ret = 0; | ||
548 | u32 errcnt = 0; | ||
549 | u32 i; | 554 | u32 i; |
550 | 555 | ||
551 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); | 556 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); |
@@ -556,104 +561,55 @@ static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 | |||
556 | * if IWL_DL_IO is set */ | 561 | * if IWL_DL_IO is set */ |
557 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, | 562 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
558 | i + IWLAGN_RTC_INST_LOWER_BOUND); | 563 | i + IWLAGN_RTC_INST_LOWER_BOUND); |
559 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | 564 | val = iwl_read32(priv, HBUS_TARG_MEM_RDAT); |
560 | if (val != le32_to_cpu(*image)) { | 565 | if (val != le32_to_cpu(*image)) |
561 | ret = -EIO; | 566 | return -EIO; |
562 | errcnt++; | ||
563 | if (errcnt >= 3) | ||
564 | break; | ||
565 | } | ||
566 | } | 567 | } |
567 | 568 | ||
568 | return ret; | 569 | return 0; |
569 | } | 570 | } |
570 | 571 | ||
571 | /** | 572 | static void iwl_print_mismatch_inst(struct iwl_priv *priv, |
572 | * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host, | 573 | struct fw_desc *fw_desc) |
573 | * looking at all data. | ||
574 | */ | ||
575 | static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image, | ||
576 | u32 len) | ||
577 | { | 574 | { |
575 | __le32 *image = (__le32 *)fw_desc->v_addr; | ||
576 | u32 len = fw_desc->len; | ||
578 | u32 val; | 577 | u32 val; |
579 | u32 save_len = len; | 578 | u32 offs; |
580 | int ret = 0; | 579 | int errors = 0; |
581 | u32 errcnt; | ||
582 | 580 | ||
583 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); | 581 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); |
584 | 582 | ||
585 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, | 583 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
586 | IWLAGN_RTC_INST_LOWER_BOUND); | 584 | IWLAGN_RTC_INST_LOWER_BOUND); |
587 | 585 | ||
588 | errcnt = 0; | 586 | for (offs = 0; |
589 | for (; len > 0; len -= sizeof(u32), image++) { | 587 | offs < len && errors < 20; |
588 | offs += sizeof(u32), image++) { | ||
590 | /* read data comes through single port, auto-incr addr */ | 589 | /* read data comes through single port, auto-incr addr */ |
591 | /* NOTE: Use the debugless read so we don't flood kernel log | 590 | val = iwl_read32(priv, HBUS_TARG_MEM_RDAT); |
592 | * if IWL_DL_IO is set */ | ||
593 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
594 | if (val != le32_to_cpu(*image)) { | 591 | if (val != le32_to_cpu(*image)) { |
595 | IWL_ERR(priv, "uCode INST section is invalid at " | 592 | IWL_ERR(priv, "uCode INST section at " |
596 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | 593 | "offset 0x%x, is 0x%x, s/b 0x%x\n", |
597 | save_len - len, val, le32_to_cpu(*image)); | 594 | offs, val, le32_to_cpu(*image)); |
598 | ret = -EIO; | 595 | errors++; |
599 | errcnt++; | ||
600 | if (errcnt >= 20) | ||
601 | break; | ||
602 | } | 596 | } |
603 | } | 597 | } |
604 | |||
605 | if (!errcnt) | ||
606 | IWL_DEBUG_INFO(priv, | ||
607 | "ucode image in INSTRUCTION memory is good\n"); | ||
608 | |||
609 | return ret; | ||
610 | } | 598 | } |
611 | 599 | ||
612 | /** | 600 | /** |
613 | * iwl_verify_ucode - determine which instruction image is in SRAM, | 601 | * iwl_verify_ucode - determine which instruction image is in SRAM, |
614 | * and verify its contents | 602 | * and verify its contents |
615 | */ | 603 | */ |
616 | int iwl_verify_ucode(struct iwl_priv *priv) | 604 | int iwl_verify_ucode(struct iwl_priv *priv, struct fw_desc *fw_desc) |
617 | { | 605 | { |
618 | __le32 *image; | 606 | if (!iwlcore_verify_inst_sparse(priv, fw_desc)) { |
619 | u32 len; | 607 | IWL_DEBUG_INFO(priv, "uCode is good in inst SRAM\n"); |
620 | int ret; | ||
621 | |||
622 | /* Try bootstrap */ | ||
623 | image = (__le32 *)priv->ucode_boot.v_addr; | ||
624 | len = priv->ucode_boot.len; | ||
625 | ret = iwlcore_verify_inst_sparse(priv, image, len); | ||
626 | if (!ret) { | ||
627 | IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n"); | ||
628 | return 0; | ||
629 | } | ||
630 | |||
631 | /* Try initialize */ | ||
632 | image = (__le32 *)priv->ucode_init.v_addr; | ||
633 | len = priv->ucode_init.len; | ||
634 | ret = iwlcore_verify_inst_sparse(priv, image, len); | ||
635 | if (!ret) { | ||
636 | IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n"); | ||
637 | return 0; | ||
638 | } | ||
639 | |||
640 | /* Try runtime/protocol */ | ||
641 | image = (__le32 *)priv->ucode_code.v_addr; | ||
642 | len = priv->ucode_code.len; | ||
643 | ret = iwlcore_verify_inst_sparse(priv, image, len); | ||
644 | if (!ret) { | ||
645 | IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n"); | ||
646 | return 0; | 608 | return 0; |
647 | } | 609 | } |
648 | 610 | ||
649 | IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); | 611 | IWL_ERR(priv, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n"); |
650 | 612 | ||
651 | /* Since nothing seems to match, show first several data entries in | 613 | iwl_print_mismatch_inst(priv, fw_desc); |
652 | * instruction SRAM, so maybe visual inspection will give a clue. | 614 | return -EIO; |
653 | * Selection of bootstrap image (vs. other images) is arbitrary. */ | ||
654 | image = (__le32 *)priv->ucode_boot.v_addr; | ||
655 | len = priv->ucode_boot.len; | ||
656 | ret = iwl_verify_inst_full(priv, image, len); | ||
657 | |||
658 | return ret; | ||
659 | } | 615 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index 321b18b59135..60bfde75ce87 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -409,7 +409,7 @@ int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, | |||
409 | * Tell nic where to find circular buffer of Tx Frame Descriptors for | 409 | * Tell nic where to find circular buffer of Tx Frame Descriptors for |
410 | * given Tx queue, and enable the DMA channel used for that queue. | 410 | * given Tx queue, and enable the DMA channel used for that queue. |
411 | * | 411 | * |
412 | * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA | 412 | * supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA |
413 | * channels supported in hardware. | 413 | * channels supported in hardware. |
414 | */ | 414 | */ |
415 | int iwl_hw_tx_queue_init(struct iwl_priv *priv, | 415 | int iwl_hw_tx_queue_init(struct iwl_priv *priv, |
@@ -483,12 +483,14 @@ static void iwl_bg_bt_full_concurrency(struct work_struct *work) | |||
483 | container_of(work, struct iwl_priv, bt_full_concurrency); | 483 | container_of(work, struct iwl_priv, bt_full_concurrency); |
484 | struct iwl_rxon_context *ctx; | 484 | struct iwl_rxon_context *ctx; |
485 | 485 | ||
486 | mutex_lock(&priv->mutex); | ||
487 | |||
486 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | 488 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
487 | return; | 489 | goto out; |
488 | 490 | ||
489 | /* dont send host command if rf-kill is on */ | 491 | /* dont send host command if rf-kill is on */ |
490 | if (!iwl_is_ready_rf(priv)) | 492 | if (!iwl_is_ready_rf(priv)) |
491 | return; | 493 | goto out; |
492 | 494 | ||
493 | IWL_DEBUG_INFO(priv, "BT coex in %s mode\n", | 495 | IWL_DEBUG_INFO(priv, "BT coex in %s mode\n", |
494 | priv->bt_full_concurrent ? | 496 | priv->bt_full_concurrent ? |
@@ -498,15 +500,15 @@ static void iwl_bg_bt_full_concurrency(struct work_struct *work) | |||
498 | * LQ & RXON updated cmds must be sent before BT Config cmd | 500 | * LQ & RXON updated cmds must be sent before BT Config cmd |
499 | * to avoid 3-wire collisions | 501 | * to avoid 3-wire collisions |
500 | */ | 502 | */ |
501 | mutex_lock(&priv->mutex); | ||
502 | for_each_context(priv, ctx) { | 503 | for_each_context(priv, ctx) { |
503 | if (priv->cfg->ops->hcmd->set_rxon_chain) | 504 | if (priv->cfg->ops->hcmd->set_rxon_chain) |
504 | priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); | 505 | priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); |
505 | iwlcore_commit_rxon(priv, ctx); | 506 | iwlcore_commit_rxon(priv, ctx); |
506 | } | 507 | } |
507 | mutex_unlock(&priv->mutex); | ||
508 | 508 | ||
509 | priv->cfg->ops->hcmd->send_bt_config(priv); | 509 | priv->cfg->ops->hcmd->send_bt_config(priv); |
510 | out: | ||
511 | mutex_unlock(&priv->mutex); | ||
510 | } | 512 | } |
511 | 513 | ||
512 | /** | 514 | /** |
@@ -556,7 +558,7 @@ static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base, | |||
556 | } | 558 | } |
557 | 559 | ||
558 | /* Set starting address; reads will auto-increment */ | 560 | /* Set starting address; reads will auto-increment */ |
559 | _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr); | 561 | iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr); |
560 | rmb(); | 562 | rmb(); |
561 | 563 | ||
562 | /* | 564 | /* |
@@ -564,13 +566,13 @@ static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base, | |||
564 | * place event id # at far right for easier visual parsing. | 566 | * place event id # at far right for easier visual parsing. |
565 | */ | 567 | */ |
566 | for (i = 0; i < num_events; i++) { | 568 | for (i = 0; i < num_events; i++) { |
567 | ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | 569 | ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT); |
568 | time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | 570 | time = iwl_read32(priv, HBUS_TARG_MEM_RDAT); |
569 | if (mode == 0) { | 571 | if (mode == 0) { |
570 | trace_iwlwifi_dev_ucode_cont_event(priv, | 572 | trace_iwlwifi_dev_ucode_cont_event(priv, |
571 | 0, time, ev); | 573 | 0, time, ev); |
572 | } else { | 574 | } else { |
573 | data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | 575 | data = iwl_read32(priv, HBUS_TARG_MEM_RDAT); |
574 | trace_iwlwifi_dev_ucode_cont_event(priv, | 576 | trace_iwlwifi_dev_ucode_cont_event(priv, |
575 | time, data, ev); | 577 | time, data, ev); |
576 | } | 578 | } |
@@ -588,10 +590,7 @@ static void iwl_continuous_event_trace(struct iwl_priv *priv) | |||
588 | u32 num_wraps; /* # times uCode wrapped to top of log */ | 590 | u32 num_wraps; /* # times uCode wrapped to top of log */ |
589 | u32 next_entry; /* index of next entry to be written by uCode */ | 591 | u32 next_entry; /* index of next entry to be written by uCode */ |
590 | 592 | ||
591 | if (priv->ucode_type == UCODE_INIT) | 593 | base = priv->device_pointers.error_event_table; |
592 | base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr); | ||
593 | else | ||
594 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | ||
595 | if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { | 594 | if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
596 | capacity = iwl_read_targ_mem(priv, base); | 595 | capacity = iwl_read_targ_mem(priv, base); |
597 | num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); | 596 | num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); |
@@ -845,191 +844,6 @@ static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |||
845 | tasklet_kill(&priv->irq_tasklet); | 844 | tasklet_kill(&priv->irq_tasklet); |
846 | } | 845 | } |
847 | 846 | ||
848 | static void iwl_irq_tasklet_legacy(struct iwl_priv *priv) | ||
849 | { | ||
850 | u32 inta, handled = 0; | ||
851 | u32 inta_fh; | ||
852 | unsigned long flags; | ||
853 | u32 i; | ||
854 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
855 | u32 inta_mask; | ||
856 | #endif | ||
857 | |||
858 | spin_lock_irqsave(&priv->lock, flags); | ||
859 | |||
860 | /* Ack/clear/reset pending uCode interrupts. | ||
861 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | ||
862 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | ||
863 | inta = iwl_read32(priv, CSR_INT); | ||
864 | iwl_write32(priv, CSR_INT, inta); | ||
865 | |||
866 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | ||
867 | * Any new interrupts that happen after this, either while we're | ||
868 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | ||
869 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | ||
870 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | ||
871 | |||
872 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
873 | if (iwl_get_debug_level(priv) & IWL_DL_ISR) { | ||
874 | /* just for debug */ | ||
875 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | ||
876 | IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | ||
877 | inta, inta_mask, inta_fh); | ||
878 | } | ||
879 | #endif | ||
880 | |||
881 | spin_unlock_irqrestore(&priv->lock, flags); | ||
882 | |||
883 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | ||
884 | * atomic, make sure that inta covers all the interrupts that | ||
885 | * we've discovered, even if FH interrupt came in just after | ||
886 | * reading CSR_INT. */ | ||
887 | if (inta_fh & CSR49_FH_INT_RX_MASK) | ||
888 | inta |= CSR_INT_BIT_FH_RX; | ||
889 | if (inta_fh & CSR49_FH_INT_TX_MASK) | ||
890 | inta |= CSR_INT_BIT_FH_TX; | ||
891 | |||
892 | /* Now service all interrupt bits discovered above. */ | ||
893 | if (inta & CSR_INT_BIT_HW_ERR) { | ||
894 | IWL_ERR(priv, "Hardware error detected. Restarting.\n"); | ||
895 | |||
896 | /* Tell the device to stop sending interrupts */ | ||
897 | iwl_disable_interrupts(priv); | ||
898 | |||
899 | priv->isr_stats.hw++; | ||
900 | iwl_irq_handle_error(priv); | ||
901 | |||
902 | handled |= CSR_INT_BIT_HW_ERR; | ||
903 | |||
904 | return; | ||
905 | } | ||
906 | |||
907 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
908 | if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) { | ||
909 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ | ||
910 | if (inta & CSR_INT_BIT_SCD) { | ||
911 | IWL_DEBUG_ISR(priv, "Scheduler finished to transmit " | ||
912 | "the frame/frames.\n"); | ||
913 | priv->isr_stats.sch++; | ||
914 | } | ||
915 | |||
916 | /* Alive notification via Rx interrupt will do the real work */ | ||
917 | if (inta & CSR_INT_BIT_ALIVE) { | ||
918 | IWL_DEBUG_ISR(priv, "Alive interrupt\n"); | ||
919 | priv->isr_stats.alive++; | ||
920 | } | ||
921 | } | ||
922 | #endif | ||
923 | /* Safely ignore these bits for debug checks below */ | ||
924 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); | ||
925 | |||
926 | /* HW RF KILL switch toggled */ | ||
927 | if (inta & CSR_INT_BIT_RF_KILL) { | ||
928 | int hw_rf_kill = 0; | ||
929 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & | ||
930 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) | ||
931 | hw_rf_kill = 1; | ||
932 | |||
933 | IWL_WARN(priv, "RF_KILL bit toggled to %s.\n", | ||
934 | hw_rf_kill ? "disable radio" : "enable radio"); | ||
935 | |||
936 | priv->isr_stats.rfkill++; | ||
937 | |||
938 | /* driver only loads ucode once setting the interface up. | ||
939 | * the driver allows loading the ucode even if the radio | ||
940 | * is killed. Hence update the killswitch state here. The | ||
941 | * rfkill handler will care about restarting if needed. | ||
942 | */ | ||
943 | if (!test_bit(STATUS_ALIVE, &priv->status)) { | ||
944 | if (hw_rf_kill) | ||
945 | set_bit(STATUS_RF_KILL_HW, &priv->status); | ||
946 | else | ||
947 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | ||
948 | wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill); | ||
949 | } | ||
950 | |||
951 | handled |= CSR_INT_BIT_RF_KILL; | ||
952 | } | ||
953 | |||
954 | /* Chip got too hot and stopped itself */ | ||
955 | if (inta & CSR_INT_BIT_CT_KILL) { | ||
956 | IWL_ERR(priv, "Microcode CT kill error detected.\n"); | ||
957 | priv->isr_stats.ctkill++; | ||
958 | handled |= CSR_INT_BIT_CT_KILL; | ||
959 | } | ||
960 | |||
961 | /* Error detected by uCode */ | ||
962 | if (inta & CSR_INT_BIT_SW_ERR) { | ||
963 | IWL_ERR(priv, "Microcode SW error detected. " | ||
964 | " Restarting 0x%X.\n", inta); | ||
965 | priv->isr_stats.sw++; | ||
966 | iwl_irq_handle_error(priv); | ||
967 | handled |= CSR_INT_BIT_SW_ERR; | ||
968 | } | ||
969 | |||
970 | /* | ||
971 | * uCode wakes up after power-down sleep. | ||
972 | * Tell device about any new tx or host commands enqueued, | ||
973 | * and about any Rx buffers made available while asleep. | ||
974 | */ | ||
975 | if (inta & CSR_INT_BIT_WAKEUP) { | ||
976 | IWL_DEBUG_ISR(priv, "Wakeup interrupt\n"); | ||
977 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); | ||
978 | for (i = 0; i < priv->hw_params.max_txq_num; i++) | ||
979 | iwl_txq_update_write_ptr(priv, &priv->txq[i]); | ||
980 | priv->isr_stats.wakeup++; | ||
981 | handled |= CSR_INT_BIT_WAKEUP; | ||
982 | } | ||
983 | |||
984 | /* All uCode command responses, including Tx command responses, | ||
985 | * Rx "responses" (frame-received notification), and other | ||
986 | * notifications from uCode come through here*/ | ||
987 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | ||
988 | iwl_rx_handle(priv); | ||
989 | priv->isr_stats.rx++; | ||
990 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); | ||
991 | } | ||
992 | |||
993 | /* This "Tx" DMA channel is used only for loading uCode */ | ||
994 | if (inta & CSR_INT_BIT_FH_TX) { | ||
995 | IWL_DEBUG_ISR(priv, "uCode load interrupt\n"); | ||
996 | priv->isr_stats.tx++; | ||
997 | handled |= CSR_INT_BIT_FH_TX; | ||
998 | /* Wake up uCode load routine, now that load is complete */ | ||
999 | priv->ucode_write_complete = 1; | ||
1000 | wake_up_interruptible(&priv->wait_command_queue); | ||
1001 | } | ||
1002 | |||
1003 | if (inta & ~handled) { | ||
1004 | IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled); | ||
1005 | priv->isr_stats.unhandled++; | ||
1006 | } | ||
1007 | |||
1008 | if (inta & ~(priv->inta_mask)) { | ||
1009 | IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n", | ||
1010 | inta & ~priv->inta_mask); | ||
1011 | IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh); | ||
1012 | } | ||
1013 | |||
1014 | /* Re-enable all interrupts */ | ||
1015 | /* only Re-enable if disabled by irq */ | ||
1016 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | ||
1017 | iwl_enable_interrupts(priv); | ||
1018 | /* Re-enable RF_KILL if it occurred */ | ||
1019 | else if (handled & CSR_INT_BIT_RF_KILL) | ||
1020 | iwl_enable_rfkill_int(priv); | ||
1021 | |||
1022 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
1023 | if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) { | ||
1024 | inta = iwl_read32(priv, CSR_INT); | ||
1025 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | ||
1026 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | ||
1027 | IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " | ||
1028 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | ||
1029 | } | ||
1030 | #endif | ||
1031 | } | ||
1032 | |||
1033 | /* tasklet for iwlagn interrupt */ | 847 | /* tasklet for iwlagn interrupt */ |
1034 | static void iwl_irq_tasklet(struct iwl_priv *priv) | 848 | static void iwl_irq_tasklet(struct iwl_priv *priv) |
1035 | { | 849 | { |
@@ -1171,7 +985,7 @@ static void iwl_irq_tasklet(struct iwl_priv *priv) | |||
1171 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | 985 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { |
1172 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); | 986 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
1173 | iwl_write32(priv, CSR_FH_INT_STATUS, | 987 | iwl_write32(priv, CSR_FH_INT_STATUS, |
1174 | CSR49_FH_INT_RX_MASK); | 988 | CSR_FH_INT_RX_MASK); |
1175 | } | 989 | } |
1176 | if (inta & CSR_INT_BIT_RX_PERIODIC) { | 990 | if (inta & CSR_INT_BIT_RX_PERIODIC) { |
1177 | handled |= CSR_INT_BIT_RX_PERIODIC; | 991 | handled |= CSR_INT_BIT_RX_PERIODIC; |
@@ -1209,7 +1023,7 @@ static void iwl_irq_tasklet(struct iwl_priv *priv) | |||
1209 | 1023 | ||
1210 | /* This "Tx" DMA channel is used only for loading uCode */ | 1024 | /* This "Tx" DMA channel is used only for loading uCode */ |
1211 | if (inta & CSR_INT_BIT_FH_TX) { | 1025 | if (inta & CSR_INT_BIT_FH_TX) { |
1212 | iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK); | 1026 | iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK); |
1213 | IWL_DEBUG_ISR(priv, "uCode load interrupt\n"); | 1027 | IWL_DEBUG_ISR(priv, "uCode load interrupt\n"); |
1214 | priv->isr_stats.tx++; | 1028 | priv->isr_stats.tx++; |
1215 | handled |= CSR_INT_BIT_FH_TX; | 1029 | handled |= CSR_INT_BIT_FH_TX; |
@@ -1361,10 +1175,8 @@ static void iwl_dealloc_ucode_pci(struct iwl_priv *priv) | |||
1361 | { | 1175 | { |
1362 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); | 1176 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
1363 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | 1177 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); |
1364 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | ||
1365 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | 1178 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); |
1366 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | 1179 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
1367 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | ||
1368 | } | 1180 | } |
1369 | 1181 | ||
1370 | static void iwl_nic_start(struct iwl_priv *priv) | 1182 | static void iwl_nic_start(struct iwl_priv *priv) |
@@ -1376,7 +1188,7 @@ static void iwl_nic_start(struct iwl_priv *priv) | |||
1376 | struct iwlagn_ucode_capabilities { | 1188 | struct iwlagn_ucode_capabilities { |
1377 | u32 max_probe_length; | 1189 | u32 max_probe_length; |
1378 | u32 standard_phy_calibration_size; | 1190 | u32 standard_phy_calibration_size; |
1379 | bool pan; | 1191 | u32 flags; |
1380 | }; | 1192 | }; |
1381 | 1193 | ||
1382 | static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context); | 1194 | static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context); |
@@ -1422,8 +1234,8 @@ static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first) | |||
1422 | } | 1234 | } |
1423 | 1235 | ||
1424 | struct iwlagn_firmware_pieces { | 1236 | struct iwlagn_firmware_pieces { |
1425 | const void *inst, *data, *init, *init_data, *boot; | 1237 | const void *inst, *data, *init, *init_data; |
1426 | size_t inst_size, data_size, init_size, init_data_size, boot_size; | 1238 | size_t inst_size, data_size, init_size, init_data_size; |
1427 | 1239 | ||
1428 | u32 build; | 1240 | u32 build; |
1429 | 1241 | ||
@@ -1444,28 +1256,18 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv, | |||
1444 | 1256 | ||
1445 | switch (api_ver) { | 1257 | switch (api_ver) { |
1446 | default: | 1258 | default: |
1447 | /* | 1259 | hdr_size = 28; |
1448 | * 4965 doesn't revision the firmware file format | 1260 | if (ucode_raw->size < hdr_size) { |
1449 | * along with the API version, it always uses v1 | 1261 | IWL_ERR(priv, "File size too small!\n"); |
1450 | * file format. | 1262 | return -EINVAL; |
1451 | */ | ||
1452 | if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) != | ||
1453 | CSR_HW_REV_TYPE_4965) { | ||
1454 | hdr_size = 28; | ||
1455 | if (ucode_raw->size < hdr_size) { | ||
1456 | IWL_ERR(priv, "File size too small!\n"); | ||
1457 | return -EINVAL; | ||
1458 | } | ||
1459 | pieces->build = le32_to_cpu(ucode->u.v2.build); | ||
1460 | pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size); | ||
1461 | pieces->data_size = le32_to_cpu(ucode->u.v2.data_size); | ||
1462 | pieces->init_size = le32_to_cpu(ucode->u.v2.init_size); | ||
1463 | pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size); | ||
1464 | pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size); | ||
1465 | src = ucode->u.v2.data; | ||
1466 | break; | ||
1467 | } | 1263 | } |
1468 | /* fall through for 4965 */ | 1264 | pieces->build = le32_to_cpu(ucode->u.v2.build); |
1265 | pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size); | ||
1266 | pieces->data_size = le32_to_cpu(ucode->u.v2.data_size); | ||
1267 | pieces->init_size = le32_to_cpu(ucode->u.v2.init_size); | ||
1268 | pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size); | ||
1269 | src = ucode->u.v2.data; | ||
1270 | break; | ||
1469 | case 0: | 1271 | case 0: |
1470 | case 1: | 1272 | case 1: |
1471 | case 2: | 1273 | case 2: |
@@ -1479,7 +1281,6 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv, | |||
1479 | pieces->data_size = le32_to_cpu(ucode->u.v1.data_size); | 1281 | pieces->data_size = le32_to_cpu(ucode->u.v1.data_size); |
1480 | pieces->init_size = le32_to_cpu(ucode->u.v1.init_size); | 1282 | pieces->init_size = le32_to_cpu(ucode->u.v1.init_size); |
1481 | pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size); | 1283 | pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size); |
1482 | pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size); | ||
1483 | src = ucode->u.v1.data; | 1284 | src = ucode->u.v1.data; |
1484 | break; | 1285 | break; |
1485 | } | 1286 | } |
@@ -1487,7 +1288,7 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv, | |||
1487 | /* Verify size of file vs. image size info in file's header */ | 1288 | /* Verify size of file vs. image size info in file's header */ |
1488 | if (ucode_raw->size != hdr_size + pieces->inst_size + | 1289 | if (ucode_raw->size != hdr_size + pieces->inst_size + |
1489 | pieces->data_size + pieces->init_size + | 1290 | pieces->data_size + pieces->init_size + |
1490 | pieces->init_data_size + pieces->boot_size) { | 1291 | pieces->init_data_size) { |
1491 | 1292 | ||
1492 | IWL_ERR(priv, | 1293 | IWL_ERR(priv, |
1493 | "uCode file size %d does not match expected size\n", | 1294 | "uCode file size %d does not match expected size\n", |
@@ -1503,8 +1304,6 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv, | |||
1503 | src += pieces->init_size; | 1304 | src += pieces->init_size; |
1504 | pieces->init_data = src; | 1305 | pieces->init_data = src; |
1505 | src += pieces->init_data_size; | 1306 | src += pieces->init_data_size; |
1506 | pieces->boot = src; | ||
1507 | src += pieces->boot_size; | ||
1508 | 1307 | ||
1509 | return 0; | 1308 | return 0; |
1510 | } | 1309 | } |
@@ -1605,8 +1404,7 @@ static int iwlagn_load_firmware(struct iwl_priv *priv, | |||
1605 | pieces->init_data_size = tlv_len; | 1404 | pieces->init_data_size = tlv_len; |
1606 | break; | 1405 | break; |
1607 | case IWL_UCODE_TLV_BOOT: | 1406 | case IWL_UCODE_TLV_BOOT: |
1608 | pieces->boot = tlv_data; | 1407 | IWL_ERR(priv, "Found unexpected BOOT ucode\n"); |
1609 | pieces->boot_size = tlv_len; | ||
1610 | break; | 1408 | break; |
1611 | case IWL_UCODE_TLV_PROBE_MAX_LEN: | 1409 | case IWL_UCODE_TLV_PROBE_MAX_LEN: |
1612 | if (tlv_len != sizeof(u32)) | 1410 | if (tlv_len != sizeof(u32)) |
@@ -1617,7 +1415,23 @@ static int iwlagn_load_firmware(struct iwl_priv *priv, | |||
1617 | case IWL_UCODE_TLV_PAN: | 1415 | case IWL_UCODE_TLV_PAN: |
1618 | if (tlv_len) | 1416 | if (tlv_len) |
1619 | goto invalid_tlv_len; | 1417 | goto invalid_tlv_len; |
1620 | capa->pan = true; | 1418 | capa->flags |= IWL_UCODE_TLV_FLAGS_PAN; |
1419 | break; | ||
1420 | case IWL_UCODE_TLV_FLAGS: | ||
1421 | /* must be at least one u32 */ | ||
1422 | if (tlv_len < sizeof(u32)) | ||
1423 | goto invalid_tlv_len; | ||
1424 | /* and a proper number of u32s */ | ||
1425 | if (tlv_len % sizeof(u32)) | ||
1426 | goto invalid_tlv_len; | ||
1427 | /* | ||
1428 | * This driver only reads the first u32 as | ||
1429 | * right now no more features are defined, | ||
1430 | * if that changes then either the driver | ||
1431 | * will not work with the new firmware, or | ||
1432 | * it'll not take advantage of new features. | ||
1433 | */ | ||
1434 | capa->flags = le32_to_cpup((__le32 *)tlv_data); | ||
1621 | break; | 1435 | break; |
1622 | case IWL_UCODE_TLV_INIT_EVTLOG_PTR: | 1436 | case IWL_UCODE_TLV_INIT_EVTLOG_PTR: |
1623 | if (tlv_len != sizeof(u32)) | 1437 | if (tlv_len != sizeof(u32)) |
@@ -1806,8 +1620,6 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
1806 | pieces.init_size); | 1620 | pieces.init_size); |
1807 | IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n", | 1621 | IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n", |
1808 | pieces.init_data_size); | 1622 | pieces.init_data_size); |
1809 | IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n", | ||
1810 | pieces.boot_size); | ||
1811 | 1623 | ||
1812 | /* Verify that uCode images will fit in card's SRAM */ | 1624 | /* Verify that uCode images will fit in card's SRAM */ |
1813 | if (pieces.inst_size > priv->hw_params.max_inst_size) { | 1625 | if (pieces.inst_size > priv->hw_params.max_inst_size) { |
@@ -1834,12 +1646,6 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
1834 | goto try_again; | 1646 | goto try_again; |
1835 | } | 1647 | } |
1836 | 1648 | ||
1837 | if (pieces.boot_size > priv->hw_params.max_bsm_size) { | ||
1838 | IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n", | ||
1839 | pieces.boot_size); | ||
1840 | goto try_again; | ||
1841 | } | ||
1842 | |||
1843 | /* Allocate ucode buffers for card's bus-master loading ... */ | 1649 | /* Allocate ucode buffers for card's bus-master loading ... */ |
1844 | 1650 | ||
1845 | /* Runtime instructions and 2 copies of data: | 1651 | /* Runtime instructions and 2 copies of data: |
@@ -1851,11 +1657,7 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
1851 | priv->ucode_data.len = pieces.data_size; | 1657 | priv->ucode_data.len = pieces.data_size; |
1852 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); | 1658 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
1853 | 1659 | ||
1854 | priv->ucode_data_backup.len = pieces.data_size; | 1660 | if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr) |
1855 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | ||
1856 | |||
1857 | if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr || | ||
1858 | !priv->ucode_data_backup.v_addr) | ||
1859 | goto err_pci_alloc; | 1661 | goto err_pci_alloc; |
1860 | 1662 | ||
1861 | /* Initialization instructions and data */ | 1663 | /* Initialization instructions and data */ |
@@ -1870,15 +1672,6 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
1870 | goto err_pci_alloc; | 1672 | goto err_pci_alloc; |
1871 | } | 1673 | } |
1872 | 1674 | ||
1873 | /* Bootstrap (instructions only, no data) */ | ||
1874 | if (pieces.boot_size) { | ||
1875 | priv->ucode_boot.len = pieces.boot_size; | ||
1876 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); | ||
1877 | |||
1878 | if (!priv->ucode_boot.v_addr) | ||
1879 | goto err_pci_alloc; | ||
1880 | } | ||
1881 | |||
1882 | /* Now that we can no longer fail, copy information */ | 1675 | /* Now that we can no longer fail, copy information */ |
1883 | 1676 | ||
1884 | /* | 1677 | /* |
@@ -1901,12 +1694,21 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
1901 | priv->cfg->base_params->max_event_log_size; | 1694 | priv->cfg->base_params->max_event_log_size; |
1902 | priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr; | 1695 | priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr; |
1903 | 1696 | ||
1904 | if (ucode_capa.pan) { | 1697 | if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN) { |
1905 | priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN); | 1698 | priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN); |
1906 | priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN; | 1699 | priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN; |
1907 | } else | 1700 | } else |
1908 | priv->sta_key_max_num = STA_KEY_MAX_NUM; | 1701 | priv->sta_key_max_num = STA_KEY_MAX_NUM; |
1909 | 1702 | ||
1703 | if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS)) | ||
1704 | priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM; | ||
1705 | else | ||
1706 | priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM; | ||
1707 | |||
1708 | if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_BTSTATS || | ||
1709 | (priv->cfg->bt_params && priv->cfg->bt_params->bt_statistics)) | ||
1710 | priv->bt_statistics = true; | ||
1711 | |||
1910 | /* Copy images into buffers for card's bus-master reads ... */ | 1712 | /* Copy images into buffers for card's bus-master reads ... */ |
1911 | 1713 | ||
1912 | /* Runtime instructions (first block of data in file) */ | 1714 | /* Runtime instructions (first block of data in file) */ |
@@ -1924,7 +1726,6 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
1924 | IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", | 1726 | IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", |
1925 | pieces.data_size); | 1727 | pieces.data_size); |
1926 | memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size); | 1728 | memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size); |
1927 | memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size); | ||
1928 | 1729 | ||
1929 | /* Initialization instructions */ | 1730 | /* Initialization instructions */ |
1930 | if (pieces.init_size) { | 1731 | if (pieces.init_size) { |
@@ -1941,11 +1742,6 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
1941 | pieces.init_data_size); | 1742 | pieces.init_data_size); |
1942 | } | 1743 | } |
1943 | 1744 | ||
1944 | /* Bootstrap instructions */ | ||
1945 | IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", | ||
1946 | pieces.boot_size); | ||
1947 | memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size); | ||
1948 | |||
1949 | /* | 1745 | /* |
1950 | * figure out the offset of chain noise reset and gain commands | 1746 | * figure out the offset of chain noise reset and gain commands |
1951 | * base on the size of standard phy calibration commands table size | 1747 | * base on the size of standard phy calibration commands table size |
@@ -2077,12 +1873,11 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv) | |||
2077 | u32 blink1, blink2, ilink1, ilink2; | 1873 | u32 blink1, blink2, ilink1, ilink2; |
2078 | u32 pc, hcmd; | 1874 | u32 pc, hcmd; |
2079 | 1875 | ||
1876 | base = priv->device_pointers.error_event_table; | ||
2080 | if (priv->ucode_type == UCODE_INIT) { | 1877 | if (priv->ucode_type == UCODE_INIT) { |
2081 | base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr); | ||
2082 | if (!base) | 1878 | if (!base) |
2083 | base = priv->_agn.init_errlog_ptr; | 1879 | base = priv->_agn.init_errlog_ptr; |
2084 | } else { | 1880 | } else { |
2085 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); | ||
2086 | if (!base) | 1881 | if (!base) |
2087 | base = priv->_agn.inst_errlog_ptr; | 1882 | base = priv->_agn.inst_errlog_ptr; |
2088 | } | 1883 | } |
@@ -2147,12 +1942,11 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx, | |||
2147 | if (num_events == 0) | 1942 | if (num_events == 0) |
2148 | return pos; | 1943 | return pos; |
2149 | 1944 | ||
1945 | base = priv->device_pointers.log_event_table; | ||
2150 | if (priv->ucode_type == UCODE_INIT) { | 1946 | if (priv->ucode_type == UCODE_INIT) { |
2151 | base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); | ||
2152 | if (!base) | 1947 | if (!base) |
2153 | base = priv->_agn.init_evtlog_ptr; | 1948 | base = priv->_agn.init_evtlog_ptr; |
2154 | } else { | 1949 | } else { |
2155 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | ||
2156 | if (!base) | 1950 | if (!base) |
2157 | base = priv->_agn.inst_evtlog_ptr; | 1951 | base = priv->_agn.inst_evtlog_ptr; |
2158 | } | 1952 | } |
@@ -2169,14 +1963,14 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx, | |||
2169 | iwl_grab_nic_access(priv); | 1963 | iwl_grab_nic_access(priv); |
2170 | 1964 | ||
2171 | /* Set starting address; reads will auto-increment */ | 1965 | /* Set starting address; reads will auto-increment */ |
2172 | _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr); | 1966 | iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr); |
2173 | rmb(); | 1967 | rmb(); |
2174 | 1968 | ||
2175 | /* "time" is actually "data" for mode 0 (no timestamp). | 1969 | /* "time" is actually "data" for mode 0 (no timestamp). |
2176 | * place event id # at far right for easier visual parsing. */ | 1970 | * place event id # at far right for easier visual parsing. */ |
2177 | for (i = 0; i < num_events; i++) { | 1971 | for (i = 0; i < num_events; i++) { |
2178 | ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | 1972 | ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT); |
2179 | time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | 1973 | time = iwl_read32(priv, HBUS_TARG_MEM_RDAT); |
2180 | if (mode == 0) { | 1974 | if (mode == 0) { |
2181 | /* data, ev */ | 1975 | /* data, ev */ |
2182 | if (bufsz) { | 1976 | if (bufsz) { |
@@ -2190,7 +1984,7 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx, | |||
2190 | time, ev); | 1984 | time, ev); |
2191 | } | 1985 | } |
2192 | } else { | 1986 | } else { |
2193 | data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | 1987 | data = iwl_read32(priv, HBUS_TARG_MEM_RDAT); |
2194 | if (bufsz) { | 1988 | if (bufsz) { |
2195 | pos += scnprintf(*buf + pos, bufsz - pos, | 1989 | pos += scnprintf(*buf + pos, bufsz - pos, |
2196 | "EVT_LOGT:%010u:0x%08x:%04u\n", | 1990 | "EVT_LOGT:%010u:0x%08x:%04u\n", |
@@ -2261,13 +2055,12 @@ int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log, | |||
2261 | int pos = 0; | 2055 | int pos = 0; |
2262 | size_t bufsz = 0; | 2056 | size_t bufsz = 0; |
2263 | 2057 | ||
2058 | base = priv->device_pointers.log_event_table; | ||
2264 | if (priv->ucode_type == UCODE_INIT) { | 2059 | if (priv->ucode_type == UCODE_INIT) { |
2265 | base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); | ||
2266 | logsize = priv->_agn.init_evtlog_size; | 2060 | logsize = priv->_agn.init_evtlog_size; |
2267 | if (!base) | 2061 | if (!base) |
2268 | base = priv->_agn.init_evtlog_ptr; | 2062 | base = priv->_agn.init_evtlog_ptr; |
2269 | } else { | 2063 | } else { |
2270 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | ||
2271 | logsize = priv->_agn.inst_evtlog_size; | 2064 | logsize = priv->_agn.inst_evtlog_size; |
2272 | if (!base) | 2065 | if (!base) |
2273 | base = priv->_agn.inst_evtlog_ptr; | 2066 | base = priv->_agn.inst_evtlog_ptr; |
@@ -2433,14 +2226,14 @@ static void iwl_alive_start(struct iwl_priv *priv) | |||
2433 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | 2226 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. |
2434 | * This is a paranoid check, because we would not have gotten the | 2227 | * This is a paranoid check, because we would not have gotten the |
2435 | * "runtime" alive if code weren't properly loaded. */ | 2228 | * "runtime" alive if code weren't properly loaded. */ |
2436 | if (iwl_verify_ucode(priv)) { | 2229 | if (iwl_verify_ucode(priv, &priv->ucode_code)) { |
2437 | /* Runtime instruction load was bad; | 2230 | /* Runtime instruction load was bad; |
2438 | * take it all the way back down so we can try again */ | 2231 | * take it all the way back down so we can try again */ |
2439 | IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n"); | 2232 | IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n"); |
2440 | goto restart; | 2233 | goto restart; |
2441 | } | 2234 | } |
2442 | 2235 | ||
2443 | ret = priv->cfg->ops->lib->alive_notify(priv); | 2236 | ret = iwlagn_alive_notify(priv); |
2444 | if (ret) { | 2237 | if (ret) { |
2445 | IWL_WARN(priv, | 2238 | IWL_WARN(priv, |
2446 | "Could not complete ALIVE transition [ntf]: %d\n", ret); | 2239 | "Could not complete ALIVE transition [ntf]: %d\n", ret); |
@@ -2537,7 +2330,7 @@ static void iwl_cancel_deferred_work(struct iwl_priv *priv); | |||
2537 | static void __iwl_down(struct iwl_priv *priv) | 2330 | static void __iwl_down(struct iwl_priv *priv) |
2538 | { | 2331 | { |
2539 | unsigned long flags; | 2332 | unsigned long flags; |
2540 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | 2333 | int exit_pending; |
2541 | 2334 | ||
2542 | IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n"); | 2335 | IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n"); |
2543 | 2336 | ||
@@ -2563,9 +2356,6 @@ static void __iwl_down(struct iwl_priv *priv) | |||
2563 | priv->bt_full_concurrent = false; | 2356 | priv->bt_full_concurrent = false; |
2564 | priv->bt_ci_compliance = 0; | 2357 | priv->bt_ci_compliance = 0; |
2565 | 2358 | ||
2566 | /* Unblock any waiting calls */ | ||
2567 | wake_up_interruptible_all(&priv->wait_command_queue); | ||
2568 | |||
2569 | /* Wipe out the EXIT_PENDING status bit if we are not actually | 2359 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
2570 | * exiting the module */ | 2360 | * exiting the module */ |
2571 | if (!exit_pending) | 2361 | if (!exit_pending) |
@@ -2607,8 +2397,7 @@ static void __iwl_down(struct iwl_priv *priv) | |||
2607 | STATUS_EXIT_PENDING; | 2397 | STATUS_EXIT_PENDING; |
2608 | 2398 | ||
2609 | /* device going down, Stop using ICT table */ | 2399 | /* device going down, Stop using ICT table */ |
2610 | if (priv->cfg->ops->lib->isr_ops.disable) | 2400 | iwl_disable_ict(priv); |
2611 | priv->cfg->ops->lib->isr_ops.disable(priv); | ||
2612 | 2401 | ||
2613 | iwlagn_txq_ctx_stop(priv); | 2402 | iwlagn_txq_ctx_stop(priv); |
2614 | iwlagn_rxq_stop(priv); | 2403 | iwlagn_rxq_stop(priv); |
@@ -2624,8 +2413,6 @@ static void __iwl_down(struct iwl_priv *priv) | |||
2624 | iwl_apm_stop(priv); | 2413 | iwl_apm_stop(priv); |
2625 | 2414 | ||
2626 | exit: | 2415 | exit: |
2627 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); | ||
2628 | |||
2629 | dev_kfree_skb(priv->beacon_skb); | 2416 | dev_kfree_skb(priv->beacon_skb); |
2630 | priv->beacon_skb = NULL; | 2417 | priv->beacon_skb = NULL; |
2631 | 2418 | ||
@@ -2704,11 +2491,6 @@ static int __iwl_up(struct iwl_priv *priv) | |||
2704 | return -EIO; | 2491 | return -EIO; |
2705 | } | 2492 | } |
2706 | 2493 | ||
2707 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { | ||
2708 | IWL_ERR(priv, "ucode not available for device bringup\n"); | ||
2709 | return -EIO; | ||
2710 | } | ||
2711 | |||
2712 | for_each_context(priv, ctx) { | 2494 | for_each_context(priv, ctx) { |
2713 | ret = iwlagn_alloc_bcast_station(priv, ctx); | 2495 | ret = iwlagn_alloc_bcast_station(priv, ctx); |
2714 | if (ret) { | 2496 | if (ret) { |
@@ -2740,12 +2522,6 @@ static int __iwl_up(struct iwl_priv *priv) | |||
2740 | 2522 | ||
2741 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); | 2523 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
2742 | 2524 | ||
2743 | /* must be initialised before iwl_hw_nic_init */ | ||
2744 | if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS)) | ||
2745 | priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM; | ||
2746 | else | ||
2747 | priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM; | ||
2748 | |||
2749 | ret = iwlagn_hw_nic_init(priv); | 2525 | ret = iwlagn_hw_nic_init(priv); |
2750 | if (ret) { | 2526 | if (ret) { |
2751 | IWL_ERR(priv, "Unable to init nic\n"); | 2527 | IWL_ERR(priv, "Unable to init nic\n"); |
@@ -2765,18 +2541,12 @@ static int __iwl_up(struct iwl_priv *priv) | |||
2765 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | 2541 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2766 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | 2542 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2767 | 2543 | ||
2768 | /* Copy original ucode data image from disk into backup cache. | ||
2769 | * This will be used to initialize the on-board processor's | ||
2770 | * data SRAM for a clean start when the runtime program first loads. */ | ||
2771 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | ||
2772 | priv->ucode_data.len); | ||
2773 | |||
2774 | for (i = 0; i < MAX_HW_RESTARTS; i++) { | 2544 | for (i = 0; i < MAX_HW_RESTARTS; i++) { |
2775 | 2545 | ||
2776 | /* load bootstrap state machine, | 2546 | /* load bootstrap state machine, |
2777 | * load bootstrap program into processor's memory, | 2547 | * load bootstrap program into processor's memory, |
2778 | * prepare to load the "initialize" uCode */ | 2548 | * prepare to load the "initialize" uCode */ |
2779 | ret = priv->cfg->ops->lib->load_ucode(priv); | 2549 | ret = iwlagn_load_ucode(priv); |
2780 | 2550 | ||
2781 | if (ret) { | 2551 | if (ret) { |
2782 | IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n", | 2552 | IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n", |
@@ -2814,11 +2584,14 @@ static void iwl_bg_init_alive_start(struct work_struct *data) | |||
2814 | struct iwl_priv *priv = | 2584 | struct iwl_priv *priv = |
2815 | container_of(data, struct iwl_priv, init_alive_start.work); | 2585 | container_of(data, struct iwl_priv, init_alive_start.work); |
2816 | 2586 | ||
2817 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | 2587 | mutex_lock(&priv->mutex); |
2588 | |||
2589 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | ||
2590 | mutex_unlock(&priv->mutex); | ||
2818 | return; | 2591 | return; |
2592 | } | ||
2819 | 2593 | ||
2820 | mutex_lock(&priv->mutex); | 2594 | iwlagn_init_alive_start(priv); |
2821 | priv->cfg->ops->lib->init_alive_start(priv); | ||
2822 | mutex_unlock(&priv->mutex); | 2595 | mutex_unlock(&priv->mutex); |
2823 | } | 2596 | } |
2824 | 2597 | ||
@@ -2827,15 +2600,15 @@ static void iwl_bg_alive_start(struct work_struct *data) | |||
2827 | struct iwl_priv *priv = | 2600 | struct iwl_priv *priv = |
2828 | container_of(data, struct iwl_priv, alive_start.work); | 2601 | container_of(data, struct iwl_priv, alive_start.work); |
2829 | 2602 | ||
2603 | mutex_lock(&priv->mutex); | ||
2830 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | 2604 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
2831 | return; | 2605 | goto unlock; |
2832 | 2606 | ||
2833 | /* enable dram interrupt */ | 2607 | /* enable dram interrupt */ |
2834 | if (priv->cfg->ops->lib->isr_ops.reset) | 2608 | iwl_reset_ict(priv); |
2835 | priv->cfg->ops->lib->isr_ops.reset(priv); | ||
2836 | 2609 | ||
2837 | mutex_lock(&priv->mutex); | ||
2838 | iwl_alive_start(priv); | 2610 | iwl_alive_start(priv); |
2611 | unlock: | ||
2839 | mutex_unlock(&priv->mutex); | 2612 | mutex_unlock(&priv->mutex); |
2840 | } | 2613 | } |
2841 | 2614 | ||
@@ -3063,6 +2836,9 @@ static int iwl_mac_setup_register(struct iwl_priv *priv, | |||
3063 | hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS | | 2836 | hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS | |
3064 | IEEE80211_HW_SUPPORTS_STATIC_SMPS; | 2837 | IEEE80211_HW_SUPPORTS_STATIC_SMPS; |
3065 | 2838 | ||
2839 | if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP) | ||
2840 | hw->flags |= IEEE80211_HW_MFP_CAPABLE; | ||
2841 | |||
3066 | hw->sta_data_size = sizeof(struct iwl_station_priv); | 2842 | hw->sta_data_size = sizeof(struct iwl_station_priv); |
3067 | hw->vif_data_size = sizeof(struct iwl_vif_priv); | 2843 | hw->vif_data_size = sizeof(struct iwl_vif_priv); |
3068 | 2844 | ||
@@ -3112,7 +2888,7 @@ static int iwl_mac_setup_register(struct iwl_priv *priv, | |||
3112 | } | 2888 | } |
3113 | 2889 | ||
3114 | 2890 | ||
3115 | int iwlagn_mac_start(struct ieee80211_hw *hw) | 2891 | static int iwlagn_mac_start(struct ieee80211_hw *hw) |
3116 | { | 2892 | { |
3117 | struct iwl_priv *priv = hw->priv; | 2893 | struct iwl_priv *priv = hw->priv; |
3118 | int ret; | 2894 | int ret; |
@@ -3153,7 +2929,7 @@ out: | |||
3153 | return 0; | 2929 | return 0; |
3154 | } | 2930 | } |
3155 | 2931 | ||
3156 | void iwlagn_mac_stop(struct ieee80211_hw *hw) | 2932 | static void iwlagn_mac_stop(struct ieee80211_hw *hw) |
3157 | { | 2933 | { |
3158 | struct iwl_priv *priv = hw->priv; | 2934 | struct iwl_priv *priv = hw->priv; |
3159 | 2935 | ||
@@ -3176,7 +2952,7 @@ void iwlagn_mac_stop(struct ieee80211_hw *hw) | |||
3176 | IWL_DEBUG_MAC80211(priv, "leave\n"); | 2952 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
3177 | } | 2953 | } |
3178 | 2954 | ||
3179 | void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | 2955 | static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
3180 | { | 2956 | { |
3181 | struct iwl_priv *priv = hw->priv; | 2957 | struct iwl_priv *priv = hw->priv; |
3182 | 2958 | ||
@@ -3191,11 +2967,11 @@ void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
3191 | IWL_DEBUG_MACDUMP(priv, "leave\n"); | 2967 | IWL_DEBUG_MACDUMP(priv, "leave\n"); |
3192 | } | 2968 | } |
3193 | 2969 | ||
3194 | void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw, | 2970 | static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw, |
3195 | struct ieee80211_vif *vif, | 2971 | struct ieee80211_vif *vif, |
3196 | struct ieee80211_key_conf *keyconf, | 2972 | struct ieee80211_key_conf *keyconf, |
3197 | struct ieee80211_sta *sta, | 2973 | struct ieee80211_sta *sta, |
3198 | u32 iv32, u16 *phase1key) | 2974 | u32 iv32, u16 *phase1key) |
3199 | { | 2975 | { |
3200 | struct iwl_priv *priv = hw->priv; | 2976 | struct iwl_priv *priv = hw->priv; |
3201 | struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; | 2977 | struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; |
@@ -3208,9 +2984,10 @@ void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw, | |||
3208 | IWL_DEBUG_MAC80211(priv, "leave\n"); | 2984 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
3209 | } | 2985 | } |
3210 | 2986 | ||
3211 | int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | 2987 | static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
3212 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, | 2988 | struct ieee80211_vif *vif, |
3213 | struct ieee80211_key_conf *key) | 2989 | struct ieee80211_sta *sta, |
2990 | struct ieee80211_key_conf *key) | ||
3214 | { | 2991 | { |
3215 | struct iwl_priv *priv = hw->priv; | 2992 | struct iwl_priv *priv = hw->priv; |
3216 | struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; | 2993 | struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; |
@@ -3285,11 +3062,11 @@ int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
3285 | return ret; | 3062 | return ret; |
3286 | } | 3063 | } |
3287 | 3064 | ||
3288 | int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw, | 3065 | static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw, |
3289 | struct ieee80211_vif *vif, | 3066 | struct ieee80211_vif *vif, |
3290 | enum ieee80211_ampdu_mlme_action action, | 3067 | enum ieee80211_ampdu_mlme_action action, |
3291 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, | 3068 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, |
3292 | u8 buf_size) | 3069 | u8 buf_size) |
3293 | { | 3070 | { |
3294 | struct iwl_priv *priv = hw->priv; | 3071 | struct iwl_priv *priv = hw->priv; |
3295 | int ret = -EINVAL; | 3072 | int ret = -EINVAL; |
@@ -3348,6 +3125,10 @@ int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw, | |||
3348 | } | 3125 | } |
3349 | break; | 3126 | break; |
3350 | case IEEE80211_AMPDU_TX_OPERATIONAL: | 3127 | case IEEE80211_AMPDU_TX_OPERATIONAL: |
3128 | buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF); | ||
3129 | |||
3130 | iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size); | ||
3131 | |||
3351 | /* | 3132 | /* |
3352 | * If the limit is 0, then it wasn't initialised yet, | 3133 | * If the limit is 0, then it wasn't initialised yet, |
3353 | * use the default. We can do that since we take the | 3134 | * use the default. We can do that since we take the |
@@ -3392,9 +3173,9 @@ int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw, | |||
3392 | return ret; | 3173 | return ret; |
3393 | } | 3174 | } |
3394 | 3175 | ||
3395 | int iwlagn_mac_sta_add(struct ieee80211_hw *hw, | 3176 | static int iwlagn_mac_sta_add(struct ieee80211_hw *hw, |
3396 | struct ieee80211_vif *vif, | 3177 | struct ieee80211_vif *vif, |
3397 | struct ieee80211_sta *sta) | 3178 | struct ieee80211_sta *sta) |
3398 | { | 3179 | { |
3399 | struct iwl_priv *priv = hw->priv; | 3180 | struct iwl_priv *priv = hw->priv; |
3400 | struct iwl_station_priv *sta_priv = (void *)sta->drv_priv; | 3181 | struct iwl_station_priv *sta_priv = (void *)sta->drv_priv; |
@@ -3435,8 +3216,8 @@ int iwlagn_mac_sta_add(struct ieee80211_hw *hw, | |||
3435 | return 0; | 3216 | return 0; |
3436 | } | 3217 | } |
3437 | 3218 | ||
3438 | void iwlagn_mac_channel_switch(struct ieee80211_hw *hw, | 3219 | static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw, |
3439 | struct ieee80211_channel_switch *ch_switch) | 3220 | struct ieee80211_channel_switch *ch_switch) |
3440 | { | 3221 | { |
3441 | struct iwl_priv *priv = hw->priv; | 3222 | struct iwl_priv *priv = hw->priv; |
3442 | const struct iwl_channel_info *ch_info; | 3223 | const struct iwl_channel_info *ch_info; |
@@ -3457,21 +3238,22 @@ void iwlagn_mac_channel_switch(struct ieee80211_hw *hw, | |||
3457 | 3238 | ||
3458 | IWL_DEBUG_MAC80211(priv, "enter\n"); | 3239 | IWL_DEBUG_MAC80211(priv, "enter\n"); |
3459 | 3240 | ||
3241 | mutex_lock(&priv->mutex); | ||
3242 | |||
3460 | if (iwl_is_rfkill(priv)) | 3243 | if (iwl_is_rfkill(priv)) |
3461 | goto out_exit; | 3244 | goto out; |
3462 | 3245 | ||
3463 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || | 3246 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || |
3464 | test_bit(STATUS_SCANNING, &priv->status)) | 3247 | test_bit(STATUS_SCANNING, &priv->status)) |
3465 | goto out_exit; | 3248 | goto out; |
3466 | 3249 | ||
3467 | if (!iwl_is_associated_ctx(ctx)) | 3250 | if (!iwl_is_associated_ctx(ctx)) |
3468 | goto out_exit; | 3251 | goto out; |
3469 | 3252 | ||
3470 | /* channel switch in progress */ | 3253 | /* channel switch in progress */ |
3471 | if (priv->switch_rxon.switch_in_progress == true) | 3254 | if (priv->switch_rxon.switch_in_progress == true) |
3472 | goto out_exit; | 3255 | goto out; |
3473 | 3256 | ||
3474 | mutex_lock(&priv->mutex); | ||
3475 | if (priv->cfg->ops->lib->set_channel_switch) { | 3257 | if (priv->cfg->ops->lib->set_channel_switch) { |
3476 | 3258 | ||
3477 | ch = channel->hw_value; | 3259 | ch = channel->hw_value; |
@@ -3527,16 +3309,15 @@ void iwlagn_mac_channel_switch(struct ieee80211_hw *hw, | |||
3527 | } | 3309 | } |
3528 | out: | 3310 | out: |
3529 | mutex_unlock(&priv->mutex); | 3311 | mutex_unlock(&priv->mutex); |
3530 | out_exit: | ||
3531 | if (!priv->switch_rxon.switch_in_progress) | 3312 | if (!priv->switch_rxon.switch_in_progress) |
3532 | ieee80211_chswitch_done(ctx->vif, false); | 3313 | ieee80211_chswitch_done(ctx->vif, false); |
3533 | IWL_DEBUG_MAC80211(priv, "leave\n"); | 3314 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
3534 | } | 3315 | } |
3535 | 3316 | ||
3536 | void iwlagn_configure_filter(struct ieee80211_hw *hw, | 3317 | static void iwlagn_configure_filter(struct ieee80211_hw *hw, |
3537 | unsigned int changed_flags, | 3318 | unsigned int changed_flags, |
3538 | unsigned int *total_flags, | 3319 | unsigned int *total_flags, |
3539 | u64 multicast) | 3320 | u64 multicast) |
3540 | { | 3321 | { |
3541 | struct iwl_priv *priv = hw->priv; | 3322 | struct iwl_priv *priv = hw->priv; |
3542 | __le32 filter_or = 0, filter_nand = 0; | 3323 | __le32 filter_or = 0, filter_nand = 0; |
@@ -3583,7 +3364,7 @@ void iwlagn_configure_filter(struct ieee80211_hw *hw, | |||
3583 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | 3364 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; |
3584 | } | 3365 | } |
3585 | 3366 | ||
3586 | void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop) | 3367 | static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop) |
3587 | { | 3368 | { |
3588 | struct iwl_priv *priv = hw->priv; | 3369 | struct iwl_priv *priv = hw->priv; |
3589 | 3370 | ||
@@ -3750,12 +3531,8 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv) | |||
3750 | priv->watchdog.data = (unsigned long)priv; | 3531 | priv->watchdog.data = (unsigned long)priv; |
3751 | priv->watchdog.function = iwl_bg_watchdog; | 3532 | priv->watchdog.function = iwl_bg_watchdog; |
3752 | 3533 | ||
3753 | if (!priv->cfg->base_params->use_isr_legacy) | 3534 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) |
3754 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | 3535 | iwl_irq_tasklet, (unsigned long)priv); |
3755 | iwl_irq_tasklet, (unsigned long)priv); | ||
3756 | else | ||
3757 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | ||
3758 | iwl_irq_tasklet_legacy, (unsigned long)priv); | ||
3759 | } | 3536 | } |
3760 | 3537 | ||
3761 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) | 3538 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) |
@@ -3808,7 +3585,6 @@ static int iwl_init_drv(struct iwl_priv *priv) | |||
3808 | INIT_LIST_HEAD(&priv->free_frames); | 3585 | INIT_LIST_HEAD(&priv->free_frames); |
3809 | 3586 | ||
3810 | mutex_init(&priv->mutex); | 3587 | mutex_init(&priv->mutex); |
3811 | mutex_init(&priv->sync_cmd_mutex); | ||
3812 | 3588 | ||
3813 | priv->ieee_channels = NULL; | 3589 | priv->ieee_channels = NULL; |
3814 | priv->ieee_rates = NULL; | 3590 | priv->ieee_rates = NULL; |
@@ -3907,12 +3683,13 @@ struct ieee80211_ops iwlagn_hw_ops = { | |||
3907 | .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait, | 3683 | .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait, |
3908 | }; | 3684 | }; |
3909 | 3685 | ||
3910 | static void iwl_hw_detect(struct iwl_priv *priv) | 3686 | static u32 iwl_hw_detect(struct iwl_priv *priv) |
3911 | { | 3687 | { |
3912 | priv->hw_rev = _iwl_read32(priv, CSR_HW_REV); | 3688 | u8 rev_id; |
3913 | priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG); | 3689 | |
3914 | priv->rev_id = priv->pci_dev->revision; | 3690 | pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id); |
3915 | IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id); | 3691 | IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id); |
3692 | return iwl_read32(priv, CSR_HW_REV); | ||
3916 | } | 3693 | } |
3917 | 3694 | ||
3918 | static int iwl_set_hw_params(struct iwl_priv *priv) | 3695 | static int iwl_set_hw_params(struct iwl_priv *priv) |
@@ -3963,19 +3740,12 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3963 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); | 3740 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
3964 | unsigned long flags; | 3741 | unsigned long flags; |
3965 | u16 pci_cmd, num_mac; | 3742 | u16 pci_cmd, num_mac; |
3743 | u32 hw_rev; | ||
3966 | 3744 | ||
3967 | /************************ | 3745 | /************************ |
3968 | * 1. Allocating HW data | 3746 | * 1. Allocating HW data |
3969 | ************************/ | 3747 | ************************/ |
3970 | 3748 | ||
3971 | /* Disabling hardware scan means that mac80211 will perform scans | ||
3972 | * "the hard way", rather than using device's scan. */ | ||
3973 | if (cfg->mod_params->disable_hw_scan) { | ||
3974 | dev_printk(KERN_DEBUG, &(pdev->dev), | ||
3975 | "sw scan support is deprecated\n"); | ||
3976 | iwlagn_hw_ops.hw_scan = NULL; | ||
3977 | } | ||
3978 | |||
3979 | hw = iwl_alloc_all(cfg); | 3749 | hw = iwl_alloc_all(cfg); |
3980 | if (!hw) { | 3750 | if (!hw) { |
3981 | err = -ENOMEM; | 3751 | err = -ENOMEM; |
@@ -4116,9 +3886,9 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
4116 | */ | 3886 | */ |
4117 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); | 3887 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
4118 | 3888 | ||
4119 | iwl_hw_detect(priv); | 3889 | hw_rev = iwl_hw_detect(priv); |
4120 | IWL_INFO(priv, "Detected %s, REV=0x%X\n", | 3890 | IWL_INFO(priv, "Detected %s, REV=0x%X\n", |
4121 | priv->cfg->name, priv->hw_rev); | 3891 | priv->cfg->name, hw_rev); |
4122 | 3892 | ||
4123 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | 3893 | /* We disable the RETRY_TIMEOUT register (0x41) to keep |
4124 | * PCI Tx retries from interfering with C3 CPU state */ | 3894 | * PCI Tx retries from interfering with C3 CPU state */ |
@@ -4134,7 +3904,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
4134 | * 4. Read EEPROM | 3904 | * 4. Read EEPROM |
4135 | *****************/ | 3905 | *****************/ |
4136 | /* Read the EEPROM */ | 3906 | /* Read the EEPROM */ |
4137 | err = iwl_eeprom_init(priv); | 3907 | err = iwl_eeprom_init(priv, hw_rev); |
4138 | if (err) { | 3908 | if (err) { |
4139 | IWL_ERR(priv, "Unable to init EEPROM\n"); | 3909 | IWL_ERR(priv, "Unable to init EEPROM\n"); |
4140 | goto out_iounmap; | 3910 | goto out_iounmap; |
@@ -4186,10 +3956,9 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
4186 | 3956 | ||
4187 | pci_enable_msi(priv->pci_dev); | 3957 | pci_enable_msi(priv->pci_dev); |
4188 | 3958 | ||
4189 | if (priv->cfg->ops->lib->isr_ops.alloc) | 3959 | iwl_alloc_isr_ict(priv); |
4190 | priv->cfg->ops->lib->isr_ops.alloc(priv); | ||
4191 | 3960 | ||
4192 | err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr_ops.isr, | 3961 | err = request_irq(priv->pci_dev->irq, iwl_isr_ict, |
4193 | IRQF_SHARED, DRV_NAME, priv); | 3962 | IRQF_SHARED, DRV_NAME, priv); |
4194 | if (err) { | 3963 | if (err) { |
4195 | IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq); | 3964 | IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq); |
@@ -4236,8 +4005,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
4236 | destroy_workqueue(priv->workqueue); | 4005 | destroy_workqueue(priv->workqueue); |
4237 | priv->workqueue = NULL; | 4006 | priv->workqueue = NULL; |
4238 | free_irq(priv->pci_dev->irq, priv); | 4007 | free_irq(priv->pci_dev->irq, priv); |
4239 | if (priv->cfg->ops->lib->isr_ops.free) | 4008 | iwl_free_isr_ict(priv); |
4240 | priv->cfg->ops->lib->isr_ops.free(priv); | ||
4241 | out_disable_msi: | 4009 | out_disable_msi: |
4242 | pci_disable_msi(priv->pci_dev); | 4010 | pci_disable_msi(priv->pci_dev); |
4243 | iwl_uninit_drv(priv); | 4011 | iwl_uninit_drv(priv); |
@@ -4335,8 +4103,7 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev) | |||
4335 | 4103 | ||
4336 | iwl_uninit_drv(priv); | 4104 | iwl_uninit_drv(priv); |
4337 | 4105 | ||
4338 | if (priv->cfg->ops->lib->isr_ops.free) | 4106 | iwl_free_isr_ict(priv); |
4339 | priv->cfg->ops->lib->isr_ops.free(priv); | ||
4340 | 4107 | ||
4341 | dev_kfree_skb(priv->beacon_skb); | 4108 | dev_kfree_skb(priv->beacon_skb); |
4342 | 4109 | ||
@@ -4585,43 +4352,21 @@ module_exit(iwl_exit); | |||
4585 | module_init(iwl_init); | 4352 | module_init(iwl_init); |
4586 | 4353 | ||
4587 | #ifdef CONFIG_IWLWIFI_DEBUG | 4354 | #ifdef CONFIG_IWLWIFI_DEBUG |
4588 | module_param_named(debug50, iwl_debug_level, uint, S_IRUGO); | ||
4589 | MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)"); | ||
4590 | module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR); | 4355 | module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR); |
4591 | MODULE_PARM_DESC(debug, "debug output mask"); | 4356 | MODULE_PARM_DESC(debug, "debug output mask"); |
4592 | #endif | 4357 | #endif |
4593 | 4358 | ||
4594 | module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO); | ||
4595 | MODULE_PARM_DESC(swcrypto50, | ||
4596 | "using crypto in software (default 0 [hardware]) (deprecated)"); | ||
4597 | module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO); | 4359 | module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO); |
4598 | MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])"); | 4360 | MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])"); |
4599 | module_param_named(queues_num50, | ||
4600 | iwlagn_mod_params.num_of_queues, int, S_IRUGO); | ||
4601 | MODULE_PARM_DESC(queues_num50, | ||
4602 | "number of hw queues in 50xx series (deprecated)"); | ||
4603 | module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO); | 4361 | module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO); |
4604 | MODULE_PARM_DESC(queues_num, "number of hw queues."); | 4362 | MODULE_PARM_DESC(queues_num, "number of hw queues."); |
4605 | module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO); | ||
4606 | MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)"); | ||
4607 | module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO); | 4363 | module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO); |
4608 | MODULE_PARM_DESC(11n_disable, "disable 11n functionality"); | 4364 | MODULE_PARM_DESC(11n_disable, "disable 11n functionality"); |
4609 | module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K, | ||
4610 | int, S_IRUGO); | ||
4611 | MODULE_PARM_DESC(amsdu_size_8K50, | ||
4612 | "enable 8K amsdu size in 50XX series (deprecated)"); | ||
4613 | module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K, | 4365 | module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K, |
4614 | int, S_IRUGO); | 4366 | int, S_IRUGO); |
4615 | MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); | 4367 | MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); |
4616 | module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO); | ||
4617 | MODULE_PARM_DESC(fw_restart50, | ||
4618 | "restart firmware in case of error (deprecated)"); | ||
4619 | module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO); | 4368 | module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO); |
4620 | MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); | 4369 | MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); |
4621 | module_param_named( | ||
4622 | disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO); | ||
4623 | MODULE_PARM_DESC(disable_hw_scan, | ||
4624 | "disable hardware scanning (default 0) (deprecated)"); | ||
4625 | 4370 | ||
4626 | module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int, | 4371 | module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int, |
4627 | S_IRUGO); | 4372 | S_IRUGO); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.h b/drivers/net/wireless/iwlwifi/iwl-agn.h index 20f8e4188994..016b79e4421e 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.h +++ b/drivers/net/wireless/iwlwifi/iwl-agn.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -66,7 +66,6 @@ | |||
66 | #include "iwl-dev.h" | 66 | #include "iwl-dev.h" |
67 | 67 | ||
68 | /* configuration for the _agn devices */ | 68 | /* configuration for the _agn devices */ |
69 | extern struct iwl_cfg iwl4965_agn_cfg; | ||
70 | extern struct iwl_cfg iwl5300_agn_cfg; | 69 | extern struct iwl_cfg iwl5300_agn_cfg; |
71 | extern struct iwl_cfg iwl5100_agn_cfg; | 70 | extern struct iwl_cfg iwl5100_agn_cfg; |
72 | extern struct iwl_cfg iwl5350_agn_cfg; | 71 | extern struct iwl_cfg iwl5350_agn_cfg; |
@@ -114,7 +113,6 @@ extern struct iwl_hcmd_ops iwlagn_bt_hcmd; | |||
114 | extern struct iwl_hcmd_utils_ops iwlagn_hcmd_utils; | 113 | extern struct iwl_hcmd_utils_ops iwlagn_hcmd_utils; |
115 | 114 | ||
116 | extern struct ieee80211_ops iwlagn_hw_ops; | 115 | extern struct ieee80211_ops iwlagn_hw_ops; |
117 | extern struct ieee80211_ops iwl4965_hw_ops; | ||
118 | 116 | ||
119 | int iwl_reset_ict(struct iwl_priv *priv); | 117 | int iwl_reset_ict(struct iwl_priv *priv); |
120 | void iwl_disable_ict(struct iwl_priv *priv); | 118 | void iwl_disable_ict(struct iwl_priv *priv); |
@@ -133,10 +131,6 @@ void iwlagn_txq_update_byte_cnt_tbl(struct iwl_priv *priv, | |||
133 | u16 byte_cnt); | 131 | u16 byte_cnt); |
134 | void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_priv *priv, | 132 | void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_priv *priv, |
135 | struct iwl_tx_queue *txq); | 133 | struct iwl_tx_queue *txq); |
136 | int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, | ||
137 | int tx_fifo, int sta_id, int tid, u16 ssn_idx); | ||
138 | int iwlagn_txq_agg_disable(struct iwl_priv *priv, u16 txq_id, | ||
139 | u16 ssn_idx, u8 tx_fifo); | ||
140 | void iwlagn_txq_set_sched(struct iwl_priv *priv, u32 mask); | 134 | void iwlagn_txq_set_sched(struct iwl_priv *priv, u32 mask); |
141 | void iwl_free_tfds_in_queue(struct iwl_priv *priv, | 135 | void iwl_free_tfds_in_queue(struct iwl_priv *priv, |
142 | int sta_id, int tid, int freed); | 136 | int sta_id, int tid, int freed); |
@@ -158,7 +152,7 @@ void iwlagn_rx_calib_complete(struct iwl_priv *priv, | |||
158 | struct iwl_rx_mem_buffer *rxb); | 152 | struct iwl_rx_mem_buffer *rxb); |
159 | void iwlagn_init_alive_start(struct iwl_priv *priv); | 153 | void iwlagn_init_alive_start(struct iwl_priv *priv); |
160 | int iwlagn_alive_notify(struct iwl_priv *priv); | 154 | int iwlagn_alive_notify(struct iwl_priv *priv); |
161 | int iwl_verify_ucode(struct iwl_priv *priv); | 155 | int iwl_verify_ucode(struct iwl_priv *priv, struct fw_desc *fw_desc); |
162 | void iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type); | 156 | void iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type); |
163 | void iwlagn_send_prio_tbl(struct iwl_priv *priv); | 157 | void iwlagn_send_prio_tbl(struct iwl_priv *priv); |
164 | 158 | ||
@@ -206,6 +200,9 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif, | |||
206 | struct ieee80211_sta *sta, u16 tid, u16 *ssn); | 200 | struct ieee80211_sta *sta, u16 tid, u16 *ssn); |
207 | int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif, | 201 | int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif, |
208 | struct ieee80211_sta *sta, u16 tid); | 202 | struct ieee80211_sta *sta, u16 tid); |
203 | void iwlagn_txq_agg_queue_setup(struct iwl_priv *priv, | ||
204 | struct ieee80211_sta *sta, | ||
205 | int tid, int frame_limit); | ||
209 | int iwlagn_txq_check_empty(struct iwl_priv *priv, | 206 | int iwlagn_txq_check_empty(struct iwl_priv *priv, |
210 | int sta_id, u8 tid, int txq_id); | 207 | int sta_id, u8 tid, int txq_id); |
211 | void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv, | 208 | void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv, |
@@ -311,7 +308,7 @@ static inline u32 iwl_ant_idx_to_flags(u8 ant_idx) | |||
311 | 308 | ||
312 | static inline u8 iwl_hw_get_rate(__le32 rate_n_flags) | 309 | static inline u8 iwl_hw_get_rate(__le32 rate_n_flags) |
313 | { | 310 | { |
314 | return le32_to_cpu(rate_n_flags) & 0xFF; | 311 | return le32_to_cpu(rate_n_flags) & RATE_MCS_RATE_MSK; |
315 | } | 312 | } |
316 | 313 | ||
317 | static inline __le32 iwl_hw_set_rate_n_flags(u8 rate, u32 flags) | 314 | static inline __le32 iwl_hw_set_rate_n_flags(u8 rate, u32 flags) |
@@ -340,32 +337,4 @@ void __releases(wait_entry) | |||
340 | iwlagn_remove_notification(struct iwl_priv *priv, | 337 | iwlagn_remove_notification(struct iwl_priv *priv, |
341 | struct iwl_notification_wait *wait_entry); | 338 | struct iwl_notification_wait *wait_entry); |
342 | 339 | ||
343 | /* mac80211 handlers (for 4965) */ | ||
344 | void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb); | ||
345 | int iwlagn_mac_start(struct ieee80211_hw *hw); | ||
346 | void iwlagn_mac_stop(struct ieee80211_hw *hw); | ||
347 | void iwlagn_configure_filter(struct ieee80211_hw *hw, | ||
348 | unsigned int changed_flags, | ||
349 | unsigned int *total_flags, | ||
350 | u64 multicast); | ||
351 | int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | ||
352 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, | ||
353 | struct ieee80211_key_conf *key); | ||
354 | void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw, | ||
355 | struct ieee80211_vif *vif, | ||
356 | struct ieee80211_key_conf *keyconf, | ||
357 | struct ieee80211_sta *sta, | ||
358 | u32 iv32, u16 *phase1key); | ||
359 | int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw, | ||
360 | struct ieee80211_vif *vif, | ||
361 | enum ieee80211_ampdu_mlme_action action, | ||
362 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, | ||
363 | u8 buf_size); | ||
364 | int iwlagn_mac_sta_add(struct ieee80211_hw *hw, | ||
365 | struct ieee80211_vif *vif, | ||
366 | struct ieee80211_sta *sta); | ||
367 | void iwlagn_mac_channel_switch(struct ieee80211_hw *hw, | ||
368 | struct ieee80211_channel_switch *ch_switch); | ||
369 | void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop); | ||
370 | |||
371 | #endif /* __iwl_agn_h__ */ | 340 | #endif /* __iwl_agn_h__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h index ca42ffa63ed7..a1a5c1b23096 100644 --- a/drivers/net/wireless/iwlwifi/iwl-commands.h +++ b/drivers/net/wireless/iwlwifi/iwl-commands.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -103,9 +103,7 @@ enum { | |||
103 | REPLY_WEPKEY = 0x20, | 103 | REPLY_WEPKEY = 0x20, |
104 | 104 | ||
105 | /* RX, TX, LEDs */ | 105 | /* RX, TX, LEDs */ |
106 | REPLY_3945_RX = 0x1b, /* 3945 only */ | ||
107 | REPLY_TX = 0x1c, | 106 | REPLY_TX = 0x1c, |
108 | REPLY_RATE_SCALE = 0x47, /* 3945 only */ | ||
109 | REPLY_LEDS_CMD = 0x48, | 107 | REPLY_LEDS_CMD = 0x48, |
110 | REPLY_TX_LINK_QUALITY_CMD = 0x4e, /* for 4965 and up */ | 108 | REPLY_TX_LINK_QUALITY_CMD = 0x4e, /* for 4965 and up */ |
111 | 109 | ||
@@ -229,7 +227,7 @@ struct iwl_cmd_header { | |||
229 | * There is one exception: uCode sets bit 15 when it originates | 227 | * There is one exception: uCode sets bit 15 when it originates |
230 | * the response/notification, i.e. when the response/notification | 228 | * the response/notification, i.e. when the response/notification |
231 | * is not a direct response to a command sent by the driver. For | 229 | * is not a direct response to a command sent by the driver. For |
232 | * example, uCode issues REPLY_3945_RX when it sends a received frame | 230 | * example, uCode issues REPLY_RX when it sends a received frame |
233 | * to the driver; it is not a direct response to any driver command. | 231 | * to the driver; it is not a direct response to any driver command. |
234 | * | 232 | * |
235 | * The Linux driver uses the following format: | 233 | * The Linux driver uses the following format: |
@@ -249,36 +247,6 @@ struct iwl_cmd_header { | |||
249 | 247 | ||
250 | 248 | ||
251 | /** | 249 | /** |
252 | * struct iwl3945_tx_power | ||
253 | * | ||
254 | * Used in REPLY_TX_PWR_TABLE_CMD, REPLY_SCAN_CMD, REPLY_CHANNEL_SWITCH | ||
255 | * | ||
256 | * Each entry contains two values: | ||
257 | * 1) DSP gain (or sometimes called DSP attenuation). This is a fine-grained | ||
258 | * linear value that multiplies the output of the digital signal processor, | ||
259 | * before being sent to the analog radio. | ||
260 | * 2) Radio gain. This sets the analog gain of the radio Tx path. | ||
261 | * It is a coarser setting, and behaves in a logarithmic (dB) fashion. | ||
262 | * | ||
263 | * Driver obtains values from struct iwl3945_tx_power power_gain_table[][]. | ||
264 | */ | ||
265 | struct iwl3945_tx_power { | ||
266 | u8 tx_gain; /* gain for analog radio */ | ||
267 | u8 dsp_atten; /* gain for DSP */ | ||
268 | } __packed; | ||
269 | |||
270 | /** | ||
271 | * struct iwl3945_power_per_rate | ||
272 | * | ||
273 | * Used in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH | ||
274 | */ | ||
275 | struct iwl3945_power_per_rate { | ||
276 | u8 rate; /* plcp */ | ||
277 | struct iwl3945_tx_power tpc; | ||
278 | u8 reserved; | ||
279 | } __packed; | ||
280 | |||
281 | /** | ||
282 | * iwlagn rate_n_flags bit fields | 250 | * iwlagn rate_n_flags bit fields |
283 | * | 251 | * |
284 | * rate_n_flags format is used in following iwlagn commands: | 252 | * rate_n_flags format is used in following iwlagn commands: |
@@ -324,6 +292,8 @@ struct iwl3945_power_per_rate { | |||
324 | #define RATE_MCS_SPATIAL_MSK 0x18 | 292 | #define RATE_MCS_SPATIAL_MSK 0x18 |
325 | #define RATE_MCS_HT_DUP_POS 5 | 293 | #define RATE_MCS_HT_DUP_POS 5 |
326 | #define RATE_MCS_HT_DUP_MSK 0x20 | 294 | #define RATE_MCS_HT_DUP_MSK 0x20 |
295 | /* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */ | ||
296 | #define RATE_MCS_RATE_MSK 0xff | ||
327 | 297 | ||
328 | /* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */ | 298 | /* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */ |
329 | #define RATE_MCS_FLAGS_POS 8 | 299 | #define RATE_MCS_FLAGS_POS 8 |
@@ -375,30 +345,6 @@ struct iwl3945_power_per_rate { | |||
375 | #define IWL_PWR_CCK_ENTRIES 2 | 345 | #define IWL_PWR_CCK_ENTRIES 2 |
376 | 346 | ||
377 | /** | 347 | /** |
378 | * union iwl4965_tx_power_dual_stream | ||
379 | * | ||
380 | * Host format used for REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH | ||
381 | * Use __le32 version (struct tx_power_dual_stream) when building command. | ||
382 | * | ||
383 | * Driver provides radio gain and DSP attenuation settings to device in pairs, | ||
384 | * one value for each transmitter chain. The first value is for transmitter A, | ||
385 | * second for transmitter B. | ||
386 | * | ||
387 | * For SISO bit rates, both values in a pair should be identical. | ||
388 | * For MIMO rates, one value may be different from the other, | ||
389 | * in order to balance the Tx output between the two transmitters. | ||
390 | * | ||
391 | * See more details in doc for TXPOWER in iwl-4965-hw.h. | ||
392 | */ | ||
393 | union iwl4965_tx_power_dual_stream { | ||
394 | struct { | ||
395 | u8 radio_tx_gain[2]; | ||
396 | u8 dsp_predis_atten[2]; | ||
397 | } s; | ||
398 | u32 dw; | ||
399 | }; | ||
400 | |||
401 | /** | ||
402 | * struct tx_power_dual_stream | 348 | * struct tx_power_dual_stream |
403 | * | 349 | * |
404 | * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH | 350 | * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH |
@@ -410,15 +356,6 @@ struct tx_power_dual_stream { | |||
410 | } __packed; | 356 | } __packed; |
411 | 357 | ||
412 | /** | 358 | /** |
413 | * struct iwl4965_tx_power_db | ||
414 | * | ||
415 | * Entire table within REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH | ||
416 | */ | ||
417 | struct iwl4965_tx_power_db { | ||
418 | struct tx_power_dual_stream power_tbl[POWER_TABLE_NUM_ENTRIES]; | ||
419 | } __packed; | ||
420 | |||
421 | /** | ||
422 | * Command REPLY_TX_POWER_DBM_CMD = 0x98 | 359 | * Command REPLY_TX_POWER_DBM_CMD = 0x98 |
423 | * struct iwlagn_tx_power_dbm_cmd | 360 | * struct iwlagn_tx_power_dbm_cmd |
424 | */ | 361 | */ |
@@ -451,54 +388,6 @@ struct iwl_tx_ant_config_cmd { | |||
451 | #define UCODE_VALID_OK cpu_to_le32(0x1) | 388 | #define UCODE_VALID_OK cpu_to_le32(0x1) |
452 | #define INITIALIZE_SUBTYPE (9) | 389 | #define INITIALIZE_SUBTYPE (9) |
453 | 390 | ||
454 | /* | ||
455 | * ("Initialize") REPLY_ALIVE = 0x1 (response only, not a command) | ||
456 | * | ||
457 | * uCode issues this "initialize alive" notification once the initialization | ||
458 | * uCode image has completed its work, and is ready to load the runtime image. | ||
459 | * This is the *first* "alive" notification that the driver will receive after | ||
460 | * rebooting uCode; the "initialize" alive is indicated by subtype field == 9. | ||
461 | * | ||
462 | * See comments documenting "BSM" (bootstrap state machine). | ||
463 | * | ||
464 | * For 4965, this notification contains important calibration data for | ||
465 | * calculating txpower settings: | ||
466 | * | ||
467 | * 1) Power supply voltage indication. The voltage sensor outputs higher | ||
468 | * values for lower voltage, and vice verse. | ||
469 | * | ||
470 | * 2) Temperature measurement parameters, for each of two channel widths | ||
471 | * (20 MHz and 40 MHz) supported by the radios. Temperature sensing | ||
472 | * is done via one of the receiver chains, and channel width influences | ||
473 | * the results. | ||
474 | * | ||
475 | * 3) Tx gain compensation to balance 4965's 2 Tx chains for MIMO operation, | ||
476 | * for each of 5 frequency ranges. | ||
477 | */ | ||
478 | struct iwl_init_alive_resp { | ||
479 | u8 ucode_minor; | ||
480 | u8 ucode_major; | ||
481 | __le16 reserved1; | ||
482 | u8 sw_rev[8]; | ||
483 | u8 ver_type; | ||
484 | u8 ver_subtype; /* "9" for initialize alive */ | ||
485 | __le16 reserved2; | ||
486 | __le32 log_event_table_ptr; | ||
487 | __le32 error_event_table_ptr; | ||
488 | __le32 timestamp; | ||
489 | __le32 is_valid; | ||
490 | |||
491 | /* calibration values from "initialize" uCode */ | ||
492 | __le32 voltage; /* signed, higher value is lower voltage */ | ||
493 | __le32 therm_r1[2]; /* signed, 1st for normal, 2nd for HT40 */ | ||
494 | __le32 therm_r2[2]; /* signed */ | ||
495 | __le32 therm_r3[2]; /* signed */ | ||
496 | __le32 therm_r4[2]; /* signed */ | ||
497 | __le32 tx_atten[5][2]; /* signed MIMO gain comp, 5 freq groups, | ||
498 | * 2 Tx chains */ | ||
499 | } __packed; | ||
500 | |||
501 | |||
502 | /** | 391 | /** |
503 | * REPLY_ALIVE = 0x1 (response only, not a command) | 392 | * REPLY_ALIVE = 0x1 (response only, not a command) |
504 | * | 393 | * |
@@ -722,46 +611,6 @@ enum { | |||
722 | * regardless of whether RXON_FILTER_ASSOC_MSK is set. | 611 | * regardless of whether RXON_FILTER_ASSOC_MSK is set. |
723 | */ | 612 | */ |
724 | 613 | ||
725 | struct iwl3945_rxon_cmd { | ||
726 | u8 node_addr[6]; | ||
727 | __le16 reserved1; | ||
728 | u8 bssid_addr[6]; | ||
729 | __le16 reserved2; | ||
730 | u8 wlap_bssid_addr[6]; | ||
731 | __le16 reserved3; | ||
732 | u8 dev_type; | ||
733 | u8 air_propagation; | ||
734 | __le16 reserved4; | ||
735 | u8 ofdm_basic_rates; | ||
736 | u8 cck_basic_rates; | ||
737 | __le16 assoc_id; | ||
738 | __le32 flags; | ||
739 | __le32 filter_flags; | ||
740 | __le16 channel; | ||
741 | __le16 reserved5; | ||
742 | } __packed; | ||
743 | |||
744 | struct iwl4965_rxon_cmd { | ||
745 | u8 node_addr[6]; | ||
746 | __le16 reserved1; | ||
747 | u8 bssid_addr[6]; | ||
748 | __le16 reserved2; | ||
749 | u8 wlap_bssid_addr[6]; | ||
750 | __le16 reserved3; | ||
751 | u8 dev_type; | ||
752 | u8 air_propagation; | ||
753 | __le16 rx_chain; | ||
754 | u8 ofdm_basic_rates; | ||
755 | u8 cck_basic_rates; | ||
756 | __le16 assoc_id; | ||
757 | __le32 flags; | ||
758 | __le32 filter_flags; | ||
759 | __le16 channel; | ||
760 | u8 ofdm_ht_single_stream_basic_rates; | ||
761 | u8 ofdm_ht_dual_stream_basic_rates; | ||
762 | } __packed; | ||
763 | |||
764 | /* 5000 HW just extend this command */ | ||
765 | struct iwl_rxon_cmd { | 614 | struct iwl_rxon_cmd { |
766 | u8 node_addr[6]; | 615 | u8 node_addr[6]; |
767 | __le16 reserved1; | 616 | __le16 reserved1; |
@@ -789,25 +638,6 @@ struct iwl_rxon_cmd { | |||
789 | /* | 638 | /* |
790 | * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) | 639 | * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response) |
791 | */ | 640 | */ |
792 | struct iwl3945_rxon_assoc_cmd { | ||
793 | __le32 flags; | ||
794 | __le32 filter_flags; | ||
795 | u8 ofdm_basic_rates; | ||
796 | u8 cck_basic_rates; | ||
797 | __le16 reserved; | ||
798 | } __packed; | ||
799 | |||
800 | struct iwl4965_rxon_assoc_cmd { | ||
801 | __le32 flags; | ||
802 | __le32 filter_flags; | ||
803 | u8 ofdm_basic_rates; | ||
804 | u8 cck_basic_rates; | ||
805 | u8 ofdm_ht_single_stream_basic_rates; | ||
806 | u8 ofdm_ht_dual_stream_basic_rates; | ||
807 | __le16 rx_chain_select_flags; | ||
808 | __le16 reserved; | ||
809 | } __packed; | ||
810 | |||
811 | struct iwl5000_rxon_assoc_cmd { | 641 | struct iwl5000_rxon_assoc_cmd { |
812 | __le32 flags; | 642 | __le32 flags; |
813 | __le32 filter_flags; | 643 | __le32 filter_flags; |
@@ -843,26 +673,6 @@ struct iwl_rxon_time_cmd { | |||
843 | /* | 673 | /* |
844 | * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) | 674 | * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response) |
845 | */ | 675 | */ |
846 | struct iwl3945_channel_switch_cmd { | ||
847 | u8 band; | ||
848 | u8 expect_beacon; | ||
849 | __le16 channel; | ||
850 | __le32 rxon_flags; | ||
851 | __le32 rxon_filter_flags; | ||
852 | __le32 switch_time; | ||
853 | struct iwl3945_power_per_rate power[IWL_MAX_RATES]; | ||
854 | } __packed; | ||
855 | |||
856 | struct iwl4965_channel_switch_cmd { | ||
857 | u8 band; | ||
858 | u8 expect_beacon; | ||
859 | __le16 channel; | ||
860 | __le32 rxon_flags; | ||
861 | __le32 rxon_filter_flags; | ||
862 | __le32 switch_time; | ||
863 | struct iwl4965_tx_power_db tx_power; | ||
864 | } __packed; | ||
865 | |||
866 | /** | 676 | /** |
867 | * struct iwl5000_channel_switch_cmd | 677 | * struct iwl5000_channel_switch_cmd |
868 | * @band: 0- 5.2GHz, 1- 2.4GHz | 678 | * @band: 0- 5.2GHz, 1- 2.4GHz |
@@ -976,15 +786,10 @@ struct iwl_qosparam_cmd { | |||
976 | #define IWL_AP_ID 0 | 786 | #define IWL_AP_ID 0 |
977 | #define IWL_AP_ID_PAN 1 | 787 | #define IWL_AP_ID_PAN 1 |
978 | #define IWL_STA_ID 2 | 788 | #define IWL_STA_ID 2 |
979 | #define IWL3945_BROADCAST_ID 24 | ||
980 | #define IWL3945_STATION_COUNT 25 | ||
981 | #define IWL4965_BROADCAST_ID 31 | ||
982 | #define IWL4965_STATION_COUNT 32 | ||
983 | #define IWLAGN_PAN_BCAST_ID 14 | 789 | #define IWLAGN_PAN_BCAST_ID 14 |
984 | #define IWLAGN_BROADCAST_ID 15 | 790 | #define IWLAGN_BROADCAST_ID 15 |
985 | #define IWLAGN_STATION_COUNT 16 | 791 | #define IWLAGN_STATION_COUNT 16 |
986 | 792 | ||
987 | #define IWL_STATION_COUNT 32 /* MAX(3945,4965)*/ | ||
988 | #define IWL_INVALID_STATION 255 | 793 | #define IWL_INVALID_STATION 255 |
989 | 794 | ||
990 | #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2) | 795 | #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2) |
@@ -1032,16 +837,6 @@ struct iwl_qosparam_cmd { | |||
1032 | * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */ | 837 | * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */ |
1033 | #define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid)) | 838 | #define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid)) |
1034 | 839 | ||
1035 | struct iwl4965_keyinfo { | ||
1036 | __le16 key_flags; | ||
1037 | u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */ | ||
1038 | u8 reserved1; | ||
1039 | __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */ | ||
1040 | u8 key_offset; | ||
1041 | u8 reserved2; | ||
1042 | u8 key[16]; /* 16-byte unicast decryption key */ | ||
1043 | } __packed; | ||
1044 | |||
1045 | /* agn */ | 840 | /* agn */ |
1046 | struct iwl_keyinfo { | 841 | struct iwl_keyinfo { |
1047 | __le16 key_flags; | 842 | __le16 key_flags; |
@@ -1083,7 +878,6 @@ struct sta_id_modify { | |||
1083 | * with info on security keys, aggregation parameters, and Tx rates for | 878 | * with info on security keys, aggregation parameters, and Tx rates for |
1084 | * initial Tx attempt and any retries (agn devices uses | 879 | * initial Tx attempt and any retries (agn devices uses |
1085 | * REPLY_TX_LINK_QUALITY_CMD, | 880 | * REPLY_TX_LINK_QUALITY_CMD, |
1086 | * 3945 uses REPLY_RATE_SCALE to set up rate tables). | ||
1087 | * | 881 | * |
1088 | * REPLY_ADD_STA sets up the table entry for one station, either creating | 882 | * REPLY_ADD_STA sets up the table entry for one station, either creating |
1089 | * a new entry, or modifying a pre-existing one. | 883 | * a new entry, or modifying a pre-existing one. |
@@ -1103,72 +897,6 @@ struct sta_id_modify { | |||
1103 | * entries for all STAs in network, starting with index IWL_STA_ID. | 897 | * entries for all STAs in network, starting with index IWL_STA_ID. |
1104 | */ | 898 | */ |
1105 | 899 | ||
1106 | struct iwl3945_addsta_cmd { | ||
1107 | u8 mode; /* 1: modify existing, 0: add new station */ | ||
1108 | u8 reserved[3]; | ||
1109 | struct sta_id_modify sta; | ||
1110 | struct iwl4965_keyinfo key; | ||
1111 | __le32 station_flags; /* STA_FLG_* */ | ||
1112 | __le32 station_flags_msk; /* STA_FLG_* */ | ||
1113 | |||
1114 | /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) | ||
1115 | * corresponding to bit (e.g. bit 5 controls TID 5). | ||
1116 | * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ | ||
1117 | __le16 tid_disable_tx; | ||
1118 | |||
1119 | __le16 rate_n_flags; | ||
1120 | |||
1121 | /* TID for which to add block-ack support. | ||
1122 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | ||
1123 | u8 add_immediate_ba_tid; | ||
1124 | |||
1125 | /* TID for which to remove block-ack support. | ||
1126 | * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */ | ||
1127 | u8 remove_immediate_ba_tid; | ||
1128 | |||
1129 | /* Starting Sequence Number for added block-ack support. | ||
1130 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | ||
1131 | __le16 add_immediate_ba_ssn; | ||
1132 | } __packed; | ||
1133 | |||
1134 | struct iwl4965_addsta_cmd { | ||
1135 | u8 mode; /* 1: modify existing, 0: add new station */ | ||
1136 | u8 reserved[3]; | ||
1137 | struct sta_id_modify sta; | ||
1138 | struct iwl4965_keyinfo key; | ||
1139 | __le32 station_flags; /* STA_FLG_* */ | ||
1140 | __le32 station_flags_msk; /* STA_FLG_* */ | ||
1141 | |||
1142 | /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) | ||
1143 | * corresponding to bit (e.g. bit 5 controls TID 5). | ||
1144 | * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ | ||
1145 | __le16 tid_disable_tx; | ||
1146 | |||
1147 | __le16 reserved1; | ||
1148 | |||
1149 | /* TID for which to add block-ack support. | ||
1150 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | ||
1151 | u8 add_immediate_ba_tid; | ||
1152 | |||
1153 | /* TID for which to remove block-ack support. | ||
1154 | * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */ | ||
1155 | u8 remove_immediate_ba_tid; | ||
1156 | |||
1157 | /* Starting Sequence Number for added block-ack support. | ||
1158 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | ||
1159 | __le16 add_immediate_ba_ssn; | ||
1160 | |||
1161 | /* | ||
1162 | * Number of packets OK to transmit to station even though | ||
1163 | * it is asleep -- used to synchronise PS-poll and u-APSD | ||
1164 | * responses while ucode keeps track of STA sleep state. | ||
1165 | */ | ||
1166 | __le16 sleep_tx_count; | ||
1167 | |||
1168 | __le16 reserved2; | ||
1169 | } __packed; | ||
1170 | |||
1171 | /* agn */ | ||
1172 | struct iwl_addsta_cmd { | 900 | struct iwl_addsta_cmd { |
1173 | u8 mode; /* 1: modify existing, 0: add new station */ | 901 | u8 mode; /* 1: modify existing, 0: add new station */ |
1174 | u8 reserved[3]; | 902 | u8 reserved[3]; |
@@ -1337,62 +1065,6 @@ struct iwl_wep_cmd { | |||
1337 | #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) | 1065 | #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) |
1338 | 1066 | ||
1339 | 1067 | ||
1340 | struct iwl3945_rx_frame_stats { | ||
1341 | u8 phy_count; | ||
1342 | u8 id; | ||
1343 | u8 rssi; | ||
1344 | u8 agc; | ||
1345 | __le16 sig_avg; | ||
1346 | __le16 noise_diff; | ||
1347 | u8 payload[0]; | ||
1348 | } __packed; | ||
1349 | |||
1350 | struct iwl3945_rx_frame_hdr { | ||
1351 | __le16 channel; | ||
1352 | __le16 phy_flags; | ||
1353 | u8 reserved1; | ||
1354 | u8 rate; | ||
1355 | __le16 len; | ||
1356 | u8 payload[0]; | ||
1357 | } __packed; | ||
1358 | |||
1359 | struct iwl3945_rx_frame_end { | ||
1360 | __le32 status; | ||
1361 | __le64 timestamp; | ||
1362 | __le32 beacon_timestamp; | ||
1363 | } __packed; | ||
1364 | |||
1365 | /* | ||
1366 | * REPLY_3945_RX = 0x1b (response only, not a command) | ||
1367 | * | ||
1368 | * NOTE: DO NOT dereference from casts to this structure | ||
1369 | * It is provided only for calculating minimum data set size. | ||
1370 | * The actual offsets of the hdr and end are dynamic based on | ||
1371 | * stats.phy_count | ||
1372 | */ | ||
1373 | struct iwl3945_rx_frame { | ||
1374 | struct iwl3945_rx_frame_stats stats; | ||
1375 | struct iwl3945_rx_frame_hdr hdr; | ||
1376 | struct iwl3945_rx_frame_end end; | ||
1377 | } __packed; | ||
1378 | |||
1379 | #define IWL39_RX_FRAME_SIZE (4 + sizeof(struct iwl3945_rx_frame)) | ||
1380 | |||
1381 | /* Fixed (non-configurable) rx data from phy */ | ||
1382 | |||
1383 | #define IWL49_RX_RES_PHY_CNT 14 | ||
1384 | #define IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET (4) | ||
1385 | #define IWL49_RX_PHY_FLAGS_ANTENNAE_MASK (0x70) | ||
1386 | #define IWL49_AGC_DB_MASK (0x3f80) /* MASK(7,13) */ | ||
1387 | #define IWL49_AGC_DB_POS (7) | ||
1388 | struct iwl4965_rx_non_cfg_phy { | ||
1389 | __le16 ant_selection; /* ant A bit 4, ant B bit 5, ant C bit 6 */ | ||
1390 | __le16 agc_info; /* agc code 0:6, agc dB 7:13, reserved 14:15 */ | ||
1391 | u8 rssi_info[6]; /* we use even entries, 0/2/4 for A/B/C rssi */ | ||
1392 | u8 pad[0]; | ||
1393 | } __packed; | ||
1394 | |||
1395 | |||
1396 | #define IWLAGN_RX_RES_PHY_CNT 8 | 1068 | #define IWLAGN_RX_RES_PHY_CNT 8 |
1397 | #define IWLAGN_RX_RES_AGC_IDX 1 | 1069 | #define IWLAGN_RX_RES_AGC_IDX 1 |
1398 | #define IWLAGN_RX_RES_RSSI_AB_IDX 2 | 1070 | #define IWLAGN_RX_RES_RSSI_AB_IDX 2 |
@@ -1576,80 +1248,6 @@ struct iwl_rx_mpdu_res_start { | |||
1576 | * REPLY_TX = 0x1c (command) | 1248 | * REPLY_TX = 0x1c (command) |
1577 | */ | 1249 | */ |
1578 | 1250 | ||
1579 | struct iwl3945_tx_cmd { | ||
1580 | /* | ||
1581 | * MPDU byte count: | ||
1582 | * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size, | ||
1583 | * + 8 byte IV for CCM or TKIP (not used for WEP) | ||
1584 | * + Data payload | ||
1585 | * + 8-byte MIC (not used for CCM/WEP) | ||
1586 | * NOTE: Does not include Tx command bytes, post-MAC pad bytes, | ||
1587 | * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i | ||
1588 | * Range: 14-2342 bytes. | ||
1589 | */ | ||
1590 | __le16 len; | ||
1591 | |||
1592 | /* | ||
1593 | * MPDU or MSDU byte count for next frame. | ||
1594 | * Used for fragmentation and bursting, but not 11n aggregation. | ||
1595 | * Same as "len", but for next frame. Set to 0 if not applicable. | ||
1596 | */ | ||
1597 | __le16 next_frame_len; | ||
1598 | |||
1599 | __le32 tx_flags; /* TX_CMD_FLG_* */ | ||
1600 | |||
1601 | u8 rate; | ||
1602 | |||
1603 | /* Index of recipient station in uCode's station table */ | ||
1604 | u8 sta_id; | ||
1605 | u8 tid_tspec; | ||
1606 | u8 sec_ctl; | ||
1607 | u8 key[16]; | ||
1608 | union { | ||
1609 | u8 byte[8]; | ||
1610 | __le16 word[4]; | ||
1611 | __le32 dw[2]; | ||
1612 | } tkip_mic; | ||
1613 | __le32 next_frame_info; | ||
1614 | union { | ||
1615 | __le32 life_time; | ||
1616 | __le32 attempt; | ||
1617 | } stop_time; | ||
1618 | u8 supp_rates[2]; | ||
1619 | u8 rts_retry_limit; /*byte 50 */ | ||
1620 | u8 data_retry_limit; /*byte 51 */ | ||
1621 | union { | ||
1622 | __le16 pm_frame_timeout; | ||
1623 | __le16 attempt_duration; | ||
1624 | } timeout; | ||
1625 | |||
1626 | /* | ||
1627 | * Duration of EDCA burst Tx Opportunity, in 32-usec units. | ||
1628 | * Set this if txop time is not specified by HCCA protocol (e.g. by AP). | ||
1629 | */ | ||
1630 | __le16 driver_txop; | ||
1631 | |||
1632 | /* | ||
1633 | * MAC header goes here, followed by 2 bytes padding if MAC header | ||
1634 | * length is 26 or 30 bytes, followed by payload data | ||
1635 | */ | ||
1636 | u8 payload[0]; | ||
1637 | struct ieee80211_hdr hdr[0]; | ||
1638 | } __packed; | ||
1639 | |||
1640 | /* | ||
1641 | * REPLY_TX = 0x1c (response) | ||
1642 | */ | ||
1643 | struct iwl3945_tx_resp { | ||
1644 | u8 failure_rts; | ||
1645 | u8 failure_frame; | ||
1646 | u8 bt_kill_count; | ||
1647 | u8 rate; | ||
1648 | __le32 wireless_media_time; | ||
1649 | __le32 status; /* TX status */ | ||
1650 | } __packed; | ||
1651 | |||
1652 | |||
1653 | /* | 1251 | /* |
1654 | * 4965 uCode updates these Tx attempt count values in host DRAM. | 1252 | * 4965 uCode updates these Tx attempt count values in host DRAM. |
1655 | * Used for managing Tx retries when expecting block-acks. | 1253 | * Used for managing Tx retries when expecting block-acks. |
@@ -1740,54 +1338,6 @@ struct iwl_tx_cmd { | |||
1740 | struct ieee80211_hdr hdr[0]; | 1338 | struct ieee80211_hdr hdr[0]; |
1741 | } __packed; | 1339 | } __packed; |
1742 | 1340 | ||
1743 | /* TX command response is sent after *3945* transmission attempts. | ||
1744 | * | ||
1745 | * NOTES: | ||
1746 | * | ||
1747 | * TX_STATUS_FAIL_NEXT_FRAG | ||
1748 | * | ||
1749 | * If the fragment flag in the MAC header for the frame being transmitted | ||
1750 | * is set and there is insufficient time to transmit the next frame, the | ||
1751 | * TX status will be returned with 'TX_STATUS_FAIL_NEXT_FRAG'. | ||
1752 | * | ||
1753 | * TX_STATUS_FIFO_UNDERRUN | ||
1754 | * | ||
1755 | * Indicates the host did not provide bytes to the FIFO fast enough while | ||
1756 | * a TX was in progress. | ||
1757 | * | ||
1758 | * TX_STATUS_FAIL_MGMNT_ABORT | ||
1759 | * | ||
1760 | * This status is only possible if the ABORT ON MGMT RX parameter was | ||
1761 | * set to true with the TX command. | ||
1762 | * | ||
1763 | * If the MSB of the status parameter is set then an abort sequence is | ||
1764 | * required. This sequence consists of the host activating the TX Abort | ||
1765 | * control line, and then waiting for the TX Abort command response. This | ||
1766 | * indicates that a the device is no longer in a transmit state, and that the | ||
1767 | * command FIFO has been cleared. The host must then deactivate the TX Abort | ||
1768 | * control line. Receiving is still allowed in this case. | ||
1769 | */ | ||
1770 | enum { | ||
1771 | TX_3945_STATUS_SUCCESS = 0x01, | ||
1772 | TX_3945_STATUS_DIRECT_DONE = 0x02, | ||
1773 | TX_3945_STATUS_FAIL_SHORT_LIMIT = 0x82, | ||
1774 | TX_3945_STATUS_FAIL_LONG_LIMIT = 0x83, | ||
1775 | TX_3945_STATUS_FAIL_FIFO_UNDERRUN = 0x84, | ||
1776 | TX_3945_STATUS_FAIL_MGMNT_ABORT = 0x85, | ||
1777 | TX_3945_STATUS_FAIL_NEXT_FRAG = 0x86, | ||
1778 | TX_3945_STATUS_FAIL_LIFE_EXPIRE = 0x87, | ||
1779 | TX_3945_STATUS_FAIL_DEST_PS = 0x88, | ||
1780 | TX_3945_STATUS_FAIL_ABORTED = 0x89, | ||
1781 | TX_3945_STATUS_FAIL_BT_RETRY = 0x8a, | ||
1782 | TX_3945_STATUS_FAIL_STA_INVALID = 0x8b, | ||
1783 | TX_3945_STATUS_FAIL_FRAG_DROPPED = 0x8c, | ||
1784 | TX_3945_STATUS_FAIL_TID_DISABLE = 0x8d, | ||
1785 | TX_3945_STATUS_FAIL_FRAME_FLUSHED = 0x8e, | ||
1786 | TX_3945_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f, | ||
1787 | TX_3945_STATUS_FAIL_TX_LOCKED = 0x90, | ||
1788 | TX_3945_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91, | ||
1789 | }; | ||
1790 | |||
1791 | /* | 1341 | /* |
1792 | * TX command response is sent after *agn* transmission attempts. | 1342 | * TX command response is sent after *agn* transmission attempts. |
1793 | * | 1343 | * |
@@ -1905,43 +1455,6 @@ struct agg_tx_status { | |||
1905 | __le16 sequence; | 1455 | __le16 sequence; |
1906 | } __packed; | 1456 | } __packed; |
1907 | 1457 | ||
1908 | struct iwl4965_tx_resp { | ||
1909 | u8 frame_count; /* 1 no aggregation, >1 aggregation */ | ||
1910 | u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */ | ||
1911 | u8 failure_rts; /* # failures due to unsuccessful RTS */ | ||
1912 | u8 failure_frame; /* # failures due to no ACK (unused for agg) */ | ||
1913 | |||
1914 | /* For non-agg: Rate at which frame was successful. | ||
1915 | * For agg: Rate at which all frames were transmitted. */ | ||
1916 | __le32 rate_n_flags; /* RATE_MCS_* */ | ||
1917 | |||
1918 | /* For non-agg: RTS + CTS + frame tx attempts time + ACK. | ||
1919 | * For agg: RTS + CTS + aggregation tx time + block-ack time. */ | ||
1920 | __le16 wireless_media_time; /* uSecs */ | ||
1921 | |||
1922 | __le16 reserved; | ||
1923 | __le32 pa_power1; /* RF power amplifier measurement (not used) */ | ||
1924 | __le32 pa_power2; | ||
1925 | |||
1926 | /* | ||
1927 | * For non-agg: frame status TX_STATUS_* | ||
1928 | * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status | ||
1929 | * fields follow this one, up to frame_count. | ||
1930 | * Bit fields: | ||
1931 | * 11- 0: AGG_TX_STATE_* status code | ||
1932 | * 15-12: Retry count for 1st frame in aggregation (retries | ||
1933 | * occur if tx failed for this frame when it was a | ||
1934 | * member of a previous aggregation block). If rate | ||
1935 | * scaling is used, retry count indicates the rate | ||
1936 | * table entry used for all frames in the new agg. | ||
1937 | * 31-16: Sequence # for this frame's Tx cmd (not SSN!) | ||
1938 | */ | ||
1939 | union { | ||
1940 | __le32 status; | ||
1941 | struct agg_tx_status agg_status[0]; /* for each agg frame */ | ||
1942 | } u; | ||
1943 | } __packed; | ||
1944 | |||
1945 | /* | 1458 | /* |
1946 | * definitions for initial rate index field | 1459 | * definitions for initial rate index field |
1947 | * bits [3:0] initial rate index | 1460 | * bits [3:0] initial rate index |
@@ -2030,51 +1543,7 @@ struct iwl_compressed_ba_resp { | |||
2030 | /* | 1543 | /* |
2031 | * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response) | 1544 | * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response) |
2032 | * | 1545 | * |
2033 | * See details under "TXPOWER" in iwl-4965-hw.h. | ||
2034 | */ | ||
2035 | |||
2036 | struct iwl3945_txpowertable_cmd { | ||
2037 | u8 band; /* 0: 5 GHz, 1: 2.4 GHz */ | ||
2038 | u8 reserved; | ||
2039 | __le16 channel; | ||
2040 | struct iwl3945_power_per_rate power[IWL_MAX_RATES]; | ||
2041 | } __packed; | ||
2042 | |||
2043 | struct iwl4965_txpowertable_cmd { | ||
2044 | u8 band; /* 0: 5 GHz, 1: 2.4 GHz */ | ||
2045 | u8 reserved; | ||
2046 | __le16 channel; | ||
2047 | struct iwl4965_tx_power_db tx_power; | ||
2048 | } __packed; | ||
2049 | |||
2050 | |||
2051 | /** | ||
2052 | * struct iwl3945_rate_scaling_cmd - Rate Scaling Command & Response | ||
2053 | * | ||
2054 | * REPLY_RATE_SCALE = 0x47 (command, has simple generic response) | ||
2055 | * | ||
2056 | * NOTE: The table of rates passed to the uCode via the | ||
2057 | * RATE_SCALE command sets up the corresponding order of | ||
2058 | * rates used for all related commands, including rate | ||
2059 | * masks, etc. | ||
2060 | * | ||
2061 | * For example, if you set 9MB (PLCP 0x0f) as the first | ||
2062 | * rate in the rate table, the bit mask for that rate | ||
2063 | * when passed through ofdm_basic_rates on the REPLY_RXON | ||
2064 | * command would be bit 0 (1 << 0) | ||
2065 | */ | 1546 | */ |
2066 | struct iwl3945_rate_scaling_info { | ||
2067 | __le16 rate_n_flags; | ||
2068 | u8 try_cnt; | ||
2069 | u8 next_rate_index; | ||
2070 | } __packed; | ||
2071 | |||
2072 | struct iwl3945_rate_scaling_cmd { | ||
2073 | u8 table_id; | ||
2074 | u8 reserved[3]; | ||
2075 | struct iwl3945_rate_scaling_info table[IWL_MAX_RATES]; | ||
2076 | } __packed; | ||
2077 | |||
2078 | 1547 | ||
2079 | /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ | 1548 | /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ |
2080 | #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) | 1549 | #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) |
@@ -2130,7 +1599,7 @@ struct iwl_link_qual_general_params { | |||
2130 | #define LINK_QUAL_AGG_DISABLE_START_MAX (255) | 1599 | #define LINK_QUAL_AGG_DISABLE_START_MAX (255) |
2131 | #define LINK_QUAL_AGG_DISABLE_START_MIN (0) | 1600 | #define LINK_QUAL_AGG_DISABLE_START_MIN (0) |
2132 | 1601 | ||
2133 | #define LINK_QUAL_AGG_FRAME_LIMIT_DEF (31) | 1602 | #define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63) |
2134 | #define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63) | 1603 | #define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63) |
2135 | #define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0) | 1604 | #define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0) |
2136 | 1605 | ||
@@ -2696,14 +2165,6 @@ struct iwl_spectrum_notification { | |||
2696 | #define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8)) | 2165 | #define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8)) |
2697 | #define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9)) | 2166 | #define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9)) |
2698 | 2167 | ||
2699 | struct iwl3945_powertable_cmd { | ||
2700 | __le16 flags; | ||
2701 | u8 reserved[2]; | ||
2702 | __le32 rx_data_timeout; | ||
2703 | __le32 tx_data_timeout; | ||
2704 | __le32 sleep_interval[IWL_POWER_VEC_SIZE]; | ||
2705 | } __packed; | ||
2706 | |||
2707 | struct iwl_powertable_cmd { | 2168 | struct iwl_powertable_cmd { |
2708 | __le16 flags; | 2169 | __le16 flags; |
2709 | u8 keep_alive_seconds; /* 3945 reserved */ | 2170 | u8 keep_alive_seconds; /* 3945 reserved */ |
@@ -2806,25 +2267,6 @@ struct iwl_ct_kill_throttling_config { | |||
2806 | * active_dwell < max_out_time | 2267 | * active_dwell < max_out_time |
2807 | */ | 2268 | */ |
2808 | 2269 | ||
2809 | /* FIXME: rename to AP1, remove tpc */ | ||
2810 | struct iwl3945_scan_channel { | ||
2811 | /* | ||
2812 | * type is defined as: | ||
2813 | * 0:0 1 = active, 0 = passive | ||
2814 | * 1:4 SSID direct bit map; if a bit is set, then corresponding | ||
2815 | * SSID IE is transmitted in probe request. | ||
2816 | * 5:7 reserved | ||
2817 | */ | ||
2818 | u8 type; | ||
2819 | u8 channel; /* band is selected by iwl3945_scan_cmd "flags" field */ | ||
2820 | struct iwl3945_tx_power tpc; | ||
2821 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ | ||
2822 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ | ||
2823 | } __packed; | ||
2824 | |||
2825 | /* set number of direct probes u8 type */ | ||
2826 | #define IWL39_SCAN_PROBE_MASK(n) ((BIT(n) | (BIT(n) - BIT(1)))) | ||
2827 | |||
2828 | struct iwl_scan_channel { | 2270 | struct iwl_scan_channel { |
2829 | /* | 2271 | /* |
2830 | * type is defined as: | 2272 | * type is defined as: |
@@ -2920,50 +2362,6 @@ struct iwl_ssid_ie { | |||
2920 | * struct iwl_scan_channel. | 2362 | * struct iwl_scan_channel. |
2921 | */ | 2363 | */ |
2922 | 2364 | ||
2923 | struct iwl3945_scan_cmd { | ||
2924 | __le16 len; | ||
2925 | u8 reserved0; | ||
2926 | u8 channel_count; /* # channels in channel list */ | ||
2927 | __le16 quiet_time; /* dwell only this # millisecs on quiet channel | ||
2928 | * (only for active scan) */ | ||
2929 | __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */ | ||
2930 | __le16 good_CRC_th; /* passive -> active promotion threshold */ | ||
2931 | __le16 reserved1; | ||
2932 | __le32 max_out_time; /* max usec to be away from associated (service) | ||
2933 | * channel */ | ||
2934 | __le32 suspend_time; /* pause scan this long (in "extended beacon | ||
2935 | * format") when returning to service channel: | ||
2936 | * 3945; 31:24 # beacons, 19:0 additional usec, | ||
2937 | * 4965; 31:22 # beacons, 21:0 additional usec. | ||
2938 | */ | ||
2939 | __le32 flags; /* RXON_FLG_* */ | ||
2940 | __le32 filter_flags; /* RXON_FILTER_* */ | ||
2941 | |||
2942 | /* For active scans (set to all-0s for passive scans). | ||
2943 | * Does not include payload. Must specify Tx rate; no rate scaling. */ | ||
2944 | struct iwl3945_tx_cmd tx_cmd; | ||
2945 | |||
2946 | /* For directed active scans (set to all-0s otherwise) */ | ||
2947 | struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX_3945]; | ||
2948 | |||
2949 | /* | ||
2950 | * Probe request frame, followed by channel list. | ||
2951 | * | ||
2952 | * Size of probe request frame is specified by byte count in tx_cmd. | ||
2953 | * Channel list follows immediately after probe request frame. | ||
2954 | * Number of channels in list is specified by channel_count. | ||
2955 | * Each channel in list is of type: | ||
2956 | * | ||
2957 | * struct iwl3945_scan_channel channels[0]; | ||
2958 | * | ||
2959 | * NOTE: Only one band of channels can be scanned per pass. You | ||
2960 | * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait | ||
2961 | * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION) | ||
2962 | * before requesting another scan. | ||
2963 | */ | ||
2964 | u8 data[0]; | ||
2965 | } __packed; | ||
2966 | |||
2967 | enum iwl_scan_flags { | 2365 | enum iwl_scan_flags { |
2968 | /* BIT(0) currently unused */ | 2366 | /* BIT(0) currently unused */ |
2969 | IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1), | 2367 | IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1), |
@@ -3090,20 +2488,6 @@ enum iwl_ibss_manager { | |||
3090 | * BEACON_NOTIFICATION = 0x90 (notification only, not a command) | 2488 | * BEACON_NOTIFICATION = 0x90 (notification only, not a command) |
3091 | */ | 2489 | */ |
3092 | 2490 | ||
3093 | struct iwl3945_beacon_notif { | ||
3094 | struct iwl3945_tx_resp beacon_notify_hdr; | ||
3095 | __le32 low_tsf; | ||
3096 | __le32 high_tsf; | ||
3097 | __le32 ibss_mgr_status; | ||
3098 | } __packed; | ||
3099 | |||
3100 | struct iwl4965_beacon_notif { | ||
3101 | struct iwl4965_tx_resp beacon_notify_hdr; | ||
3102 | __le32 low_tsf; | ||
3103 | __le32 high_tsf; | ||
3104 | __le32 ibss_mgr_status; | ||
3105 | } __packed; | ||
3106 | |||
3107 | struct iwlagn_beacon_notif { | 2491 | struct iwlagn_beacon_notif { |
3108 | struct iwlagn_tx_resp beacon_notify_hdr; | 2492 | struct iwlagn_tx_resp beacon_notify_hdr; |
3109 | __le32 low_tsf; | 2493 | __le32 low_tsf; |
@@ -3115,14 +2499,6 @@ struct iwlagn_beacon_notif { | |||
3115 | * REPLY_TX_BEACON = 0x91 (command, has simple generic response) | 2499 | * REPLY_TX_BEACON = 0x91 (command, has simple generic response) |
3116 | */ | 2500 | */ |
3117 | 2501 | ||
3118 | struct iwl3945_tx_beacon_cmd { | ||
3119 | struct iwl3945_tx_cmd tx; | ||
3120 | __le16 tim_idx; | ||
3121 | u8 tim_size; | ||
3122 | u8 reserved1; | ||
3123 | struct ieee80211_hdr frame[0]; /* beacon frame */ | ||
3124 | } __packed; | ||
3125 | |||
3126 | struct iwl_tx_beacon_cmd { | 2502 | struct iwl_tx_beacon_cmd { |
3127 | struct iwl_tx_cmd tx; | 2503 | struct iwl_tx_cmd tx; |
3128 | __le16 tim_idx; | 2504 | __le16 tim_idx; |
@@ -3471,13 +2847,6 @@ struct iwl_statistics_cmd { | |||
3471 | #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2) | 2847 | #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2) |
3472 | #define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8) | 2848 | #define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8) |
3473 | 2849 | ||
3474 | struct iwl3945_notif_statistics { | ||
3475 | __le32 flag; | ||
3476 | struct iwl39_statistics_rx rx; | ||
3477 | struct iwl39_statistics_tx tx; | ||
3478 | struct iwl39_statistics_general general; | ||
3479 | } __packed; | ||
3480 | |||
3481 | struct iwl_notif_statistics { | 2850 | struct iwl_notif_statistics { |
3482 | __le32 flag; | 2851 | __le32 flag; |
3483 | struct statistics_rx rx; | 2852 | struct statistics_rx rx; |
@@ -4451,10 +3820,6 @@ struct iwl_rx_packet { | |||
4451 | __le32 len_n_flags; | 3820 | __le32 len_n_flags; |
4452 | struct iwl_cmd_header hdr; | 3821 | struct iwl_cmd_header hdr; |
4453 | union { | 3822 | union { |
4454 | struct iwl3945_rx_frame rx_frame; | ||
4455 | struct iwl3945_tx_resp tx_resp; | ||
4456 | struct iwl3945_beacon_notif beacon_status; | ||
4457 | |||
4458 | struct iwl_alive_resp alive_frame; | 3823 | struct iwl_alive_resp alive_frame; |
4459 | struct iwl_spectrum_notification spectrum_notif; | 3824 | struct iwl_spectrum_notification spectrum_notif; |
4460 | struct iwl_csa_notification csa_notif; | 3825 | struct iwl_csa_notification csa_notif; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c index bafbe57c9602..45ec5cfe3fcf 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.c +++ b/drivers/net/wireless/iwlwifi/iwl-core.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -890,10 +890,8 @@ void iwl_print_rx_config_cmd(struct iwl_priv *priv, | |||
890 | IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); | 890 | IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
891 | } | 891 | } |
892 | #endif | 892 | #endif |
893 | /** | 893 | |
894 | * iwl_irq_handle_error - called for HW or SW error interrupt from card | 894 | void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand) |
895 | */ | ||
896 | void iwl_irq_handle_error(struct iwl_priv *priv) | ||
897 | { | 895 | { |
898 | unsigned int reload_msec; | 896 | unsigned int reload_msec; |
899 | unsigned long reload_jiffies; | 897 | unsigned long reload_jiffies; |
@@ -904,18 +902,62 @@ void iwl_irq_handle_error(struct iwl_priv *priv) | |||
904 | /* Cancel currently queued command. */ | 902 | /* Cancel currently queued command. */ |
905 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | 903 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); |
906 | 904 | ||
905 | /* Keep the restart process from trying to send host | ||
906 | * commands by clearing the ready bit */ | ||
907 | clear_bit(STATUS_READY, &priv->status); | ||
908 | |||
909 | wake_up_interruptible(&priv->wait_command_queue); | ||
910 | |||
911 | if (!ondemand) { | ||
912 | /* | ||
913 | * If firmware keep reloading, then it indicate something | ||
914 | * serious wrong and firmware having problem to recover | ||
915 | * from it. Instead of keep trying which will fill the syslog | ||
916 | * and hang the system, let's just stop it | ||
917 | */ | ||
918 | reload_jiffies = jiffies; | ||
919 | reload_msec = jiffies_to_msecs((long) reload_jiffies - | ||
920 | (long) priv->reload_jiffies); | ||
921 | priv->reload_jiffies = reload_jiffies; | ||
922 | if (reload_msec <= IWL_MIN_RELOAD_DURATION) { | ||
923 | priv->reload_count++; | ||
924 | if (priv->reload_count >= IWL_MAX_CONTINUE_RELOAD_CNT) { | ||
925 | IWL_ERR(priv, "BUG_ON, Stop restarting\n"); | ||
926 | return; | ||
927 | } | ||
928 | } else | ||
929 | priv->reload_count = 0; | ||
930 | } | ||
931 | |||
932 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | ||
933 | if (priv->cfg->mod_params->restart_fw) { | ||
934 | IWL_DEBUG(priv, IWL_DL_FW_ERRORS, | ||
935 | "Restarting adapter due to uCode error.\n"); | ||
936 | queue_work(priv->workqueue, &priv->restart); | ||
937 | } else | ||
938 | IWL_DEBUG(priv, IWL_DL_FW_ERRORS, | ||
939 | "Detected FW error, but not restarting\n"); | ||
940 | } | ||
941 | } | ||
942 | |||
943 | /** | ||
944 | * iwl_irq_handle_error - called for HW or SW error interrupt from card | ||
945 | */ | ||
946 | void iwl_irq_handle_error(struct iwl_priv *priv) | ||
947 | { | ||
907 | /* W/A for WiFi/WiMAX coex and WiMAX own the RF */ | 948 | /* W/A for WiFi/WiMAX coex and WiMAX own the RF */ |
908 | if (priv->cfg->internal_wimax_coex && | 949 | if (priv->cfg->internal_wimax_coex && |
909 | (!(iwl_read_prph(priv, APMG_CLK_CTRL_REG) & | 950 | (!(iwl_read_prph(priv, APMG_CLK_CTRL_REG) & |
910 | APMS_CLK_VAL_MRB_FUNC_MODE) || | 951 | APMS_CLK_VAL_MRB_FUNC_MODE) || |
911 | (iwl_read_prph(priv, APMG_PS_CTRL_REG) & | 952 | (iwl_read_prph(priv, APMG_PS_CTRL_REG) & |
912 | APMG_PS_CTRL_VAL_RESET_REQ))) { | 953 | APMG_PS_CTRL_VAL_RESET_REQ))) { |
913 | wake_up_interruptible(&priv->wait_command_queue); | ||
914 | /* | 954 | /* |
915 | *Keep the restart process from trying to send host | 955 | * Keep the restart process from trying to send host |
916 | * commands by clearing the INIT status bit | 956 | * commands by clearing the ready bit. |
917 | */ | 957 | */ |
918 | clear_bit(STATUS_READY, &priv->status); | 958 | clear_bit(STATUS_READY, &priv->status); |
959 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | ||
960 | wake_up_interruptible(&priv->wait_command_queue); | ||
919 | IWL_ERR(priv, "RF is used by WiMAX\n"); | 961 | IWL_ERR(priv, "RF is used by WiMAX\n"); |
920 | return; | 962 | return; |
921 | } | 963 | } |
@@ -935,38 +977,7 @@ void iwl_irq_handle_error(struct iwl_priv *priv) | |||
935 | &priv->contexts[IWL_RXON_CTX_BSS]); | 977 | &priv->contexts[IWL_RXON_CTX_BSS]); |
936 | #endif | 978 | #endif |
937 | 979 | ||
938 | wake_up_interruptible(&priv->wait_command_queue); | 980 | iwlagn_fw_error(priv, false); |
939 | |||
940 | /* Keep the restart process from trying to send host | ||
941 | * commands by clearing the INIT status bit */ | ||
942 | clear_bit(STATUS_READY, &priv->status); | ||
943 | |||
944 | /* | ||
945 | * If firmware keep reloading, then it indicate something | ||
946 | * serious wrong and firmware having problem to recover | ||
947 | * from it. Instead of keep trying which will fill the syslog | ||
948 | * and hang the system, let's just stop it | ||
949 | */ | ||
950 | reload_jiffies = jiffies; | ||
951 | reload_msec = jiffies_to_msecs((long) reload_jiffies - | ||
952 | (long) priv->reload_jiffies); | ||
953 | priv->reload_jiffies = reload_jiffies; | ||
954 | if (reload_msec <= IWL_MIN_RELOAD_DURATION) { | ||
955 | priv->reload_count++; | ||
956 | if (priv->reload_count >= IWL_MAX_CONTINUE_RELOAD_CNT) { | ||
957 | IWL_ERR(priv, "BUG_ON, Stop restarting\n"); | ||
958 | return; | ||
959 | } | ||
960 | } else | ||
961 | priv->reload_count = 0; | ||
962 | |||
963 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | ||
964 | IWL_DEBUG(priv, IWL_DL_FW_ERRORS, | ||
965 | "Restarting adapter due to uCode error.\n"); | ||
966 | |||
967 | if (priv->cfg->mod_params->restart_fw) | ||
968 | queue_work(priv->workqueue, &priv->restart); | ||
969 | } | ||
970 | } | 981 | } |
971 | 982 | ||
972 | static int iwl_apm_stop_master(struct iwl_priv *priv) | 983 | static int iwl_apm_stop_master(struct iwl_priv *priv) |
@@ -1094,21 +1105,13 @@ int iwl_apm_init(struct iwl_priv *priv) | |||
1094 | } | 1105 | } |
1095 | 1106 | ||
1096 | /* | 1107 | /* |
1097 | * Enable DMA and BSM (if used) clocks, wait for them to stabilize. | 1108 | * Enable DMA clock and wait for it to stabilize. |
1098 | * BSM (Boostrap State Machine) is only in 3945 and 4965; | ||
1099 | * later devices (i.e. 5000 and later) have non-volatile SRAM, | ||
1100 | * and don't need BSM to restore data after power-saving sleep. | ||
1101 | * | 1109 | * |
1102 | * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits | 1110 | * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits |
1103 | * do not disable clocks. This preserves any hardware bits already | 1111 | * do not disable clocks. This preserves any hardware bits already |
1104 | * set by default in "CLK_CTRL_REG" after reset. | 1112 | * set by default in "CLK_CTRL_REG" after reset. |
1105 | */ | 1113 | */ |
1106 | if (priv->cfg->base_params->use_bsm) | 1114 | iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT); |
1107 | iwl_write_prph(priv, APMG_CLK_EN_REG, | ||
1108 | APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT); | ||
1109 | else | ||
1110 | iwl_write_prph(priv, APMG_CLK_EN_REG, | ||
1111 | APMG_CLK_VAL_DMA_CLK_RQT); | ||
1112 | udelay(20); | 1115 | udelay(20); |
1113 | 1116 | ||
1114 | /* Disable L1-Active */ | 1117 | /* Disable L1-Active */ |
@@ -1430,7 +1433,6 @@ void iwl_mac_remove_interface(struct ieee80211_hw *hw, | |||
1430 | 1433 | ||
1431 | iwl_teardown_interface(priv, vif, false); | 1434 | iwl_teardown_interface(priv, vif, false); |
1432 | 1435 | ||
1433 | memset(priv->bssid, 0, ETH_ALEN); | ||
1434 | mutex_unlock(&priv->mutex); | 1436 | mutex_unlock(&priv->mutex); |
1435 | 1437 | ||
1436 | IWL_DEBUG_MAC80211(priv, "leave\n"); | 1438 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
@@ -1756,15 +1758,7 @@ int iwl_force_reset(struct iwl_priv *priv, int mode, bool external) | |||
1756 | break; | 1758 | break; |
1757 | } | 1759 | } |
1758 | IWL_ERR(priv, "On demand firmware reload\n"); | 1760 | IWL_ERR(priv, "On demand firmware reload\n"); |
1759 | /* Set the FW error flag -- cleared on iwl_down */ | 1761 | iwlagn_fw_error(priv, true); |
1760 | set_bit(STATUS_FW_ERROR, &priv->status); | ||
1761 | wake_up_interruptible(&priv->wait_command_queue); | ||
1762 | /* | ||
1763 | * Keep the restart process from trying to send host | ||
1764 | * commands by clearing the INIT status bit | ||
1765 | */ | ||
1766 | clear_bit(STATUS_READY, &priv->status); | ||
1767 | queue_work(priv->workqueue, &priv->restart); | ||
1768 | break; | 1762 | break; |
1769 | } | 1763 | } |
1770 | return 0; | 1764 | return 0; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h index b316d833d9a2..82939f851eb9 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.h +++ b/drivers/net/wireless/iwlwifi/iwl-core.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -73,7 +73,7 @@ struct iwl_cmd; | |||
73 | 73 | ||
74 | 74 | ||
75 | #define IWLWIFI_VERSION "in-tree:" | 75 | #define IWLWIFI_VERSION "in-tree:" |
76 | #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation" | 76 | #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation" |
77 | #define DRV_AUTHOR "<ilw@linux.intel.com>" | 77 | #define DRV_AUTHOR "<ilw@linux.intel.com>" |
78 | 78 | ||
79 | #define IWL_PCI_DEVICE(dev, subdev, cfg) \ | 79 | #define IWL_PCI_DEVICE(dev, subdev, cfg) \ |
@@ -122,14 +122,6 @@ struct iwl_apm_ops { | |||
122 | void (*config)(struct iwl_priv *priv); | 122 | void (*config)(struct iwl_priv *priv); |
123 | }; | 123 | }; |
124 | 124 | ||
125 | struct iwl_isr_ops { | ||
126 | irqreturn_t (*isr) (int irq, void *data); | ||
127 | void (*free)(struct iwl_priv *priv); | ||
128 | int (*alloc)(struct iwl_priv *priv); | ||
129 | int (*reset)(struct iwl_priv *priv); | ||
130 | void (*disable)(struct iwl_priv *priv); | ||
131 | }; | ||
132 | |||
133 | struct iwl_debugfs_ops { | 125 | struct iwl_debugfs_ops { |
134 | ssize_t (*rx_stats_read)(struct file *file, char __user *user_buf, | 126 | ssize_t (*rx_stats_read)(struct file *file, char __user *user_buf, |
135 | size_t count, loff_t *ppos); | 127 | size_t count, loff_t *ppos); |
@@ -171,25 +163,15 @@ struct iwl_lib_ops { | |||
171 | struct iwl_tx_queue *txq); | 163 | struct iwl_tx_queue *txq); |
172 | int (*txq_init)(struct iwl_priv *priv, | 164 | int (*txq_init)(struct iwl_priv *priv, |
173 | struct iwl_tx_queue *txq); | 165 | struct iwl_tx_queue *txq); |
174 | /* aggregations */ | ||
175 | int (*txq_agg_enable)(struct iwl_priv *priv, int txq_id, int tx_fifo, | ||
176 | int sta_id, int tid, u16 ssn_idx); | ||
177 | int (*txq_agg_disable)(struct iwl_priv *priv, u16 txq_id, u16 ssn_idx, | ||
178 | u8 tx_fifo); | ||
179 | /* setup Rx handler */ | 166 | /* setup Rx handler */ |
180 | void (*rx_handler_setup)(struct iwl_priv *priv); | 167 | void (*rx_handler_setup)(struct iwl_priv *priv); |
181 | /* setup deferred work */ | 168 | /* setup deferred work */ |
182 | void (*setup_deferred_work)(struct iwl_priv *priv); | 169 | void (*setup_deferred_work)(struct iwl_priv *priv); |
183 | /* cancel deferred work */ | 170 | /* cancel deferred work */ |
184 | void (*cancel_deferred_work)(struct iwl_priv *priv); | 171 | void (*cancel_deferred_work)(struct iwl_priv *priv); |
185 | /* alive notification after init uCode load */ | ||
186 | void (*init_alive_start)(struct iwl_priv *priv); | ||
187 | /* alive notification */ | ||
188 | int (*alive_notify)(struct iwl_priv *priv); | ||
189 | /* check validity of rtc data address */ | 172 | /* check validity of rtc data address */ |
190 | int (*is_valid_rtc_data_addr)(u32 addr); | 173 | int (*is_valid_rtc_data_addr)(u32 addr); |
191 | /* 1st ucode load */ | 174 | |
192 | int (*load_ucode)(struct iwl_priv *priv); | ||
193 | int (*dump_nic_event_log)(struct iwl_priv *priv, | 175 | int (*dump_nic_event_log)(struct iwl_priv *priv, |
194 | bool full_log, char **buf, bool display); | 176 | bool full_log, char **buf, bool display); |
195 | void (*dump_nic_error_log)(struct iwl_priv *priv); | 177 | void (*dump_nic_error_log)(struct iwl_priv *priv); |
@@ -204,9 +186,6 @@ struct iwl_lib_ops { | |||
204 | int (*send_tx_power) (struct iwl_priv *priv); | 186 | int (*send_tx_power) (struct iwl_priv *priv); |
205 | void (*update_chain_flags)(struct iwl_priv *priv); | 187 | void (*update_chain_flags)(struct iwl_priv *priv); |
206 | 188 | ||
207 | /* isr */ | ||
208 | struct iwl_isr_ops isr_ops; | ||
209 | |||
210 | /* eeprom operations (as defined in iwl-eeprom.h) */ | 189 | /* eeprom operations (as defined in iwl-eeprom.h) */ |
211 | struct iwl_eeprom_ops eeprom_ops; | 190 | struct iwl_eeprom_ops eeprom_ops; |
212 | 191 | ||
@@ -252,7 +231,6 @@ struct iwl_ops { | |||
252 | 231 | ||
253 | struct iwl_mod_params { | 232 | struct iwl_mod_params { |
254 | int sw_crypto; /* def: 0 = using hardware encryption */ | 233 | int sw_crypto; /* def: 0 = using hardware encryption */ |
255 | int disable_hw_scan; /* def: 0 = use h/w scan */ | ||
256 | int num_of_queues; /* def: HW dependent */ | 234 | int num_of_queues; /* def: HW dependent */ |
257 | int disable_11n; /* def: 0 = 11n capabilities enabled */ | 235 | int disable_11n; /* def: 0 = 11n capabilities enabled */ |
258 | int amsdu_size_8K; /* def: 1 = enable 8K amsdu size */ | 236 | int amsdu_size_8K; /* def: 1 = enable 8K amsdu size */ |
@@ -286,8 +264,6 @@ struct iwl_mod_params { | |||
286 | * @chain_noise_calib_by_driver: driver has the capability to perform | 264 | * @chain_noise_calib_by_driver: driver has the capability to perform |
287 | * chain noise calibration operation | 265 | * chain noise calibration operation |
288 | * @shadow_reg_enable: HW shadhow register bit | 266 | * @shadow_reg_enable: HW shadhow register bit |
289 | * @no_agg_framecnt_info: uCode do not provide aggregation frame count | ||
290 | * information | ||
291 | */ | 267 | */ |
292 | struct iwl_base_params { | 268 | struct iwl_base_params { |
293 | int eeprom_size; | 269 | int eeprom_size; |
@@ -296,9 +272,7 @@ struct iwl_base_params { | |||
296 | /* for iwl_apm_init() */ | 272 | /* for iwl_apm_init() */ |
297 | u32 pll_cfg_val; | 273 | u32 pll_cfg_val; |
298 | bool set_l0s; | 274 | bool set_l0s; |
299 | bool use_bsm; | ||
300 | 275 | ||
301 | bool use_isr_legacy; | ||
302 | const u16 max_ll_items; | 276 | const u16 max_ll_items; |
303 | const bool shadow_ram_support; | 277 | const bool shadow_ram_support; |
304 | u16 led_compensation; | 278 | u16 led_compensation; |
@@ -317,7 +291,6 @@ struct iwl_base_params { | |||
317 | const bool sensitivity_calib_by_driver; | 291 | const bool sensitivity_calib_by_driver; |
318 | const bool chain_noise_calib_by_driver; | 292 | const bool chain_noise_calib_by_driver; |
319 | const bool shadow_reg_enable; | 293 | const bool shadow_reg_enable; |
320 | const bool no_agg_framecnt_info; | ||
321 | }; | 294 | }; |
322 | /* | 295 | /* |
323 | * @advanced_bt_coexist: support advanced bt coexist | 296 | * @advanced_bt_coexist: support advanced bt coexist |
@@ -738,10 +711,13 @@ static inline bool iwl_advanced_bt_coexist(struct iwl_priv *priv) | |||
738 | 711 | ||
739 | static inline bool iwl_bt_statistics(struct iwl_priv *priv) | 712 | static inline bool iwl_bt_statistics(struct iwl_priv *priv) |
740 | { | 713 | { |
741 | return priv->cfg->bt_params && priv->cfg->bt_params->bt_statistics; | 714 | return priv->bt_statistics; |
742 | } | 715 | } |
743 | 716 | ||
744 | extern bool bt_coex_active; | 717 | extern bool bt_coex_active; |
745 | extern bool bt_siso_mode; | 718 | extern bool bt_siso_mode; |
746 | 719 | ||
720 | |||
721 | void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand); | ||
722 | |||
747 | #endif /* __iwl_core_h__ */ | 723 | #endif /* __iwl_core_h__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h index f52bc040bcbf..5ab90ba7a024 100644 --- a/drivers/net/wireless/iwlwifi/iwl-csr.h +++ b/drivers/net/wireless/iwlwifi/iwl-csr.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -155,18 +155,10 @@ | |||
155 | #define CSR_DBG_LINK_PWR_MGMT_REG (CSR_BASE+0x250) | 155 | #define CSR_DBG_LINK_PWR_MGMT_REG (CSR_BASE+0x250) |
156 | 156 | ||
157 | /* Bits for CSR_HW_IF_CONFIG_REG */ | 157 | /* Bits for CSR_HW_IF_CONFIG_REG */ |
158 | #define CSR49_HW_IF_CONFIG_REG_BIT_4965_R (0x00000010) | ||
159 | #define CSR_HW_IF_CONFIG_REG_MSK_BOARD_VER (0x00000C00) | 158 | #define CSR_HW_IF_CONFIG_REG_MSK_BOARD_VER (0x00000C00) |
160 | #define CSR_HW_IF_CONFIG_REG_BIT_MAC_SI (0x00000100) | 159 | #define CSR_HW_IF_CONFIG_REG_BIT_MAC_SI (0x00000100) |
161 | #define CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI (0x00000200) | 160 | #define CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI (0x00000200) |
162 | 161 | ||
163 | #define CSR39_HW_IF_CONFIG_REG_BIT_3945_MB (0x00000100) | ||
164 | #define CSR39_HW_IF_CONFIG_REG_BIT_3945_MM (0x00000200) | ||
165 | #define CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC (0x00000400) | ||
166 | #define CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE (0x00000800) | ||
167 | #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A (0x00000000) | ||
168 | #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B (0x00001000) | ||
169 | |||
170 | #define CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A (0x00080000) | 162 | #define CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A (0x00080000) |
171 | #define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000) | 163 | #define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000) |
172 | #define CSR_HW_IF_CONFIG_REG_BIT_NIC_READY (0x00400000) /* PCI_OWN_SEM */ | 164 | #define CSR_HW_IF_CONFIG_REG_BIT_NIC_READY (0x00400000) /* PCI_OWN_SEM */ |
@@ -186,7 +178,7 @@ | |||
186 | #define CSR_INT_BIT_SW_ERR (1 << 25) /* uCode error */ | 178 | #define CSR_INT_BIT_SW_ERR (1 << 25) /* uCode error */ |
187 | #define CSR_INT_BIT_RF_KILL (1 << 7) /* HW RFKILL switch GP_CNTRL[27] toggled */ | 179 | #define CSR_INT_BIT_RF_KILL (1 << 7) /* HW RFKILL switch GP_CNTRL[27] toggled */ |
188 | #define CSR_INT_BIT_CT_KILL (1 << 6) /* Critical temp (chip too hot) rfkill */ | 180 | #define CSR_INT_BIT_CT_KILL (1 << 6) /* Critical temp (chip too hot) rfkill */ |
189 | #define CSR_INT_BIT_SW_RX (1 << 3) /* Rx, command responses, 3945 */ | 181 | #define CSR_INT_BIT_SW_RX (1 << 3) /* Rx, command responses */ |
190 | #define CSR_INT_BIT_WAKEUP (1 << 1) /* NIC controller waking up (pwr mgmt) */ | 182 | #define CSR_INT_BIT_WAKEUP (1 << 1) /* NIC controller waking up (pwr mgmt) */ |
191 | #define CSR_INT_BIT_ALIVE (1 << 0) /* uCode interrupts once it initializes */ | 183 | #define CSR_INT_BIT_ALIVE (1 << 0) /* uCode interrupts once it initializes */ |
192 | 184 | ||
@@ -202,29 +194,17 @@ | |||
202 | /* interrupt flags in FH (flow handler) (PCI busmaster DMA) */ | 194 | /* interrupt flags in FH (flow handler) (PCI busmaster DMA) */ |
203 | #define CSR_FH_INT_BIT_ERR (1 << 31) /* Error */ | 195 | #define CSR_FH_INT_BIT_ERR (1 << 31) /* Error */ |
204 | #define CSR_FH_INT_BIT_HI_PRIOR (1 << 30) /* High priority Rx, bypass coalescing */ | 196 | #define CSR_FH_INT_BIT_HI_PRIOR (1 << 30) /* High priority Rx, bypass coalescing */ |
205 | #define CSR39_FH_INT_BIT_RX_CHNL2 (1 << 18) /* Rx channel 2 (3945 only) */ | ||
206 | #define CSR_FH_INT_BIT_RX_CHNL1 (1 << 17) /* Rx channel 1 */ | 197 | #define CSR_FH_INT_BIT_RX_CHNL1 (1 << 17) /* Rx channel 1 */ |
207 | #define CSR_FH_INT_BIT_RX_CHNL0 (1 << 16) /* Rx channel 0 */ | 198 | #define CSR_FH_INT_BIT_RX_CHNL0 (1 << 16) /* Rx channel 0 */ |
208 | #define CSR39_FH_INT_BIT_TX_CHNL6 (1 << 6) /* Tx channel 6 (3945 only) */ | ||
209 | #define CSR_FH_INT_BIT_TX_CHNL1 (1 << 1) /* Tx channel 1 */ | 199 | #define CSR_FH_INT_BIT_TX_CHNL1 (1 << 1) /* Tx channel 1 */ |
210 | #define CSR_FH_INT_BIT_TX_CHNL0 (1 << 0) /* Tx channel 0 */ | 200 | #define CSR_FH_INT_BIT_TX_CHNL0 (1 << 0) /* Tx channel 0 */ |
211 | 201 | ||
212 | #define CSR39_FH_INT_RX_MASK (CSR_FH_INT_BIT_HI_PRIOR | \ | 202 | #define CSR_FH_INT_RX_MASK (CSR_FH_INT_BIT_HI_PRIOR | \ |
213 | CSR39_FH_INT_BIT_RX_CHNL2 | \ | 203 | CSR_FH_INT_BIT_RX_CHNL1 | \ |
214 | CSR_FH_INT_BIT_RX_CHNL1 | \ | 204 | CSR_FH_INT_BIT_RX_CHNL0) |
215 | CSR_FH_INT_BIT_RX_CHNL0) | ||
216 | |||
217 | |||
218 | #define CSR39_FH_INT_TX_MASK (CSR39_FH_INT_BIT_TX_CHNL6 | \ | ||
219 | CSR_FH_INT_BIT_TX_CHNL1 | \ | ||
220 | CSR_FH_INT_BIT_TX_CHNL0) | ||
221 | |||
222 | #define CSR49_FH_INT_RX_MASK (CSR_FH_INT_BIT_HI_PRIOR | \ | ||
223 | CSR_FH_INT_BIT_RX_CHNL1 | \ | ||
224 | CSR_FH_INT_BIT_RX_CHNL0) | ||
225 | 205 | ||
226 | #define CSR49_FH_INT_TX_MASK (CSR_FH_INT_BIT_TX_CHNL1 | \ | 206 | #define CSR_FH_INT_TX_MASK (CSR_FH_INT_BIT_TX_CHNL1 | \ |
227 | CSR_FH_INT_BIT_TX_CHNL0) | 207 | CSR_FH_INT_BIT_TX_CHNL0) |
228 | 208 | ||
229 | /* GPIO */ | 209 | /* GPIO */ |
230 | #define CSR_GPIO_IN_BIT_AUX_POWER (0x00000200) | 210 | #define CSR_GPIO_IN_BIT_AUX_POWER (0x00000200) |
@@ -268,7 +248,7 @@ | |||
268 | * Indicates MAC (ucode processor, etc.) is powered up and can run. | 248 | * Indicates MAC (ucode processor, etc.) is powered up and can run. |
269 | * Internal resources are accessible. | 249 | * Internal resources are accessible. |
270 | * NOTE: This does not indicate that the processor is actually running. | 250 | * NOTE: This does not indicate that the processor is actually running. |
271 | * NOTE: This does not indicate that 4965 or 3945 has completed | 251 | * NOTE: This does not indicate that device has completed |
272 | * init or post-power-down restore of internal SRAM memory. | 252 | * init or post-power-down restore of internal SRAM memory. |
273 | * Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that | 253 | * Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that |
274 | * SRAM is restored and uCode is in normal operation mode. | 254 | * SRAM is restored and uCode is in normal operation mode. |
@@ -291,8 +271,6 @@ | |||
291 | 271 | ||
292 | /* HW REV */ | 272 | /* HW REV */ |
293 | #define CSR_HW_REV_TYPE_MSK (0x00001F0) | 273 | #define CSR_HW_REV_TYPE_MSK (0x00001F0) |
294 | #define CSR_HW_REV_TYPE_3945 (0x00000D0) | ||
295 | #define CSR_HW_REV_TYPE_4965 (0x0000000) | ||
296 | #define CSR_HW_REV_TYPE_5300 (0x0000020) | 274 | #define CSR_HW_REV_TYPE_5300 (0x0000020) |
297 | #define CSR_HW_REV_TYPE_5350 (0x0000030) | 275 | #define CSR_HW_REV_TYPE_5350 (0x0000030) |
298 | #define CSR_HW_REV_TYPE_5100 (0x0000050) | 276 | #define CSR_HW_REV_TYPE_5100 (0x0000050) |
@@ -363,7 +341,7 @@ | |||
363 | * 0: MAC_SLEEP | 341 | * 0: MAC_SLEEP |
364 | * uCode sets this when preparing a power-saving power-down. | 342 | * uCode sets this when preparing a power-saving power-down. |
365 | * uCode resets this when power-up is complete and SRAM is sane. | 343 | * uCode resets this when power-up is complete and SRAM is sane. |
366 | * NOTE: 3945/4965 saves internal SRAM data to host when powering down, | 344 | * NOTE: device saves internal SRAM data to host when powering down, |
367 | * and must restore this data after powering back up. | 345 | * and must restore this data after powering back up. |
368 | * MAC_SLEEP is the best indication that restore is complete. | 346 | * MAC_SLEEP is the best indication that restore is complete. |
369 | * Later devices (5xxx/6xxx/1xxx) use non-volatile SRAM, and | 347 | * Later devices (5xxx/6xxx/1xxx) use non-volatile SRAM, and |
@@ -394,7 +372,6 @@ | |||
394 | #define CSR_LED_REG_TRUN_OFF (0x38) | 372 | #define CSR_LED_REG_TRUN_OFF (0x38) |
395 | 373 | ||
396 | /* ANA_PLL */ | 374 | /* ANA_PLL */ |
397 | #define CSR39_ANA_PLL_CFG_VAL (0x01000000) | ||
398 | #define CSR50_ANA_PLL_CFG_VAL (0x00880300) | 375 | #define CSR50_ANA_PLL_CFG_VAL (0x00880300) |
399 | 376 | ||
400 | /* HPET MEM debug */ | 377 | /* HPET MEM debug */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-debug.h b/drivers/net/wireless/iwlwifi/iwl-debug.h index ebdea3be3ef9..2824ccbcc1fc 100644 --- a/drivers/net/wireless/iwlwifi/iwl-debug.h +++ b/drivers/net/wireless/iwlwifi/iwl-debug.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project. | 5 | * Portions of this file are derived from the ipw3945 project. |
6 | * | 6 | * |
@@ -146,7 +146,6 @@ static inline void iwl_dbgfs_unregister(struct iwl_priv *priv) | |||
146 | #define IWL_DL_RX (1 << 24) | 146 | #define IWL_DL_RX (1 << 24) |
147 | #define IWL_DL_ISR (1 << 25) | 147 | #define IWL_DL_ISR (1 << 25) |
148 | #define IWL_DL_HT (1 << 26) | 148 | #define IWL_DL_HT (1 << 26) |
149 | #define IWL_DL_IO (1 << 27) | ||
150 | /* 0xF0000000 - 0x10000000 */ | 149 | /* 0xF0000000 - 0x10000000 */ |
151 | #define IWL_DL_11H (1 << 28) | 150 | #define IWL_DL_11H (1 << 28) |
152 | #define IWL_DL_STATS (1 << 29) | 151 | #define IWL_DL_STATS (1 << 29) |
@@ -174,7 +173,6 @@ static inline void iwl_dbgfs_unregister(struct iwl_priv *priv) | |||
174 | IWL_DEBUG_LIMIT(p, IWL_DL_DROP, f, ## a) | 173 | IWL_DEBUG_LIMIT(p, IWL_DL_DROP, f, ## a) |
175 | #define IWL_DEBUG_AP(p, f, a...) IWL_DEBUG(p, IWL_DL_AP, f, ## a) | 174 | #define IWL_DEBUG_AP(p, f, a...) IWL_DEBUG(p, IWL_DL_AP, f, ## a) |
176 | #define IWL_DEBUG_TXPOWER(p, f, a...) IWL_DEBUG(p, IWL_DL_TXPOWER, f, ## a) | 175 | #define IWL_DEBUG_TXPOWER(p, f, a...) IWL_DEBUG(p, IWL_DL_TXPOWER, f, ## a) |
177 | #define IWL_DEBUG_IO(p, f, a...) IWL_DEBUG(p, IWL_DL_IO, f, ## a) | ||
178 | #define IWL_DEBUG_RATE(p, f, a...) IWL_DEBUG(p, IWL_DL_RATE, f, ## a) | 176 | #define IWL_DEBUG_RATE(p, f, a...) IWL_DEBUG(p, IWL_DL_RATE, f, ## a) |
179 | #define IWL_DEBUG_RATE_LIMIT(p, f, a...) \ | 177 | #define IWL_DEBUG_RATE_LIMIT(p, f, a...) \ |
180 | IWL_DEBUG_LIMIT(p, IWL_DL_RATE, f, ## a) | 178 | IWL_DEBUG_LIMIT(p, IWL_DL_RATE, f, ## a) |
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c index 8842411f1cf3..92f6efd2c73f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c +++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -1572,12 +1572,10 @@ static ssize_t iwl_dbgfs_bt_traffic_read(struct file *file, | |||
1572 | int pos = 0; | 1572 | int pos = 0; |
1573 | char buf[200]; | 1573 | char buf[200]; |
1574 | const size_t bufsz = sizeof(buf); | 1574 | const size_t bufsz = sizeof(buf); |
1575 | ssize_t ret; | ||
1576 | 1575 | ||
1577 | if (!priv->bt_enable_flag) { | 1576 | if (!priv->bt_enable_flag) { |
1578 | pos += scnprintf(buf + pos, bufsz - pos, "BT coex disabled\n"); | 1577 | pos += scnprintf(buf + pos, bufsz - pos, "BT coex disabled\n"); |
1579 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 1578 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
1580 | return ret; | ||
1581 | } | 1579 | } |
1582 | pos += scnprintf(buf + pos, bufsz - pos, "BT enable flag: 0x%x\n", | 1580 | pos += scnprintf(buf + pos, bufsz - pos, "BT enable flag: 0x%x\n", |
1583 | priv->bt_enable_flag); | 1581 | priv->bt_enable_flag); |
@@ -1608,8 +1606,7 @@ static ssize_t iwl_dbgfs_bt_traffic_read(struct file *file, | |||
1608 | break; | 1606 | break; |
1609 | } | 1607 | } |
1610 | 1608 | ||
1611 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 1609 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
1612 | return ret; | ||
1613 | } | 1610 | } |
1614 | 1611 | ||
1615 | static ssize_t iwl_dbgfs_protection_mode_read(struct file *file, | 1612 | static ssize_t iwl_dbgfs_protection_mode_read(struct file *file, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h index 68b953f2bdc7..72133368c1f5 100644 --- a/drivers/net/wireless/iwlwifi/iwl-dev.h +++ b/drivers/net/wireless/iwlwifi/iwl-dev.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
@@ -26,7 +26,6 @@ | |||
26 | /* | 26 | /* |
27 | * Please use this file (iwl-dev.h) for driver implementation definitions. | 27 | * Please use this file (iwl-dev.h) for driver implementation definitions. |
28 | * Please use iwl-commands.h for uCode API definitions. | 28 | * Please use iwl-commands.h for uCode API definitions. |
29 | * Please use iwl-4965-hw.h for hardware-related definitions. | ||
30 | */ | 29 | */ |
31 | 30 | ||
32 | #ifndef __iwl_dev_h__ | 31 | #ifndef __iwl_dev_h__ |
@@ -179,53 +178,12 @@ struct iwl_tx_queue { | |||
179 | 178 | ||
180 | #define IWL_NUM_SCAN_RATES (2) | 179 | #define IWL_NUM_SCAN_RATES (2) |
181 | 180 | ||
182 | struct iwl4965_channel_tgd_info { | ||
183 | u8 type; | ||
184 | s8 max_power; | ||
185 | }; | ||
186 | |||
187 | struct iwl4965_channel_tgh_info { | ||
188 | s64 last_radar_time; | ||
189 | }; | ||
190 | |||
191 | #define IWL4965_MAX_RATE (33) | ||
192 | |||
193 | struct iwl3945_clip_group { | ||
194 | /* maximum power level to prevent clipping for each rate, derived by | ||
195 | * us from this band's saturation power in EEPROM */ | ||
196 | const s8 clip_powers[IWL_MAX_RATES]; | ||
197 | }; | ||
198 | |||
199 | /* current Tx power values to use, one for each rate for each channel. | ||
200 | * requested power is limited by: | ||
201 | * -- regulatory EEPROM limits for this channel | ||
202 | * -- hardware capabilities (clip-powers) | ||
203 | * -- spectrum management | ||
204 | * -- user preference (e.g. iwconfig) | ||
205 | * when requested power is set, base power index must also be set. */ | ||
206 | struct iwl3945_channel_power_info { | ||
207 | struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ | ||
208 | s8 power_table_index; /* actual (compenst'd) index into gain table */ | ||
209 | s8 base_power_index; /* gain index for power at factory temp. */ | ||
210 | s8 requested_power; /* power (dBm) requested for this chnl/rate */ | ||
211 | }; | ||
212 | |||
213 | /* current scan Tx power values to use, one for each scan rate for each | ||
214 | * channel. */ | ||
215 | struct iwl3945_scan_power_info { | ||
216 | struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ | ||
217 | s8 power_table_index; /* actual (compenst'd) index into gain table */ | ||
218 | s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */ | ||
219 | }; | ||
220 | |||
221 | /* | 181 | /* |
222 | * One for each channel, holds all channel setup data | 182 | * One for each channel, holds all channel setup data |
223 | * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant | 183 | * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant |
224 | * with one another! | 184 | * with one another! |
225 | */ | 185 | */ |
226 | struct iwl_channel_info { | 186 | struct iwl_channel_info { |
227 | struct iwl4965_channel_tgd_info tgd; | ||
228 | struct iwl4965_channel_tgh_info tgh; | ||
229 | struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */ | 187 | struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */ |
230 | struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for | 188 | struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for |
231 | * HT40 channel */ | 189 | * HT40 channel */ |
@@ -245,14 +203,6 @@ struct iwl_channel_info { | |||
245 | s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ | 203 | s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ |
246 | u8 ht40_flags; /* flags copied from EEPROM */ | 204 | u8 ht40_flags; /* flags copied from EEPROM */ |
247 | u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ | 205 | u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ |
248 | |||
249 | /* Radio/DSP gain settings for each "normal" data Tx rate. | ||
250 | * These include, in addition to RF and DSP gain, a few fields for | ||
251 | * remembering/modifying gain settings (indexes). */ | ||
252 | struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE]; | ||
253 | |||
254 | /* Radio/DSP gain settings for each scan rate, for directed scans. */ | ||
255 | struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES]; | ||
256 | }; | 206 | }; |
257 | 207 | ||
258 | #define IWL_TX_FIFO_BK 0 /* shared */ | 208 | #define IWL_TX_FIFO_BK 0 /* shared */ |
@@ -309,6 +259,7 @@ enum { | |||
309 | CMD_SIZE_HUGE = (1 << 0), | 259 | CMD_SIZE_HUGE = (1 << 0), |
310 | CMD_ASYNC = (1 << 1), | 260 | CMD_ASYNC = (1 << 1), |
311 | CMD_WANT_SKB = (1 << 2), | 261 | CMD_WANT_SKB = (1 << 2), |
262 | CMD_MAPPED = (1 << 3), | ||
312 | }; | 263 | }; |
313 | 264 | ||
314 | #define DEF_CMD_PAYLOAD_SIZE 320 | 265 | #define DEF_CMD_PAYLOAD_SIZE 320 |
@@ -416,6 +367,7 @@ struct iwl_ht_agg { | |||
416 | #define IWL_EMPTYING_HW_QUEUE_ADDBA 2 | 367 | #define IWL_EMPTYING_HW_QUEUE_ADDBA 2 |
417 | #define IWL_EMPTYING_HW_QUEUE_DELBA 3 | 368 | #define IWL_EMPTYING_HW_QUEUE_DELBA 3 |
418 | u8 state; | 369 | u8 state; |
370 | u8 tx_fifo; | ||
419 | }; | 371 | }; |
420 | 372 | ||
421 | 373 | ||
@@ -499,9 +451,6 @@ struct iwl_station_priv_common { | |||
499 | * When mac80211 creates a station it reserves some space (hw->sta_data_size) | 451 | * When mac80211 creates a station it reserves some space (hw->sta_data_size) |
500 | * in the structure for use by driver. This structure is places in that | 452 | * in the structure for use by driver. This structure is places in that |
501 | * space. | 453 | * space. |
502 | * | ||
503 | * The common struct MUST be first because it is shared between | ||
504 | * 3945 and agn! | ||
505 | */ | 454 | */ |
506 | struct iwl_station_priv { | 455 | struct iwl_station_priv { |
507 | struct iwl_station_priv_common common; | 456 | struct iwl_station_priv_common common; |
@@ -586,6 +535,22 @@ enum iwl_ucode_tlv_type { | |||
586 | IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13, | 535 | IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13, |
587 | IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14, | 536 | IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14, |
588 | IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15, | 537 | IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15, |
538 | /* 16 and 17 reserved for future use */ | ||
539 | IWL_UCODE_TLV_FLAGS = 18, | ||
540 | }; | ||
541 | |||
542 | /** | ||
543 | * enum iwl_ucode_tlv_flag - ucode API flags | ||
544 | * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously | ||
545 | * was a separate TLV but moved here to save space. | ||
546 | * @IWL_UCODE_TLV_FLAGS_BTSTATS: This uCode image uses BT statistics, which | ||
547 | * may be true even if the device doesn't have BT. | ||
548 | * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w). | ||
549 | */ | ||
550 | enum iwl_ucode_tlv_flag { | ||
551 | IWL_UCODE_TLV_FLAGS_PAN = BIT(0), | ||
552 | IWL_UCODE_TLV_FLAGS_BTSTATS = BIT(1), | ||
553 | IWL_UCODE_TLV_FLAGS_MFP = BIT(2), | ||
589 | }; | 554 | }; |
590 | 555 | ||
591 | struct iwl_ucode_tlv { | 556 | struct iwl_ucode_tlv { |
@@ -619,14 +584,6 @@ struct iwl_tlv_ucode_header { | |||
619 | u8 data[0]; | 584 | u8 data[0]; |
620 | }; | 585 | }; |
621 | 586 | ||
622 | struct iwl4965_ibss_seq { | ||
623 | u8 mac[ETH_ALEN]; | ||
624 | u16 seq_num; | ||
625 | u16 frag_num; | ||
626 | unsigned long packet_time; | ||
627 | struct list_head list; | ||
628 | }; | ||
629 | |||
630 | struct iwl_sensitivity_ranges { | 587 | struct iwl_sensitivity_ranges { |
631 | u16 min_nrg_cck; | 588 | u16 min_nrg_cck; |
632 | u16 max_nrg_cck; | 589 | u16 max_nrg_cck; |
@@ -700,7 +657,6 @@ struct iwl_hw_params { | |||
700 | u8 max_beacon_itrvl; /* in 1024 ms */ | 657 | u8 max_beacon_itrvl; /* in 1024 ms */ |
701 | u32 max_inst_size; | 658 | u32 max_inst_size; |
702 | u32 max_data_size; | 659 | u32 max_data_size; |
703 | u32 max_bsm_size; | ||
704 | u32 ct_kill_threshold; /* value in hw-dependent units */ | 660 | u32 ct_kill_threshold; /* value in hw-dependent units */ |
705 | u32 ct_kill_exit_threshold; /* value in hw-dependent units */ | 661 | u32 ct_kill_exit_threshold; /* value in hw-dependent units */ |
706 | /* for 1000, 6000 series and up */ | 662 | /* for 1000, 6000 series and up */ |
@@ -722,8 +678,6 @@ struct iwl_hw_params { | |||
722 | * Naming convention -- | 678 | * Naming convention -- |
723 | * iwl_ <-- Is part of iwlwifi | 679 | * iwl_ <-- Is part of iwlwifi |
724 | * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX) | 680 | * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX) |
725 | * iwl4965_bg_ <-- Called from work queue context | ||
726 | * iwl4965_mac_ <-- mac80211 callback | ||
727 | * | 681 | * |
728 | ****************************************************************************/ | 682 | ****************************************************************************/ |
729 | extern void iwl_update_chain_flags(struct iwl_priv *priv); | 683 | extern void iwl_update_chain_flags(struct iwl_priv *priv); |
@@ -772,7 +726,6 @@ struct iwl_dma_ptr { | |||
772 | 726 | ||
773 | /* Sensitivity and chain noise calibration */ | 727 | /* Sensitivity and chain noise calibration */ |
774 | #define INITIALIZATION_VALUE 0xFFFF | 728 | #define INITIALIZATION_VALUE 0xFFFF |
775 | #define IWL4965_CAL_NUM_BEACONS 20 | ||
776 | #define IWL_CAL_NUM_BEACONS 16 | 729 | #define IWL_CAL_NUM_BEACONS 16 |
777 | #define MAXIMUM_ALLOWED_PATHLOSS 15 | 730 | #define MAXIMUM_ALLOWED_PATHLOSS 15 |
778 | 731 | ||
@@ -806,24 +759,19 @@ struct iwl_dma_ptr { | |||
806 | #define NRG_NUM_PREV_STAT_L 20 | 759 | #define NRG_NUM_PREV_STAT_L 20 |
807 | #define NUM_RX_CHAINS 3 | 760 | #define NUM_RX_CHAINS 3 |
808 | 761 | ||
809 | enum iwl4965_false_alarm_state { | 762 | enum iwlagn_false_alarm_state { |
810 | IWL_FA_TOO_MANY = 0, | 763 | IWL_FA_TOO_MANY = 0, |
811 | IWL_FA_TOO_FEW = 1, | 764 | IWL_FA_TOO_FEW = 1, |
812 | IWL_FA_GOOD_RANGE = 2, | 765 | IWL_FA_GOOD_RANGE = 2, |
813 | }; | 766 | }; |
814 | 767 | ||
815 | enum iwl4965_chain_noise_state { | 768 | enum iwlagn_chain_noise_state { |
816 | IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */ | 769 | IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */ |
817 | IWL_CHAIN_NOISE_ACCUMULATE, | 770 | IWL_CHAIN_NOISE_ACCUMULATE, |
818 | IWL_CHAIN_NOISE_CALIBRATED, | 771 | IWL_CHAIN_NOISE_CALIBRATED, |
819 | IWL_CHAIN_NOISE_DONE, | 772 | IWL_CHAIN_NOISE_DONE, |
820 | }; | 773 | }; |
821 | 774 | ||
822 | enum iwl4965_calib_enabled_state { | ||
823 | IWL_CALIB_DISABLED = 0, /* must be 0 */ | ||
824 | IWL_CALIB_ENABLED = 1, | ||
825 | }; | ||
826 | |||
827 | 775 | ||
828 | /* | 776 | /* |
829 | * enum iwl_calib | 777 | * enum iwl_calib |
@@ -1131,12 +1079,6 @@ struct iwl_force_reset { | |||
1131 | 1079 | ||
1132 | /* extend beacon time format bit shifting */ | 1080 | /* extend beacon time format bit shifting */ |
1133 | /* | 1081 | /* |
1134 | * for _3945 devices | ||
1135 | * bits 31:24 - extended | ||
1136 | * bits 23:0 - interval | ||
1137 | */ | ||
1138 | #define IWL3945_EXT_BEACON_TIME_POS 24 | ||
1139 | /* | ||
1140 | * for _agn devices | 1082 | * for _agn devices |
1141 | * bits 31:22 - extended | 1083 | * bits 31:22 - extended |
1142 | * bits 21:0 - interval | 1084 | * bits 21:0 - interval |
@@ -1249,7 +1191,6 @@ struct iwl_priv { | |||
1249 | int frames_count; | 1191 | int frames_count; |
1250 | 1192 | ||
1251 | enum ieee80211_band band; | 1193 | enum ieee80211_band band; |
1252 | int alloc_rxb_page; | ||
1253 | 1194 | ||
1254 | void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv, | 1195 | void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv, |
1255 | struct iwl_rx_mem_buffer *rxb); | 1196 | struct iwl_rx_mem_buffer *rxb); |
@@ -1305,16 +1246,12 @@ struct iwl_priv { | |||
1305 | spinlock_t hcmd_lock; /* protect hcmd */ | 1246 | spinlock_t hcmd_lock; /* protect hcmd */ |
1306 | spinlock_t reg_lock; /* protect hw register access */ | 1247 | spinlock_t reg_lock; /* protect hw register access */ |
1307 | struct mutex mutex; | 1248 | struct mutex mutex; |
1308 | struct mutex sync_cmd_mutex; /* enable serialization of sync commands */ | ||
1309 | 1249 | ||
1310 | /* basic pci-network driver stuff */ | 1250 | /* basic pci-network driver stuff */ |
1311 | struct pci_dev *pci_dev; | 1251 | struct pci_dev *pci_dev; |
1312 | 1252 | ||
1313 | /* pci hardware address support */ | 1253 | /* pci hardware address support */ |
1314 | void __iomem *hw_base; | 1254 | void __iomem *hw_base; |
1315 | u32 hw_rev; | ||
1316 | u32 hw_wa_rev; | ||
1317 | u8 rev_id; | ||
1318 | 1255 | ||
1319 | /* microcode/device supports multiple contexts */ | 1256 | /* microcode/device supports multiple contexts */ |
1320 | u8 valid_contexts; | 1257 | u8 valid_contexts; |
@@ -1334,10 +1271,8 @@ struct iwl_priv { | |||
1334 | iwl_ucode.ver */ | 1271 | iwl_ucode.ver */ |
1335 | struct fw_desc ucode_code; /* runtime inst */ | 1272 | struct fw_desc ucode_code; /* runtime inst */ |
1336 | struct fw_desc ucode_data; /* runtime data original */ | 1273 | struct fw_desc ucode_data; /* runtime data original */ |
1337 | struct fw_desc ucode_data_backup; /* runtime data save/restore */ | ||
1338 | struct fw_desc ucode_init; /* initialization inst */ | 1274 | struct fw_desc ucode_init; /* initialization inst */ |
1339 | struct fw_desc ucode_init_data; /* initialization data */ | 1275 | struct fw_desc ucode_init_data; /* initialization data */ |
1340 | struct fw_desc ucode_boot; /* bootstrap inst */ | ||
1341 | enum ucode_type ucode_type; | 1276 | enum ucode_type ucode_type; |
1342 | u8 ucode_write_complete; /* the image write is complete */ | 1277 | u8 ucode_write_complete; /* the image write is complete */ |
1343 | char firmware_name[25]; | 1278 | char firmware_name[25]; |
@@ -1346,10 +1281,10 @@ struct iwl_priv { | |||
1346 | 1281 | ||
1347 | struct iwl_switch_rxon switch_rxon; | 1282 | struct iwl_switch_rxon switch_rxon; |
1348 | 1283 | ||
1349 | /* 1st responses from initialize and runtime uCode images. | 1284 | struct { |
1350 | * _agn's initialize alive response contains some calibration data. */ | 1285 | u32 error_event_table; |
1351 | struct iwl_init_alive_resp card_alive_init; | 1286 | u32 log_event_table; |
1352 | struct iwl_alive_resp card_alive; | 1287 | } device_pointers; |
1353 | 1288 | ||
1354 | u16 active_rate; | 1289 | u16 active_rate; |
1355 | 1290 | ||
@@ -1390,15 +1325,12 @@ struct iwl_priv { | |||
1390 | struct iwl_power_mgr power_data; | 1325 | struct iwl_power_mgr power_data; |
1391 | struct iwl_tt_mgmt thermal_throttle; | 1326 | struct iwl_tt_mgmt thermal_throttle; |
1392 | 1327 | ||
1393 | /* context information */ | ||
1394 | u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */ | ||
1395 | |||
1396 | /* station table variables */ | 1328 | /* station table variables */ |
1397 | 1329 | ||
1398 | /* Note: if lock and sta_lock are needed, lock must be acquired first */ | 1330 | /* Note: if lock and sta_lock are needed, lock must be acquired first */ |
1399 | spinlock_t sta_lock; | 1331 | spinlock_t sta_lock; |
1400 | int num_stations; | 1332 | int num_stations; |
1401 | struct iwl_station_entry stations[IWL_STATION_COUNT]; | 1333 | struct iwl_station_entry stations[IWLAGN_STATION_COUNT]; |
1402 | unsigned long ucode_key_table; | 1334 | unsigned long ucode_key_table; |
1403 | 1335 | ||
1404 | /* queue refcounts */ | 1336 | /* queue refcounts */ |
@@ -1422,101 +1354,66 @@ struct iwl_priv { | |||
1422 | /* Last Rx'd beacon timestamp */ | 1354 | /* Last Rx'd beacon timestamp */ |
1423 | u64 timestamp; | 1355 | u64 timestamp; |
1424 | 1356 | ||
1425 | union { | 1357 | struct { |
1426 | #if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE) | 1358 | /* INT ICT Table */ |
1427 | struct { | 1359 | __le32 *ict_tbl; |
1428 | void *shared_virt; | 1360 | void *ict_tbl_vir; |
1429 | dma_addr_t shared_phys; | 1361 | dma_addr_t ict_tbl_dma; |
1430 | 1362 | dma_addr_t aligned_ict_tbl_dma; | |
1431 | struct delayed_work thermal_periodic; | 1363 | int ict_index; |
1432 | struct delayed_work rfkill_poll; | 1364 | u32 inta; |
1433 | 1365 | bool use_ict; | |
1434 | struct iwl3945_notif_statistics statistics; | 1366 | /* |
1435 | #ifdef CONFIG_IWLWIFI_DEBUGFS | 1367 | * reporting the number of tids has AGG on. 0 means |
1436 | struct iwl3945_notif_statistics accum_statistics; | 1368 | * no AGGREGATION |
1437 | struct iwl3945_notif_statistics delta_statistics; | 1369 | */ |
1438 | struct iwl3945_notif_statistics max_delta; | 1370 | u8 agg_tids_count; |
1439 | #endif | 1371 | |
1440 | 1372 | struct iwl_rx_phy_res last_phy_res; | |
1441 | u32 sta_supp_rates; | 1373 | bool last_phy_res_valid; |
1442 | int last_rx_rssi; /* From Rx packet statistics */ | 1374 | |
1443 | 1375 | struct completion firmware_loading_complete; | |
1444 | /* Rx'd packet timing information */ | 1376 | |
1445 | u32 last_beacon_time; | 1377 | u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr; |
1446 | u64 last_tsf; | 1378 | u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr; |
1447 | 1379 | ||
1448 | /* | 1380 | /* |
1449 | * each calibration channel group in the | 1381 | * chain noise reset and gain commands are the |
1450 | * EEPROM has a derived clip setting for | 1382 | * two extra calibration commands follows the standard |
1451 | * each rate. | 1383 | * phy calibration commands |
1452 | */ | 1384 | */ |
1453 | const struct iwl3945_clip_group clip_groups[5]; | 1385 | u8 phy_calib_chain_noise_reset_cmd; |
1454 | 1386 | u8 phy_calib_chain_noise_gain_cmd; | |
1455 | } _3945; | 1387 | |
1456 | #endif | 1388 | struct iwl_notif_statistics statistics; |
1457 | #if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE) | 1389 | struct iwl_bt_notif_statistics statistics_bt; |
1458 | struct { | 1390 | /* counts reply_tx error */ |
1459 | /* INT ICT Table */ | 1391 | struct reply_tx_error_statistics reply_tx_stats; |
1460 | __le32 *ict_tbl; | 1392 | struct reply_agg_tx_error_statistics reply_agg_tx_stats; |
1461 | void *ict_tbl_vir; | ||
1462 | dma_addr_t ict_tbl_dma; | ||
1463 | dma_addr_t aligned_ict_tbl_dma; | ||
1464 | int ict_index; | ||
1465 | u32 inta; | ||
1466 | bool use_ict; | ||
1467 | /* | ||
1468 | * reporting the number of tids has AGG on. 0 means | ||
1469 | * no AGGREGATION | ||
1470 | */ | ||
1471 | u8 agg_tids_count; | ||
1472 | |||
1473 | struct iwl_rx_phy_res last_phy_res; | ||
1474 | bool last_phy_res_valid; | ||
1475 | |||
1476 | struct completion firmware_loading_complete; | ||
1477 | |||
1478 | u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr; | ||
1479 | u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr; | ||
1480 | |||
1481 | /* | ||
1482 | * chain noise reset and gain commands are the | ||
1483 | * two extra calibration commands follows the standard | ||
1484 | * phy calibration commands | ||
1485 | */ | ||
1486 | u8 phy_calib_chain_noise_reset_cmd; | ||
1487 | u8 phy_calib_chain_noise_gain_cmd; | ||
1488 | |||
1489 | struct iwl_notif_statistics statistics; | ||
1490 | struct iwl_bt_notif_statistics statistics_bt; | ||
1491 | /* counts reply_tx error */ | ||
1492 | struct reply_tx_error_statistics reply_tx_stats; | ||
1493 | struct reply_agg_tx_error_statistics reply_agg_tx_stats; | ||
1494 | #ifdef CONFIG_IWLWIFI_DEBUGFS | 1393 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
1495 | struct iwl_notif_statistics accum_statistics; | 1394 | struct iwl_notif_statistics accum_statistics; |
1496 | struct iwl_notif_statistics delta_statistics; | 1395 | struct iwl_notif_statistics delta_statistics; |
1497 | struct iwl_notif_statistics max_delta; | 1396 | struct iwl_notif_statistics max_delta; |
1498 | struct iwl_bt_notif_statistics accum_statistics_bt; | 1397 | struct iwl_bt_notif_statistics accum_statistics_bt; |
1499 | struct iwl_bt_notif_statistics delta_statistics_bt; | 1398 | struct iwl_bt_notif_statistics delta_statistics_bt; |
1500 | struct iwl_bt_notif_statistics max_delta_bt; | 1399 | struct iwl_bt_notif_statistics max_delta_bt; |
1501 | #endif | 1400 | #endif |
1502 | 1401 | /* notification wait support */ | |
1503 | /* notification wait support */ | 1402 | struct list_head notif_waits; |
1504 | struct list_head notif_waits; | 1403 | spinlock_t notif_wait_lock; |
1505 | spinlock_t notif_wait_lock; | 1404 | wait_queue_head_t notif_waitq; |
1506 | wait_queue_head_t notif_waitq; | 1405 | |
1507 | 1406 | /* remain-on-channel offload support */ | |
1508 | /* remain-on-channel offload support */ | 1407 | struct ieee80211_channel *hw_roc_channel; |
1509 | struct ieee80211_channel *hw_roc_channel; | 1408 | struct delayed_work hw_roc_work; |
1510 | struct delayed_work hw_roc_work; | 1409 | enum nl80211_channel_type hw_roc_chantype; |
1511 | enum nl80211_channel_type hw_roc_chantype; | 1410 | int hw_roc_duration; |
1512 | int hw_roc_duration; | 1411 | bool hw_roc_setup; |
1513 | 1412 | ||
1514 | struct sk_buff *offchan_tx_skb; | 1413 | struct sk_buff *offchan_tx_skb; |
1515 | int offchan_tx_timeout; | 1414 | int offchan_tx_timeout; |
1516 | struct ieee80211_channel *offchan_tx_chan; | 1415 | struct ieee80211_channel *offchan_tx_chan; |
1517 | } _agn; | 1416 | } _agn; |
1518 | #endif | ||
1519 | }; | ||
1520 | 1417 | ||
1521 | /* bt coex */ | 1418 | /* bt coex */ |
1522 | u8 bt_enable_flag; | 1419 | u8 bt_enable_flag; |
@@ -1525,6 +1422,7 @@ struct iwl_priv { | |||
1525 | bool bt_ch_announce; | 1422 | bool bt_ch_announce; |
1526 | bool bt_full_concurrent; | 1423 | bool bt_full_concurrent; |
1527 | bool bt_ant_couple_ok; | 1424 | bool bt_ant_couple_ok; |
1425 | bool bt_statistics; | ||
1528 | __le32 kill_ack_mask; | 1426 | __le32 kill_ack_mask; |
1529 | __le32 kill_cts_mask; | 1427 | __le32 kill_cts_mask; |
1530 | __le16 bt_valid; | 1428 | __le16 bt_valid; |
@@ -1710,12 +1608,10 @@ static inline int is_channel_ibss(const struct iwl_channel_info *ch) | |||
1710 | static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page) | 1608 | static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page) |
1711 | { | 1609 | { |
1712 | __free_pages(page, priv->hw_params.rx_page_order); | 1610 | __free_pages(page, priv->hw_params.rx_page_order); |
1713 | priv->alloc_rxb_page--; | ||
1714 | } | 1611 | } |
1715 | 1612 | ||
1716 | static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page) | 1613 | static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page) |
1717 | { | 1614 | { |
1718 | free_pages(page, priv->hw_params.rx_page_order); | 1615 | free_pages(page, priv->hw_params.rx_page_order); |
1719 | priv->alloc_rxb_page--; | ||
1720 | } | 1616 | } |
1721 | #endif /* __iwl_dev_h__ */ | 1617 | #endif /* __iwl_dev_h__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-devtrace.c b/drivers/net/wireless/iwlwifi/iwl-devtrace.c index 4a487639d932..a635a7e75447 100644 --- a/drivers/net/wireless/iwlwifi/iwl-devtrace.c +++ b/drivers/net/wireless/iwlwifi/iwl-devtrace.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2009 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2009 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
diff --git a/drivers/net/wireless/iwlwifi/iwl-devtrace.h b/drivers/net/wireless/iwlwifi/iwl-devtrace.h index 4cf864c664ee..f00172cb8a6d 100644 --- a/drivers/net/wireless/iwlwifi/iwl-devtrace.h +++ b/drivers/net/wireless/iwlwifi/iwl-devtrace.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2009 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2009 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c index 833194a2c639..859b94a12297 100644 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -188,18 +188,16 @@ static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode) | |||
188 | CSR_OTP_GP_REG_OTP_ACCESS_MODE); | 188 | CSR_OTP_GP_REG_OTP_ACCESS_MODE); |
189 | } | 189 | } |
190 | 190 | ||
191 | static int iwlcore_get_nvm_type(struct iwl_priv *priv) | 191 | static int iwlcore_get_nvm_type(struct iwl_priv *priv, u32 hw_rev) |
192 | { | 192 | { |
193 | u32 otpgp; | 193 | u32 otpgp; |
194 | int nvm_type; | 194 | int nvm_type; |
195 | 195 | ||
196 | /* OTP only valid for CP/PP and after */ | 196 | /* OTP only valid for CP/PP and after */ |
197 | switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { | 197 | switch (hw_rev & CSR_HW_REV_TYPE_MSK) { |
198 | case CSR_HW_REV_TYPE_NONE: | 198 | case CSR_HW_REV_TYPE_NONE: |
199 | IWL_ERR(priv, "Unknown hardware type\n"); | 199 | IWL_ERR(priv, "Unknown hardware type\n"); |
200 | return -ENOENT; | 200 | return -ENOENT; |
201 | case CSR_HW_REV_TYPE_3945: | ||
202 | case CSR_HW_REV_TYPE_4965: | ||
203 | case CSR_HW_REV_TYPE_5300: | 201 | case CSR_HW_REV_TYPE_5300: |
204 | case CSR_HW_REV_TYPE_5350: | 202 | case CSR_HW_REV_TYPE_5350: |
205 | case CSR_HW_REV_TYPE_5100: | 203 | case CSR_HW_REV_TYPE_5100: |
@@ -228,15 +226,15 @@ static int iwl_init_otp_access(struct iwl_priv *priv) | |||
228 | int ret; | 226 | int ret; |
229 | 227 | ||
230 | /* Enable 40MHz radio clock */ | 228 | /* Enable 40MHz radio clock */ |
231 | _iwl_write32(priv, CSR_GP_CNTRL, | 229 | iwl_write32(priv, CSR_GP_CNTRL, |
232 | _iwl_read32(priv, CSR_GP_CNTRL) | | 230 | iwl_read32(priv, CSR_GP_CNTRL) | |
233 | CSR_GP_CNTRL_REG_FLAG_INIT_DONE); | 231 | CSR_GP_CNTRL_REG_FLAG_INIT_DONE); |
234 | 232 | ||
235 | /* wait for clock to be ready */ | 233 | /* wait for clock to be ready */ |
236 | ret = iwl_poll_bit(priv, CSR_GP_CNTRL, | 234 | ret = iwl_poll_bit(priv, CSR_GP_CNTRL, |
237 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, | 235 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, |
238 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, | 236 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, |
239 | 25000); | 237 | 25000); |
240 | if (ret < 0) | 238 | if (ret < 0) |
241 | IWL_ERR(priv, "Time out access OTP\n"); | 239 | IWL_ERR(priv, "Time out access OTP\n"); |
242 | else { | 240 | else { |
@@ -263,17 +261,17 @@ static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, __le16 *eeprom_dat | |||
263 | u32 r; | 261 | u32 r; |
264 | u32 otpgp; | 262 | u32 otpgp; |
265 | 263 | ||
266 | _iwl_write32(priv, CSR_EEPROM_REG, | 264 | iwl_write32(priv, CSR_EEPROM_REG, |
267 | CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); | 265 | CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); |
268 | ret = iwl_poll_bit(priv, CSR_EEPROM_REG, | 266 | ret = iwl_poll_bit(priv, CSR_EEPROM_REG, |
269 | CSR_EEPROM_REG_READ_VALID_MSK, | 267 | CSR_EEPROM_REG_READ_VALID_MSK, |
270 | CSR_EEPROM_REG_READ_VALID_MSK, | 268 | CSR_EEPROM_REG_READ_VALID_MSK, |
271 | IWL_EEPROM_ACCESS_TIMEOUT); | 269 | IWL_EEPROM_ACCESS_TIMEOUT); |
272 | if (ret < 0) { | 270 | if (ret < 0) { |
273 | IWL_ERR(priv, "Time out reading OTP[%d]\n", addr); | 271 | IWL_ERR(priv, "Time out reading OTP[%d]\n", addr); |
274 | return ret; | 272 | return ret; |
275 | } | 273 | } |
276 | r = _iwl_read_direct32(priv, CSR_EEPROM_REG); | 274 | r = iwl_read32(priv, CSR_EEPROM_REG); |
277 | /* check for ECC errors: */ | 275 | /* check for ECC errors: */ |
278 | otpgp = iwl_read32(priv, CSR_OTP_GP_REG); | 276 | otpgp = iwl_read32(priv, CSR_OTP_GP_REG); |
279 | if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) { | 277 | if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) { |
@@ -396,7 +394,7 @@ u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset) | |||
396 | * | 394 | * |
397 | * NOTE: This routine uses the non-debug IO access functions. | 395 | * NOTE: This routine uses the non-debug IO access functions. |
398 | */ | 396 | */ |
399 | int iwl_eeprom_init(struct iwl_priv *priv) | 397 | int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev) |
400 | { | 398 | { |
401 | __le16 *e; | 399 | __le16 *e; |
402 | u32 gp = iwl_read32(priv, CSR_EEPROM_GP); | 400 | u32 gp = iwl_read32(priv, CSR_EEPROM_GP); |
@@ -406,7 +404,7 @@ int iwl_eeprom_init(struct iwl_priv *priv) | |||
406 | u16 validblockaddr = 0; | 404 | u16 validblockaddr = 0; |
407 | u16 cache_addr = 0; | 405 | u16 cache_addr = 0; |
408 | 406 | ||
409 | priv->nvm_device_type = iwlcore_get_nvm_type(priv); | 407 | priv->nvm_device_type = iwlcore_get_nvm_type(priv, hw_rev); |
410 | if (priv->nvm_device_type == -ENOENT) | 408 | if (priv->nvm_device_type == -ENOENT) |
411 | return -ENOENT; | 409 | return -ENOENT; |
412 | /* allocate eeprom */ | 410 | /* allocate eeprom */ |
@@ -444,9 +442,9 @@ int iwl_eeprom_init(struct iwl_priv *priv) | |||
444 | ret = -ENOENT; | 442 | ret = -ENOENT; |
445 | goto done; | 443 | goto done; |
446 | } | 444 | } |
447 | _iwl_write32(priv, CSR_EEPROM_GP, | 445 | iwl_write32(priv, CSR_EEPROM_GP, |
448 | iwl_read32(priv, CSR_EEPROM_GP) & | 446 | iwl_read32(priv, CSR_EEPROM_GP) & |
449 | ~CSR_EEPROM_GP_IF_OWNER_MSK); | 447 | ~CSR_EEPROM_GP_IF_OWNER_MSK); |
450 | 448 | ||
451 | iwl_set_bit(priv, CSR_OTP_GP_REG, | 449 | iwl_set_bit(priv, CSR_OTP_GP_REG, |
452 | CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK | | 450 | CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK | |
@@ -473,8 +471,8 @@ int iwl_eeprom_init(struct iwl_priv *priv) | |||
473 | for (addr = 0; addr < sz; addr += sizeof(u16)) { | 471 | for (addr = 0; addr < sz; addr += sizeof(u16)) { |
474 | u32 r; | 472 | u32 r; |
475 | 473 | ||
476 | _iwl_write32(priv, CSR_EEPROM_REG, | 474 | iwl_write32(priv, CSR_EEPROM_REG, |
477 | CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); | 475 | CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); |
478 | 476 | ||
479 | ret = iwl_poll_bit(priv, CSR_EEPROM_REG, | 477 | ret = iwl_poll_bit(priv, CSR_EEPROM_REG, |
480 | CSR_EEPROM_REG_READ_VALID_MSK, | 478 | CSR_EEPROM_REG_READ_VALID_MSK, |
@@ -484,7 +482,7 @@ int iwl_eeprom_init(struct iwl_priv *priv) | |||
484 | IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr); | 482 | IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr); |
485 | goto done; | 483 | goto done; |
486 | } | 484 | } |
487 | r = _iwl_read_direct32(priv, CSR_EEPROM_REG); | 485 | r = iwl_read32(priv, CSR_EEPROM_REG); |
488 | e[addr / 2] = cpu_to_le16(r >> 16); | 486 | e[addr / 2] = cpu_to_le16(r >> 16); |
489 | } | 487 | } |
490 | } | 488 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h index 20b66469d68f..0e9d9703636a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -110,10 +110,6 @@ enum { | |||
110 | }; | 110 | }; |
111 | 111 | ||
112 | /* SKU Capabilities */ | 112 | /* SKU Capabilities */ |
113 | /* 3945 only */ | ||
114 | #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0) | ||
115 | #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1) | ||
116 | |||
117 | /* 5000 and up */ | 113 | /* 5000 and up */ |
118 | #define EEPROM_SKU_CAP_BAND_POS (4) | 114 | #define EEPROM_SKU_CAP_BAND_POS (4) |
119 | #define EEPROM_SKU_CAP_BAND_SELECTION \ | 115 | #define EEPROM_SKU_CAP_BAND_SELECTION \ |
@@ -168,28 +164,6 @@ struct iwl_eeprom_enhanced_txpwr { | |||
168 | s8 mimo3_max; | 164 | s8 mimo3_max; |
169 | } __packed; | 165 | } __packed; |
170 | 166 | ||
171 | /* 3945 Specific */ | ||
172 | #define EEPROM_3945_EEPROM_VERSION (0x2f) | ||
173 | |||
174 | /* 4965 has two radio transmitters (and 3 radio receivers) */ | ||
175 | #define EEPROM_TX_POWER_TX_CHAINS (2) | ||
176 | |||
177 | /* 4965 has room for up to 8 sets of txpower calibration data */ | ||
178 | #define EEPROM_TX_POWER_BANDS (8) | ||
179 | |||
180 | /* 4965 factory calibration measures txpower gain settings for | ||
181 | * each of 3 target output levels */ | ||
182 | #define EEPROM_TX_POWER_MEASUREMENTS (3) | ||
183 | |||
184 | /* 4965 Specific */ | ||
185 | /* 4965 driver does not work with txpower calibration version < 5 */ | ||
186 | #define EEPROM_4965_TX_POWER_VERSION (5) | ||
187 | #define EEPROM_4965_EEPROM_VERSION (0x2f) | ||
188 | #define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */ | ||
189 | #define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */ | ||
190 | #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */ | ||
191 | #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */ | ||
192 | |||
193 | /* 5000 Specific */ | 167 | /* 5000 Specific */ |
194 | #define EEPROM_5000_TX_POWER_VERSION (4) | 168 | #define EEPROM_5000_TX_POWER_VERSION (4) |
195 | #define EEPROM_5000_EEPROM_VERSION (0x11A) | 169 | #define EEPROM_5000_EEPROM_VERSION (0x11A) |
@@ -282,90 +256,6 @@ struct iwl_eeprom_enhanced_txpwr { | |||
282 | /* 2.4 GHz */ | 256 | /* 2.4 GHz */ |
283 | extern const u8 iwl_eeprom_band_1[14]; | 257 | extern const u8 iwl_eeprom_band_1[14]; |
284 | 258 | ||
285 | /* | ||
286 | * factory calibration data for one txpower level, on one channel, | ||
287 | * measured on one of the 2 tx chains (radio transmitter and associated | ||
288 | * antenna). EEPROM contains: | ||
289 | * | ||
290 | * 1) Temperature (degrees Celsius) of device when measurement was made. | ||
291 | * | ||
292 | * 2) Gain table index used to achieve the target measurement power. | ||
293 | * This refers to the "well-known" gain tables (see iwl-4965-hw.h). | ||
294 | * | ||
295 | * 3) Actual measured output power, in half-dBm ("34" = 17 dBm). | ||
296 | * | ||
297 | * 4) RF power amplifier detector level measurement (not used). | ||
298 | */ | ||
299 | struct iwl_eeprom_calib_measure { | ||
300 | u8 temperature; /* Device temperature (Celsius) */ | ||
301 | u8 gain_idx; /* Index into gain table */ | ||
302 | u8 actual_pow; /* Measured RF output power, half-dBm */ | ||
303 | s8 pa_det; /* Power amp detector level (not used) */ | ||
304 | } __packed; | ||
305 | |||
306 | |||
307 | /* | ||
308 | * measurement set for one channel. EEPROM contains: | ||
309 | * | ||
310 | * 1) Channel number measured | ||
311 | * | ||
312 | * 2) Measurements for each of 3 power levels for each of 2 radio transmitters | ||
313 | * (a.k.a. "tx chains") (6 measurements altogether) | ||
314 | */ | ||
315 | struct iwl_eeprom_calib_ch_info { | ||
316 | u8 ch_num; | ||
317 | struct iwl_eeprom_calib_measure | ||
318 | measurements[EEPROM_TX_POWER_TX_CHAINS] | ||
319 | [EEPROM_TX_POWER_MEASUREMENTS]; | ||
320 | } __packed; | ||
321 | |||
322 | /* | ||
323 | * txpower subband info. | ||
324 | * | ||
325 | * For each frequency subband, EEPROM contains the following: | ||
326 | * | ||
327 | * 1) First and last channels within range of the subband. "0" values | ||
328 | * indicate that this sample set is not being used. | ||
329 | * | ||
330 | * 2) Sample measurement sets for 2 channels close to the range endpoints. | ||
331 | */ | ||
332 | struct iwl_eeprom_calib_subband_info { | ||
333 | u8 ch_from; /* channel number of lowest channel in subband */ | ||
334 | u8 ch_to; /* channel number of highest channel in subband */ | ||
335 | struct iwl_eeprom_calib_ch_info ch1; | ||
336 | struct iwl_eeprom_calib_ch_info ch2; | ||
337 | } __packed; | ||
338 | |||
339 | |||
340 | /* | ||
341 | * txpower calibration info. EEPROM contains: | ||
342 | * | ||
343 | * 1) Factory-measured saturation power levels (maximum levels at which | ||
344 | * tx power amplifier can output a signal without too much distortion). | ||
345 | * There is one level for 2.4 GHz band and one for 5 GHz band. These | ||
346 | * values apply to all channels within each of the bands. | ||
347 | * | ||
348 | * 2) Factory-measured power supply voltage level. This is assumed to be | ||
349 | * constant (i.e. same value applies to all channels/bands) while the | ||
350 | * factory measurements are being made. | ||
351 | * | ||
352 | * 3) Up to 8 sets of factory-measured txpower calibration values. | ||
353 | * These are for different frequency ranges, since txpower gain | ||
354 | * characteristics of the analog radio circuitry vary with frequency. | ||
355 | * | ||
356 | * Not all sets need to be filled with data; | ||
357 | * struct iwl_eeprom_calib_subband_info contains range of channels | ||
358 | * (0 if unused) for each set of data. | ||
359 | */ | ||
360 | struct iwl_eeprom_calib_info { | ||
361 | u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */ | ||
362 | u8 saturation_power52; /* half-dBm */ | ||
363 | __le16 voltage; /* signed */ | ||
364 | struct iwl_eeprom_calib_subband_info | ||
365 | band_info[EEPROM_TX_POWER_BANDS]; | ||
366 | } __packed; | ||
367 | |||
368 | |||
369 | #define ADDRESS_MSK 0x0000FFFF | 259 | #define ADDRESS_MSK 0x0000FFFF |
370 | #define INDIRECT_TYPE_MSK 0x000F0000 | 260 | #define INDIRECT_TYPE_MSK 0x000F0000 |
371 | #define INDIRECT_HOST 0x00010000 | 261 | #define INDIRECT_HOST 0x00010000 |
@@ -398,83 +288,8 @@ struct iwl_eeprom_calib_info { | |||
398 | #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ | 288 | #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ |
399 | #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ | 289 | #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ |
400 | 290 | ||
401 | #define EEPROM_3945_RF_CFG_TYPE_MAX 0x0 | ||
402 | #define EEPROM_4965_RF_CFG_TYPE_MAX 0x1 | ||
403 | |||
404 | /* Radio Config for 5000 and up */ | ||
405 | #define EEPROM_RF_CONFIG_TYPE_R3x3 0x0 | ||
406 | #define EEPROM_RF_CONFIG_TYPE_R2x2 0x1 | ||
407 | #define EEPROM_RF_CONFIG_TYPE_R1x2 0x2 | ||
408 | #define EEPROM_RF_CONFIG_TYPE_MAX 0x3 | 291 | #define EEPROM_RF_CONFIG_TYPE_MAX 0x3 |
409 | 292 | ||
410 | /* | ||
411 | * Per-channel regulatory data. | ||
412 | * | ||
413 | * Each channel that *might* be supported by iwl has a fixed location | ||
414 | * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory | ||
415 | * txpower (MSB). | ||
416 | * | ||
417 | * Entries immediately below are for 20 MHz channel width. HT40 (40 MHz) | ||
418 | * channels (only for 4965, not supported by 3945) appear later in the EEPROM. | ||
419 | * | ||
420 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 | ||
421 | */ | ||
422 | #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */ | ||
423 | #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */ | ||
424 | #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */ | ||
425 | |||
426 | /* | ||
427 | * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196, | ||
428 | * 5.0 GHz channels 7, 8, 11, 12, 16 | ||
429 | * (4915-5080MHz) (none of these is ever supported) | ||
430 | */ | ||
431 | #define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */ | ||
432 | #define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */ | ||
433 | |||
434 | /* | ||
435 | * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 | ||
436 | * (5170-5320MHz) | ||
437 | */ | ||
438 | #define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */ | ||
439 | #define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */ | ||
440 | |||
441 | /* | ||
442 | * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 | ||
443 | * (5500-5700MHz) | ||
444 | */ | ||
445 | #define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */ | ||
446 | #define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */ | ||
447 | |||
448 | /* | ||
449 | * 5.7 GHz channels 145, 149, 153, 157, 161, 165 | ||
450 | * (5725-5825MHz) | ||
451 | */ | ||
452 | #define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */ | ||
453 | #define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */ | ||
454 | |||
455 | /* | ||
456 | * 2.4 GHz HT40 channels 1 (5), 2 (6), 3 (7), 4 (8), 5 (9), 6 (10), 7 (11) | ||
457 | * | ||
458 | * The channel listed is the center of the lower 20 MHz half of the channel. | ||
459 | * The overall center frequency is actually 2 channels (10 MHz) above that, | ||
460 | * and the upper half of each HT40 channel is centered 4 channels (20 MHz) away | ||
461 | * from the lower half; e.g. the upper half of HT40 channel 1 is channel 5, | ||
462 | * and the overall HT40 channel width centers on channel 3. | ||
463 | * | ||
464 | * NOTE: The RXON command uses 20 MHz channel numbers to specify the | ||
465 | * control channel to which to tune. RXON also specifies whether the | ||
466 | * control channel is the upper or lower half of a HT40 channel. | ||
467 | * | ||
468 | * NOTE: 4965 does not support HT40 channels on 2.4 GHz. | ||
469 | */ | ||
470 | #define EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS (2*0xA0) /* 14 bytes */ | ||
471 | |||
472 | /* | ||
473 | * 5.2 GHz HT40 channels 36 (40), 44 (48), 52 (56), 60 (64), | ||
474 | * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161) | ||
475 | */ | ||
476 | #define EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS (2*0xA8) /* 22 bytes */ | ||
477 | |||
478 | #define EEPROM_REGULATORY_BAND_NO_HT40 (0) | 293 | #define EEPROM_REGULATORY_BAND_NO_HT40 (0) |
479 | 294 | ||
480 | struct iwl_eeprom_ops { | 295 | struct iwl_eeprom_ops { |
@@ -487,7 +302,7 @@ struct iwl_eeprom_ops { | |||
487 | }; | 302 | }; |
488 | 303 | ||
489 | 304 | ||
490 | int iwl_eeprom_init(struct iwl_priv *priv); | 305 | int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev); |
491 | void iwl_eeprom_free(struct iwl_priv *priv); | 306 | void iwl_eeprom_free(struct iwl_priv *priv); |
492 | int iwl_eeprom_check_version(struct iwl_priv *priv); | 307 | int iwl_eeprom_check_version(struct iwl_priv *priv); |
493 | int iwl_eeprom_check_sku(struct iwl_priv *priv); | 308 | int iwl_eeprom_check_sku(struct iwl_priv *priv); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-fh.h b/drivers/net/wireless/iwlwifi/iwl-fh.h index 474009a244d4..e7a1bc6b76fd 100644 --- a/drivers/net/wireless/iwlwifi/iwl-fh.h +++ b/drivers/net/wireless/iwlwifi/iwl-fh.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
diff --git a/drivers/net/wireless/iwlwifi/iwl-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-hcmd.c index 02499f684683..9177b553fe57 100644 --- a/drivers/net/wireless/iwlwifi/iwl-hcmd.c +++ b/drivers/net/wireless/iwlwifi/iwl-hcmd.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
@@ -51,9 +51,7 @@ const char *get_cmd_string(u8 cmd) | |||
51 | IWL_CMD(REPLY_REMOVE_ALL_STA); | 51 | IWL_CMD(REPLY_REMOVE_ALL_STA); |
52 | IWL_CMD(REPLY_TXFIFO_FLUSH); | 52 | IWL_CMD(REPLY_TXFIFO_FLUSH); |
53 | IWL_CMD(REPLY_WEPKEY); | 53 | IWL_CMD(REPLY_WEPKEY); |
54 | IWL_CMD(REPLY_3945_RX); | ||
55 | IWL_CMD(REPLY_TX); | 54 | IWL_CMD(REPLY_TX); |
56 | IWL_CMD(REPLY_RATE_SCALE); | ||
57 | IWL_CMD(REPLY_LEDS_CMD); | 55 | IWL_CMD(REPLY_LEDS_CMD); |
58 | IWL_CMD(REPLY_TX_LINK_QUALITY_CMD); | 56 | IWL_CMD(REPLY_TX_LINK_QUALITY_CMD); |
59 | IWL_CMD(COEX_PRIORITY_TABLE_CMD); | 57 | IWL_CMD(COEX_PRIORITY_TABLE_CMD); |
@@ -171,14 +169,13 @@ int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
171 | int cmd_idx; | 169 | int cmd_idx; |
172 | int ret; | 170 | int ret; |
173 | 171 | ||
174 | BUG_ON(cmd->flags & CMD_ASYNC); | 172 | lockdep_assert_held(&priv->mutex); |
175 | 173 | ||
176 | /* A synchronous command can not have a callback set. */ | 174 | /* A synchronous command can not have a callback set. */ |
177 | BUG_ON(cmd->callback); | 175 | BUG_ON((cmd->flags & CMD_ASYNC) || cmd->callback); |
178 | 176 | ||
179 | IWL_DEBUG_INFO(priv, "Attempting to send sync command %s\n", | 177 | IWL_DEBUG_INFO(priv, "Attempting to send sync command %s\n", |
180 | get_cmd_string(cmd->id)); | 178 | get_cmd_string(cmd->id)); |
181 | mutex_lock(&priv->sync_cmd_mutex); | ||
182 | 179 | ||
183 | set_bit(STATUS_HCMD_ACTIVE, &priv->status); | 180 | set_bit(STATUS_HCMD_ACTIVE, &priv->status); |
184 | IWL_DEBUG_INFO(priv, "Setting HCMD_ACTIVE for command %s\n", | 181 | IWL_DEBUG_INFO(priv, "Setting HCMD_ACTIVE for command %s\n", |
@@ -189,7 +186,7 @@ int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
189 | ret = cmd_idx; | 186 | ret = cmd_idx; |
190 | IWL_ERR(priv, "Error sending %s: enqueue_hcmd failed: %d\n", | 187 | IWL_ERR(priv, "Error sending %s: enqueue_hcmd failed: %d\n", |
191 | get_cmd_string(cmd->id), ret); | 188 | get_cmd_string(cmd->id), ret); |
192 | goto out; | 189 | return ret; |
193 | } | 190 | } |
194 | 191 | ||
195 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | 192 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, |
@@ -229,8 +226,7 @@ int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
229 | goto cancel; | 226 | goto cancel; |
230 | } | 227 | } |
231 | 228 | ||
232 | ret = 0; | 229 | return 0; |
233 | goto out; | ||
234 | 230 | ||
235 | cancel: | 231 | cancel: |
236 | if (cmd->flags & CMD_WANT_SKB) { | 232 | if (cmd->flags & CMD_WANT_SKB) { |
@@ -248,8 +244,7 @@ fail: | |||
248 | iwl_free_pages(priv, cmd->reply_page); | 244 | iwl_free_pages(priv, cmd->reply_page); |
249 | cmd->reply_page = 0; | 245 | cmd->reply_page = 0; |
250 | } | 246 | } |
251 | out: | 247 | |
252 | mutex_unlock(&priv->sync_cmd_mutex); | ||
253 | return ret; | 248 | return ret; |
254 | } | 249 | } |
255 | 250 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-helpers.h b/drivers/net/wireless/iwlwifi/iwl-helpers.h index 8821f088ba7f..5da5761c74b1 100644 --- a/drivers/net/wireless/iwlwifi/iwl-helpers.h +++ b/drivers/net/wireless/iwlwifi/iwl-helpers.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
diff --git a/drivers/net/wireless/iwlwifi/iwl-io.c b/drivers/net/wireless/iwlwifi/iwl-io.c new file mode 100644 index 000000000000..51337416e4ca --- /dev/null +++ b/drivers/net/wireless/iwlwifi/iwl-io.c | |||
@@ -0,0 +1,274 @@ | |||
1 | /****************************************************************************** | ||
2 | * | ||
3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. | ||
4 | * | ||
5 | * Portions of this file are derived from the ipw3945 project. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of version 2 of the GNU General Public License as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | * more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along with | ||
17 | * this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | ||
19 | * | ||
20 | * The full GNU General Public License is included in this distribution in the | ||
21 | * file called LICENSE. | ||
22 | * | ||
23 | * Contact Information: | ||
24 | * Intel Linux Wireless <ilw@linux.intel.com> | ||
25 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
26 | * | ||
27 | *****************************************************************************/ | ||
28 | |||
29 | #include "iwl-io.h" | ||
30 | |||
31 | #define IWL_POLL_INTERVAL 10 /* microseconds */ | ||
32 | |||
33 | static inline void __iwl_set_bit(struct iwl_priv *priv, u32 reg, u32 mask) | ||
34 | { | ||
35 | iwl_write32(priv, reg, iwl_read32(priv, reg) | mask); | ||
36 | } | ||
37 | |||
38 | static inline void __iwl_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask) | ||
39 | { | ||
40 | iwl_write32(priv, reg, iwl_read32(priv, reg) & ~mask); | ||
41 | } | ||
42 | |||
43 | void iwl_set_bit(struct iwl_priv *priv, u32 reg, u32 mask) | ||
44 | { | ||
45 | unsigned long flags; | ||
46 | |||
47 | spin_lock_irqsave(&priv->reg_lock, flags); | ||
48 | __iwl_set_bit(priv, reg, mask); | ||
49 | spin_unlock_irqrestore(&priv->reg_lock, flags); | ||
50 | } | ||
51 | |||
52 | void iwl_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask) | ||
53 | { | ||
54 | unsigned long flags; | ||
55 | |||
56 | spin_lock_irqsave(&priv->reg_lock, flags); | ||
57 | __iwl_clear_bit(priv, reg, mask); | ||
58 | spin_unlock_irqrestore(&priv->reg_lock, flags); | ||
59 | } | ||
60 | |||
61 | int iwl_poll_bit(struct iwl_priv *priv, u32 addr, | ||
62 | u32 bits, u32 mask, int timeout) | ||
63 | { | ||
64 | int t = 0; | ||
65 | |||
66 | do { | ||
67 | if ((iwl_read32(priv, addr) & mask) == (bits & mask)) | ||
68 | return t; | ||
69 | udelay(IWL_POLL_INTERVAL); | ||
70 | t += IWL_POLL_INTERVAL; | ||
71 | } while (t < timeout); | ||
72 | |||
73 | return -ETIMEDOUT; | ||
74 | } | ||
75 | |||
76 | int iwl_grab_nic_access(struct iwl_priv *priv) | ||
77 | { | ||
78 | int ret; | ||
79 | u32 val; | ||
80 | |||
81 | lockdep_assert_held(&priv->reg_lock); | ||
82 | |||
83 | /* this bit wakes up the NIC */ | ||
84 | __iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
85 | |||
86 | /* | ||
87 | * These bits say the device is running, and should keep running for | ||
88 | * at least a short while (at least as long as MAC_ACCESS_REQ stays 1), | ||
89 | * but they do not indicate that embedded SRAM is restored yet; | ||
90 | * 3945 and 4965 have volatile SRAM, and must save/restore contents | ||
91 | * to/from host DRAM when sleeping/waking for power-saving. | ||
92 | * Each direction takes approximately 1/4 millisecond; with this | ||
93 | * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a | ||
94 | * series of register accesses are expected (e.g. reading Event Log), | ||
95 | * to keep device from sleeping. | ||
96 | * | ||
97 | * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that | ||
98 | * SRAM is okay/restored. We don't check that here because this call | ||
99 | * is just for hardware register access; but GP1 MAC_SLEEP check is a | ||
100 | * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log). | ||
101 | * | ||
102 | * 5000 series and later (including 1000 series) have non-volatile SRAM, | ||
103 | * and do not save/restore SRAM when power cycling. | ||
104 | */ | ||
105 | ret = iwl_poll_bit(priv, CSR_GP_CNTRL, | ||
106 | CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, | ||
107 | (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | | ||
108 | CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000); | ||
109 | if (ret < 0) { | ||
110 | val = iwl_read32(priv, CSR_GP_CNTRL); | ||
111 | IWL_ERR(priv, | ||
112 | "MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val); | ||
113 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI); | ||
114 | return -EIO; | ||
115 | } | ||
116 | |||
117 | return 0; | ||
118 | } | ||
119 | |||
120 | void iwl_release_nic_access(struct iwl_priv *priv) | ||
121 | { | ||
122 | lockdep_assert_held(&priv->reg_lock); | ||
123 | __iwl_clear_bit(priv, CSR_GP_CNTRL, | ||
124 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
125 | } | ||
126 | |||
127 | u32 iwl_read_direct32(struct iwl_priv *priv, u32 reg) | ||
128 | { | ||
129 | u32 value; | ||
130 | unsigned long flags; | ||
131 | |||
132 | spin_lock_irqsave(&priv->reg_lock, flags); | ||
133 | iwl_grab_nic_access(priv); | ||
134 | value = iwl_read32(priv, reg); | ||
135 | iwl_release_nic_access(priv); | ||
136 | spin_unlock_irqrestore(&priv->reg_lock, flags); | ||
137 | |||
138 | return value; | ||
139 | } | ||
140 | |||
141 | void iwl_write_direct32(struct iwl_priv *priv, u32 reg, u32 value) | ||
142 | { | ||
143 | unsigned long flags; | ||
144 | |||
145 | spin_lock_irqsave(&priv->reg_lock, flags); | ||
146 | if (!iwl_grab_nic_access(priv)) { | ||
147 | iwl_write32(priv, reg, value); | ||
148 | iwl_release_nic_access(priv); | ||
149 | } | ||
150 | spin_unlock_irqrestore(&priv->reg_lock, flags); | ||
151 | } | ||
152 | |||
153 | int iwl_poll_direct_bit(struct iwl_priv *priv, u32 addr, u32 mask, | ||
154 | int timeout) | ||
155 | { | ||
156 | int t = 0; | ||
157 | |||
158 | do { | ||
159 | if ((iwl_read_direct32(priv, addr) & mask) == mask) | ||
160 | return t; | ||
161 | udelay(IWL_POLL_INTERVAL); | ||
162 | t += IWL_POLL_INTERVAL; | ||
163 | } while (t < timeout); | ||
164 | |||
165 | return -ETIMEDOUT; | ||
166 | } | ||
167 | |||
168 | static inline u32 __iwl_read_prph(struct iwl_priv *priv, u32 reg) | ||
169 | { | ||
170 | iwl_write32(priv, HBUS_TARG_PRPH_RADDR, reg | (3 << 24)); | ||
171 | rmb(); | ||
172 | return iwl_read32(priv, HBUS_TARG_PRPH_RDAT); | ||
173 | } | ||
174 | |||
175 | static inline void __iwl_write_prph(struct iwl_priv *priv, u32 addr, u32 val) | ||
176 | { | ||
177 | iwl_write32(priv, HBUS_TARG_PRPH_WADDR, | ||
178 | ((addr & 0x0000FFFF) | (3 << 24))); | ||
179 | wmb(); | ||
180 | iwl_write32(priv, HBUS_TARG_PRPH_WDAT, val); | ||
181 | } | ||
182 | |||
183 | u32 iwl_read_prph(struct iwl_priv *priv, u32 reg) | ||
184 | { | ||
185 | unsigned long flags; | ||
186 | u32 val; | ||
187 | |||
188 | spin_lock_irqsave(&priv->reg_lock, flags); | ||
189 | iwl_grab_nic_access(priv); | ||
190 | val = __iwl_read_prph(priv, reg); | ||
191 | iwl_release_nic_access(priv); | ||
192 | spin_unlock_irqrestore(&priv->reg_lock, flags); | ||
193 | return val; | ||
194 | } | ||
195 | |||
196 | void iwl_write_prph(struct iwl_priv *priv, u32 addr, u32 val) | ||
197 | { | ||
198 | unsigned long flags; | ||
199 | |||
200 | spin_lock_irqsave(&priv->reg_lock, flags); | ||
201 | if (!iwl_grab_nic_access(priv)) { | ||
202 | __iwl_write_prph(priv, addr, val); | ||
203 | iwl_release_nic_access(priv); | ||
204 | } | ||
205 | spin_unlock_irqrestore(&priv->reg_lock, flags); | ||
206 | } | ||
207 | |||
208 | void iwl_set_bits_prph(struct iwl_priv *priv, u32 reg, u32 mask) | ||
209 | { | ||
210 | unsigned long flags; | ||
211 | |||
212 | spin_lock_irqsave(&priv->reg_lock, flags); | ||
213 | iwl_grab_nic_access(priv); | ||
214 | __iwl_write_prph(priv, reg, __iwl_read_prph(priv, reg) | mask); | ||
215 | iwl_release_nic_access(priv); | ||
216 | spin_unlock_irqrestore(&priv->reg_lock, flags); | ||
217 | } | ||
218 | |||
219 | void iwl_set_bits_mask_prph(struct iwl_priv *priv, u32 reg, | ||
220 | u32 bits, u32 mask) | ||
221 | { | ||
222 | unsigned long flags; | ||
223 | |||
224 | spin_lock_irqsave(&priv->reg_lock, flags); | ||
225 | iwl_grab_nic_access(priv); | ||
226 | __iwl_write_prph(priv, reg, | ||
227 | (__iwl_read_prph(priv, reg) & mask) | bits); | ||
228 | iwl_release_nic_access(priv); | ||
229 | spin_unlock_irqrestore(&priv->reg_lock, flags); | ||
230 | } | ||
231 | |||
232 | void iwl_clear_bits_prph(struct iwl_priv *priv, u32 reg, u32 mask) | ||
233 | { | ||
234 | unsigned long flags; | ||
235 | u32 val; | ||
236 | |||
237 | spin_lock_irqsave(&priv->reg_lock, flags); | ||
238 | iwl_grab_nic_access(priv); | ||
239 | val = __iwl_read_prph(priv, reg); | ||
240 | __iwl_write_prph(priv, reg, (val & ~mask)); | ||
241 | iwl_release_nic_access(priv); | ||
242 | spin_unlock_irqrestore(&priv->reg_lock, flags); | ||
243 | } | ||
244 | |||
245 | u32 iwl_read_targ_mem(struct iwl_priv *priv, u32 addr) | ||
246 | { | ||
247 | unsigned long flags; | ||
248 | u32 value; | ||
249 | |||
250 | spin_lock_irqsave(&priv->reg_lock, flags); | ||
251 | iwl_grab_nic_access(priv); | ||
252 | |||
253 | iwl_write32(priv, HBUS_TARG_MEM_RADDR, addr); | ||
254 | rmb(); | ||
255 | value = iwl_read32(priv, HBUS_TARG_MEM_RDAT); | ||
256 | |||
257 | iwl_release_nic_access(priv); | ||
258 | spin_unlock_irqrestore(&priv->reg_lock, flags); | ||
259 | return value; | ||
260 | } | ||
261 | |||
262 | void iwl_write_targ_mem(struct iwl_priv *priv, u32 addr, u32 val) | ||
263 | { | ||
264 | unsigned long flags; | ||
265 | |||
266 | spin_lock_irqsave(&priv->reg_lock, flags); | ||
267 | if (!iwl_grab_nic_access(priv)) { | ||
268 | iwl_write32(priv, HBUS_TARG_MEM_WADDR, addr); | ||
269 | wmb(); | ||
270 | iwl_write32(priv, HBUS_TARG_MEM_WDAT, val); | ||
271 | iwl_release_nic_access(priv); | ||
272 | } | ||
273 | spin_unlock_irqrestore(&priv->reg_lock, flags); | ||
274 | } | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-io.h b/drivers/net/wireless/iwlwifi/iwl-io.h index 0203a3bbf872..ab632baf49d5 100644 --- a/drivers/net/wireless/iwlwifi/iwl-io.h +++ b/drivers/net/wireless/iwlwifi/iwl-io.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project. | 5 | * Portions of this file are derived from the ipw3945 project. |
6 | * | 6 | * |
@@ -35,494 +35,47 @@ | |||
35 | #include "iwl-debug.h" | 35 | #include "iwl-debug.h" |
36 | #include "iwl-devtrace.h" | 36 | #include "iwl-devtrace.h" |
37 | 37 | ||
38 | /* | 38 | static inline void iwl_write8(struct iwl_priv *priv, u32 ofs, u8 val) |
39 | * IO, register, and NIC memory access functions | ||
40 | * | ||
41 | * NOTE on naming convention and macro usage for these | ||
42 | * | ||
43 | * A single _ prefix before a an access function means that no state | ||
44 | * check or debug information is printed when that function is called. | ||
45 | * | ||
46 | * A double __ prefix before an access function means that state is checked | ||
47 | * and the current line number and caller function name are printed in addition | ||
48 | * to any other debug output. | ||
49 | * | ||
50 | * The non-prefixed name is the #define that maps the caller into a | ||
51 | * #define that provides the caller's name and __LINE__ to the double | ||
52 | * prefix version. | ||
53 | * | ||
54 | * If you wish to call the function without any debug or state checking, | ||
55 | * you should use the single _ prefix version (as is used by dependent IO | ||
56 | * routines, for example _iwl_read_direct32 calls the non-check version of | ||
57 | * _iwl_read32.) | ||
58 | * | ||
59 | * These declarations are *extremely* useful in quickly isolating code deltas | ||
60 | * which result in misconfiguration of the hardware I/O. In combination with | ||
61 | * git-bisect and the IO debug level you can quickly determine the specific | ||
62 | * commit which breaks the IO sequence to the hardware. | ||
63 | * | ||
64 | */ | ||
65 | |||
66 | static inline void _iwl_write8(struct iwl_priv *priv, u32 ofs, u8 val) | ||
67 | { | 39 | { |
68 | trace_iwlwifi_dev_iowrite8(priv, ofs, val); | 40 | trace_iwlwifi_dev_iowrite8(priv, ofs, val); |
69 | iowrite8(val, priv->hw_base + ofs); | 41 | iowrite8(val, priv->hw_base + ofs); |
70 | } | 42 | } |
71 | 43 | ||
72 | #ifdef CONFIG_IWLWIFI_DEBUG | 44 | static inline void iwl_write32(struct iwl_priv *priv, u32 ofs, u32 val) |
73 | static inline void __iwl_write8(const char *f, u32 l, struct iwl_priv *priv, | ||
74 | u32 ofs, u8 val) | ||
75 | { | ||
76 | IWL_DEBUG_IO(priv, "write8(0x%08X, 0x%02X) - %s %d\n", ofs, val, f, l); | ||
77 | _iwl_write8(priv, ofs, val); | ||
78 | } | ||
79 | #define iwl_write8(priv, ofs, val) \ | ||
80 | __iwl_write8(__FILE__, __LINE__, priv, ofs, val) | ||
81 | #else | ||
82 | #define iwl_write8(priv, ofs, val) _iwl_write8(priv, ofs, val) | ||
83 | #endif | ||
84 | |||
85 | |||
86 | static inline void _iwl_write32(struct iwl_priv *priv, u32 ofs, u32 val) | ||
87 | { | 45 | { |
88 | trace_iwlwifi_dev_iowrite32(priv, ofs, val); | 46 | trace_iwlwifi_dev_iowrite32(priv, ofs, val); |
89 | iowrite32(val, priv->hw_base + ofs); | 47 | iowrite32(val, priv->hw_base + ofs); |
90 | } | 48 | } |
91 | 49 | ||
92 | #ifdef CONFIG_IWLWIFI_DEBUG | 50 | static inline u32 iwl_read32(struct iwl_priv *priv, u32 ofs) |
93 | static inline void __iwl_write32(const char *f, u32 l, struct iwl_priv *priv, | ||
94 | u32 ofs, u32 val) | ||
95 | { | ||
96 | IWL_DEBUG_IO(priv, "write32(0x%08X, 0x%08X) - %s %d\n", ofs, val, f, l); | ||
97 | _iwl_write32(priv, ofs, val); | ||
98 | } | ||
99 | #define iwl_write32(priv, ofs, val) \ | ||
100 | __iwl_write32(__FILE__, __LINE__, priv, ofs, val) | ||
101 | #else | ||
102 | #define iwl_write32(priv, ofs, val) _iwl_write32(priv, ofs, val) | ||
103 | #endif | ||
104 | |||
105 | static inline u32 _iwl_read32(struct iwl_priv *priv, u32 ofs) | ||
106 | { | 51 | { |
107 | u32 val = ioread32(priv->hw_base + ofs); | 52 | u32 val = ioread32(priv->hw_base + ofs); |
108 | trace_iwlwifi_dev_ioread32(priv, ofs, val); | 53 | trace_iwlwifi_dev_ioread32(priv, ofs, val); |
109 | return val; | 54 | return val; |
110 | } | 55 | } |
111 | 56 | ||
112 | #ifdef CONFIG_IWLWIFI_DEBUG | 57 | void iwl_set_bit(struct iwl_priv *priv, u32 reg, u32 mask); |
113 | static inline u32 __iwl_read32(char *f, u32 l, struct iwl_priv *priv, u32 ofs) | 58 | void iwl_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask); |
114 | { | ||
115 | IWL_DEBUG_IO(priv, "read_direct32(0x%08X) - %s %d\n", ofs, f, l); | ||
116 | return _iwl_read32(priv, ofs); | ||
117 | } | ||
118 | #define iwl_read32(priv, ofs) __iwl_read32(__FILE__, __LINE__, priv, ofs) | ||
119 | #else | ||
120 | #define iwl_read32(p, o) _iwl_read32(p, o) | ||
121 | #endif | ||
122 | |||
123 | #define IWL_POLL_INTERVAL 10 /* microseconds */ | ||
124 | static inline int _iwl_poll_bit(struct iwl_priv *priv, u32 addr, | ||
125 | u32 bits, u32 mask, int timeout) | ||
126 | { | ||
127 | int t = 0; | ||
128 | |||
129 | do { | ||
130 | if ((_iwl_read32(priv, addr) & mask) == (bits & mask)) | ||
131 | return t; | ||
132 | udelay(IWL_POLL_INTERVAL); | ||
133 | t += IWL_POLL_INTERVAL; | ||
134 | } while (t < timeout); | ||
135 | |||
136 | return -ETIMEDOUT; | ||
137 | } | ||
138 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
139 | static inline int __iwl_poll_bit(const char *f, u32 l, | ||
140 | struct iwl_priv *priv, u32 addr, | ||
141 | u32 bits, u32 mask, int timeout) | ||
142 | { | ||
143 | int ret = _iwl_poll_bit(priv, addr, bits, mask, timeout); | ||
144 | IWL_DEBUG_IO(priv, "poll_bit(0x%08X, 0x%08X, 0x%08X) - %s- %s %d\n", | ||
145 | addr, bits, mask, | ||
146 | unlikely(ret == -ETIMEDOUT) ? "timeout" : "", f, l); | ||
147 | return ret; | ||
148 | } | ||
149 | #define iwl_poll_bit(priv, addr, bits, mask, timeout) \ | ||
150 | __iwl_poll_bit(__FILE__, __LINE__, priv, addr, bits, mask, timeout) | ||
151 | #else | ||
152 | #define iwl_poll_bit(p, a, b, m, t) _iwl_poll_bit(p, a, b, m, t) | ||
153 | #endif | ||
154 | |||
155 | static inline void _iwl_set_bit(struct iwl_priv *priv, u32 reg, u32 mask) | ||
156 | { | ||
157 | _iwl_write32(priv, reg, _iwl_read32(priv, reg) | mask); | ||
158 | } | ||
159 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
160 | static inline void __iwl_set_bit(const char *f, u32 l, | ||
161 | struct iwl_priv *priv, u32 reg, u32 mask) | ||
162 | { | ||
163 | u32 val = _iwl_read32(priv, reg) | mask; | ||
164 | IWL_DEBUG_IO(priv, "set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val); | ||
165 | _iwl_write32(priv, reg, val); | ||
166 | } | ||
167 | static inline void iwl_set_bit(struct iwl_priv *p, u32 r, u32 m) | ||
168 | { | ||
169 | unsigned long reg_flags; | ||
170 | |||
171 | spin_lock_irqsave(&p->reg_lock, reg_flags); | ||
172 | __iwl_set_bit(__FILE__, __LINE__, p, r, m); | ||
173 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | ||
174 | } | ||
175 | #else | ||
176 | static inline void iwl_set_bit(struct iwl_priv *p, u32 r, u32 m) | ||
177 | { | ||
178 | unsigned long reg_flags; | ||
179 | |||
180 | spin_lock_irqsave(&p->reg_lock, reg_flags); | ||
181 | _iwl_set_bit(p, r, m); | ||
182 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | ||
183 | } | ||
184 | #endif | ||
185 | |||
186 | static inline void _iwl_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask) | ||
187 | { | ||
188 | _iwl_write32(priv, reg, _iwl_read32(priv, reg) & ~mask); | ||
189 | } | ||
190 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
191 | static inline void __iwl_clear_bit(const char *f, u32 l, | ||
192 | struct iwl_priv *priv, u32 reg, u32 mask) | ||
193 | { | ||
194 | u32 val = _iwl_read32(priv, reg) & ~mask; | ||
195 | IWL_DEBUG_IO(priv, "clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val); | ||
196 | _iwl_write32(priv, reg, val); | ||
197 | } | ||
198 | static inline void iwl_clear_bit(struct iwl_priv *p, u32 r, u32 m) | ||
199 | { | ||
200 | unsigned long reg_flags; | ||
201 | |||
202 | spin_lock_irqsave(&p->reg_lock, reg_flags); | ||
203 | __iwl_clear_bit(__FILE__, __LINE__, p, r, m); | ||
204 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | ||
205 | } | ||
206 | #else | ||
207 | static inline void iwl_clear_bit(struct iwl_priv *p, u32 r, u32 m) | ||
208 | { | ||
209 | unsigned long reg_flags; | ||
210 | |||
211 | spin_lock_irqsave(&p->reg_lock, reg_flags); | ||
212 | _iwl_clear_bit(p, r, m); | ||
213 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | ||
214 | } | ||
215 | #endif | ||
216 | |||
217 | static inline int _iwl_grab_nic_access(struct iwl_priv *priv) | ||
218 | { | ||
219 | int ret; | ||
220 | u32 val; | ||
221 | |||
222 | /* this bit wakes up the NIC */ | ||
223 | _iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
224 | |||
225 | /* | ||
226 | * These bits say the device is running, and should keep running for | ||
227 | * at least a short while (at least as long as MAC_ACCESS_REQ stays 1), | ||
228 | * but they do not indicate that embedded SRAM is restored yet; | ||
229 | * 3945 and 4965 have volatile SRAM, and must save/restore contents | ||
230 | * to/from host DRAM when sleeping/waking for power-saving. | ||
231 | * Each direction takes approximately 1/4 millisecond; with this | ||
232 | * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a | ||
233 | * series of register accesses are expected (e.g. reading Event Log), | ||
234 | * to keep device from sleeping. | ||
235 | * | ||
236 | * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that | ||
237 | * SRAM is okay/restored. We don't check that here because this call | ||
238 | * is just for hardware register access; but GP1 MAC_SLEEP check is a | ||
239 | * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log). | ||
240 | * | ||
241 | * 5000 series and later (including 1000 series) have non-volatile SRAM, | ||
242 | * and do not save/restore SRAM when power cycling. | ||
243 | */ | ||
244 | ret = _iwl_poll_bit(priv, CSR_GP_CNTRL, | ||
245 | CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, | ||
246 | (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | | ||
247 | CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000); | ||
248 | if (ret < 0) { | ||
249 | val = _iwl_read32(priv, CSR_GP_CNTRL); | ||
250 | IWL_ERR(priv, "MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val); | ||
251 | _iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI); | ||
252 | return -EIO; | ||
253 | } | ||
254 | |||
255 | return 0; | ||
256 | } | ||
257 | |||
258 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
259 | static inline int __iwl_grab_nic_access(const char *f, u32 l, | ||
260 | struct iwl_priv *priv) | ||
261 | { | ||
262 | IWL_DEBUG_IO(priv, "grabbing nic access - %s %d\n", f, l); | ||
263 | return _iwl_grab_nic_access(priv); | ||
264 | } | ||
265 | #define iwl_grab_nic_access(priv) \ | ||
266 | __iwl_grab_nic_access(__FILE__, __LINE__, priv) | ||
267 | #else | ||
268 | #define iwl_grab_nic_access(priv) \ | ||
269 | _iwl_grab_nic_access(priv) | ||
270 | #endif | ||
271 | |||
272 | static inline void _iwl_release_nic_access(struct iwl_priv *priv) | ||
273 | { | ||
274 | _iwl_clear_bit(priv, CSR_GP_CNTRL, | ||
275 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
276 | } | ||
277 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
278 | static inline void __iwl_release_nic_access(const char *f, u32 l, | ||
279 | struct iwl_priv *priv) | ||
280 | { | ||
281 | |||
282 | IWL_DEBUG_IO(priv, "releasing nic access - %s %d\n", f, l); | ||
283 | _iwl_release_nic_access(priv); | ||
284 | } | ||
285 | #define iwl_release_nic_access(priv) \ | ||
286 | __iwl_release_nic_access(__FILE__, __LINE__, priv) | ||
287 | #else | ||
288 | #define iwl_release_nic_access(priv) \ | ||
289 | _iwl_release_nic_access(priv) | ||
290 | #endif | ||
291 | |||
292 | static inline u32 _iwl_read_direct32(struct iwl_priv *priv, u32 reg) | ||
293 | { | ||
294 | return _iwl_read32(priv, reg); | ||
295 | } | ||
296 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
297 | static inline u32 __iwl_read_direct32(const char *f, u32 l, | ||
298 | struct iwl_priv *priv, u32 reg) | ||
299 | { | ||
300 | u32 value = _iwl_read_direct32(priv, reg); | ||
301 | IWL_DEBUG_IO(priv, "read_direct32(0x%4X) = 0x%08x - %s %d\n", reg, value, | ||
302 | f, l); | ||
303 | return value; | ||
304 | } | ||
305 | static inline u32 iwl_read_direct32(struct iwl_priv *priv, u32 reg) | ||
306 | { | ||
307 | u32 value; | ||
308 | unsigned long reg_flags; | ||
309 | |||
310 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | ||
311 | iwl_grab_nic_access(priv); | ||
312 | value = __iwl_read_direct32(__FILE__, __LINE__, priv, reg); | ||
313 | iwl_release_nic_access(priv); | ||
314 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
315 | return value; | ||
316 | } | ||
317 | |||
318 | #else | ||
319 | static inline u32 iwl_read_direct32(struct iwl_priv *priv, u32 reg) | ||
320 | { | ||
321 | u32 value; | ||
322 | unsigned long reg_flags; | ||
323 | |||
324 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | ||
325 | iwl_grab_nic_access(priv); | ||
326 | value = _iwl_read_direct32(priv, reg); | ||
327 | iwl_release_nic_access(priv); | ||
328 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
329 | return value; | ||
330 | |||
331 | } | ||
332 | #endif | ||
333 | |||
334 | static inline void _iwl_write_direct32(struct iwl_priv *priv, | ||
335 | u32 reg, u32 value) | ||
336 | { | ||
337 | _iwl_write32(priv, reg, value); | ||
338 | } | ||
339 | static inline void iwl_write_direct32(struct iwl_priv *priv, u32 reg, u32 value) | ||
340 | { | ||
341 | unsigned long reg_flags; | ||
342 | |||
343 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | ||
344 | if (!iwl_grab_nic_access(priv)) { | ||
345 | _iwl_write_direct32(priv, reg, value); | ||
346 | iwl_release_nic_access(priv); | ||
347 | } | ||
348 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
349 | } | ||
350 | |||
351 | static inline void iwl_write_reg_buf(struct iwl_priv *priv, | ||
352 | u32 reg, u32 len, u32 *values) | ||
353 | { | ||
354 | u32 count = sizeof(u32); | ||
355 | |||
356 | if ((priv != NULL) && (values != NULL)) { | ||
357 | for (; 0 < len; len -= count, reg += count, values++) | ||
358 | iwl_write_direct32(priv, reg, *values); | ||
359 | } | ||
360 | } | ||
361 | |||
362 | static inline int _iwl_poll_direct_bit(struct iwl_priv *priv, u32 addr, | ||
363 | u32 mask, int timeout) | ||
364 | { | ||
365 | int t = 0; | ||
366 | |||
367 | do { | ||
368 | if ((iwl_read_direct32(priv, addr) & mask) == mask) | ||
369 | return t; | ||
370 | udelay(IWL_POLL_INTERVAL); | ||
371 | t += IWL_POLL_INTERVAL; | ||
372 | } while (t < timeout); | ||
373 | |||
374 | return -ETIMEDOUT; | ||
375 | } | ||
376 | |||
377 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
378 | static inline int __iwl_poll_direct_bit(const char *f, u32 l, | ||
379 | struct iwl_priv *priv, | ||
380 | u32 addr, u32 mask, int timeout) | ||
381 | { | ||
382 | int ret = _iwl_poll_direct_bit(priv, addr, mask, timeout); | ||
383 | |||
384 | if (unlikely(ret == -ETIMEDOUT)) | ||
385 | IWL_DEBUG_IO(priv, "poll_direct_bit(0x%08X, 0x%08X) - " | ||
386 | "timedout - %s %d\n", addr, mask, f, l); | ||
387 | else | ||
388 | IWL_DEBUG_IO(priv, "poll_direct_bit(0x%08X, 0x%08X) = 0x%08X " | ||
389 | "- %s %d\n", addr, mask, ret, f, l); | ||
390 | return ret; | ||
391 | } | ||
392 | #define iwl_poll_direct_bit(priv, addr, mask, timeout) \ | ||
393 | __iwl_poll_direct_bit(__FILE__, __LINE__, priv, addr, mask, timeout) | ||
394 | #else | ||
395 | #define iwl_poll_direct_bit _iwl_poll_direct_bit | ||
396 | #endif | ||
397 | |||
398 | static inline u32 _iwl_read_prph(struct iwl_priv *priv, u32 reg) | ||
399 | { | ||
400 | _iwl_write_direct32(priv, HBUS_TARG_PRPH_RADDR, reg | (3 << 24)); | ||
401 | rmb(); | ||
402 | return _iwl_read_direct32(priv, HBUS_TARG_PRPH_RDAT); | ||
403 | } | ||
404 | static inline u32 iwl_read_prph(struct iwl_priv *priv, u32 reg) | ||
405 | { | ||
406 | unsigned long reg_flags; | ||
407 | u32 val; | ||
408 | |||
409 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | ||
410 | iwl_grab_nic_access(priv); | ||
411 | val = _iwl_read_prph(priv, reg); | ||
412 | iwl_release_nic_access(priv); | ||
413 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
414 | return val; | ||
415 | } | ||
416 | |||
417 | static inline void _iwl_write_prph(struct iwl_priv *priv, | ||
418 | u32 addr, u32 val) | ||
419 | { | ||
420 | _iwl_write_direct32(priv, HBUS_TARG_PRPH_WADDR, | ||
421 | ((addr & 0x0000FFFF) | (3 << 24))); | ||
422 | wmb(); | ||
423 | _iwl_write_direct32(priv, HBUS_TARG_PRPH_WDAT, val); | ||
424 | } | ||
425 | |||
426 | static inline void iwl_write_prph(struct iwl_priv *priv, u32 addr, u32 val) | ||
427 | { | ||
428 | unsigned long reg_flags; | ||
429 | 59 | ||
430 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | 60 | int iwl_poll_bit(struct iwl_priv *priv, u32 addr, |
431 | if (!iwl_grab_nic_access(priv)) { | 61 | u32 bits, u32 mask, int timeout); |
432 | _iwl_write_prph(priv, addr, val); | 62 | int iwl_poll_direct_bit(struct iwl_priv *priv, u32 addr, u32 mask, |
433 | iwl_release_nic_access(priv); | 63 | int timeout); |
434 | } | ||
435 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
436 | } | ||
437 | 64 | ||
438 | #define _iwl_set_bits_prph(priv, reg, mask) \ | 65 | int iwl_grab_nic_access(struct iwl_priv *priv); |
439 | _iwl_write_prph(priv, reg, (_iwl_read_prph(priv, reg) | mask)) | 66 | void iwl_release_nic_access(struct iwl_priv *priv); |
440 | 67 | ||
441 | static inline void iwl_set_bits_prph(struct iwl_priv *priv, u32 reg, u32 mask) | 68 | u32 iwl_read_direct32(struct iwl_priv *priv, u32 reg); |
442 | { | 69 | void iwl_write_direct32(struct iwl_priv *priv, u32 reg, u32 value); |
443 | unsigned long reg_flags; | ||
444 | 70 | ||
445 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | ||
446 | iwl_grab_nic_access(priv); | ||
447 | _iwl_set_bits_prph(priv, reg, mask); | ||
448 | iwl_release_nic_access(priv); | ||
449 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
450 | } | ||
451 | 71 | ||
452 | #define _iwl_set_bits_mask_prph(priv, reg, bits, mask) \ | 72 | u32 iwl_read_prph(struct iwl_priv *priv, u32 reg); |
453 | _iwl_write_prph(priv, reg, ((_iwl_read_prph(priv, reg) & mask) | bits)) | 73 | void iwl_write_prph(struct iwl_priv *priv, u32 addr, u32 val); |
74 | void iwl_set_bits_prph(struct iwl_priv *priv, u32 reg, u32 mask); | ||
75 | void iwl_set_bits_mask_prph(struct iwl_priv *priv, u32 reg, | ||
76 | u32 bits, u32 mask); | ||
77 | void iwl_clear_bits_prph(struct iwl_priv *priv, u32 reg, u32 mask); | ||
454 | 78 | ||
455 | static inline void iwl_set_bits_mask_prph(struct iwl_priv *priv, u32 reg, | 79 | u32 iwl_read_targ_mem(struct iwl_priv *priv, u32 addr); |
456 | u32 bits, u32 mask) | 80 | void iwl_write_targ_mem(struct iwl_priv *priv, u32 addr, u32 val); |
457 | { | ||
458 | unsigned long reg_flags; | ||
459 | |||
460 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | ||
461 | iwl_grab_nic_access(priv); | ||
462 | _iwl_set_bits_mask_prph(priv, reg, bits, mask); | ||
463 | iwl_release_nic_access(priv); | ||
464 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
465 | } | ||
466 | |||
467 | static inline void iwl_clear_bits_prph(struct iwl_priv | ||
468 | *priv, u32 reg, u32 mask) | ||
469 | { | ||
470 | unsigned long reg_flags; | ||
471 | u32 val; | ||
472 | |||
473 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | ||
474 | iwl_grab_nic_access(priv); | ||
475 | val = _iwl_read_prph(priv, reg); | ||
476 | _iwl_write_prph(priv, reg, (val & ~mask)); | ||
477 | iwl_release_nic_access(priv); | ||
478 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
479 | } | ||
480 | |||
481 | static inline u32 iwl_read_targ_mem(struct iwl_priv *priv, u32 addr) | ||
482 | { | ||
483 | unsigned long reg_flags; | ||
484 | u32 value; | ||
485 | |||
486 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | ||
487 | iwl_grab_nic_access(priv); | ||
488 | |||
489 | _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, addr); | ||
490 | rmb(); | ||
491 | value = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
492 | |||
493 | iwl_release_nic_access(priv); | ||
494 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
495 | return value; | ||
496 | } | ||
497 | |||
498 | static inline void iwl_write_targ_mem(struct iwl_priv *priv, u32 addr, u32 val) | ||
499 | { | ||
500 | unsigned long reg_flags; | ||
501 | |||
502 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | ||
503 | if (!iwl_grab_nic_access(priv)) { | ||
504 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr); | ||
505 | wmb(); | ||
506 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, val); | ||
507 | iwl_release_nic_access(priv); | ||
508 | } | ||
509 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
510 | } | ||
511 | |||
512 | static inline void iwl_write_targ_mem_buf(struct iwl_priv *priv, u32 addr, | ||
513 | u32 len, u32 *values) | ||
514 | { | ||
515 | unsigned long reg_flags; | ||
516 | |||
517 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | ||
518 | if (!iwl_grab_nic_access(priv)) { | ||
519 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr); | ||
520 | wmb(); | ||
521 | for (; 0 < len; len -= sizeof(u32), values++) | ||
522 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, *values); | ||
523 | |||
524 | iwl_release_nic_access(priv); | ||
525 | } | ||
526 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
527 | } | ||
528 | #endif | 81 | #endif |
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.c b/drivers/net/wireless/iwlwifi/iwl-led.c index d7f2a0bb32c9..c2862d4e00e3 100644 --- a/drivers/net/wireless/iwlwifi/iwl-led.c +++ b/drivers/net/wireless/iwlwifi/iwl-led.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.h b/drivers/net/wireless/iwlwifi/iwl-led.h index 101eef12b3bb..05b8e8f7dd4a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-led.h +++ b/drivers/net/wireless/iwlwifi/iwl-led.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of version 2 of the GNU General Public License as | 6 | * under the terms of version 2 of the GNU General Public License as |
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.c b/drivers/net/wireless/iwlwifi/iwl-power.c index 576795e2c75b..c43c8e66de73 100644 --- a/drivers/net/wireless/iwlwifi/iwl-power.c +++ b/drivers/net/wireless/iwlwifi/iwl-power.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.h b/drivers/net/wireless/iwlwifi/iwl-power.h index fe012032c28c..59635d784e27 100644 --- a/drivers/net/wireless/iwlwifi/iwl-power.h +++ b/drivers/net/wireless/iwlwifi/iwl-power.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
diff --git a/drivers/net/wireless/iwlwifi/iwl-prph.h b/drivers/net/wireless/iwlwifi/iwl-prph.h index 86f5123bccda..c960195df989 100644 --- a/drivers/net/wireless/iwlwifi/iwl-prph.h +++ b/drivers/net/wireless/iwlwifi/iwl-prph.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -91,7 +91,6 @@ | |||
91 | #define APMG_PS_CTRL_VAL_RESET_REQ (0x04000000) | 91 | #define APMG_PS_CTRL_VAL_RESET_REQ (0x04000000) |
92 | #define APMG_PS_CTRL_MSK_PWR_SRC (0x03000000) | 92 | #define APMG_PS_CTRL_MSK_PWR_SRC (0x03000000) |
93 | #define APMG_PS_CTRL_VAL_PWR_SRC_VMAIN (0x00000000) | 93 | #define APMG_PS_CTRL_VAL_PWR_SRC_VMAIN (0x00000000) |
94 | #define APMG_PS_CTRL_VAL_PWR_SRC_MAX (0x01000000) /* 3945 only */ | ||
95 | #define APMG_PS_CTRL_VAL_PWR_SRC_VAUX (0x02000000) | 94 | #define APMG_PS_CTRL_VAL_PWR_SRC_VAUX (0x02000000) |
96 | #define APMG_SVR_VOLTAGE_CONFIG_BIT_MSK (0x000001E0) /* bit 8:5 */ | 95 | #define APMG_SVR_VOLTAGE_CONFIG_BIT_MSK (0x000001E0) /* bit 8:5 */ |
97 | #define APMG_SVR_DIGITAL_VOLTAGE_1_32 (0x00000060) | 96 | #define APMG_SVR_DIGITAL_VOLTAGE_1_32 (0x00000060) |
@@ -99,152 +98,6 @@ | |||
99 | #define APMG_PCIDEV_STT_VAL_L1_ACT_DIS (0x00000800) | 98 | #define APMG_PCIDEV_STT_VAL_L1_ACT_DIS (0x00000800) |
100 | 99 | ||
101 | /** | 100 | /** |
102 | * BSM (Bootstrap State Machine) | ||
103 | * | ||
104 | * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program | ||
105 | * in special SRAM that does not power down when the embedded control | ||
106 | * processor is sleeping (e.g. for periodic power-saving shutdowns of radio). | ||
107 | * | ||
108 | * When powering back up after sleeps (or during initial uCode load), the BSM | ||
109 | * internally loads the short bootstrap program from the special SRAM into the | ||
110 | * embedded processor's instruction SRAM, and starts the processor so it runs | ||
111 | * the bootstrap program. | ||
112 | * | ||
113 | * This bootstrap program loads (via PCI busmaster DMA) instructions and data | ||
114 | * images for a uCode program from host DRAM locations. The host driver | ||
115 | * indicates DRAM locations and sizes for instruction and data images via the | ||
116 | * four BSM_DRAM_* registers. Once the bootstrap program loads the new program, | ||
117 | * the new program starts automatically. | ||
118 | * | ||
119 | * The uCode used for open-source drivers includes two programs: | ||
120 | * | ||
121 | * 1) Initialization -- performs hardware calibration and sets up some | ||
122 | * internal data, then notifies host via "initialize alive" notification | ||
123 | * (struct iwl_init_alive_resp) that it has completed all of its work. | ||
124 | * After signal from host, it then loads and starts the runtime program. | ||
125 | * The initialization program must be used when initially setting up the | ||
126 | * NIC after loading the driver. | ||
127 | * | ||
128 | * 2) Runtime/Protocol -- performs all normal runtime operations. This | ||
129 | * notifies host via "alive" notification (struct iwl_alive_resp) that it | ||
130 | * is ready to be used. | ||
131 | * | ||
132 | * When initializing the NIC, the host driver does the following procedure: | ||
133 | * | ||
134 | * 1) Load bootstrap program (instructions only, no data image for bootstrap) | ||
135 | * into bootstrap memory. Use dword writes starting at BSM_SRAM_LOWER_BOUND | ||
136 | * | ||
137 | * 2) Point (via BSM_DRAM_*) to the "initialize" uCode data and instruction | ||
138 | * images in host DRAM. | ||
139 | * | ||
140 | * 3) Set up BSM to copy from BSM SRAM into uCode instruction SRAM when asked: | ||
141 | * BSM_WR_MEM_SRC_REG = 0 | ||
142 | * BSM_WR_MEM_DST_REG = RTC_INST_LOWER_BOUND | ||
143 | * BSM_WR_MEM_DWCOUNT_REG = # dwords in bootstrap instruction image | ||
144 | * | ||
145 | * 4) Load bootstrap into instruction SRAM: | ||
146 | * BSM_WR_CTRL_REG = BSM_WR_CTRL_REG_BIT_START | ||
147 | * | ||
148 | * 5) Wait for load completion: | ||
149 | * Poll BSM_WR_CTRL_REG for BSM_WR_CTRL_REG_BIT_START = 0 | ||
150 | * | ||
151 | * 6) Enable future boot loads whenever NIC's power management triggers it: | ||
152 | * BSM_WR_CTRL_REG = BSM_WR_CTRL_REG_BIT_START_EN | ||
153 | * | ||
154 | * 7) Start the NIC by removing all reset bits: | ||
155 | * CSR_RESET = 0 | ||
156 | * | ||
157 | * The bootstrap uCode (already in instruction SRAM) loads initialization | ||
158 | * uCode. Initialization uCode performs data initialization, sends | ||
159 | * "initialize alive" notification to host, and waits for a signal from | ||
160 | * host to load runtime code. | ||
161 | * | ||
162 | * 4) Point (via BSM_DRAM_*) to the "runtime" uCode data and instruction | ||
163 | * images in host DRAM. The last register loaded must be the instruction | ||
164 | * byte count register ("1" in MSbit tells initialization uCode to load | ||
165 | * the runtime uCode): | ||
166 | * BSM_DRAM_INST_BYTECOUNT_REG = byte count | BSM_DRAM_INST_LOAD | ||
167 | * | ||
168 | * 5) Wait for "alive" notification, then issue normal runtime commands. | ||
169 | * | ||
170 | * Data caching during power-downs: | ||
171 | * | ||
172 | * Just before the embedded controller powers down (e.g for automatic | ||
173 | * power-saving modes, or for RFKILL), uCode stores (via PCI busmaster DMA) | ||
174 | * a current snapshot of the embedded processor's data SRAM into host DRAM. | ||
175 | * This caches the data while the embedded processor's memory is powered down. | ||
176 | * Location and size are controlled by BSM_DRAM_DATA_* registers. | ||
177 | * | ||
178 | * NOTE: Instruction SRAM does not need to be saved, since that doesn't | ||
179 | * change during operation; the original image (from uCode distribution | ||
180 | * file) can be used for reload. | ||
181 | * | ||
182 | * When powering back up, the BSM loads the bootstrap program. Bootstrap looks | ||
183 | * at the BSM_DRAM_* registers, which now point to the runtime instruction | ||
184 | * image and the cached (modified) runtime data (*not* the initialization | ||
185 | * uCode). Bootstrap reloads these runtime images into SRAM, and restarts the | ||
186 | * uCode from where it left off before the power-down. | ||
187 | * | ||
188 | * NOTE: Initialization uCode does *not* run as part of the save/restore | ||
189 | * procedure. | ||
190 | * | ||
191 | * This save/restore method is mostly for autonomous power management during | ||
192 | * normal operation (result of POWER_TABLE_CMD). Platform suspend/resume and | ||
193 | * RFKILL should use complete restarts (with total re-initialization) of uCode, | ||
194 | * allowing total shutdown (including BSM memory). | ||
195 | * | ||
196 | * Note that, during normal operation, the host DRAM that held the initial | ||
197 | * startup data for the runtime code is now being used as a backup data cache | ||
198 | * for modified data! If you need to completely re-initialize the NIC, make | ||
199 | * sure that you use the runtime data image from the uCode distribution file, | ||
200 | * not the modified/saved runtime data. You may want to store a separate | ||
201 | * "clean" runtime data image in DRAM to avoid disk reads of distribution file. | ||
202 | */ | ||
203 | |||
204 | /* BSM bit fields */ | ||
205 | #define BSM_WR_CTRL_REG_BIT_START (0x80000000) /* start boot load now */ | ||
206 | #define BSM_WR_CTRL_REG_BIT_START_EN (0x40000000) /* enable boot after pwrup*/ | ||
207 | #define BSM_DRAM_INST_LOAD (0x80000000) /* start program load now */ | ||
208 | |||
209 | /* BSM addresses */ | ||
210 | #define BSM_BASE (PRPH_BASE + 0x3400) | ||
211 | #define BSM_END (PRPH_BASE + 0x3800) | ||
212 | |||
213 | #define BSM_WR_CTRL_REG (BSM_BASE + 0x000) /* ctl and status */ | ||
214 | #define BSM_WR_MEM_SRC_REG (BSM_BASE + 0x004) /* source in BSM mem */ | ||
215 | #define BSM_WR_MEM_DST_REG (BSM_BASE + 0x008) /* dest in SRAM mem */ | ||
216 | #define BSM_WR_DWCOUNT_REG (BSM_BASE + 0x00C) /* bytes */ | ||
217 | #define BSM_WR_STATUS_REG (BSM_BASE + 0x010) /* bit 0: 1 == done */ | ||
218 | |||
219 | /* | ||
220 | * Pointers and size regs for bootstrap load and data SRAM save/restore. | ||
221 | * NOTE: 3945 pointers use bits 31:0 of DRAM address. | ||
222 | * 4965 pointers use bits 35:4 of DRAM address. | ||
223 | */ | ||
224 | #define BSM_DRAM_INST_PTR_REG (BSM_BASE + 0x090) | ||
225 | #define BSM_DRAM_INST_BYTECOUNT_REG (BSM_BASE + 0x094) | ||
226 | #define BSM_DRAM_DATA_PTR_REG (BSM_BASE + 0x098) | ||
227 | #define BSM_DRAM_DATA_BYTECOUNT_REG (BSM_BASE + 0x09C) | ||
228 | |||
229 | /* | ||
230 | * BSM special memory, stays powered on during power-save sleeps. | ||
231 | * Read/write, address range from LOWER_BOUND to (LOWER_BOUND + SIZE -1) | ||
232 | */ | ||
233 | #define BSM_SRAM_LOWER_BOUND (PRPH_BASE + 0x3800) | ||
234 | #define BSM_SRAM_SIZE (1024) /* bytes */ | ||
235 | |||
236 | |||
237 | /* 3945 Tx scheduler registers */ | ||
238 | #define ALM_SCD_BASE (PRPH_BASE + 0x2E00) | ||
239 | #define ALM_SCD_MODE_REG (ALM_SCD_BASE + 0x000) | ||
240 | #define ALM_SCD_ARASTAT_REG (ALM_SCD_BASE + 0x004) | ||
241 | #define ALM_SCD_TXFACT_REG (ALM_SCD_BASE + 0x010) | ||
242 | #define ALM_SCD_TXF4MF_REG (ALM_SCD_BASE + 0x014) | ||
243 | #define ALM_SCD_TXF5MF_REG (ALM_SCD_BASE + 0x020) | ||
244 | #define ALM_SCD_SBYP_MODE_1_REG (ALM_SCD_BASE + 0x02C) | ||
245 | #define ALM_SCD_SBYP_MODE_2_REG (ALM_SCD_BASE + 0x030) | ||
246 | |||
247 | /** | ||
248 | * Tx Scheduler | 101 | * Tx Scheduler |
249 | * | 102 | * |
250 | * The Tx Scheduler selects the next frame to be transmitted, choosing TFDs | 103 | * The Tx Scheduler selects the next frame to be transmitted, choosing TFDs |
@@ -330,201 +183,10 @@ | |||
330 | * Max Tx window size is the max number of contiguous TFDs that the scheduler | 183 | * Max Tx window size is the max number of contiguous TFDs that the scheduler |
331 | * can keep track of at one time when creating block-ack chains of frames. | 184 | * can keep track of at one time when creating block-ack chains of frames. |
332 | * Note that "64" matches the number of ack bits in a block-ack packet. | 185 | * Note that "64" matches the number of ack bits in a block-ack packet. |
333 | * Driver should use SCD_WIN_SIZE and SCD_FRAME_LIMIT values to initialize | ||
334 | * IWL49_SCD_CONTEXT_QUEUE_OFFSET(x) values. | ||
335 | */ | 186 | */ |
336 | #define SCD_WIN_SIZE 64 | 187 | #define SCD_WIN_SIZE 64 |
337 | #define SCD_FRAME_LIMIT 64 | 188 | #define SCD_FRAME_LIMIT 64 |
338 | 189 | ||
339 | /* SCD registers are internal, must be accessed via HBUS_TARG_PRPH regs */ | ||
340 | #define IWL49_SCD_START_OFFSET 0xa02c00 | ||
341 | |||
342 | /* | ||
343 | * 4965 tells driver SRAM address for internal scheduler structs via this reg. | ||
344 | * Value is valid only after "Alive" response from uCode. | ||
345 | */ | ||
346 | #define IWL49_SCD_SRAM_BASE_ADDR (IWL49_SCD_START_OFFSET + 0x0) | ||
347 | |||
348 | /* | ||
349 | * Driver may need to update queue-empty bits after changing queue's | ||
350 | * write and read pointers (indexes) during (re-)initialization (i.e. when | ||
351 | * scheduler is not tracking what's happening). | ||
352 | * Bit fields: | ||
353 | * 31-16: Write mask -- 1: update empty bit, 0: don't change empty bit | ||
354 | * 15-00: Empty state, one for each queue -- 1: empty, 0: non-empty | ||
355 | * NOTE: This register is not used by Linux driver. | ||
356 | */ | ||
357 | #define IWL49_SCD_EMPTY_BITS (IWL49_SCD_START_OFFSET + 0x4) | ||
358 | |||
359 | /* | ||
360 | * Physical base address of array of byte count (BC) circular buffers (CBs). | ||
361 | * Each Tx queue has a BC CB in host DRAM to support Scheduler-ACK mode. | ||
362 | * This register points to BC CB for queue 0, must be on 1024-byte boundary. | ||
363 | * Others are spaced by 1024 bytes. | ||
364 | * Each BC CB is 2 bytes * (256 + 64) = 740 bytes, followed by 384 bytes pad. | ||
365 | * (Index into a queue's BC CB) = (index into queue's TFD CB) = (SSN & 0xff). | ||
366 | * Bit fields: | ||
367 | * 25-00: Byte Count CB physical address [35:10], must be 1024-byte aligned. | ||
368 | */ | ||
369 | #define IWL49_SCD_DRAM_BASE_ADDR (IWL49_SCD_START_OFFSET + 0x10) | ||
370 | |||
371 | /* | ||
372 | * Enables any/all Tx DMA/FIFO channels. | ||
373 | * Scheduler generates requests for only the active channels. | ||
374 | * Set this to 0xff to enable all 8 channels (normal usage). | ||
375 | * Bit fields: | ||
376 | * 7- 0: Enable (1), disable (0), one bit for each channel 0-7 | ||
377 | */ | ||
378 | #define IWL49_SCD_TXFACT (IWL49_SCD_START_OFFSET + 0x1c) | ||
379 | /* | ||
380 | * Queue (x) Write Pointers (indexes, really!), one for each Tx queue. | ||
381 | * Initialized and updated by driver as new TFDs are added to queue. | ||
382 | * NOTE: If using Block Ack, index must correspond to frame's | ||
383 | * Start Sequence Number; index = (SSN & 0xff) | ||
384 | * NOTE: Alternative to HBUS_TARG_WRPTR, which is what Linux driver uses? | ||
385 | */ | ||
386 | #define IWL49_SCD_QUEUE_WRPTR(x) (IWL49_SCD_START_OFFSET + 0x24 + (x) * 4) | ||
387 | |||
388 | /* | ||
389 | * Queue (x) Read Pointers (indexes, really!), one for each Tx queue. | ||
390 | * For FIFO mode, index indicates next frame to transmit. | ||
391 | * For Scheduler-ACK mode, index indicates first frame in Tx window. | ||
392 | * Initialized by driver, updated by scheduler. | ||
393 | */ | ||
394 | #define IWL49_SCD_QUEUE_RDPTR(x) (IWL49_SCD_START_OFFSET + 0x64 + (x) * 4) | ||
395 | |||
396 | /* | ||
397 | * Select which queues work in chain mode (1) vs. not (0). | ||
398 | * Use chain mode to build chains of aggregated frames. | ||
399 | * Bit fields: | ||
400 | * 31-16: Reserved | ||
401 | * 15-00: Mode, one bit for each queue -- 1: Chain mode, 0: one-at-a-time | ||
402 | * NOTE: If driver sets up queue for chain mode, it should be also set up | ||
403 | * Scheduler-ACK mode as well, via SCD_QUEUE_STATUS_BITS(x). | ||
404 | */ | ||
405 | #define IWL49_SCD_QUEUECHAIN_SEL (IWL49_SCD_START_OFFSET + 0xd0) | ||
406 | |||
407 | /* | ||
408 | * Select which queues interrupt driver when scheduler increments | ||
409 | * a queue's read pointer (index). | ||
410 | * Bit fields: | ||
411 | * 31-16: Reserved | ||
412 | * 15-00: Interrupt enable, one bit for each queue -- 1: enabled, 0: disabled | ||
413 | * NOTE: This functionality is apparently a no-op; driver relies on interrupts | ||
414 | * from Rx queue to read Tx command responses and update Tx queues. | ||
415 | */ | ||
416 | #define IWL49_SCD_INTERRUPT_MASK (IWL49_SCD_START_OFFSET + 0xe4) | ||
417 | |||
418 | /* | ||
419 | * Queue search status registers. One for each queue. | ||
420 | * Sets up queue mode and assigns queue to Tx DMA channel. | ||
421 | * Bit fields: | ||
422 | * 19-10: Write mask/enable bits for bits 0-9 | ||
423 | * 9: Driver should init to "0" | ||
424 | * 8: Scheduler-ACK mode (1), non-Scheduler-ACK (i.e. FIFO) mode (0). | ||
425 | * Driver should init to "1" for aggregation mode, or "0" otherwise. | ||
426 | * 7-6: Driver should init to "0" | ||
427 | * 5: Window Size Left; indicates whether scheduler can request | ||
428 | * another TFD, based on window size, etc. Driver should init | ||
429 | * this bit to "1" for aggregation mode, or "0" for non-agg. | ||
430 | * 4-1: Tx FIFO to use (range 0-7). | ||
431 | * 0: Queue is active (1), not active (0). | ||
432 | * Other bits should be written as "0" | ||
433 | * | ||
434 | * NOTE: If enabling Scheduler-ACK mode, chain mode should also be enabled | ||
435 | * via SCD_QUEUECHAIN_SEL. | ||
436 | */ | ||
437 | #define IWL49_SCD_QUEUE_STATUS_BITS(x)\ | ||
438 | (IWL49_SCD_START_OFFSET + 0x104 + (x) * 4) | ||
439 | |||
440 | /* Bit field positions */ | ||
441 | #define IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE (0) | ||
442 | #define IWL49_SCD_QUEUE_STTS_REG_POS_TXF (1) | ||
443 | #define IWL49_SCD_QUEUE_STTS_REG_POS_WSL (5) | ||
444 | #define IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK (8) | ||
445 | |||
446 | /* Write masks */ | ||
447 | #define IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN (10) | ||
448 | #define IWL49_SCD_QUEUE_STTS_REG_MSK (0x0007FC00) | ||
449 | |||
450 | /** | ||
451 | * 4965 internal SRAM structures for scheduler, shared with driver ... | ||
452 | * | ||
453 | * Driver should clear and initialize the following areas after receiving | ||
454 | * "Alive" response from 4965 uCode, i.e. after initial | ||
455 | * uCode load, or after a uCode load done for error recovery: | ||
456 | * | ||
457 | * SCD_CONTEXT_DATA_OFFSET (size 128 bytes) | ||
458 | * SCD_TX_STTS_BITMAP_OFFSET (size 256 bytes) | ||
459 | * SCD_TRANSLATE_TBL_OFFSET (size 32 bytes) | ||
460 | * | ||
461 | * Driver accesses SRAM via HBUS_TARG_MEM_* registers. | ||
462 | * Driver reads base address of this scheduler area from SCD_SRAM_BASE_ADDR. | ||
463 | * All OFFSET values must be added to this base address. | ||
464 | */ | ||
465 | |||
466 | /* | ||
467 | * Queue context. One 8-byte entry for each of 16 queues. | ||
468 | * | ||
469 | * Driver should clear this entire area (size 0x80) to 0 after receiving | ||
470 | * "Alive" notification from uCode. Additionally, driver should init | ||
471 | * each queue's entry as follows: | ||
472 | * | ||
473 | * LS Dword bit fields: | ||
474 | * 0-06: Max Tx window size for Scheduler-ACK. Driver should init to 64. | ||
475 | * | ||
476 | * MS Dword bit fields: | ||
477 | * 16-22: Frame limit. Driver should init to 10 (0xa). | ||
478 | * | ||
479 | * Driver should init all other bits to 0. | ||
480 | * | ||
481 | * Init must be done after driver receives "Alive" response from 4965 uCode, | ||
482 | * and when setting up queue for aggregation. | ||
483 | */ | ||
484 | #define IWL49_SCD_CONTEXT_DATA_OFFSET 0x380 | ||
485 | #define IWL49_SCD_CONTEXT_QUEUE_OFFSET(x) \ | ||
486 | (IWL49_SCD_CONTEXT_DATA_OFFSET + ((x) * 8)) | ||
487 | |||
488 | #define IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS (0) | ||
489 | #define IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK (0x0000007F) | ||
490 | #define IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS (16) | ||
491 | #define IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK (0x007F0000) | ||
492 | |||
493 | /* | ||
494 | * Tx Status Bitmap | ||
495 | * | ||
496 | * Driver should clear this entire area (size 0x100) to 0 after receiving | ||
497 | * "Alive" notification from uCode. Area is used only by device itself; | ||
498 | * no other support (besides clearing) is required from driver. | ||
499 | */ | ||
500 | #define IWL49_SCD_TX_STTS_BITMAP_OFFSET 0x400 | ||
501 | |||
502 | /* | ||
503 | * RAxTID to queue translation mapping. | ||
504 | * | ||
505 | * When queue is in Scheduler-ACK mode, frames placed in a that queue must be | ||
506 | * for only one combination of receiver address (RA) and traffic ID (TID), i.e. | ||
507 | * one QOS priority level destined for one station (for this wireless link, | ||
508 | * not final destination). The SCD_TRANSLATE_TABLE area provides 16 16-bit | ||
509 | * mappings, one for each of the 16 queues. If queue is not in Scheduler-ACK | ||
510 | * mode, the device ignores the mapping value. | ||
511 | * | ||
512 | * Bit fields, for each 16-bit map: | ||
513 | * 15-9: Reserved, set to 0 | ||
514 | * 8-4: Index into device's station table for recipient station | ||
515 | * 3-0: Traffic ID (tid), range 0-15 | ||
516 | * | ||
517 | * Driver should clear this entire area (size 32 bytes) to 0 after receiving | ||
518 | * "Alive" notification from uCode. To update a 16-bit map value, driver | ||
519 | * must read a dword-aligned value from device SRAM, replace the 16-bit map | ||
520 | * value of interest, and write the dword value back into device SRAM. | ||
521 | */ | ||
522 | #define IWL49_SCD_TRANSLATE_TBL_OFFSET 0x500 | ||
523 | |||
524 | /* Find translation table dword to read/write for given queue */ | ||
525 | #define IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(x) \ | ||
526 | ((IWL49_SCD_TRANSLATE_TBL_OFFSET + ((x) * 2)) & 0xfffffffc) | ||
527 | |||
528 | #define IWL_SCD_TXFIFO_POS_TID (0) | 190 | #define IWL_SCD_TXFIFO_POS_TID (0) |
529 | #define IWL_SCD_TXFIFO_POS_RA (4) | 191 | #define IWL_SCD_TXFIFO_POS_RA (4) |
530 | #define IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK (0x01FF) | 192 | #define IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK (0x01FF) |
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c index 6f9a2fa04763..c421f566982f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-rx.c +++ b/drivers/net/wireless/iwlwifi/iwl-rx.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -239,16 +239,16 @@ static void iwl_rx_reply_alive(struct iwl_priv *priv, | |||
239 | palive->is_valid, palive->ver_type, | 239 | palive->is_valid, palive->ver_type, |
240 | palive->ver_subtype); | 240 | palive->ver_subtype); |
241 | 241 | ||
242 | priv->device_pointers.log_event_table = | ||
243 | le32_to_cpu(palive->log_event_table_ptr); | ||
244 | priv->device_pointers.error_event_table = | ||
245 | le32_to_cpu(palive->error_event_table_ptr); | ||
246 | |||
242 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | 247 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { |
243 | IWL_DEBUG_INFO(priv, "Initialization Alive received.\n"); | 248 | IWL_DEBUG_INFO(priv, "Initialization Alive received.\n"); |
244 | memcpy(&priv->card_alive_init, | ||
245 | &pkt->u.alive_frame, | ||
246 | sizeof(struct iwl_init_alive_resp)); | ||
247 | pwork = &priv->init_alive_start; | 249 | pwork = &priv->init_alive_start; |
248 | } else { | 250 | } else { |
249 | IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); | 251 | IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); |
250 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | ||
251 | sizeof(struct iwl_alive_resp)); | ||
252 | pwork = &priv->alive_start; | 252 | pwork = &priv->alive_start; |
253 | } | 253 | } |
254 | 254 | ||
@@ -898,7 +898,6 @@ static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv, | |||
898 | memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats)); | 898 | memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats)); |
899 | 899 | ||
900 | ieee80211_rx(priv->hw, skb); | 900 | ieee80211_rx(priv->hw, skb); |
901 | priv->alloc_rxb_page--; | ||
902 | rxb->page = NULL; | 901 | rxb->page = NULL; |
903 | } | 902 | } |
904 | 903 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c index 914c77e44588..d60d630cb93a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-scan.c +++ b/drivers/net/wireless/iwlwifi/iwl-scan.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * GPL LICENSE SUMMARY | 3 | * GPL LICENSE SUMMARY |
4 | * | 4 | * |
5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 5 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of version 2 of the GNU General Public License as | 8 | * it under the terms of version 2 of the GNU General Public License as |
diff --git a/drivers/net/wireless/iwlwifi/iwl-spectrum.h b/drivers/net/wireless/iwlwifi/iwl-spectrum.h index c4ca0b5d77da..cb80bb4ce45e 100644 --- a/drivers/net/wireless/iwlwifi/iwl-spectrum.h +++ b/drivers/net/wireless/iwlwifi/iwl-spectrum.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ieee80211 subsystem header files. | 5 | * Portions of this file are derived from the ieee80211 subsystem header files. |
6 | * | 6 | * |
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c index bc90a12408a3..c21515640077 100644 --- a/drivers/net/wireless/iwlwifi/iwl-sta.c +++ b/drivers/net/wireless/iwlwifi/iwl-sta.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -233,7 +233,6 @@ u8 iwl_prep_station(struct iwl_priv *priv, struct iwl_rxon_context *ctx, | |||
233 | struct iwl_station_entry *station; | 233 | struct iwl_station_entry *station; |
234 | int i; | 234 | int i; |
235 | u8 sta_id = IWL_INVALID_STATION; | 235 | u8 sta_id = IWL_INVALID_STATION; |
236 | u16 rate; | ||
237 | 236 | ||
238 | if (is_ap) | 237 | if (is_ap) |
239 | sta_id = ctx->ap_sta_id; | 238 | sta_id = ctx->ap_sta_id; |
@@ -306,12 +305,6 @@ u8 iwl_prep_station(struct iwl_priv *priv, struct iwl_rxon_context *ctx, | |||
306 | */ | 305 | */ |
307 | iwl_set_ht_add_station(priv, sta_id, sta, ctx); | 306 | iwl_set_ht_add_station(priv, sta_id, sta, ctx); |
308 | 307 | ||
309 | /* 3945 only */ | ||
310 | rate = (priv->band == IEEE80211_BAND_5GHZ) ? | ||
311 | IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP; | ||
312 | /* Turn on both antennas for the station... */ | ||
313 | station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK); | ||
314 | |||
315 | return sta_id; | 308 | return sta_id; |
316 | 309 | ||
317 | } | 310 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.h b/drivers/net/wireless/iwlwifi/iwl-sta.h index 206f1e1a0caf..ff64027ff4cb 100644 --- a/drivers/net/wireless/iwlwifi/iwl-sta.h +++ b/drivers/net/wireless/iwlwifi/iwl-sta.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c index 277c9175dcf6..565980fbb591 100644 --- a/drivers/net/wireless/iwlwifi/iwl-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-tx.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * | 2 | * |
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
4 | * | 4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | 5 | * Portions of this file are derived from the ipw3945 project, as well |
6 | * as portions of the ieee80211 subsystem header files. | 6 | * as portions of the ieee80211 subsystem header files. |
@@ -149,32 +149,31 @@ void iwl_cmd_queue_unmap(struct iwl_priv *priv) | |||
149 | struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue]; | 149 | struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue]; |
150 | struct iwl_queue *q = &txq->q; | 150 | struct iwl_queue *q = &txq->q; |
151 | int i; | 151 | int i; |
152 | bool huge = false; | ||
153 | 152 | ||
154 | if (q->n_bd == 0) | 153 | if (q->n_bd == 0) |
155 | return; | 154 | return; |
156 | 155 | ||
157 | while (q->read_ptr != q->write_ptr) { | 156 | while (q->read_ptr != q->write_ptr) { |
158 | /* we have no way to tell if it is a huge cmd ATM */ | ||
159 | i = get_cmd_index(q, q->read_ptr, 0); | 157 | i = get_cmd_index(q, q->read_ptr, 0); |
160 | 158 | ||
161 | if (txq->meta[i].flags & CMD_SIZE_HUGE) | 159 | if (txq->meta[i].flags & CMD_MAPPED) { |
162 | huge = true; | ||
163 | else | ||
164 | pci_unmap_single(priv->pci_dev, | 160 | pci_unmap_single(priv->pci_dev, |
165 | dma_unmap_addr(&txq->meta[i], mapping), | 161 | dma_unmap_addr(&txq->meta[i], mapping), |
166 | dma_unmap_len(&txq->meta[i], len), | 162 | dma_unmap_len(&txq->meta[i], len), |
167 | PCI_DMA_BIDIRECTIONAL); | 163 | PCI_DMA_BIDIRECTIONAL); |
164 | txq->meta[i].flags = 0; | ||
165 | } | ||
168 | 166 | ||
169 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd); | 167 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd); |
170 | } | 168 | } |
171 | 169 | ||
172 | if (huge) { | 170 | i = q->n_window; |
173 | i = q->n_window; | 171 | if (txq->meta[i].flags & CMD_MAPPED) { |
174 | pci_unmap_single(priv->pci_dev, | 172 | pci_unmap_single(priv->pci_dev, |
175 | dma_unmap_addr(&txq->meta[i], mapping), | 173 | dma_unmap_addr(&txq->meta[i], mapping), |
176 | dma_unmap_len(&txq->meta[i], len), | 174 | dma_unmap_len(&txq->meta[i], len), |
177 | PCI_DMA_BIDIRECTIONAL); | 175 | PCI_DMA_BIDIRECTIONAL); |
176 | txq->meta[i].flags = 0; | ||
178 | } | 177 | } |
179 | } | 178 | } |
180 | 179 | ||
@@ -463,7 +462,11 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
463 | return -EIO; | 462 | return -EIO; |
464 | } | 463 | } |
465 | 464 | ||
465 | spin_lock_irqsave(&priv->hcmd_lock, flags); | ||
466 | |||
466 | if (iwl_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) { | 467 | if (iwl_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) { |
468 | spin_unlock_irqrestore(&priv->hcmd_lock, flags); | ||
469 | |||
467 | IWL_ERR(priv, "No space in command queue\n"); | 470 | IWL_ERR(priv, "No space in command queue\n"); |
468 | if (priv->cfg->ops->lib->tt_ops.ct_kill_check) { | 471 | if (priv->cfg->ops->lib->tt_ops.ct_kill_check) { |
469 | is_ct_kill = | 472 | is_ct_kill = |
@@ -471,27 +474,22 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
471 | } | 474 | } |
472 | if (!is_ct_kill) { | 475 | if (!is_ct_kill) { |
473 | IWL_ERR(priv, "Restarting adapter due to queue full\n"); | 476 | IWL_ERR(priv, "Restarting adapter due to queue full\n"); |
474 | queue_work(priv->workqueue, &priv->restart); | 477 | iwlagn_fw_error(priv, false); |
475 | } | 478 | } |
476 | return -ENOSPC; | 479 | return -ENOSPC; |
477 | } | 480 | } |
478 | 481 | ||
479 | spin_lock_irqsave(&priv->hcmd_lock, flags); | ||
480 | |||
481 | /* If this is a huge cmd, mark the huge flag also on the meta.flags | ||
482 | * of the _original_ cmd. This is used for DMA mapping clean up. | ||
483 | */ | ||
484 | if (cmd->flags & CMD_SIZE_HUGE) { | ||
485 | idx = get_cmd_index(q, q->write_ptr, 0); | ||
486 | txq->meta[idx].flags = CMD_SIZE_HUGE; | ||
487 | } | ||
488 | |||
489 | idx = get_cmd_index(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE); | 482 | idx = get_cmd_index(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE); |
490 | out_cmd = txq->cmd[idx]; | 483 | out_cmd = txq->cmd[idx]; |
491 | out_meta = &txq->meta[idx]; | 484 | out_meta = &txq->meta[idx]; |
492 | 485 | ||
486 | if (WARN_ON(out_meta->flags & CMD_MAPPED)) { | ||
487 | spin_unlock_irqrestore(&priv->hcmd_lock, flags); | ||
488 | return -ENOSPC; | ||
489 | } | ||
490 | |||
493 | memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */ | 491 | memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */ |
494 | out_meta->flags = cmd->flags; | 492 | out_meta->flags = cmd->flags | CMD_MAPPED; |
495 | if (cmd->flags & CMD_WANT_SKB) | 493 | if (cmd->flags & CMD_WANT_SKB) |
496 | out_meta->source = cmd; | 494 | out_meta->source = cmd; |
497 | if (cmd->flags & CMD_ASYNC) | 495 | if (cmd->flags & CMD_ASYNC) |
@@ -584,7 +582,7 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id, | |||
584 | if (nfreed++ > 0) { | 582 | if (nfreed++ > 0) { |
585 | IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", idx, | 583 | IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", idx, |
586 | q->write_ptr, q->read_ptr); | 584 | q->write_ptr, q->read_ptr); |
587 | queue_work(priv->workqueue, &priv->restart); | 585 | iwlagn_fw_error(priv, false); |
588 | } | 586 | } |
589 | 587 | ||
590 | } | 588 | } |
@@ -609,6 +607,10 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
609 | struct iwl_device_cmd *cmd; | 607 | struct iwl_device_cmd *cmd; |
610 | struct iwl_cmd_meta *meta; | 608 | struct iwl_cmd_meta *meta; |
611 | struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue]; | 609 | struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue]; |
610 | unsigned long flags; | ||
611 | void (*callback) (struct iwl_priv *priv, struct iwl_device_cmd *cmd, | ||
612 | struct iwl_rx_packet *pkt); | ||
613 | |||
612 | 614 | ||
613 | /* If a Tx command is being handled and it isn't in the actual | 615 | /* If a Tx command is being handled and it isn't in the actual |
614 | * command queue then there a command routing bug has been introduced | 616 | * command queue then there a command routing bug has been introduced |
@@ -622,14 +624,8 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
622 | return; | 624 | return; |
623 | } | 625 | } |
624 | 626 | ||
625 | /* If this is a huge cmd, clear the huge flag on the meta.flags | 627 | spin_lock_irqsave(&priv->hcmd_lock, flags); |
626 | * of the _original_ cmd. So that iwl_cmd_queue_free won't unmap | 628 | |
627 | * the DMA buffer for the scan (huge) command. | ||
628 | */ | ||
629 | if (huge) { | ||
630 | cmd_index = get_cmd_index(&txq->q, index, 0); | ||
631 | txq->meta[cmd_index].flags = 0; | ||
632 | } | ||
633 | cmd_index = get_cmd_index(&txq->q, index, huge); | 629 | cmd_index = get_cmd_index(&txq->q, index, huge); |
634 | cmd = txq->cmd[cmd_index]; | 630 | cmd = txq->cmd[cmd_index]; |
635 | meta = &txq->meta[cmd_index]; | 631 | meta = &txq->meta[cmd_index]; |
@@ -639,12 +635,13 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
639 | dma_unmap_len(meta, len), | 635 | dma_unmap_len(meta, len), |
640 | PCI_DMA_BIDIRECTIONAL); | 636 | PCI_DMA_BIDIRECTIONAL); |
641 | 637 | ||
638 | callback = NULL; | ||
642 | /* Input error checking is done when commands are added to queue. */ | 639 | /* Input error checking is done when commands are added to queue. */ |
643 | if (meta->flags & CMD_WANT_SKB) { | 640 | if (meta->flags & CMD_WANT_SKB) { |
644 | meta->source->reply_page = (unsigned long)rxb_addr(rxb); | 641 | meta->source->reply_page = (unsigned long)rxb_addr(rxb); |
645 | rxb->page = NULL; | 642 | rxb->page = NULL; |
646 | } else if (meta->callback) | 643 | } else |
647 | meta->callback(priv, cmd, pkt); | 644 | callback = meta->callback; |
648 | 645 | ||
649 | iwl_hcmd_queue_reclaim(priv, txq_id, index, cmd_index); | 646 | iwl_hcmd_queue_reclaim(priv, txq_id, index, cmd_index); |
650 | 647 | ||
@@ -654,5 +651,12 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
654 | get_cmd_string(cmd->hdr.cmd)); | 651 | get_cmd_string(cmd->hdr.cmd)); |
655 | wake_up_interruptible(&priv->wait_command_queue); | 652 | wake_up_interruptible(&priv->wait_command_queue); |
656 | } | 653 | } |
654 | |||
655 | /* Mark as unmapped */ | ||
657 | meta->flags = 0; | 656 | meta->flags = 0; |
657 | |||
658 | spin_unlock_irqrestore(&priv->hcmd_lock, flags); | ||
659 | |||
660 | if (callback) | ||
661 | callback(priv, cmd, pkt); | ||
658 | } | 662 | } |