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authorEmmanuel Grumbach <emmanuel.grumbach@intel.com>2012-12-24 07:27:11 -0500
committerJohannes Berg <johannes.berg@intel.com>2013-01-03 09:30:19 -0500
commit4fd442db98dadf33ecce6d489bbbc95f6e8d3b31 (patch)
tree9eff5b52f5533a4864050a2829b9e849879b990a /drivers/net/wireless/iwlwifi/pcie/trans.c
parent7a65d17053c758109477f420e813ba2d826b0eae (diff)
iwlwifi: virtualize SRAM access
Different transports implement the access to the SRAM in different ways. Virtualize it. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/pcie/trans.c')
-rw-r--r--drivers/net/wireless/iwlwifi/pcie/trans.c41
1 files changed, 41 insertions, 0 deletions
diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c
index 80b05d821688..3a40607ed542 100644
--- a/drivers/net/wireless/iwlwifi/pcie/trans.c
+++ b/drivers/net/wireless/iwlwifi/pcie/trans.c
@@ -820,6 +820,45 @@ static void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans)
820 mmiowb(); 820 mmiowb();
821} 821}
822 822
823static int iwl_trans_pcie_read_mem(struct iwl_trans *trans, u32 addr,
824 void *buf, int dwords)
825{
826 unsigned long flags;
827 int offs, ret = 0;
828 u32 *vals = buf;
829
830 spin_lock_irqsave(&trans->reg_lock, flags);
831 if (likely(iwl_trans_grab_nic_access(trans, false))) {
832 iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr);
833 for (offs = 0; offs < dwords; offs++)
834 vals[offs] = iwl_read32(trans, HBUS_TARG_MEM_RDAT);
835 iwl_trans_release_nic_access(trans);
836 } else {
837 ret = -EBUSY;
838 }
839 spin_unlock_irqrestore(&trans->reg_lock, flags);
840 return ret;
841}
842
843static int iwl_trans_pcie_write_mem(struct iwl_trans *trans, u32 addr,
844 void *buf, int dwords)
845{
846 unsigned long flags;
847 int offs, ret = 0;
848 u32 *vals = buf;
849
850 spin_lock_irqsave(&trans->reg_lock, flags);
851 if (likely(iwl_trans_grab_nic_access(trans, false))) {
852 iwl_write32(trans, HBUS_TARG_MEM_WADDR, addr);
853 for (offs = 0; offs < dwords; offs++)
854 iwl_write32(trans, HBUS_TARG_MEM_WDAT, vals[offs]);
855 iwl_trans_release_nic_access(trans);
856 } else {
857 ret = -EBUSY;
858 }
859 spin_unlock_irqrestore(&trans->reg_lock, flags);
860 return ret;
861}
823 862
824#define IWL_FLUSH_WAIT_MS 2000 863#define IWL_FLUSH_WAIT_MS 2000
825 864
@@ -1298,6 +1337,8 @@ static const struct iwl_trans_ops trans_ops_pcie = {
1298 .read32 = iwl_trans_pcie_read32, 1337 .read32 = iwl_trans_pcie_read32,
1299 .read_prph = iwl_trans_pcie_read_prph, 1338 .read_prph = iwl_trans_pcie_read_prph,
1300 .write_prph = iwl_trans_pcie_write_prph, 1339 .write_prph = iwl_trans_pcie_write_prph,
1340 .read_mem = iwl_trans_pcie_read_mem,
1341 .write_mem = iwl_trans_pcie_write_mem,
1301 .configure = iwl_trans_pcie_configure, 1342 .configure = iwl_trans_pcie_configure,
1302 .set_pmi = iwl_trans_pcie_set_pmi, 1343 .set_pmi = iwl_trans_pcie_set_pmi,
1303 .grab_nic_access = iwl_trans_pcie_grab_nic_access, 1344 .grab_nic_access = iwl_trans_pcie_grab_nic_access,