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authorMohamed Abbas <mohamed.abbas@intel.com>2009-05-22 14:01:47 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-05-22 14:06:04 -0400
commita8b50a0a966d7ac313f624c6ab4996231a5fe25a (patch)
tree8c000ee1d429f1e639fde9613cb48b268aee1ff6 /drivers/net/wireless/iwlwifi/iwl3945-base.c
parent0848e297c2107dbc12a91a1709c879c73bd188d8 (diff)
iwlcore: register locks
Add new lock to be used when accessing some registers. Also move the register lock and iwl_grab_nic_access inside the function for register access. This will prevent from forgetting to hold locks and nic access in the right way and make code easier to maintain. We over use the priv->lock spin lock and I guess we need to add new one for Tx queue after that we might need to change most of these lock to BH and just keep priv->lock as irq type. Signed-off-by: Mohamed Abbas <mohamed.abbas@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl3945-base.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl3945-base.c73
1 files changed, 10 insertions, 63 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c
index 5d52f2275b6d..8e68803cdc62 100644
--- a/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -1686,7 +1686,6 @@ static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1686 u32 i; 1686 u32 i;
1687 u32 desc, time, count, base, data1; 1687 u32 desc, time, count, base, data1;
1688 u32 blink1, blink2, ilink1, ilink2; 1688 u32 blink1, blink2, ilink1, ilink2;
1689 int rc;
1690 1689
1691 base = le32_to_cpu(priv->card_alive.error_event_table_ptr); 1690 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1692 1691
@@ -1695,11 +1694,6 @@ static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1695 return; 1694 return;
1696 } 1695 }
1697 1696
1698 rc = iwl_grab_nic_access(priv);
1699 if (rc) {
1700 IWL_WARN(priv, "Can not read from adapter at this time.\n");
1701 return;
1702 }
1703 1697
1704 count = iwl_read_targ_mem(priv, base); 1698 count = iwl_read_targ_mem(priv, base);
1705 1699
@@ -1734,8 +1728,6 @@ static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1734 ilink1, ilink2, data1); 1728 ilink1, ilink2, data1);
1735 } 1729 }
1736 1730
1737 iwl_release_nic_access(priv);
1738
1739} 1731}
1740 1732
1741#define EVENT_START_OFFSET (6 * sizeof(u32)) 1733#define EVENT_START_OFFSET (6 * sizeof(u32))
@@ -1743,7 +1735,6 @@ static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1743/** 1735/**
1744 * iwl3945_print_event_log - Dump error event log to syslog 1736 * iwl3945_print_event_log - Dump error event log to syslog
1745 * 1737 *
1746 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
1747 */ 1738 */
1748static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx, 1739static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1749 u32 num_events, u32 mode) 1740 u32 num_events, u32 mode)
@@ -1786,7 +1777,6 @@ static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1786 1777
1787static void iwl3945_dump_nic_event_log(struct iwl_priv *priv) 1778static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1788{ 1779{
1789 int rc;
1790 u32 base; /* SRAM byte address of event log header */ 1780 u32 base; /* SRAM byte address of event log header */
1791 u32 capacity; /* event log capacity in # entries */ 1781 u32 capacity; /* event log capacity in # entries */
1792 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ 1782 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
@@ -1800,12 +1790,6 @@ static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1800 return; 1790 return;
1801 } 1791 }
1802 1792
1803 rc = iwl_grab_nic_access(priv);
1804 if (rc) {
1805 IWL_WARN(priv, "Can not read from adapter at this time.\n");
1806 return;
1807 }
1808
1809 /* event log header */ 1793 /* event log header */
1810 capacity = iwl_read_targ_mem(priv, base); 1794 capacity = iwl_read_targ_mem(priv, base);
1811 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32))); 1795 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
@@ -1817,7 +1801,6 @@ static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1817 /* bail out if nothing in log */ 1801 /* bail out if nothing in log */
1818 if (size == 0) { 1802 if (size == 0) {
1819 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n"); 1803 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1820 iwl_release_nic_access(priv);
1821 return; 1804 return;
1822 } 1805 }
1823 1806
@@ -1833,7 +1816,6 @@ static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1833 /* (then/else) start at top of log */ 1816 /* (then/else) start at top of log */
1834 iwl3945_print_event_log(priv, 0, next_entry, mode); 1817 iwl3945_print_event_log(priv, 0, next_entry, mode);
1835 1818
1836 iwl_release_nic_access(priv);
1837} 1819}
1838 1820
1839static void iwl3945_irq_tasklet(struct iwl_priv *priv) 1821static void iwl3945_irq_tasklet(struct iwl_priv *priv)
@@ -1952,11 +1934,8 @@ static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1952 priv->isr_stats.tx++; 1934 priv->isr_stats.tx++;
1953 1935
1954 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6)); 1936 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1955 if (!iwl_grab_nic_access(priv)) { 1937 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1956 iwl_write_direct32(priv, FH39_TCSR_CREDIT 1938 (FH39_SRVC_CHNL), 0x0);
1957 (FH39_SRVC_CHNL), 0x0);
1958 iwl_release_nic_access(priv);
1959 }
1960 handled |= CSR_INT_BIT_FH_TX; 1939 handled |= CSR_INT_BIT_FH_TX;
1961 } 1940 }
1962 1941
@@ -2131,10 +2110,6 @@ static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 le
2131 2110
2132 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); 2111 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2133 2112
2134 rc = iwl_grab_nic_access(priv);
2135 if (rc)
2136 return rc;
2137
2138 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, 2113 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2139 IWL39_RTC_INST_LOWER_BOUND); 2114 IWL39_RTC_INST_LOWER_BOUND);
2140 2115
@@ -2155,7 +2130,6 @@ static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 le
2155 } 2130 }
2156 } 2131 }
2157 2132
2158 iwl_release_nic_access(priv);
2159 2133
2160 if (!errcnt) 2134 if (!errcnt)
2161 IWL_DEBUG_INFO(priv, 2135 IWL_DEBUG_INFO(priv,
@@ -2179,10 +2153,6 @@ static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
2179 2153
2180 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); 2154 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2181 2155
2182 rc = iwl_grab_nic_access(priv);
2183 if (rc)
2184 return rc;
2185
2186 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { 2156 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2187 /* read data comes through single port, auto-incr addr */ 2157 /* read data comes through single port, auto-incr addr */
2188 /* NOTE: Use the debugless read so we don't flood kernel log 2158 /* NOTE: Use the debugless read so we don't flood kernel log
@@ -2203,8 +2173,6 @@ static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
2203 } 2173 }
2204 } 2174 }
2205 2175
2206 iwl_release_nic_access(priv);
2207
2208 return rc; 2176 return rc;
2209} 2177}
2210 2178
@@ -2528,20 +2496,11 @@ static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2528{ 2496{
2529 dma_addr_t pinst; 2497 dma_addr_t pinst;
2530 dma_addr_t pdata; 2498 dma_addr_t pdata;
2531 int rc = 0;
2532 unsigned long flags;
2533 2499
2534 /* bits 31:0 for 3945 */ 2500 /* bits 31:0 for 3945 */
2535 pinst = priv->ucode_code.p_addr; 2501 pinst = priv->ucode_code.p_addr;
2536 pdata = priv->ucode_data_backup.p_addr; 2502 pdata = priv->ucode_data_backup.p_addr;
2537 2503
2538 spin_lock_irqsave(&priv->lock, flags);
2539 rc = iwl_grab_nic_access(priv);
2540 if (rc) {
2541 spin_unlock_irqrestore(&priv->lock, flags);
2542 return rc;
2543 }
2544
2545 /* Tell bootstrap uCode where to find image to load */ 2504 /* Tell bootstrap uCode where to find image to load */
2546 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); 2505 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2547 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); 2506 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
@@ -2553,13 +2512,9 @@ static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2553 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, 2512 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2554 priv->ucode_code.len | BSM_DRAM_INST_LOAD); 2513 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2555 2514
2556 iwl_release_nic_access(priv);
2557
2558 spin_unlock_irqrestore(&priv->lock, flags);
2559
2560 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n"); 2515 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2561 2516
2562 return rc; 2517 return 0;
2563} 2518}
2564 2519
2565/** 2520/**
@@ -2612,7 +2567,6 @@ static void iwl3945_init_alive_start(struct iwl_priv *priv)
2612 */ 2567 */
2613static void iwl3945_alive_start(struct iwl_priv *priv) 2568static void iwl3945_alive_start(struct iwl_priv *priv)
2614{ 2569{
2615 int rc = 0;
2616 int thermal_spin = 0; 2570 int thermal_spin = 0;
2617 u32 rfkill; 2571 u32 rfkill;
2618 2572
@@ -2637,15 +2591,8 @@ static void iwl3945_alive_start(struct iwl_priv *priv)
2637 2591
2638 priv->cfg->ops->smgmt->clear_station_table(priv); 2592 priv->cfg->ops->smgmt->clear_station_table(priv);
2639 2593
2640 rc = iwl_grab_nic_access(priv);
2641 if (rc) {
2642 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
2643 return;
2644 }
2645
2646 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG); 2594 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2647 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill); 2595 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2648 iwl_release_nic_access(priv);
2649 2596
2650 if (rfkill & 0x1) { 2597 if (rfkill & 0x1) {
2651 clear_bit(STATUS_RF_KILL_HW, &priv->status); 2598 clear_bit(STATUS_RF_KILL_HW, &priv->status);
@@ -2791,13 +2738,8 @@ static void __iwl3945_down(struct iwl_priv *priv)
2791 iwl3945_hw_txq_ctx_stop(priv); 2738 iwl3945_hw_txq_ctx_stop(priv);
2792 iwl3945_hw_rxq_stop(priv); 2739 iwl3945_hw_rxq_stop(priv);
2793 2740
2794 spin_lock_irqsave(&priv->lock, flags); 2741 iwl_write_prph(priv, APMG_CLK_DIS_REG,
2795 if (!iwl_grab_nic_access(priv)) { 2742 APMG_CLK_VAL_DMA_CLK_RQT);
2796 iwl_write_prph(priv, APMG_CLK_DIS_REG,
2797 APMG_CLK_VAL_DMA_CLK_RQT);
2798 iwl_release_nic_access(priv);
2799 }
2800 spin_unlock_irqrestore(&priv->lock, flags);
2801 2743
2802 udelay(5); 2744 udelay(5);
2803 2745
@@ -4288,6 +4230,11 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
4288 * PCI Tx retries from interfering with C3 CPU state */ 4230 * PCI Tx retries from interfering with C3 CPU state */
4289 pci_write_config_byte(pdev, 0x41, 0x00); 4231 pci_write_config_byte(pdev, 0x41, 0x00);
4290 4232
4233 /* this spin lock will be used in apm_ops.init and EEPROM access
4234 * we should init now
4235 */
4236 spin_lock_init(&priv->reg_lock);
4237
4291 /* amp init */ 4238 /* amp init */
4292 err = priv->cfg->ops->lib->apm_ops.init(priv); 4239 err = priv->cfg->ops->lib->apm_ops.init(priv);
4293 if (err < 0) { 4240 if (err < 0) {