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authorTomas Winkler <tomas.winkler@intel.com>2008-10-24 02:48:56 -0400
committerJohn W. Linville <linville@tuxdriver.com>2008-10-31 19:02:28 -0400
commita96a27f97f2bbfc1fca54bc3c0b0d41484152740 (patch)
treef9f6611156a01fbe97b38fb92aa078b2fc01d929 /drivers/net/wireless/iwlwifi/iwl-prph.h
parent127901ab69bbb263fb2b46e850cf20c57ac321d3 (diff)
iwlwifi: run through spell checker
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-prph.h')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-prph.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-prph.h b/drivers/net/wireless/iwlwifi/iwl-prph.h
index ee5afd48d3af..b0ffb8919d3b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-prph.h
+++ b/drivers/net/wireless/iwlwifi/iwl-prph.h
@@ -158,9 +158,9 @@
158 * 158 *
159 * 4) Point (via BSM_DRAM_*) to the "runtime" uCode data and instruction 159 * 4) Point (via BSM_DRAM_*) to the "runtime" uCode data and instruction
160 * images in host DRAM. The last register loaded must be the instruction 160 * images in host DRAM. The last register loaded must be the instruction
161 * bytecount register ("1" in MSbit tells initialization uCode to load 161 * byte count register ("1" in MSbit tells initialization uCode to load
162 * the runtime uCode): 162 * the runtime uCode):
163 * BSM_DRAM_INST_BYTECOUNT_REG = bytecount | BSM_DRAM_INST_LOAD 163 * BSM_DRAM_INST_BYTECOUNT_REG = byte count | BSM_DRAM_INST_LOAD
164 * 164 *
165 * 5) Wait for "alive" notification, then issue normal runtime commands. 165 * 5) Wait for "alive" notification, then issue normal runtime commands.
166 * 166 *
@@ -244,7 +244,7 @@
244/** 244/**
245 * Tx Scheduler 245 * Tx Scheduler
246 * 246 *
247 * The Tx Scheduler selects the next frame to be transmitted, chosing TFDs 247 * The Tx Scheduler selects the next frame to be transmitted, choosing TFDs
248 * (Transmit Frame Descriptors) from up to 16 circular Tx queues resident in 248 * (Transmit Frame Descriptors) from up to 16 circular Tx queues resident in
249 * host DRAM. It steers each frame's Tx command (which contains the frame 249 * host DRAM. It steers each frame's Tx command (which contains the frame
250 * data) into one of up to 7 prioritized Tx DMA FIFO channels within the 250 * data) into one of up to 7 prioritized Tx DMA FIFO channels within the