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authorJohannes Berg <johannes.berg@intel.com>2012-04-09 20:46:58 -0400
committerJohn W. Linville <linville@tuxdriver.com>2012-04-12 15:06:09 -0400
commit11483b5c2296cb318140f8b4ff9148faab0209d0 (patch)
treeac24fbd7e8693f21c4f503b216fcc84bdf83a3ed /drivers/net/wireless/iwlwifi/iwl-eeprom.c
parent48dffd397ec13e7fb4a52b77e8b07ed8ea12a938 (diff)
iwlwifi: move eeprom into priv
The whole code around eeprom is distributed across whole bunch of different files, most of which belong to the to-be-DVM code. As a result, it is currently very hard to split out the EEPROM code to be generic. However, it is also quite unlikely that the current EEPROM code will be needed by the MVM code as that has different mechanisms to query the EEPROM (it does so through the uCode.) So, at least temporarily, move everything into priv. If it becomes necessary to use the code from MVM, we will have to split it out, but then it's also easier since we'll know what pieces we need. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-eeprom.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c190
1 files changed, 123 insertions, 67 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index 12744b053bc5..1db98d67706d 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -187,33 +187,33 @@ static void iwl_eeprom_release_semaphore(struct iwl_trans *trans)
187 187
188} 188}
189 189
190static int iwl_eeprom_verify_signature(struct iwl_trans *trans) 190static int iwl_eeprom_verify_signature(struct iwl_priv *priv)
191{ 191{
192 u32 gp = iwl_read32(trans, CSR_EEPROM_GP) & 192 u32 gp = iwl_read32(trans(priv), CSR_EEPROM_GP) &
193 CSR_EEPROM_GP_VALID_MSK; 193 CSR_EEPROM_GP_VALID_MSK;
194 int ret = 0; 194 int ret = 0;
195 195
196 IWL_DEBUG_EEPROM(trans, "EEPROM signature=0x%08x\n", gp); 196 IWL_DEBUG_EEPROM(priv, "EEPROM signature=0x%08x\n", gp);
197 switch (gp) { 197 switch (gp) {
198 case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP: 198 case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP:
199 if (trans->nvm_device_type != NVM_DEVICE_TYPE_OTP) { 199 if (priv->nvm_device_type != NVM_DEVICE_TYPE_OTP) {
200 IWL_ERR(trans, "EEPROM with bad signature: 0x%08x\n", 200 IWL_ERR(priv, "EEPROM with bad signature: 0x%08x\n",
201 gp); 201 gp);
202 ret = -ENOENT; 202 ret = -ENOENT;
203 } 203 }
204 break; 204 break;
205 case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K: 205 case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
206 case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K: 206 case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
207 if (trans->nvm_device_type != NVM_DEVICE_TYPE_EEPROM) { 207 if (priv->nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {
208 IWL_ERR(trans, "OTP with bad signature: 0x%08x\n", gp); 208 IWL_ERR(priv, "OTP with bad signature: 0x%08x\n", gp);
209 ret = -ENOENT; 209 ret = -ENOENT;
210 } 210 }
211 break; 211 break;
212 case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP: 212 case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP:
213 default: 213 default:
214 IWL_ERR(trans, "bad EEPROM/OTP signature, type=%s, " 214 IWL_ERR(priv, "bad EEPROM/OTP signature, type=%s, "
215 "EEPROM_GP=0x%08x\n", 215 "EEPROM_GP=0x%08x\n",
216 (trans->nvm_device_type == NVM_DEVICE_TYPE_OTP) 216 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
217 ? "OTP" : "EEPROM", gp); 217 ? "OTP" : "EEPROM", gp);
218 ret = -ENOENT; 218 ret = -ENOENT;
219 break; 219 break;
@@ -221,11 +221,11 @@ static int iwl_eeprom_verify_signature(struct iwl_trans *trans)
221 return ret; 221 return ret;
222} 222}
223 223
224u16 iwl_eeprom_query16(const struct iwl_shared *shrd, size_t offset) 224u16 iwl_eeprom_query16(struct iwl_priv *priv, size_t offset)
225{ 225{
226 if (!shrd->eeprom) 226 if (!priv->eeprom)
227 return 0; 227 return 0;
228 return (u16)shrd->eeprom[offset] | ((u16)shrd->eeprom[offset + 1] << 8); 228 return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
229} 229}
230 230
231int iwl_eeprom_check_version(struct iwl_priv *priv) 231int iwl_eeprom_check_version(struct iwl_priv *priv)
@@ -233,8 +233,8 @@ int iwl_eeprom_check_version(struct iwl_priv *priv)
233 u16 eeprom_ver; 233 u16 eeprom_ver;
234 u16 calib_ver; 234 u16 calib_ver;
235 235
236 eeprom_ver = iwl_eeprom_query16(priv->shrd, EEPROM_VERSION); 236 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
237 calib_ver = iwl_eeprom_calib_version(priv->shrd); 237 calib_ver = iwl_eeprom_calib_version(priv);
238 238
239 if (eeprom_ver < cfg(priv)->eeprom_ver || 239 if (eeprom_ver < cfg(priv)->eeprom_ver ||
240 calib_ver < cfg(priv)->eeprom_calib_ver) 240 calib_ver < cfg(priv)->eeprom_calib_ver)
@@ -255,10 +255,9 @@ err:
255 255
256int iwl_eeprom_init_hw_params(struct iwl_priv *priv) 256int iwl_eeprom_init_hw_params(struct iwl_priv *priv)
257{ 257{
258 struct iwl_shared *shrd = priv->shrd;
259 u16 radio_cfg; 258 u16 radio_cfg;
260 259
261 priv->hw_params.sku = iwl_eeprom_query16(shrd, EEPROM_SKU_CAP); 260 priv->hw_params.sku = iwl_eeprom_query16(priv, EEPROM_SKU_CAP);
262 if (priv->hw_params.sku & EEPROM_SKU_CAP_11N_ENABLE && 261 if (priv->hw_params.sku & EEPROM_SKU_CAP_11N_ENABLE &&
263 !cfg(priv)->ht_params) { 262 !cfg(priv)->ht_params) {
264 IWL_ERR(priv, "Invalid 11n configuration\n"); 263 IWL_ERR(priv, "Invalid 11n configuration\n");
@@ -272,7 +271,7 @@ int iwl_eeprom_init_hw_params(struct iwl_priv *priv)
272 271
273 IWL_INFO(priv, "Device SKU: 0x%X\n", priv->hw_params.sku); 272 IWL_INFO(priv, "Device SKU: 0x%X\n", priv->hw_params.sku);
274 273
275 radio_cfg = iwl_eeprom_query16(shrd, EEPROM_RADIO_CONFIG); 274 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
276 275
277 priv->hw_params.valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg); 276 priv->hw_params.valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
278 priv->hw_params.valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg); 277 priv->hw_params.valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);
@@ -296,9 +295,67 @@ int iwl_eeprom_init_hw_params(struct iwl_priv *priv)
296 return 0; 295 return 0;
297} 296}
298 297
299void iwl_eeprom_get_mac(const struct iwl_shared *shrd, u8 *mac) 298u16 iwl_eeprom_calib_version(struct iwl_priv *priv)
300{ 299{
301 const u8 *addr = iwl_eeprom_query_addr(shrd, 300 struct iwl_eeprom_calib_hdr *hdr;
301
302 hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
303 EEPROM_CALIB_ALL);
304 return hdr->version;
305}
306
307static u32 eeprom_indirect_address(struct iwl_priv *priv, u32 address)
308{
309 u16 offset = 0;
310
311 if ((address & INDIRECT_ADDRESS) == 0)
312 return address;
313
314 switch (address & INDIRECT_TYPE_MSK) {
315 case INDIRECT_HOST:
316 offset = iwl_eeprom_query16(priv, EEPROM_LINK_HOST);
317 break;
318 case INDIRECT_GENERAL:
319 offset = iwl_eeprom_query16(priv, EEPROM_LINK_GENERAL);
320 break;
321 case INDIRECT_REGULATORY:
322 offset = iwl_eeprom_query16(priv, EEPROM_LINK_REGULATORY);
323 break;
324 case INDIRECT_TXP_LIMIT:
325 offset = iwl_eeprom_query16(priv, EEPROM_LINK_TXP_LIMIT);
326 break;
327 case INDIRECT_TXP_LIMIT_SIZE:
328 offset = iwl_eeprom_query16(priv, EEPROM_LINK_TXP_LIMIT_SIZE);
329 break;
330 case INDIRECT_CALIBRATION:
331 offset = iwl_eeprom_query16(priv, EEPROM_LINK_CALIBRATION);
332 break;
333 case INDIRECT_PROCESS_ADJST:
334 offset = iwl_eeprom_query16(priv, EEPROM_LINK_PROCESS_ADJST);
335 break;
336 case INDIRECT_OTHERS:
337 offset = iwl_eeprom_query16(priv, EEPROM_LINK_OTHERS);
338 break;
339 default:
340 IWL_ERR(priv, "illegal indirect type: 0x%X\n",
341 address & INDIRECT_TYPE_MSK);
342 break;
343 }
344
345 /* translate the offset from words to byte */
346 return (address & ADDRESS_MSK) + (offset << 1);
347}
348
349const u8 *iwl_eeprom_query_addr(struct iwl_priv *priv, size_t offset)
350{
351 u32 address = eeprom_indirect_address(priv, offset);
352 BUG_ON(address >= cfg(priv)->base_params->eeprom_size);
353 return &priv->eeprom[address];
354}
355
356void iwl_eeprom_get_mac(struct iwl_priv *priv, u8 *mac)
357{
358 const u8 *addr = iwl_eeprom_query_addr(priv,
302 EEPROM_MAC_ADDRESS); 359 EEPROM_MAC_ADDRESS);
303 memcpy(mac, addr, ETH_ALEN); 360 memcpy(mac, addr, ETH_ALEN);
304} 361}
@@ -591,7 +648,6 @@ iwl_eeprom_enh_txp_read_element(struct iwl_priv *priv,
591 648
592static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv) 649static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
593{ 650{
594 struct iwl_shared *shrd = priv->shrd;
595 struct iwl_eeprom_enhanced_txpwr *txp_array, *txp; 651 struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;
596 int idx, entries; 652 int idx, entries;
597 __le16 *txp_len; 653 __le16 *txp_len;
@@ -600,10 +656,10 @@ static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
600 BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8); 656 BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8);
601 657
602 /* the length is in 16-bit words, but we want entries */ 658 /* the length is in 16-bit words, but we want entries */
603 txp_len = (__le16 *) iwl_eeprom_query_addr(shrd, EEPROM_TXP_SZ_OFFS); 659 txp_len = (__le16 *) iwl_eeprom_query_addr(priv, EEPROM_TXP_SZ_OFFS);
604 entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN; 660 entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;
605 661
606 txp_array = (void *) iwl_eeprom_query_addr(shrd, EEPROM_TXP_OFFS); 662 txp_array = (void *) iwl_eeprom_query_addr(priv, EEPROM_TXP_OFFS);
607 663
608 for (idx = 0; idx < entries; idx++) { 664 for (idx = 0; idx < entries; idx++) {
609 txp = &txp_array[idx]; 665 txp = &txp_array[idx];
@@ -656,66 +712,66 @@ static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
656/** 712/**
657 * iwl_eeprom_init - read EEPROM contents 713 * iwl_eeprom_init - read EEPROM contents
658 * 714 *
659 * Load the EEPROM contents from adapter into shrd->eeprom 715 * Load the EEPROM contents from adapter into priv->eeprom
660 * 716 *
661 * NOTE: This routine uses the non-debug IO access functions. 717 * NOTE: This routine uses the non-debug IO access functions.
662 */ 718 */
663int iwl_eeprom_init(struct iwl_trans *trans, u32 hw_rev) 719int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
664{ 720{
665 __le16 *e; 721 __le16 *e;
666 u32 gp = iwl_read32(trans, CSR_EEPROM_GP); 722 u32 gp = iwl_read32(trans(priv), CSR_EEPROM_GP);
667 int sz; 723 int sz;
668 int ret; 724 int ret;
669 u16 addr; 725 u16 addr;
670 u16 validblockaddr = 0; 726 u16 validblockaddr = 0;
671 u16 cache_addr = 0; 727 u16 cache_addr = 0;
672 728
673 trans->nvm_device_type = iwl_get_nvm_type(trans, hw_rev); 729 priv->nvm_device_type = iwl_get_nvm_type(trans(priv), hw_rev);
674 if (trans->nvm_device_type == -ENOENT) 730 if (priv->nvm_device_type == -ENOENT)
675 return -ENOENT; 731 return -ENOENT;
676 /* allocate eeprom */ 732 /* allocate eeprom */
677 sz = cfg(trans)->base_params->eeprom_size; 733 sz = cfg(priv)->base_params->eeprom_size;
678 IWL_DEBUG_EEPROM(trans, "NVM size = %d\n", sz); 734 IWL_DEBUG_EEPROM(priv, "NVM size = %d\n", sz);
679 trans->shrd->eeprom = kzalloc(sz, GFP_KERNEL); 735 priv->eeprom = kzalloc(sz, GFP_KERNEL);
680 if (!trans->shrd->eeprom) { 736 if (!priv->eeprom) {
681 ret = -ENOMEM; 737 ret = -ENOMEM;
682 goto alloc_err; 738 goto alloc_err;
683 } 739 }
684 e = (__le16 *)trans->shrd->eeprom; 740 e = (__le16 *)priv->eeprom;
685 741
686 ret = iwl_eeprom_verify_signature(trans); 742 ret = iwl_eeprom_verify_signature(priv);
687 if (ret < 0) { 743 if (ret < 0) {
688 IWL_ERR(trans, "EEPROM not found, EEPROM_GP=0x%08x\n", gp); 744 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
689 ret = -ENOENT; 745 ret = -ENOENT;
690 goto err; 746 goto err;
691 } 747 }
692 748
693 /* Make sure driver (instead of uCode) is allowed to read EEPROM */ 749 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
694 ret = iwl_eeprom_acquire_semaphore(trans); 750 ret = iwl_eeprom_acquire_semaphore(trans(priv));
695 if (ret < 0) { 751 if (ret < 0) {
696 IWL_ERR(trans, "Failed to acquire EEPROM semaphore.\n"); 752 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
697 ret = -ENOENT; 753 ret = -ENOENT;
698 goto err; 754 goto err;
699 } 755 }
700 756
701 if (trans->nvm_device_type == NVM_DEVICE_TYPE_OTP) { 757 if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
702 758
703 ret = iwl_init_otp_access(trans); 759 ret = iwl_init_otp_access(trans(priv));
704 if (ret) { 760 if (ret) {
705 IWL_ERR(trans, "Failed to initialize OTP access.\n"); 761 IWL_ERR(priv, "Failed to initialize OTP access.\n");
706 ret = -ENOENT; 762 ret = -ENOENT;
707 goto done; 763 goto done;
708 } 764 }
709 iwl_write32(trans, CSR_EEPROM_GP, 765 iwl_write32(trans(priv), CSR_EEPROM_GP,
710 iwl_read32(trans, CSR_EEPROM_GP) & 766 iwl_read32(trans(priv), CSR_EEPROM_GP) &
711 ~CSR_EEPROM_GP_IF_OWNER_MSK); 767 ~CSR_EEPROM_GP_IF_OWNER_MSK);
712 768
713 iwl_set_bit(trans, CSR_OTP_GP_REG, 769 iwl_set_bit(trans(priv), CSR_OTP_GP_REG,
714 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK | 770 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
715 CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK); 771 CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
716 /* traversing the linked list if no shadow ram supported */ 772 /* traversing the linked list if no shadow ram supported */
717 if (!cfg(trans)->base_params->shadow_ram_support) { 773 if (!cfg(priv)->base_params->shadow_ram_support) {
718 if (iwl_find_otp_image(trans, &validblockaddr)) { 774 if (iwl_find_otp_image(trans(priv), &validblockaddr)) {
719 ret = -ENOENT; 775 ret = -ENOENT;
720 goto done; 776 goto done;
721 } 777 }
@@ -724,7 +780,8 @@ int iwl_eeprom_init(struct iwl_trans *trans, u32 hw_rev)
724 addr += sizeof(u16)) { 780 addr += sizeof(u16)) {
725 __le16 eeprom_data; 781 __le16 eeprom_data;
726 782
727 ret = iwl_read_otp_word(trans, addr, &eeprom_data); 783 ret = iwl_read_otp_word(trans(priv), addr,
784 &eeprom_data);
728 if (ret) 785 if (ret)
729 goto done; 786 goto done;
730 e[cache_addr / 2] = eeprom_data; 787 e[cache_addr / 2] = eeprom_data;
@@ -735,94 +792,93 @@ int iwl_eeprom_init(struct iwl_trans *trans, u32 hw_rev)
735 for (addr = 0; addr < sz; addr += sizeof(u16)) { 792 for (addr = 0; addr < sz; addr += sizeof(u16)) {
736 u32 r; 793 u32 r;
737 794
738 iwl_write32(trans, CSR_EEPROM_REG, 795 iwl_write32(trans(priv), CSR_EEPROM_REG,
739 CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); 796 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
740 797
741 ret = iwl_poll_bit(trans, CSR_EEPROM_REG, 798 ret = iwl_poll_bit(trans(priv), CSR_EEPROM_REG,
742 CSR_EEPROM_REG_READ_VALID_MSK, 799 CSR_EEPROM_REG_READ_VALID_MSK,
743 CSR_EEPROM_REG_READ_VALID_MSK, 800 CSR_EEPROM_REG_READ_VALID_MSK,
744 IWL_EEPROM_ACCESS_TIMEOUT); 801 IWL_EEPROM_ACCESS_TIMEOUT);
745 if (ret < 0) { 802 if (ret < 0) {
746 IWL_ERR(trans, 803 IWL_ERR(priv,
747 "Time out reading EEPROM[%d]\n", addr); 804 "Time out reading EEPROM[%d]\n", addr);
748 goto done; 805 goto done;
749 } 806 }
750 r = iwl_read32(trans, CSR_EEPROM_REG); 807 r = iwl_read32(trans(priv), CSR_EEPROM_REG);
751 e[addr / 2] = cpu_to_le16(r >> 16); 808 e[addr / 2] = cpu_to_le16(r >> 16);
752 } 809 }
753 } 810 }
754 811
755 IWL_DEBUG_EEPROM(trans, "NVM Type: %s, version: 0x%x\n", 812 IWL_DEBUG_EEPROM(priv, "NVM Type: %s, version: 0x%x\n",
756 (trans->nvm_device_type == NVM_DEVICE_TYPE_OTP) 813 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
757 ? "OTP" : "EEPROM", 814 ? "OTP" : "EEPROM",
758 iwl_eeprom_query16(trans->shrd, EEPROM_VERSION)); 815 iwl_eeprom_query16(priv, EEPROM_VERSION));
759 816
760 ret = 0; 817 ret = 0;
761done: 818done:
762 iwl_eeprom_release_semaphore(trans); 819 iwl_eeprom_release_semaphore(trans(priv));
763 820
764err: 821err:
765 if (ret) 822 if (ret)
766 iwl_eeprom_free(trans->shrd); 823 iwl_eeprom_free(priv);
767alloc_err: 824alloc_err:
768 return ret; 825 return ret;
769} 826}
770 827
771void iwl_eeprom_free(struct iwl_shared *shrd) 828void iwl_eeprom_free(struct iwl_priv *priv)
772{ 829{
773 kfree(shrd->eeprom); 830 kfree(priv->eeprom);
774 shrd->eeprom = NULL; 831 priv->eeprom = NULL;
775} 832}
776 833
777static void iwl_init_band_reference(const struct iwl_priv *priv, 834static void iwl_init_band_reference(struct iwl_priv *priv,
778 int eep_band, int *eeprom_ch_count, 835 int eep_band, int *eeprom_ch_count,
779 const struct iwl_eeprom_channel **eeprom_ch_info, 836 const struct iwl_eeprom_channel **eeprom_ch_info,
780 const u8 **eeprom_ch_index) 837 const u8 **eeprom_ch_index)
781{ 838{
782 struct iwl_shared *shrd = priv->shrd;
783 u32 offset = cfg(priv)->lib-> 839 u32 offset = cfg(priv)->lib->
784 eeprom_ops.regulatory_bands[eep_band - 1]; 840 eeprom_ops.regulatory_bands[eep_band - 1];
785 switch (eep_band) { 841 switch (eep_band) {
786 case 1: /* 2.4GHz band */ 842 case 1: /* 2.4GHz band */
787 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1); 843 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
788 *eeprom_ch_info = (struct iwl_eeprom_channel *) 844 *eeprom_ch_info = (struct iwl_eeprom_channel *)
789 iwl_eeprom_query_addr(shrd, offset); 845 iwl_eeprom_query_addr(priv, offset);
790 *eeprom_ch_index = iwl_eeprom_band_1; 846 *eeprom_ch_index = iwl_eeprom_band_1;
791 break; 847 break;
792 case 2: /* 4.9GHz band */ 848 case 2: /* 4.9GHz band */
793 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2); 849 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
794 *eeprom_ch_info = (struct iwl_eeprom_channel *) 850 *eeprom_ch_info = (struct iwl_eeprom_channel *)
795 iwl_eeprom_query_addr(shrd, offset); 851 iwl_eeprom_query_addr(priv, offset);
796 *eeprom_ch_index = iwl_eeprom_band_2; 852 *eeprom_ch_index = iwl_eeprom_band_2;
797 break; 853 break;
798 case 3: /* 5.2GHz band */ 854 case 3: /* 5.2GHz band */
799 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3); 855 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
800 *eeprom_ch_info = (struct iwl_eeprom_channel *) 856 *eeprom_ch_info = (struct iwl_eeprom_channel *)
801 iwl_eeprom_query_addr(shrd, offset); 857 iwl_eeprom_query_addr(priv, offset);
802 *eeprom_ch_index = iwl_eeprom_band_3; 858 *eeprom_ch_index = iwl_eeprom_band_3;
803 break; 859 break;
804 case 4: /* 5.5GHz band */ 860 case 4: /* 5.5GHz band */
805 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4); 861 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
806 *eeprom_ch_info = (struct iwl_eeprom_channel *) 862 *eeprom_ch_info = (struct iwl_eeprom_channel *)
807 iwl_eeprom_query_addr(shrd, offset); 863 iwl_eeprom_query_addr(priv, offset);
808 *eeprom_ch_index = iwl_eeprom_band_4; 864 *eeprom_ch_index = iwl_eeprom_band_4;
809 break; 865 break;
810 case 5: /* 5.7GHz band */ 866 case 5: /* 5.7GHz band */
811 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5); 867 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
812 *eeprom_ch_info = (struct iwl_eeprom_channel *) 868 *eeprom_ch_info = (struct iwl_eeprom_channel *)
813 iwl_eeprom_query_addr(shrd, offset); 869 iwl_eeprom_query_addr(priv, offset);
814 *eeprom_ch_index = iwl_eeprom_band_5; 870 *eeprom_ch_index = iwl_eeprom_band_5;
815 break; 871 break;
816 case 6: /* 2.4GHz ht40 channels */ 872 case 6: /* 2.4GHz ht40 channels */
817 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6); 873 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
818 *eeprom_ch_info = (struct iwl_eeprom_channel *) 874 *eeprom_ch_info = (struct iwl_eeprom_channel *)
819 iwl_eeprom_query_addr(shrd, offset); 875 iwl_eeprom_query_addr(priv, offset);
820 *eeprom_ch_index = iwl_eeprom_band_6; 876 *eeprom_ch_index = iwl_eeprom_band_6;
821 break; 877 break;
822 case 7: /* 5 GHz ht40 channels */ 878 case 7: /* 5 GHz ht40 channels */
823 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7); 879 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
824 *eeprom_ch_info = (struct iwl_eeprom_channel *) 880 *eeprom_ch_info = (struct iwl_eeprom_channel *)
825 iwl_eeprom_query_addr(shrd, offset); 881 iwl_eeprom_query_addr(priv, offset);
826 *eeprom_ch_index = iwl_eeprom_band_7; 882 *eeprom_ch_index = iwl_eeprom_band_7;
827 break; 883 break;
828 default: 884 default:
@@ -1072,7 +1128,7 @@ void iwl_rf_config(struct iwl_priv *priv)
1072{ 1128{
1073 u16 radio_cfg; 1129 u16 radio_cfg;
1074 1130
1075 radio_cfg = iwl_eeprom_query16(priv->shrd, EEPROM_RADIO_CONFIG); 1131 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
1076 1132
1077 /* write radio config values to register */ 1133 /* write radio config values to register */
1078 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX) { 1134 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX) {