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authorJay Sternberg <jay.e.sternberg@intel.com>2011-01-11 18:41:00 -0500
committerWey-Yi Guy <wey-yi.w.guy@intel.com>2011-01-21 18:50:33 -0500
commit24834d2c8455a6eeee82e007d41d7e05986d134f (patch)
tree76f261bf903ce7aa7458bec2a26aa115698efe2c /drivers/net/wireless/iwlwifi/iwl-debugfs.c
parentfcdf1f73fe913c5f16b7f0547cc3df1b0796689f (diff)
iwlwifi: correct debugfs data dumped from sram
the sram data dumped through the debugfs interface would only work properly when dumping data on even u32 boundaries and swap bytes based on endianness on that boundary making byte arrays impossible to read. now addresses are displayed at the start of every line and the data is displayed consistently if dumping 1 byte or 20 and regardless of what is the starting address. if no lenght given, address displayed is u32 in device format Signed-off-by: Jay Sternberg <jay.e.sternberg@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-debugfs.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-debugfs.c81
1 files changed, 56 insertions, 25 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
index 7f11a448d518..418c8ac26222 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
@@ -207,18 +207,19 @@ static ssize_t iwl_dbgfs_rx_statistics_read(struct file *file,
207 return ret; 207 return ret;
208} 208}
209 209
210#define BYTE1_MASK 0x000000ff;
211#define BYTE2_MASK 0x0000ffff;
212#define BYTE3_MASK 0x00ffffff;
213static ssize_t iwl_dbgfs_sram_read(struct file *file, 210static ssize_t iwl_dbgfs_sram_read(struct file *file,
214 char __user *user_buf, 211 char __user *user_buf,
215 size_t count, loff_t *ppos) 212 size_t count, loff_t *ppos)
216{ 213{
217 u32 val; 214 u32 val = 0;
218 char *buf; 215 char *buf;
219 ssize_t ret; 216 ssize_t ret;
220 int i; 217 int i = 0;
218 bool device_format = false;
219 int offset = 0;
220 int len = 0;
221 int pos = 0; 221 int pos = 0;
222 int sram;
222 struct iwl_priv *priv = file->private_data; 223 struct iwl_priv *priv = file->private_data;
223 size_t bufsz; 224 size_t bufsz;
224 225
@@ -230,35 +231,62 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,
230 else 231 else
231 priv->dbgfs_sram_len = priv->ucode_data.len; 232 priv->dbgfs_sram_len = priv->ucode_data.len;
232 } 233 }
233 bufsz = 30 + priv->dbgfs_sram_len * sizeof(char) * 10; 234 len = priv->dbgfs_sram_len;
235
236 if (len == -4) {
237 device_format = true;
238 len = 4;
239 }
240
241 bufsz = 50 + len * 4;
234 buf = kmalloc(bufsz, GFP_KERNEL); 242 buf = kmalloc(bufsz, GFP_KERNEL);
235 if (!buf) 243 if (!buf)
236 return -ENOMEM; 244 return -ENOMEM;
245
237 pos += scnprintf(buf + pos, bufsz - pos, "sram_len: 0x%x\n", 246 pos += scnprintf(buf + pos, bufsz - pos, "sram_len: 0x%x\n",
238 priv->dbgfs_sram_len); 247 len);
239 pos += scnprintf(buf + pos, bufsz - pos, "sram_offset: 0x%x\n", 248 pos += scnprintf(buf + pos, bufsz - pos, "sram_offset: 0x%x\n",
240 priv->dbgfs_sram_offset); 249 priv->dbgfs_sram_offset);
241 for (i = priv->dbgfs_sram_len; i > 0; i -= 4) { 250
242 val = iwl_read_targ_mem(priv, priv->dbgfs_sram_offset + \ 251 /* adjust sram address since reads are only on even u32 boundaries */
243 priv->dbgfs_sram_len - i); 252 offset = priv->dbgfs_sram_offset & 0x3;
244 if (i < 4) { 253 sram = priv->dbgfs_sram_offset & ~0x3;
245 switch (i) { 254
246 case 1: 255 /* read the first u32 from sram */
247 val &= BYTE1_MASK; 256 val = iwl_read_targ_mem(priv, sram);
248 break; 257
249 case 2: 258 for (; len; len--) {
250 val &= BYTE2_MASK; 259 /* put the address at the start of every line */
251 break; 260 if (i == 0)
252 case 3: 261 pos += scnprintf(buf + pos, bufsz - pos,
253 val &= BYTE3_MASK; 262 "%08X: ", sram + offset);
254 break; 263
255 } 264 if (device_format)
265 pos += scnprintf(buf + pos, bufsz - pos,
266 "%02x", (val >> (8 * (3 - offset))) & 0xff);
267 else
268 pos += scnprintf(buf + pos, bufsz - pos,
269 "%02x ", (val >> (8 * offset)) & 0xff);
270
271 /* if all bytes processed, read the next u32 from sram */
272 if (++offset == 4) {
273 sram += 4;
274 offset = 0;
275 val = iwl_read_targ_mem(priv, sram);
256 } 276 }
257 if (!(i % 16)) 277
278 /* put in extra spaces and split lines for human readability */
279 if (++i == 16) {
280 i = 0;
258 pos += scnprintf(buf + pos, bufsz - pos, "\n"); 281 pos += scnprintf(buf + pos, bufsz - pos, "\n");
259 pos += scnprintf(buf + pos, bufsz - pos, "0x%08x ", val); 282 } else if (!(i & 7)) {
283 pos += scnprintf(buf + pos, bufsz - pos, " ");
284 } else if (!(i & 3)) {
285 pos += scnprintf(buf + pos, bufsz - pos, " ");
286 }
260 } 287 }
261 pos += scnprintf(buf + pos, bufsz - pos, "\n"); 288 if (i)
289 pos += scnprintf(buf + pos, bufsz - pos, "\n");
262 290
263 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); 291 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
264 kfree(buf); 292 kfree(buf);
@@ -282,6 +310,9 @@ static ssize_t iwl_dbgfs_sram_write(struct file *file,
282 if (sscanf(buf, "%x,%x", &offset, &len) == 2) { 310 if (sscanf(buf, "%x,%x", &offset, &len) == 2) {
283 priv->dbgfs_sram_offset = offset; 311 priv->dbgfs_sram_offset = offset;
284 priv->dbgfs_sram_len = len; 312 priv->dbgfs_sram_len = len;
313 } else if (sscanf(buf, "%x", &offset) == 1) {
314 priv->dbgfs_sram_offset = offset;
315 priv->dbgfs_sram_len = -4;
285 } else { 316 } else {
286 priv->dbgfs_sram_offset = 0; 317 priv->dbgfs_sram_offset = 0;
287 priv->dbgfs_sram_len = 0; 318 priv->dbgfs_sram_len = 0;