Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (78 commits)
  AX.25: Fix sysctl registration if !CONFIG_AX25_DAMA_SLAVE
  pktgen: mac count
  pktgen: random flow 
  bridge: Eliminate unnecessary forward delay
  bridge: fix compile warning in net/bridge/br_netfilter.c
  ipv4: remove unused field in struct flowi (include/net/flow.h).
  tg3: Fix 'scheduling while atomic' errors
  net: Kill plain NET_XMIT_BYPASS.
  net_sched: Add qdisc __NET_XMIT_BYPASS flag
  net_sched: Add qdisc __NET_XMIT_STOLEN flag
  iwl3945: fix merge mistake for packet injection
  iwlwifi: grap nic access before accessing periphery registers
  iwlwifi: decrement rx skb counter in scan abort handler
  iwlwifi: fix unhandled interrupt when HW rfkill is on
  iwlwifi: implement iwl5000_calc_rssi
  iwlwifi: memory allocation optimization
  iwlwifi: HW bug fixes
  p54: Fix potential concurrent access to private data
  rt2x00: Disable link tuning in rt2500usb
  iwlwifi: Don't use buffer allocated on the stack for led names
  ...

1 files changed, 9 insertions, 1 deletions

diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h
index 545ed692d889..52629fbd835a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-csr.h
+++ b/drivers/net/wireless/iwlwifi/iwl-csr.h
@@ -104,6 +104,7 @@
  *  3-2:  0 = A, 1 = B, 2 = C, 3 = D step
  */
 #define CSR_HW_REV_WA_REG       (CSR_BASE+0x22C)
+#define CSR_DBG_HPET_MEM_REG    (CSR_BASE+0x240)
 
 /* Bits for CSR_HW_IF_CONFIG_REG */
 #define CSR49_HW_IF_CONFIG_REG_BIT_4965_R       (0x00000010)
@@ -118,7 +119,12 @@
 #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A    (0x00000000)
 #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B    (0x00001000)
 
-#define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM     (0x00200000)
+#define CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A           (0x00080000)
+#define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM         (0x00200000)
+#define CSR_HW_IF_CONFIG_REG_BIT_PCI_OWN_SEM            (0x00400000)
+#define CSR_HW_IF_CONFIG_REG_BIT_ME_OWN                 (0x02000000)
+#define CSR_HW_IF_CONFIG_REG_BIT_WAKE_ME                (0x08000000)
+
 
 /* interrupt flags in INTA, set by uCode or hardware (e.g. dma),
  * acknowledged (reset) by host writing "1" to flagged bits. */
@@ -236,6 +242,8 @@
 #define CSR39_ANA_PLL_CFG_VAL        (0x01000000)
 #define CSR50_ANA_PLL_CFG_VAL        (0x00880300)
 
+/* HPET MEM debug */
+#define CSR_DBG_HPET_MEM_REG_VAL        (0xFFFF0000)
 /*=== HBUS (Host-side Bus) ===*/
 #define HBUS_BASE       (0x400)
 /*