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authorWey-Yi Guy <wey-yi.w.guy@intel.com>2009-05-22 14:01:46 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-05-22 14:06:04 -0400
commit0848e297c2107dbc12a91a1709c879c73bd188d8 (patch)
treeeb98eab2c1e4701ac84daf68461c80c03d9016b3 /drivers/net/wireless/iwlwifi/iwl-csr.h
parent8a566afea0639fc387add782bc799009512a911b (diff)
iwlwifi: support NVM access (EEPROM/OTP)
Two type of NVM available for devices 1000, 6000 and after, adding support to read OTP lower blocks if OTP is used instead of EEPROM. Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-csr.h')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-csr.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h
index 6e983149b83b..3d50ef99f88d 100644
--- a/drivers/net/wireless/iwlwifi/iwl-csr.h
+++ b/drivers/net/wireless/iwlwifi/iwl-csr.h
@@ -89,6 +89,7 @@
89/* EEPROM reads */ 89/* EEPROM reads */
90#define CSR_EEPROM_REG (CSR_BASE+0x02c) 90#define CSR_EEPROM_REG (CSR_BASE+0x02c)
91#define CSR_EEPROM_GP (CSR_BASE+0x030) 91#define CSR_EEPROM_GP (CSR_BASE+0x030)
92#define CSR_OTP_GP_REG (CSR_BASE+0x034)
92#define CSR_GIO_REG (CSR_BASE+0x03C) 93#define CSR_GIO_REG (CSR_BASE+0x03C)
93#define CSR_GP_UCODE (CSR_BASE+0x044) 94#define CSR_GP_UCODE (CSR_BASE+0x044)
94#define CSR_UCODE_DRV_GP1 (CSR_BASE+0x054) 95#define CSR_UCODE_DRV_GP1 (CSR_BASE+0x054)
@@ -226,6 +227,10 @@
226#define CSR_EEPROM_GP_VALID_MSK (0x00000007) 227#define CSR_EEPROM_GP_VALID_MSK (0x00000007)
227#define CSR_EEPROM_GP_BAD_SIGNATURE (0x00000000) 228#define CSR_EEPROM_GP_BAD_SIGNATURE (0x00000000)
228#define CSR_EEPROM_GP_IF_OWNER_MSK (0x00000180) 229#define CSR_EEPROM_GP_IF_OWNER_MSK (0x00000180)
230#define CSR_OTP_GP_REG_DEVICE_SELECT (0x00010000) /* 0 - EEPROM, 1 - OTP */
231#define CSR_OTP_GP_REG_OTP_ACCESS_MODE (0x00020000) /* 0 - absolute, 1 - relative */
232#define CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK (0x00100000) /* bit 20 */
233#define CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK (0x00200000) /* bit 21 */
229 234
230/* CSR GIO */ 235/* CSR GIO */
231#define CSR_GIO_REG_VAL_L0S_ENABLED (0x00000002) 236#define CSR_GIO_REG_VAL_L0S_ENABLED (0x00000002)