diff options
author | John W. Linville <linville@tuxdriver.com> | 2009-12-28 15:09:11 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-12-28 15:09:11 -0500 |
commit | ea1e4b842049fcc4741096538114871a74859314 (patch) | |
tree | c2336ab480ac0fd62e0dc41b391d99c97158dc9c /drivers/net/wireless/iwlwifi/iwl-csr.h | |
parent | b6ce5c33001b1dc83e6a1a6f30c5dccccea651b6 (diff) | |
parent | 92c6f8d849178582fc527aaf1e51dd37a74767d3 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-2.6
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-csr.h')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-csr.h | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h index a7bfae01f19b..1ec8cb4d5eae 100644 --- a/drivers/net/wireless/iwlwifi/iwl-csr.h +++ b/drivers/net/wireless/iwlwifi/iwl-csr.h | |||
@@ -77,8 +77,7 @@ | |||
77 | * The MAC (uCode processor, etc.) does not need to be powered up for accessing | 77 | * The MAC (uCode processor, etc.) does not need to be powered up for accessing |
78 | * the CSR registers. | 78 | * the CSR registers. |
79 | * | 79 | * |
80 | * NOTE: Newer devices using one-time-programmable (OTP) memory | 80 | * NOTE: Device does need to be awake in order to read this memory |
81 | * require device to be awake in order to read this memory | ||
82 | * via CSR_EEPROM and CSR_OTP registers | 81 | * via CSR_EEPROM and CSR_OTP registers |
83 | */ | 82 | */ |
84 | #define CSR_BASE (0x000) | 83 | #define CSR_BASE (0x000) |
@@ -111,9 +110,8 @@ | |||
111 | /* | 110 | /* |
112 | * EEPROM and OTP (one-time-programmable) memory reads | 111 | * EEPROM and OTP (one-time-programmable) memory reads |
113 | * | 112 | * |
114 | * NOTE: For (newer) devices using OTP, device must be awake, initialized via | 113 | * NOTE: Device must be awake, initialized via apm_ops.init(), |
115 | * apm_ops.init() in order to read. Older devices (3945/4965/5000) | 114 | * in order to read. |
116 | * use EEPROM and do not require this. | ||
117 | */ | 115 | */ |
118 | #define CSR_EEPROM_REG (CSR_BASE+0x02c) | 116 | #define CSR_EEPROM_REG (CSR_BASE+0x02c) |
119 | #define CSR_EEPROM_GP (CSR_BASE+0x030) | 117 | #define CSR_EEPROM_GP (CSR_BASE+0x030) |