diff options
author | Tomas Winkler <tomas.winkler@intel.com> | 2008-05-29 04:34:56 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-06-03 15:00:20 -0400 |
commit | 8f0618914e02c62c5cf2482f8acc7eb8e9afb816 (patch) | |
tree | e964a5a4ed139fcbc96c766a328686525f0008c5 /drivers/net/wireless/iwlwifi/iwl-5000.c | |
parent | 885ba202cabd90b8ade1fe59185dc96ed4d69e02 (diff) |
iwlwifi: setup correctly L1 L0S pi link values
This patch setups L1 L0S pci link values.
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-5000.c')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-5000.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c index 0355ccd2d296..b1c50453a7e7 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000.c +++ b/drivers/net/wireless/iwlwifi/iwl-5000.c | |||
@@ -63,6 +63,10 @@ static int iwl5000_apm_init(struct iwl_priv *priv) | |||
63 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, | 63 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, |
64 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); | 64 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); |
65 | 65 | ||
66 | /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */ | ||
67 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, | ||
68 | CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); | ||
69 | |||
66 | iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL); | 70 | iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL); |
67 | 71 | ||
68 | /* set "initialization complete" bit to move adapter | 72 | /* set "initialization complete" bit to move adapter |
@@ -83,13 +87,13 @@ static int iwl5000_apm_init(struct iwl_priv *priv) | |||
83 | return ret; | 87 | return ret; |
84 | 88 | ||
85 | /* enable DMA */ | 89 | /* enable DMA */ |
86 | iwl_write_prph(priv, APMG_CLK_EN_REG, | 90 | iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT); |
87 | APMG_CLK_VAL_DMA_CLK_RQT); | ||
88 | 91 | ||
89 | udelay(20); | 92 | udelay(20); |
90 | 93 | ||
94 | /* disable L1-Active */ | ||
91 | iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, | 95 | iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, |
92 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); | 96 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); |
93 | 97 | ||
94 | iwl_release_nic_access(priv); | 98 | iwl_release_nic_access(priv); |
95 | 99 | ||
@@ -106,8 +110,13 @@ static void iwl5000_nic_config(struct iwl_priv *priv) | |||
106 | 110 | ||
107 | pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link); | 111 | pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link); |
108 | 112 | ||
109 | /* disable L1 entry -- workaround for pre-B1 */ | 113 | /* L1 is enabled by BIOS */ |
110 | pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02); | 114 | if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN) |
115 | /* diable L0S disabled L1A enabled */ | ||
116 | iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); | ||
117 | else | ||
118 | /* L0S enabled L1A disabled */ | ||
119 | iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); | ||
111 | 120 | ||
112 | radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG); | 121 | radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG); |
113 | 122 | ||