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authorRon Rindjunsky <ron.rindjunsky@intel.com>2008-05-29 04:35:09 -0400
committerJohn W. Linville <linville@tuxdriver.com>2008-06-03 15:00:24 -0400
commite532fa0e3ce3feda1f1eb14aa31caae503cd9bda (patch)
tree151991f1a6bd32266d2a49908a9fedc0d96dbaa1 /drivers/net/wireless/iwlwifi/iwl-5000.c
parenta332f8d618a7bdb0096c7b21555120a1822cedec (diff)
iwlwlifi: impelemnt 5000 tx response path
This patch implements 5000 HW tx response path. Signed-off-by: Ron Rindjunsky <ron.rindjunsky@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-5000.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000.c236
1 files changed, 236 insertions, 0 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index 685a84e5a021..cfabcb00f331 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -972,6 +972,241 @@ static void iwl5000_txq_set_sched(struct iwl_priv *priv, u32 mask)
972 iwl_write_prph(priv, IWL50_SCD_TXFACT, mask); 972 iwl_write_prph(priv, IWL50_SCD_TXFACT, mask);
973} 973}
974 974
975
976static inline u32 iwl5000_get_scd_ssn(struct iwl5000_tx_resp *tx_resp)
977{
978 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
979 tx_resp->frame_count);
980 return le32_to_cpu(*scd_ssn) & MAX_SN;
981
982}
983
984static int iwl5000_tx_status_reply_tx(struct iwl_priv *priv,
985 struct iwl_ht_agg *agg,
986 struct iwl5000_tx_resp *tx_resp,
987 u16 start_idx)
988{
989 u16 status;
990 struct agg_tx_status *frame_status = &tx_resp->status;
991 struct ieee80211_tx_info *info = NULL;
992 struct ieee80211_hdr *hdr = NULL;
993 int i, sh;
994 int txq_id, idx;
995 u16 seq;
996
997 if (agg->wait_for_ba)
998 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
999
1000 agg->frame_count = tx_resp->frame_count;
1001 agg->start_idx = start_idx;
1002 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1003 agg->bitmap = 0;
1004
1005 /* # frames attempted by Tx command */
1006 if (agg->frame_count == 1) {
1007 /* Only one frame was attempted; no block-ack will arrive */
1008 status = le16_to_cpu(frame_status[0].status);
1009 seq = le16_to_cpu(frame_status[0].sequence);
1010 idx = SEQ_TO_INDEX(seq);
1011 txq_id = SEQ_TO_QUEUE(seq);
1012
1013 /* FIXME: code repetition */
1014 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
1015 agg->frame_count, agg->start_idx, idx);
1016
1017 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1018 info->status.retry_count = tx_resp->failure_frame;
1019 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1020 info->flags |= iwl_is_tx_success(status)?
1021 IEEE80211_TX_STAT_ACK : 0;
1022 iwl4965_hwrate_to_tx_control(priv,
1023 le32_to_cpu(tx_resp->rate_n_flags),
1024 info);
1025 /* FIXME: code repetition end */
1026
1027 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
1028 status & 0xff, tx_resp->failure_frame);
1029 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
1030 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
1031
1032 agg->wait_for_ba = 0;
1033 } else {
1034 /* Two or more frames were attempted; expect block-ack */
1035 u64 bitmap = 0;
1036 int start = agg->start_idx;
1037
1038 /* Construct bit-map of pending frames within Tx window */
1039 for (i = 0; i < agg->frame_count; i++) {
1040 u16 sc;
1041 status = le16_to_cpu(frame_status[i].status);
1042 seq = le16_to_cpu(frame_status[i].sequence);
1043 idx = SEQ_TO_INDEX(seq);
1044 txq_id = SEQ_TO_QUEUE(seq);
1045
1046 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1047 AGG_TX_STATE_ABORT_MSK))
1048 continue;
1049
1050 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
1051 agg->frame_count, txq_id, idx);
1052
1053 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
1054
1055 sc = le16_to_cpu(hdr->seq_ctrl);
1056 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1057 IWL_ERROR("BUG_ON idx doesn't match seq control"
1058 " idx=%d, seq_idx=%d, seq=%d\n",
1059 idx, SEQ_TO_SN(sc),
1060 hdr->seq_ctrl);
1061 return -1;
1062 }
1063
1064 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
1065 i, idx, SEQ_TO_SN(sc));
1066
1067 sh = idx - start;
1068 if (sh > 64) {
1069 sh = (start - idx) + 0xff;
1070 bitmap = bitmap << sh;
1071 sh = 0;
1072 start = idx;
1073 } else if (sh < -64)
1074 sh = 0xff - (start - idx);
1075 else if (sh < 0) {
1076 sh = start - idx;
1077 start = idx;
1078 bitmap = bitmap << sh;
1079 sh = 0;
1080 }
1081 bitmap |= (1 << sh);
1082 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
1083 start, (u32)(bitmap & 0xFFFFFFFF));
1084 }
1085
1086 agg->bitmap = bitmap;
1087 agg->start_idx = start;
1088 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1089 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
1090 agg->frame_count, agg->start_idx,
1091 (unsigned long long)agg->bitmap);
1092
1093 if (bitmap)
1094 agg->wait_for_ba = 1;
1095 }
1096 return 0;
1097}
1098
1099static void iwl5000_rx_reply_tx(struct iwl_priv *priv,
1100 struct iwl_rx_mem_buffer *rxb)
1101{
1102 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1103 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1104 int txq_id = SEQ_TO_QUEUE(sequence);
1105 int index = SEQ_TO_INDEX(sequence);
1106 struct iwl_tx_queue *txq = &priv->txq[txq_id];
1107 struct ieee80211_tx_info *info;
1108 struct iwl5000_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
1109 u32 status = le16_to_cpu(tx_resp->status.status);
1110#ifdef CONFIG_IWL4965_HT
1111 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
1112 u16 fc;
1113 struct ieee80211_hdr *hdr;
1114 u8 *qc = NULL;
1115#endif
1116
1117 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
1118 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
1119 "is out of range [0-%d] %d %d\n", txq_id,
1120 index, txq->q.n_bd, txq->q.write_ptr,
1121 txq->q.read_ptr);
1122 return;
1123 }
1124
1125 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
1126 memset(&info->status, 0, sizeof(info->status));
1127
1128#ifdef CONFIG_IWL4965_HT
1129 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
1130 fc = le16_to_cpu(hdr->frame_control);
1131 if (ieee80211_is_qos_data(fc)) {
1132 qc = ieee80211_get_qos_ctrl(hdr, ieee80211_get_hdrlen(fc));
1133 tid = qc[0] & 0xf;
1134 }
1135
1136 sta_id = iwl_get_ra_sta_id(priv, hdr);
1137 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
1138 IWL_ERROR("Station not known\n");
1139 return;
1140 }
1141
1142 if (txq->sched_retry) {
1143 const u32 scd_ssn = iwl5000_get_scd_ssn(tx_resp);
1144 struct iwl_ht_agg *agg = NULL;
1145
1146 if (!qc)
1147 return;
1148
1149 agg = &priv->stations[sta_id].tid[tid].agg;
1150
1151 iwl5000_tx_status_reply_tx(priv, agg, tx_resp, index);
1152
1153 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status)) {
1154 /* TODO: send BAR */
1155 }
1156
1157 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
1158 int freed, ampdu_q;
1159 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
1160 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
1161 "%d index %d\n", scd_ssn , index);
1162 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
1163 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
1164
1165 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
1166 txq_id >= 0 && priv->mac80211_registered &&
1167 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) {
1168 /* calculate mac80211 ampdu sw queue to wake */
1169 ampdu_q = txq_id - IWL_BACK_QUEUE_FIRST_ID +
1170 priv->hw->queues;
1171 if (agg->state == IWL_AGG_OFF)
1172 ieee80211_wake_queue(priv->hw, txq_id);
1173 else
1174 ieee80211_wake_queue(priv->hw, ampdu_q);
1175 }
1176 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
1177 }
1178 } else {
1179#endif /* CONFIG_IWL4965_HT */
1180
1181 info->status.retry_count = tx_resp->failure_frame;
1182 info->flags = iwl_is_tx_success(status) ? IEEE80211_TX_STAT_ACK : 0;
1183 iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
1184 info);
1185
1186 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
1187 "retries %d\n", txq_id, iwl_get_tx_fail_reason(status),
1188 status, le32_to_cpu(tx_resp->rate_n_flags),
1189 tx_resp->failure_frame);
1190
1191 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
1192#ifdef CONFIG_IWL4965_HT
1193 if (index != -1) {
1194 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
1195 if (tid != MAX_TID_COUNT)
1196 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
1197 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
1198 (txq_id >= 0) && priv->mac80211_registered)
1199 ieee80211_wake_queue(priv->hw, txq_id);
1200 if (tid != MAX_TID_COUNT)
1201 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
1202 }
1203 }
1204#endif /* CONFIG_IWL4965_HT */
1205
1206 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
1207 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
1208}
1209
975/* Currently 5000 is the supperset of everything */ 1210/* Currently 5000 is the supperset of everything */
976static u16 iwl5000_get_hcmd_size(u8 cmd_id, u16 len) 1211static u16 iwl5000_get_hcmd_size(u8 cmd_id, u16 len)
977{ 1212{
@@ -985,6 +1220,7 @@ static void iwl5000_rx_handler_setup(struct iwl_priv *priv)
985 iwl5000_rx_calib_result; 1220 iwl5000_rx_calib_result;
986 priv->rx_handlers[CALIBRATION_COMPLETE_NOTIFICATION] = 1221 priv->rx_handlers[CALIBRATION_COMPLETE_NOTIFICATION] =
987 iwl5000_rx_calib_complete; 1222 iwl5000_rx_calib_complete;
1223 priv->rx_handlers[REPLY_TX] = iwl5000_rx_reply_tx;
988} 1224}
989 1225
990 1226