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authorReinette Chatre <reinette.chatre@intel.com>2008-01-14 20:46:25 -0500
committerDavid S. Miller <davem@davemloft.net>2008-01-28 18:10:03 -0500
commit8a1b02452862dd30980ad0ef493eed687bc81474 (patch)
treee4be8fd1dc67b6af1370c0a8dc9e640d0d72a7ae /drivers/net/wireless/iwlwifi/iwl-4965-commands.h
parente7a2827cbbdb11717877c44cbbdf0fb1d14e890c (diff)
iwlwifi: style fixes to usage of << and >> operators
The << and >> operators need space on each side. Cc: Stefano Brivio <stefano.brivio@polimi.it> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Acked-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-4965-commands.h')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965-commands.h40
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965-commands.h b/drivers/net/wireless/iwlwifi/iwl-4965-commands.h
index 9237f8b3bb88..f3470c896d9a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-4965-commands.h
+++ b/drivers/net/wireless/iwlwifi/iwl-4965-commands.h
@@ -492,18 +492,18 @@ enum {
492}; 492};
493 493
494 494
495#define RXON_RX_CHAIN_DRIVER_FORCE_MSK __constant_cpu_to_le16(0x1<<0) 495#define RXON_RX_CHAIN_DRIVER_FORCE_MSK __constant_cpu_to_le16(0x1 << 0)
496#define RXON_RX_CHAIN_VALID_MSK __constant_cpu_to_le16(0x7<<1) 496#define RXON_RX_CHAIN_VALID_MSK __constant_cpu_to_le16(0x7 << 1)
497#define RXON_RX_CHAIN_VALID_POS (1) 497#define RXON_RX_CHAIN_VALID_POS (1)
498#define RXON_RX_CHAIN_FORCE_SEL_MSK __constant_cpu_to_le16(0x7<<4) 498#define RXON_RX_CHAIN_FORCE_SEL_MSK __constant_cpu_to_le16(0x7 << 4)
499#define RXON_RX_CHAIN_FORCE_SEL_POS (4) 499#define RXON_RX_CHAIN_FORCE_SEL_POS (4)
500#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK __constant_cpu_to_le16(0x7<<7) 500#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK __constant_cpu_to_le16(0x7 << 7)
501#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7) 501#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
502#define RXON_RX_CHAIN_CNT_MSK __constant_cpu_to_le16(0x3<<10) 502#define RXON_RX_CHAIN_CNT_MSK __constant_cpu_to_le16(0x3 << 10)
503#define RXON_RX_CHAIN_CNT_POS (10) 503#define RXON_RX_CHAIN_CNT_POS (10)
504#define RXON_RX_CHAIN_MIMO_CNT_MSK __constant_cpu_to_le16(0x3<<12) 504#define RXON_RX_CHAIN_MIMO_CNT_MSK __constant_cpu_to_le16(0x3 << 12)
505#define RXON_RX_CHAIN_MIMO_CNT_POS (12) 505#define RXON_RX_CHAIN_MIMO_CNT_POS (12)
506#define RXON_RX_CHAIN_MIMO_FORCE_MSK __constant_cpu_to_le16(0x1<<14) 506#define RXON_RX_CHAIN_MIMO_FORCE_MSK __constant_cpu_to_le16(0x1 << 14)
507#define RXON_RX_CHAIN_MIMO_FORCE_POS (14) 507#define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
508 508
509/* rx_config flags */ 509/* rx_config flags */
@@ -532,17 +532,17 @@ enum {
532 532
533/* HT flags */ 533/* HT flags */
534#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22) 534#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
535#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK __constant_cpu_to_le32(0x1<<22) 535#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK __constant_cpu_to_le32(0x1 << 22)
536 536
537#define RXON_FLG_HT_OPERATING_MODE_POS (23) 537#define RXON_FLG_HT_OPERATING_MODE_POS (23)
538 538
539#define RXON_FLG_HT_PROT_MSK __constant_cpu_to_le32(0x1<<23) 539#define RXON_FLG_HT_PROT_MSK __constant_cpu_to_le32(0x1 << 23)
540#define RXON_FLG_FAT_PROT_MSK __constant_cpu_to_le32(0x2<<23) 540#define RXON_FLG_FAT_PROT_MSK __constant_cpu_to_le32(0x2 << 23)
541 541
542#define RXON_FLG_CHANNEL_MODE_POS (25) 542#define RXON_FLG_CHANNEL_MODE_POS (25)
543#define RXON_FLG_CHANNEL_MODE_MSK __constant_cpu_to_le32(0x3<<25) 543#define RXON_FLG_CHANNEL_MODE_MSK __constant_cpu_to_le32(0x3 << 25)
544#define RXON_FLG_CHANNEL_MODE_PURE_40_MSK __constant_cpu_to_le32(0x1<<25) 544#define RXON_FLG_CHANNEL_MODE_PURE_40_MSK __constant_cpu_to_le32(0x1 << 25)
545#define RXON_FLG_CHANNEL_MODE_MIXED_MSK __constant_cpu_to_le32(0x2<<25) 545#define RXON_FLG_CHANNEL_MODE_MIXED_MSK __constant_cpu_to_le32(0x2 << 25)
546 546
547/* rx_config filter flags */ 547/* rx_config filter flags */
548/* accept all data frames */ 548/* accept all data frames */
@@ -713,7 +713,7 @@ struct iwl4965_qosparam_cmd {
713#define IWL_STATION_COUNT 32 /* MAX(3945,4965)*/ 713#define IWL_STATION_COUNT 32 /* MAX(3945,4965)*/
714#define IWL_INVALID_STATION 255 714#define IWL_INVALID_STATION 255
715 715
716#define STA_FLG_PWR_SAVE_MSK __constant_cpu_to_le32(1<<8); 716#define STA_FLG_PWR_SAVE_MSK __constant_cpu_to_le32(1 << 8);
717#define STA_FLG_RTS_MIMO_PROT_MSK __constant_cpu_to_le32(1 << 17) 717#define STA_FLG_RTS_MIMO_PROT_MSK __constant_cpu_to_le32(1 << 17)
718#define STA_FLG_AGG_MPDU_8US_MSK __constant_cpu_to_le32(1 << 18) 718#define STA_FLG_AGG_MPDU_8US_MSK __constant_cpu_to_le32(1 << 18)
719#define STA_FLG_MAX_AGG_SIZE_POS (19) 719#define STA_FLG_MAX_AGG_SIZE_POS (19)
@@ -1333,7 +1333,7 @@ struct iwl4965_txpowertable_cmd {
1333} __attribute__ ((packed)); 1333} __attribute__ ((packed));
1334 1334
1335/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ 1335/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
1336#define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1<<0) 1336#define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0)
1337 1337
1338/* # of EDCA prioritized tx fifos */ 1338/* # of EDCA prioritized tx fifos */
1339#define LINK_QUAL_AC_NUM AC_NUM 1339#define LINK_QUAL_AC_NUM AC_NUM
@@ -1342,8 +1342,8 @@ struct iwl4965_txpowertable_cmd {
1342#define LINK_QUAL_MAX_RETRY_NUM 16 1342#define LINK_QUAL_MAX_RETRY_NUM 16
1343 1343
1344/* Tx antenna selection values */ 1344/* Tx antenna selection values */
1345#define LINK_QUAL_ANT_A_MSK (1<<0) 1345#define LINK_QUAL_ANT_A_MSK (1 << 0)
1346#define LINK_QUAL_ANT_B_MSK (1<<1) 1346#define LINK_QUAL_ANT_B_MSK (1 << 1)
1347#define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK) 1347#define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1348 1348
1349 1349
@@ -1785,9 +1785,9 @@ struct iwl4965_spectrum_notification {
1785 */ 1785 */
1786#define IWL_POWER_VEC_SIZE 5 1786#define IWL_POWER_VEC_SIZE 5
1787 1787
1788#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK __constant_cpu_to_le16(1<<0) 1788#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK __constant_cpu_to_le16(1 << 0)
1789#define IWL_POWER_SLEEP_OVER_DTIM_MSK __constant_cpu_to_le16(1<<2) 1789#define IWL_POWER_SLEEP_OVER_DTIM_MSK __constant_cpu_to_le16(1 << 2)
1790#define IWL_POWER_PCI_PM_MSK __constant_cpu_to_le16(1<<3) 1790#define IWL_POWER_PCI_PM_MSK __constant_cpu_to_le16(1 << 3)
1791 1791
1792struct iwl4965_powertable_cmd { 1792struct iwl4965_powertable_cmd {
1793 __le16 flags; 1793 __le16 flags;