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authorTomas Winkler <tomas.winkler@intel.com>2009-02-10 18:19:02 -0500
committerJohn W. Linville <linville@tuxdriver.com>2009-02-13 13:46:04 -0500
commit3fdb68de22c9881691c485b05ed3204bdc431a18 (patch)
tree6a898270c086aa90c7f9716504a73376c811c63b /drivers/net/wireless/iwlwifi/iwl-3945.c
parentfe3d2c3fe32dd4d0a421ba39caba1cf87402314e (diff)
iwlwifi: use pci registers defined in pci_regs.h
This patch replaces where possible usage of pci register defined in the driver by ones defined in pci_regs.h Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-3945.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.c19
1 files changed, 8 insertions, 11 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c
index cb6db4525dc3..d2df4945ca6a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.c
@@ -905,22 +905,18 @@ u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
905 905
906static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) 906static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
907{ 907{
908 int rc; 908 int ret;
909 unsigned long flags; 909 unsigned long flags;
910 910
911 spin_lock_irqsave(&priv->lock, flags); 911 spin_lock_irqsave(&priv->lock, flags);
912 rc = iwl_grab_nic_access(priv); 912 ret = iwl_grab_nic_access(priv);
913 if (rc) { 913 if (ret) {
914 spin_unlock_irqrestore(&priv->lock, flags); 914 spin_unlock_irqrestore(&priv->lock, flags);
915 return rc; 915 return ret;
916 } 916 }
917 917
918 if (src == IWL_PWR_SRC_VAUX) { 918 if (src == IWL_PWR_SRC_VAUX) {
919 u32 val; 919 if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) {
920
921 rc = pci_read_config_dword(priv->pci_dev,
922 PCI_POWER_SOURCE, &val);
923 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
924 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 920 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
925 APMG_PS_CTRL_VAL_PWR_SRC_VAUX, 921 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
926 ~APMG_PS_CTRL_MSK_PWR_SRC); 922 ~APMG_PS_CTRL_MSK_PWR_SRC);
@@ -929,8 +925,9 @@ static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
929 iwl_poll_bit(priv, CSR_GPIO_IN, 925 iwl_poll_bit(priv, CSR_GPIO_IN,
930 CSR_GPIO_IN_VAL_VAUX_PWR_SRC, 926 CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
931 CSR_GPIO_IN_BIT_AUX_POWER, 5000); 927 CSR_GPIO_IN_BIT_AUX_POWER, 5000);
932 } else 928 } else {
933 iwl_release_nic_access(priv); 929 iwl_release_nic_access(priv);
930 }
934 } else { 931 } else {
935 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 932 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
936 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, 933 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
@@ -942,7 +939,7 @@ static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
942 } 939 }
943 spin_unlock_irqrestore(&priv->lock, flags); 940 spin_unlock_irqrestore(&priv->lock, flags);
944 941
945 return rc; 942 return ret;
946} 943}
947 944
948static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq) 945static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)