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authorBen Cahill <ben.m.cahill@intel.com>2007-11-28 22:10:00 -0500
committerDavid S. Miller <davem@davemloft.net>2008-01-28 18:05:26 -0500
commitfcd427bbba10fc315d1c958b85bba74448db4eb4 (patch)
tree88f66271649afb4699e095bd1cb69b4486bbb67f /drivers/net/wireless/iwlwifi/iwl-3945-hw.h
parent14519a0b46085db68e610147098d03386c34801f (diff)
iwlwifi: move HT_IE_EXT_CHANNEL_* driver definitions to iwl-4965.h
Move HT_IE_EXT_CHANNEL_* driver definitions to iwl-4965.h Add comments to guide .h file usage (hw/api/driver definitions) Minor comment cleanup Signed-off-by: Ben Cahill <ben.m.cahill@intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-3945-hw.h')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-hw.h32
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-hw.h b/drivers/net/wireless/iwlwifi/iwl-3945-hw.h
index 4fa947d7bad5..5dde41030cd7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945-hw.h
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-hw.h
@@ -60,6 +60,11 @@
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 * 61 *
62 *****************************************************************************/ 62 *****************************************************************************/
63/*
64 * Please use this file (iwl-3945-hw.h) only for hardware-related definitions.
65 * Please use iwl-3945-commands.h for uCode API definitions.
66 * Please use iwl-3945.h for driver implementation definitions.
67 */
63 68
64#ifndef __iwl_3945_hw__ 69#ifndef __iwl_3945_hw__
65#define __iwl_3945_hw__ 70#define __iwl_3945_hw__
@@ -73,9 +78,7 @@
73/* Tx rates */ 78/* Tx rates */
74#define IWL_CCK_RATES 4 79#define IWL_CCK_RATES 4
75#define IWL_OFDM_RATES 8 80#define IWL_OFDM_RATES 8
76
77#define IWL_HT_RATES 0 81#define IWL_HT_RATES 0
78
79#define IWL_MAX_RATES (IWL_CCK_RATES+IWL_OFDM_RATES+IWL_HT_RATES) 82#define IWL_MAX_RATES (IWL_CCK_RATES+IWL_OFDM_RATES+IWL_HT_RATES)
80 83
81/* Time constants */ 84/* Time constants */
@@ -545,11 +548,6 @@ struct iwl3945_eeprom {
545#define FH_TSSR_CBB_BASE (FH_TSSR_TABLE+0x000) 548#define FH_TSSR_CBB_BASE (FH_TSSR_TABLE+0x000)
546#define FH_TSSR_MSG_CONFIG (FH_TSSR_TABLE+0x008) 549#define FH_TSSR_MSG_CONFIG (FH_TSSR_TABLE+0x008)
547#define FH_TSSR_TX_STATUS (FH_TSSR_TABLE+0x010) 550#define FH_TSSR_TX_STATUS (FH_TSSR_TABLE+0x010)
548/* 18 - reserved */
549
550/* card static random access memory (SRAM) for processor data and instructs */
551#define RTC_INST_LOWER_BOUND (0x000000)
552#define RTC_DATA_LOWER_BOUND (0x800000)
553 551
554 552
555/* DBM */ 553/* DBM */
@@ -618,7 +616,6 @@ struct iwl3945_eeprom {
618#define TFD_QUEUE_MAX 6 616#define TFD_QUEUE_MAX 6
619#define TFD_QUEUE_SIZE_MAX (256) 617#define TFD_QUEUE_SIZE_MAX (256)
620 618
621/* spectrum and channel data structures */
622#define IWL_NUM_SCAN_RATES (2) 619#define IWL_NUM_SCAN_RATES (2)
623 620
624#define IWL_DEFAULT_TX_RETRY 15 621#define IWL_DEFAULT_TX_RETRY 15
@@ -634,11 +631,6 @@ struct iwl3945_eeprom {
634 631
635#define U32_PAD(n) ((4-(n))&0x3) 632#define U32_PAD(n) ((4-(n))&0x3)
636 633
637/*
638 * Generic queue structure
639 *
640 * Contains common data for Rx and Tx queues
641 */
642#define TFD_CTL_COUNT_SET(n) (n<<24) 634#define TFD_CTL_COUNT_SET(n) (n<<24)
643#define TFD_CTL_COUNT_GET(ctl) ((ctl>>24) & 7) 635#define TFD_CTL_COUNT_GET(ctl) ((ctl>>24) & 7)
644#define TFD_CTL_PAD_SET(n) (n<<28) 636#define TFD_CTL_PAD_SET(n) (n<<28)
@@ -656,18 +648,26 @@ struct iwl3945_eeprom {
656#define RX_FREE_BUFFERS 64 648#define RX_FREE_BUFFERS 64
657#define RX_LOW_WATERMARK 8 649#define RX_LOW_WATERMARK 8
658 650
659 651/* Size of one Rx buffer in host DRAM */
660#define IWL_RX_BUF_SIZE 3000 652#define IWL_RX_BUF_SIZE 3000
661/* card static random access memory (SRAM) for processor data and instructs */ 653
654/* Sizes and addresses for instruction and data memory (SRAM) in
655 * 3945's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */
656#define RTC_INST_LOWER_BOUND (0x000000)
662#define ALM_RTC_INST_UPPER_BOUND (0x014000) 657#define ALM_RTC_INST_UPPER_BOUND (0x014000)
658
659#define RTC_DATA_LOWER_BOUND (0x800000)
663#define ALM_RTC_DATA_UPPER_BOUND (0x808000) 660#define ALM_RTC_DATA_UPPER_BOUND (0x808000)
664 661
665#define ALM_RTC_INST_SIZE (ALM_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND) 662#define ALM_RTC_INST_SIZE (ALM_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND)
666#define ALM_RTC_DATA_SIZE (ALM_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND) 663#define ALM_RTC_DATA_SIZE (ALM_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND)
667 664
668#define IWL_MAX_BSM_SIZE ALM_RTC_INST_SIZE
669#define IWL_MAX_INST_SIZE ALM_RTC_INST_SIZE 665#define IWL_MAX_INST_SIZE ALM_RTC_INST_SIZE
670#define IWL_MAX_DATA_SIZE ALM_RTC_DATA_SIZE 666#define IWL_MAX_DATA_SIZE ALM_RTC_DATA_SIZE
667
668/* Size of uCode instruction memory in bootstrap state machine */
669#define IWL_MAX_BSM_SIZE ALM_RTC_INST_SIZE
670
671#define IWL_MAX_NUM_QUEUES 8 671#define IWL_MAX_NUM_QUEUES 8
672 672
673static inline int iwl3945_hw_valid_rtc_data_addr(u32 addr) 673static inline int iwl3945_hw_valid_rtc_data_addr(u32 addr)