diff options
author | Ben Cahill <ben.m.cahill@intel.com> | 2009-10-30 17:36:07 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-11-02 15:39:45 -0500 |
commit | a6c5c731c3f783f60ed79dcf41efa8b5b3af2f22 (patch) | |
tree | f4cad82ede0c2c66f13544e744e3936fed1d7fe4 /drivers/net/wireless/iwlwifi/iwl-1000.c | |
parent | 88521364cc04b67f36748983545b9fe1d4ba4a15 (diff) |
iwlagn: invoke L0S workaround for 6000/1000 series
Invoke workaround to avoid instability in L0->L0S->L1 transition on PCIe bus.
Workaround disables L0S state so device moves directly from L0->L1.
Workaround needed on all devices since and including 4965; add to 6000/1000.
Describe bug and workaround better in comments.
Signed-off-by: Ben Cahill <ben.m.cahill@intel.com>
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-1000.c')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-1000.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c index 3a645e485dda..1e387b9dce1e 100644 --- a/drivers/net/wireless/iwlwifi/iwl-1000.c +++ b/drivers/net/wireless/iwlwifi/iwl-1000.c | |||
@@ -164,7 +164,7 @@ struct iwl_cfg iwl1000_bgn_cfg = { | |||
164 | .valid_tx_ant = ANT_A, | 164 | .valid_tx_ant = ANT_A, |
165 | .valid_rx_ant = ANT_AB, | 165 | .valid_rx_ant = ANT_AB, |
166 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, | 166 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, |
167 | .set_l0s = false, | 167 | .set_l0s = true, |
168 | .use_bsm = false, | 168 | .use_bsm = false, |
169 | .max_ll_items = OTP_MAX_LL_ITEMS_1000, | 169 | .max_ll_items = OTP_MAX_LL_ITEMS_1000, |
170 | .shadow_ram_support = false, | 170 | .shadow_ram_support = false, |
@@ -190,7 +190,7 @@ struct iwl_cfg iwl1000_bg_cfg = { | |||
190 | .valid_tx_ant = ANT_A, | 190 | .valid_tx_ant = ANT_A, |
191 | .valid_rx_ant = ANT_AB, | 191 | .valid_rx_ant = ANT_AB, |
192 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, | 192 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, |
193 | .set_l0s = false, | 193 | .set_l0s = true, |
194 | .use_bsm = false, | 194 | .use_bsm = false, |
195 | .max_ll_items = OTP_MAX_LL_ITEMS_1000, | 195 | .max_ll_items = OTP_MAX_LL_ITEMS_1000, |
196 | .shadow_ram_support = false, | 196 | .shadow_ram_support = false, |