iwlegacy: move some i/o helpers out of inline

This save us about 20k of text size, and should have no impact on
performance as hot paths do not use much I/O.

Before:
   text	   data	    bss	    dec	    hex	filename
 108512	   1784	    168	 110464	  1af80	drivers/net/wireless/iwlegacy/iwl3945.ko
 165730	   2164	    156	 168050	  29072	drivers/net/wireless/iwlegacy/iwl4965.ko
  91942	    328	     48	  92318	  1689e	drivers/net/wireless/iwlegacy/iwlegacy.ko

After:
   text	   data	    bss	    dec	    hex	filename
  95556	   1784	    168	  97508	  17ce4	drivers/net/wireless/iwlegacy/iwl3945.ko
 154853	   2164	    156	 157173	  265f5	drivers/net/wireless/iwlegacy/iwl4965.ko
  91634	    328	     48	  92010	  1676a	drivers/net/wireless/iwlegacy/iwlegacy.ko

Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 161 insertions, 0 deletions

diff --git a/drivers/net/wireless/iwlegacy/common.c b/drivers/net/wireless/iwlegacy/common.c
index 881ba043770a..36454d0bbeed 100644
--- a/drivers/net/wireless/iwlegacy/common.c
+++ b/drivers/net/wireless/iwlegacy/common.c
@@ -42,6 +42,167 @@
 
 #include "common.h"
 
+int
+_il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
+{
+        const int interval = 10; /* microseconds */
+        int t = 0;
+
+        do {
+                if ((_il_rd(il, addr) & mask) == (bits & mask))
+                        return t;
+                udelay(interval);
+                t += interval;
+        } while (t < timeout);
+
+        return -ETIMEDOUT;
+}
+EXPORT_SYMBOL(_il_poll_bit);
+
+void
+il_set_bit(struct il_priv *p, u32 r, u32 m)
+{
+        unsigned long reg_flags;
+
+        spin_lock_irqsave(&p->reg_lock, reg_flags);
+        _il_set_bit(p, r, m);
+        spin_unlock_irqrestore(&p->reg_lock, reg_flags);
+}
+EXPORT_SYMBOL(il_set_bit);
+
+void
+il_clear_bit(struct il_priv *p, u32 r, u32 m)
+{
+        unsigned long reg_flags;
+
+        spin_lock_irqsave(&p->reg_lock, reg_flags);
+        _il_clear_bit(p, r, m);
+        spin_unlock_irqrestore(&p->reg_lock, reg_flags);
+}
+EXPORT_SYMBOL(il_clear_bit);
+
+int
+_il_grab_nic_access(struct il_priv *il)
+{
+        int ret;
+        u32 val;
+
+        /* this bit wakes up the NIC */
+        _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
+
+        /*
+         * These bits say the device is running, and should keep running for
+         * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
+         * but they do not indicate that embedded SRAM is restored yet;
+         * 3945 and 4965 have volatile SRAM, and must save/restore contents
+         * to/from host DRAM when sleeping/waking for power-saving.
+         * Each direction takes approximately 1/4 millisecond; with this
+         * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
+         * series of register accesses are expected (e.g. reading Event Log),
+         * to keep device from sleeping.
+         *
+         * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
+         * SRAM is okay/restored.  We don't check that here because this call
+         * is just for hardware register access; but GP1 MAC_SLEEP check is a
+         * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
+         *
+         */
+        ret =
+            _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
+                         (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
+                          CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
+        if (ret < 0) {
+                val = _il_rd(il, CSR_GP_CNTRL);
+                IL_ERR("MAC is in deep sleep!.  CSR_GP_CNTRL = 0x%08X\n", val);
+                _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
+                return -EIO;
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(_il_grab_nic_access);
+
+int
+il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
+{
+        const int interval = 10; /* microseconds */
+        int t = 0;
+
+        do {
+                if ((il_rd(il, addr) & mask) == mask)
+                        return t;
+                udelay(interval);
+                t += interval;
+        } while (t < timeout);
+
+        return -ETIMEDOUT;
+}
+EXPORT_SYMBOL(il_poll_bit);
+
+u32
+il_rd_prph(struct il_priv *il, u32 reg)
+{
+        unsigned long reg_flags;
+        u32 val;
+
+        spin_lock_irqsave(&il->reg_lock, reg_flags);
+        _il_grab_nic_access(il);
+        val = _il_rd_prph(il, reg);
+        _il_release_nic_access(il);
+        spin_unlock_irqrestore(&il->reg_lock, reg_flags);
+        return val;
+}
+EXPORT_SYMBOL(il_rd_prph);
+
+void
+il_wr_prph(struct il_priv *il, u32 addr, u32 val)
+{
+        unsigned long reg_flags;
+
+        spin_lock_irqsave(&il->reg_lock, reg_flags);
+        if (!_il_grab_nic_access(il)) {
+                _il_wr_prph(il, addr, val);
+                _il_release_nic_access(il);
+        }
+        spin_unlock_irqrestore(&il->reg_lock, reg_flags);
+}
+EXPORT_SYMBOL(il_wr_prph);
+
+u32
+il_read_targ_mem(struct il_priv *il, u32 addr)
+{
+        unsigned long reg_flags;
+        u32 value;
+
+        spin_lock_irqsave(&il->reg_lock, reg_flags);
+        _il_grab_nic_access(il);
+
+        _il_wr(il, HBUS_TARG_MEM_RADDR, addr);
+        rmb();
+        value = _il_rd(il, HBUS_TARG_MEM_RDAT);
+
+        _il_release_nic_access(il);
+        spin_unlock_irqrestore(&il->reg_lock, reg_flags);
+        return value;
+}
+EXPORT_SYMBOL(il_read_targ_mem);
+
+void
+il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
+{
+        unsigned long reg_flags;
+
+        spin_lock_irqsave(&il->reg_lock, reg_flags);
+        if (!_il_grab_nic_access(il)) {
+                _il_wr(il, HBUS_TARG_MEM_WADDR, addr);
+                wmb();
+                _il_wr(il, HBUS_TARG_MEM_WDAT, val);
+                _il_release_nic_access(il);
+        }
+        spin_unlock_irqrestore(&il->reg_lock, reg_flags);
+}
+EXPORT_SYMBOL(il_write_targ_mem);
+
 const char *
 il_get_cmd_string(u8 cmd)
 {