diff options
author | Franky Lin <frankyl@broadcom.com> | 2011-11-04 17:23:38 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-11-09 16:14:03 -0500 |
commit | 2bc78e10d841f81ea7a2b25bc0481ea4af06437e (patch) | |
tree | f33ba766ebc43fe574ef3e2ae90ba421037ce219 /drivers/net/wireless/brcm80211 | |
parent | 454d2a8816d6bc6594d3d475392290623af63656 (diff) |
brcm80211: fmac: move chip reset core function to sdio_chip.c
This patch is part of the abstracting chip backplane handle code
series.
Reviewed-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Franky Lin <frankyl@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/brcm80211')
-rw-r--r-- | drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c | 49 | ||||
-rw-r--r-- | drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c | 45 | ||||
-rw-r--r-- | drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h | 2 |
3 files changed, 49 insertions, 47 deletions
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c b/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c index 84b10f1671bd..af6f3a4b9da0 100644 --- a/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c | |||
@@ -3090,51 +3090,6 @@ static int brcmf_sdbrcm_write_vars(struct brcmf_bus *bus) | |||
3090 | return bcmerror; | 3090 | return bcmerror; |
3091 | } | 3091 | } |
3092 | 3092 | ||
3093 | static void | ||
3094 | brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_dev *sdiodev, u32 corebase) | ||
3095 | { | ||
3096 | u32 regdata; | ||
3097 | |||
3098 | /* | ||
3099 | * Must do the disable sequence first to work for | ||
3100 | * arbitrary current core state. | ||
3101 | */ | ||
3102 | brcmf_sdio_chip_coredisable(sdiodev, corebase); | ||
3103 | |||
3104 | /* | ||
3105 | * Now do the initialization sequence. | ||
3106 | * set reset while enabling the clock and | ||
3107 | * forcing them on throughout the core | ||
3108 | */ | ||
3109 | brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4, | ||
3110 | ((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) | | ||
3111 | SBTML_RESET); | ||
3112 | udelay(1); | ||
3113 | |||
3114 | regdata = brcmf_sdcard_reg_read(sdiodev, | ||
3115 | CORE_SB(corebase, sbtmstatehigh), 4); | ||
3116 | if (regdata & SBTMH_SERR) | ||
3117 | brcmf_sdcard_reg_write(sdiodev, | ||
3118 | CORE_SB(corebase, sbtmstatehigh), 4, 0); | ||
3119 | |||
3120 | regdata = brcmf_sdcard_reg_read(sdiodev, | ||
3121 | CORE_SB(corebase, sbimstate), 4); | ||
3122 | if (regdata & (SBIM_IBE | SBIM_TO)) | ||
3123 | brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbimstate), 4, | ||
3124 | regdata & ~(SBIM_IBE | SBIM_TO)); | ||
3125 | |||
3126 | /* clear reset and allow it to propagate throughout the core */ | ||
3127 | brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4, | ||
3128 | (SICF_FGC << SBTML_SICF_SHIFT) | | ||
3129 | (SICF_CLOCK_EN << SBTML_SICF_SHIFT)); | ||
3130 | udelay(1); | ||
3131 | |||
3132 | /* leave clock enabled */ | ||
3133 | brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4, | ||
3134 | (SICF_CLOCK_EN << SBTML_SICF_SHIFT)); | ||
3135 | udelay(1); | ||
3136 | } | ||
3137 | |||
3138 | static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter) | 3093 | static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter) |
3139 | { | 3094 | { |
3140 | uint retries; | 3095 | uint retries; |
@@ -3149,7 +3104,7 @@ static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter) | |||
3149 | brcmf_sdio_chip_coredisable(bus->sdiodev, | 3104 | brcmf_sdio_chip_coredisable(bus->sdiodev, |
3150 | bus->ci->armcorebase); | 3105 | bus->ci->armcorebase); |
3151 | 3106 | ||
3152 | brcmf_sdbrcm_chip_resetcore(bus->sdiodev, bus->ci->ramcorebase); | 3107 | brcmf_sdio_chip_resetcore(bus->sdiodev, bus->ci->ramcorebase); |
3153 | 3108 | ||
3154 | /* Clear the top bit of memory */ | 3109 | /* Clear the top bit of memory */ |
3155 | if (bus->ramsize) { | 3110 | if (bus->ramsize) { |
@@ -3174,7 +3129,7 @@ static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter) | |||
3174 | w_sdreg32(bus, 0xFFFFFFFF, | 3129 | w_sdreg32(bus, 0xFFFFFFFF, |
3175 | offsetof(struct sdpcmd_regs, intstatus), &retries); | 3130 | offsetof(struct sdpcmd_regs, intstatus), &retries); |
3176 | 3131 | ||
3177 | brcmf_sdbrcm_chip_resetcore(bus->sdiodev, bus->ci->armcorebase); | 3132 | brcmf_sdio_chip_resetcore(bus->sdiodev, bus->ci->armcorebase); |
3178 | 3133 | ||
3179 | /* Allow HT Clock now that the ARM is running. */ | 3134 | /* Allow HT Clock now that the ARM is running. */ |
3180 | bus->alp_only = false; | 3135 | bus->alp_only = false; |
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c b/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c index 5d788a619642..4acdda11d07e 100644 --- a/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c +++ b/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c | |||
@@ -155,6 +155,51 @@ brcmf_sdio_chip_coredisable(struct brcmf_sdio_dev *sdiodev, u32 corebase) | |||
155 | udelay(1); | 155 | udelay(1); |
156 | } | 156 | } |
157 | 157 | ||
158 | void | ||
159 | brcmf_sdio_chip_resetcore(struct brcmf_sdio_dev *sdiodev, u32 corebase) | ||
160 | { | ||
161 | u32 regdata; | ||
162 | |||
163 | /* | ||
164 | * Must do the disable sequence first to work for | ||
165 | * arbitrary current core state. | ||
166 | */ | ||
167 | brcmf_sdio_chip_coredisable(sdiodev, corebase); | ||
168 | |||
169 | /* | ||
170 | * Now do the initialization sequence. | ||
171 | * set reset while enabling the clock and | ||
172 | * forcing them on throughout the core | ||
173 | */ | ||
174 | brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4, | ||
175 | ((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) | | ||
176 | SBTML_RESET); | ||
177 | udelay(1); | ||
178 | |||
179 | regdata = brcmf_sdcard_reg_read(sdiodev, | ||
180 | CORE_SB(corebase, sbtmstatehigh), 4); | ||
181 | if (regdata & SBTMH_SERR) | ||
182 | brcmf_sdcard_reg_write(sdiodev, | ||
183 | CORE_SB(corebase, sbtmstatehigh), 4, 0); | ||
184 | |||
185 | regdata = brcmf_sdcard_reg_read(sdiodev, | ||
186 | CORE_SB(corebase, sbimstate), 4); | ||
187 | if (regdata & (SBIM_IBE | SBIM_TO)) | ||
188 | brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbimstate), 4, | ||
189 | regdata & ~(SBIM_IBE | SBIM_TO)); | ||
190 | |||
191 | /* clear reset and allow it to propagate throughout the core */ | ||
192 | brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4, | ||
193 | (SICF_FGC << SBTML_SICF_SHIFT) | | ||
194 | (SICF_CLOCK_EN << SBTML_SICF_SHIFT)); | ||
195 | udelay(1); | ||
196 | |||
197 | /* leave clock enabled */ | ||
198 | brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4, | ||
199 | (SICF_CLOCK_EN << SBTML_SICF_SHIFT)); | ||
200 | udelay(1); | ||
201 | } | ||
202 | |||
158 | static int brcmf_sdio_chip_recognition(struct brcmf_sdio_dev *sdiodev, | 203 | static int brcmf_sdio_chip_recognition(struct brcmf_sdio_dev *sdiodev, |
159 | struct chip_info *ci, u32 regs) | 204 | struct chip_info *ci, u32 regs) |
160 | { | 205 | { |
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h b/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h index 9c43e1decf9e..6ad5ea6057d8 100644 --- a/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h +++ b/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h | |||
@@ -133,6 +133,8 @@ struct sbconfig { | |||
133 | u32 sbidhigh; /* identification */ | 133 | u32 sbidhigh; /* identification */ |
134 | }; | 134 | }; |
135 | 135 | ||
136 | extern void brcmf_sdio_chip_resetcore(struct brcmf_sdio_dev *sdiodev, | ||
137 | u32 corebase); | ||
136 | extern bool brcmf_sdio_chip_iscoreup(struct brcmf_sdio_dev *sdiodev, | 138 | extern bool brcmf_sdio_chip_iscoreup(struct brcmf_sdio_dev *sdiodev, |
137 | u32 corebase); | 139 | u32 corebase); |
138 | extern void brcmf_sdio_chip_coredisable(struct brcmf_sdio_dev *sdiodev, | 140 | extern void brcmf_sdio_chip_coredisable(struct brcmf_sdio_dev *sdiodev, |