diff options
author | Stefano Brivio <stefano.brivio@polimi.it> | 2006-10-16 00:18:11 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-12-02 00:11:58 -0500 |
commit | f3d1fca3eb05cf6ff3879a385a15d24fbf556c57 (patch) | |
tree | f8625cb837369a8ee7755f4d0639a9abe36fd860 /drivers/net/wireless/bcm43xx/bcm43xx_power.c | |
parent | 995cdaa45b1faf8f4472e4b4c6027dc685ae1b54 (diff) |
[PATCH] bcm43xx: add PCI-E code
The current bcm43xx driver does not contain code to handle PCI-E interfaces
such as the BCM4311 and BCM4312. This patch, originally written by Stefano
Brivio adds the necessary code to enable these interfaces.
Signed-off-by: Stefano Brivio <stefano.brivio@polimi.it>
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/bcm43xx/bcm43xx_power.c')
-rw-r--r-- | drivers/net/wireless/bcm43xx/bcm43xx_power.c | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_power.c b/drivers/net/wireless/bcm43xx/bcm43xx_power.c index 6569da3a7a39..7e774f410953 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_power.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_power.c | |||
@@ -153,8 +153,6 @@ int bcm43xx_pctl_init(struct bcm43xx_private *bcm) | |||
153 | int err, maxfreq; | 153 | int err, maxfreq; |
154 | struct bcm43xx_coreinfo *old_core; | 154 | struct bcm43xx_coreinfo *old_core; |
155 | 155 | ||
156 | if (!(bcm->chipcommon_capabilities & BCM43xx_CAPABILITIES_PCTL)) | ||
157 | return 0; | ||
158 | old_core = bcm->current_core; | 156 | old_core = bcm->current_core; |
159 | err = bcm43xx_switch_core(bcm, &bcm->core_chipcommon); | 157 | err = bcm43xx_switch_core(bcm, &bcm->core_chipcommon); |
160 | if (err == -ENODEV) | 158 | if (err == -ENODEV) |
@@ -162,11 +160,27 @@ int bcm43xx_pctl_init(struct bcm43xx_private *bcm) | |||
162 | if (err) | 160 | if (err) |
163 | goto out; | 161 | goto out; |
164 | 162 | ||
165 | maxfreq = bcm43xx_pctl_clockfreqlimit(bcm, 1); | 163 | if (bcm->chip_id == 0x4321) { |
166 | bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_PLLONDELAY, | 164 | if (bcm->chip_rev == 0) |
167 | (maxfreq * 150 + 999999) / 1000000); | 165 | bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_CTL, 0x03A4); |
168 | bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_FREFSELDELAY, | 166 | if (bcm->chip_rev == 1) |
169 | (maxfreq * 15 + 999999) / 1000000); | 167 | bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_CTL, 0x00A4); |
168 | } | ||
169 | |||
170 | if (bcm->chipcommon_capabilities & BCM43xx_CAPABILITIES_PCTL) { | ||
171 | if (bcm->current_core->rev >= 10) { | ||
172 | /* Set Idle Power clock rate to 1Mhz */ | ||
173 | bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_SYSCLKCTL, | ||
174 | (bcm43xx_read32(bcm, BCM43xx_CHIPCOMMON_SYSCLKCTL) | ||
175 | & 0x0000FFFF) | 0x40000); | ||
176 | } else { | ||
177 | maxfreq = bcm43xx_pctl_clockfreqlimit(bcm, 1); | ||
178 | bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_PLLONDELAY, | ||
179 | (maxfreq * 150 + 999999) / 1000000); | ||
180 | bcm43xx_write32(bcm, BCM43xx_CHIPCOMMON_FREFSELDELAY, | ||
181 | (maxfreq * 15 + 999999) / 1000000); | ||
182 | } | ||
183 | } | ||
170 | 184 | ||
171 | err = bcm43xx_switch_core(bcm, old_core); | 185 | err = bcm43xx_switch_core(bcm, old_core); |
172 | assert(err == 0); | 186 | assert(err == 0); |