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authorMichael Buesch <mbuesch@freenet.de>2006-03-12 13:44:29 -0500
committerJohn W. Linville <linville@tuxdriver.com>2006-03-27 11:19:36 -0500
commit73733847beead47dc31b1f8e1532e5eea9f8ddd3 (patch)
tree6c1c9f05d1ca6a7053151e2104f7d825b26e4ffc /drivers/net/wireless/bcm43xx/bcm43xx_phy.c
parent7ce942d0ff5df145831631f4df391c7207e676bb (diff)
[PATCH] bcm43xx: fix some stuff, add a few missing mmiowb(), remove dead code.
This may workaround the XMIT ERRORs some people are getting. Signed-off-by: Michael Buesch <mbuesch@freenet.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/bcm43xx/bcm43xx_phy.c')
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_phy.c187
1 files changed, 94 insertions, 93 deletions
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_phy.c b/drivers/net/wireless/bcm43xx/bcm43xx_phy.c
index d3c2fc1df375..dbbef6ccd153 100644
--- a/drivers/net/wireless/bcm43xx/bcm43xx_phy.c
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_phy.c
@@ -126,6 +126,7 @@ u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset)
126void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val) 126void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val)
127{ 127{
128 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset); 128 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
129 mmiowb();
129 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val); 130 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val);
130} 131}
131 132
@@ -255,16 +256,16 @@ static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm)
255 if (phy->rev == 1) 256 if (phy->rev == 1)
256 offset = 0x4C00; 257 offset = 0x4C00;
257 258
258 bcm43xx_ilt_write16(bcm, offset, 0x00FE); 259 bcm43xx_ilt_write(bcm, offset, 0x00FE);
259 bcm43xx_ilt_write16(bcm, offset + 1, 0x000D); 260 bcm43xx_ilt_write(bcm, offset + 1, 0x000D);
260 bcm43xx_ilt_write16(bcm, offset + 2, 0x0013); 261 bcm43xx_ilt_write(bcm, offset + 2, 0x0013);
261 bcm43xx_ilt_write16(bcm, offset + 3, 0x0019); 262 bcm43xx_ilt_write(bcm, offset + 3, 0x0019);
262 263
263 if (phy->rev == 1) { 264 if (phy->rev == 1) {
264 bcm43xx_ilt_write16(bcm, 0x1800, 0x2710); 265 bcm43xx_ilt_write(bcm, 0x1800, 0x2710);
265 bcm43xx_ilt_write16(bcm, 0x1801, 0x9B83); 266 bcm43xx_ilt_write(bcm, 0x1801, 0x9B83);
266 bcm43xx_ilt_write16(bcm, 0x1802, 0x9B83); 267 bcm43xx_ilt_write(bcm, 0x1802, 0x9B83);
267 bcm43xx_ilt_write16(bcm, 0x1803, 0x0F8D); 268 bcm43xx_ilt_write(bcm, 0x1803, 0x0F8D);
268 bcm43xx_phy_write(bcm, 0x0455, 0x0004); 269 bcm43xx_phy_write(bcm, 0x0455, 0x0004);
269 } 270 }
270 271
@@ -317,10 +318,10 @@ static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm)
317 bcm43xx_phy_write(bcm, 0x048D, 0x0002); 318 bcm43xx_phy_write(bcm, 0x048D, 0x0002);
318 } 319 }
319 320
320 bcm43xx_ilt_write16(bcm, offset + 0x0800, 0); 321 bcm43xx_ilt_write(bcm, offset + 0x0800, 0);
321 bcm43xx_ilt_write16(bcm, offset + 0x0801, 7); 322 bcm43xx_ilt_write(bcm, offset + 0x0801, 7);
322 bcm43xx_ilt_write16(bcm, offset + 0x0802, 16); 323 bcm43xx_ilt_write(bcm, offset + 0x0802, 16);
323 bcm43xx_ilt_write16(bcm, offset + 0x0803, 28); 324 bcm43xx_ilt_write(bcm, offset + 0x0803, 28);
324} 325}
325 326
326static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm) 327static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
@@ -337,11 +338,11 @@ static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
337 bcm43xx_phy_write(bcm, 0x0427, 0x001A); 338 bcm43xx_phy_write(bcm, 0x0427, 0x001A);
338 339
339 for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++) 340 for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++)
340 bcm43xx_ilt_write16(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]); 341 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);
341 for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++) 342 for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++)
342 bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]); 343 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);
343 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++) 344 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
344 bcm43xx_ilt_write16(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]); 345 bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
345 } else { 346 } else {
346 /* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */ 347 /* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */
347 bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654); 348 bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654);
@@ -357,36 +358,36 @@ static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
357 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800); 358 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800);
358 359
359 for (i = 0; i < 64; i++) 360 for (i = 0; i < 64; i++)
360 bcm43xx_ilt_write16(bcm, 0x4000 + i, i); 361 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
361 for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++) 362 for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++)
362 bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]); 363 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);
363 } 364 }
364 365
365 if (phy->rev <= 2) 366 if (phy->rev <= 2)
366 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++) 367 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
367 bcm43xx_ilt_write16(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]); 368 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);
368 else if ((phy->rev == 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200)) 369 else if ((phy->rev == 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200))
369 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++) 370 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
370 bcm43xx_ilt_write16(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]); 371 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);
371 else 372 else
372 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++) 373 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
373 bcm43xx_ilt_write16(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]); 374 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);
374 375
375 if (phy->rev == 2) 376 if (phy->rev == 2)
376 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++) 377 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
377 bcm43xx_ilt_write16(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]); 378 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
378 else if ((phy->rev > 2) && (phy->rev <= 7)) 379 else if ((phy->rev > 2) && (phy->rev <= 7))
379 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++) 380 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
380 bcm43xx_ilt_write16(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]); 381 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);
381 382
382 if (phy->rev == 1) { 383 if (phy->rev == 1) {
383 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++) 384 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
384 bcm43xx_ilt_write16(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]); 385 bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
385 for (i = 0; i < 4; i++) { 386 for (i = 0; i < 4; i++) {
386 bcm43xx_ilt_write16(bcm, 0x5404 + i, 0x0020); 387 bcm43xx_ilt_write(bcm, 0x5404 + i, 0x0020);
387 bcm43xx_ilt_write16(bcm, 0x5408 + i, 0x0020); 388 bcm43xx_ilt_write(bcm, 0x5408 + i, 0x0020);
388 bcm43xx_ilt_write16(bcm, 0x540C + i, 0x0020); 389 bcm43xx_ilt_write(bcm, 0x540C + i, 0x0020);
389 bcm43xx_ilt_write16(bcm, 0x5410 + i, 0x0020); 390 bcm43xx_ilt_write(bcm, 0x5410 + i, 0x0020);
390 } 391 }
391 bcm43xx_phy_agcsetup(bcm); 392 bcm43xx_phy_agcsetup(bcm);
392 393
@@ -395,24 +396,24 @@ static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
395 (bcm->board_revision == 0x0017)) 396 (bcm->board_revision == 0x0017))
396 return; 397 return;
397 398
398 bcm43xx_ilt_write16(bcm, 0x5001, 0x0002); 399 bcm43xx_ilt_write(bcm, 0x5001, 0x0002);
399 bcm43xx_ilt_write16(bcm, 0x5002, 0x0001); 400 bcm43xx_ilt_write(bcm, 0x5002, 0x0001);
400 } else { 401 } else {
401 for (i = 0; i <= 0x2F; i++) 402 for (i = 0; i <= 0x2F; i++)
402 bcm43xx_ilt_write16(bcm, 0x1000 + i, 0x0820); 403 bcm43xx_ilt_write(bcm, 0x1000 + i, 0x0820);
403 bcm43xx_phy_agcsetup(bcm); 404 bcm43xx_phy_agcsetup(bcm);
404 bcm43xx_phy_read(bcm, 0x0400); /* dummy read */ 405 bcm43xx_phy_read(bcm, 0x0400); /* dummy read */
405 bcm43xx_phy_write(bcm, 0x0403, 0x1000); 406 bcm43xx_phy_write(bcm, 0x0403, 0x1000);
406 bcm43xx_ilt_write16(bcm, 0x3C02, 0x000F); 407 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
407 bcm43xx_ilt_write16(bcm, 0x3C03, 0x0014); 408 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
408 409
409 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) && 410 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
410 (bcm->board_type == 0x0416) && 411 (bcm->board_type == 0x0416) &&
411 (bcm->board_revision == 0x0017)) 412 (bcm->board_revision == 0x0017))
412 return; 413 return;
413 414
414 bcm43xx_ilt_write16(bcm, 0x0401, 0x0002); 415 bcm43xx_ilt_write(bcm, 0x0401, 0x0002);
415 bcm43xx_ilt_write16(bcm, 0x0402, 0x0001); 416 bcm43xx_ilt_write(bcm, 0x0402, 0x0001);
416 } 417 }
417} 418}
418 419
@@ -456,11 +457,11 @@ static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm)
456 bcm43xx_phy_write(bcm, 0x0035, 0x03FF); 457 bcm43xx_phy_write(bcm, 0x0035, 0x03FF);
457 bcm43xx_phy_write(bcm, 0x0036, 0x0400); 458 bcm43xx_phy_write(bcm, 0x0036, 0x0400);
458 459
459 bcm43xx_ilt_write16(bcm, 0x3807, 0x0051); 460 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
460 461
461 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9); 462 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
462 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F); 463 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
463 bcm43xx_ilt_write16(bcm, 0x3C0C, 0x07BF); 464 bcm43xx_ilt_write(bcm, 0x3C0C, 0x07BF);
464 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF); 465 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
465 466
466 bcm43xx_phy_write(bcm, 0x0024, 0x4680); 467 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
@@ -472,47 +473,47 @@ static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm)
472 bcm43xx_phy_write(bcm, 0x002B, bcm43xx_phy_read(bcm, 0x002B) & 0xFBFF); 473 bcm43xx_phy_write(bcm, 0x002B, bcm43xx_phy_read(bcm, 0x002B) & 0xFBFF);
473 bcm43xx_phy_write(bcm, 0x008E, 0x58C1); 474 bcm43xx_phy_write(bcm, 0x008E, 0x58C1);
474 475
475 bcm43xx_ilt_write16(bcm, 0x0803, 0x000F); 476 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
476 bcm43xx_ilt_write16(bcm, 0x0804, 0x001F); 477 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
477 bcm43xx_ilt_write16(bcm, 0x0805, 0x002A); 478 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
478 bcm43xx_ilt_write16(bcm, 0x0805, 0x0030); 479 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
479 bcm43xx_ilt_write16(bcm, 0x0807, 0x003A); 480 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
480 481
481 bcm43xx_ilt_write16(bcm, 0x0000, 0x0013); 482 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
482 bcm43xx_ilt_write16(bcm, 0x0001, 0x0013); 483 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
483 bcm43xx_ilt_write16(bcm, 0x0002, 0x0013); 484 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
484 bcm43xx_ilt_write16(bcm, 0x0003, 0x0013); 485 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
485 bcm43xx_ilt_write16(bcm, 0x0004, 0x0015); 486 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
486 bcm43xx_ilt_write16(bcm, 0x0005, 0x0015); 487 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
487 bcm43xx_ilt_write16(bcm, 0x0006, 0x0019); 488 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
488 489
489 bcm43xx_ilt_write16(bcm, 0x0404, 0x0003); 490 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
490 bcm43xx_ilt_write16(bcm, 0x0405, 0x0003); 491 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
491 bcm43xx_ilt_write16(bcm, 0x0406, 0x0007); 492 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
492 493
493 for (i = 0; i < 16; i++) 494 for (i = 0; i < 16; i++)
494 bcm43xx_ilt_write16(bcm, 0x4000 + i, (0x8 + i) & 0x000F); 495 bcm43xx_ilt_write(bcm, 0x4000 + i, (0x8 + i) & 0x000F);
495 496
496 bcm43xx_ilt_write16(bcm, 0x3003, 0x1044); 497 bcm43xx_ilt_write(bcm, 0x3003, 0x1044);
497 bcm43xx_ilt_write16(bcm, 0x3004, 0x7201); 498 bcm43xx_ilt_write(bcm, 0x3004, 0x7201);
498 bcm43xx_ilt_write16(bcm, 0x3006, 0x0040); 499 bcm43xx_ilt_write(bcm, 0x3006, 0x0040);
499 bcm43xx_ilt_write16(bcm, 0x3001, (bcm43xx_ilt_read16(bcm, 0x3001) & 0x0010) | 0x0008); 500 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
500 501
501 for (i = 0; i < BCM43xx_ILT_FINEFREQA_SIZE; i++) 502 for (i = 0; i < BCM43xx_ILT_FINEFREQA_SIZE; i++)
502 bcm43xx_ilt_write16(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]); 503 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]);
503 for (i = 0; i < BCM43xx_ILT_NOISEA2_SIZE; i++) 504 for (i = 0; i < BCM43xx_ILT_NOISEA2_SIZE; i++)
504 bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]); 505 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]);
505 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++) 506 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
506 bcm43xx_ilt_write16(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]); 507 bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
507 bcm43xx_phy_init_noisescaletbl(bcm); 508 bcm43xx_phy_init_noisescaletbl(bcm);
508 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++) 509 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
509 bcm43xx_ilt_write16(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]); 510 bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
510 break; 511 break;
511 case 3: 512 case 3:
512 for (i = 0; i < 64; i++) 513 for (i = 0; i < 64; i++)
513 bcm43xx_ilt_write16(bcm, 0x4000 + i, i); 514 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
514 515
515 bcm43xx_ilt_write16(bcm, 0x3807, 0x0051); 516 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
516 517
517 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9); 518 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
518 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F); 519 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
@@ -524,35 +525,35 @@ static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm)
524 bcm43xx_phy_write(bcm, 0x001F, 0x1C00); 525 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
525 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400); 526 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
526 527
527 bcm43xx_ilt_write16(bcm, 0x3001, (bcm43xx_ilt_read16(bcm, 0x3001) & 0x0010) | 0x0008); 528 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
528 for (i = 0; i < BCM43xx_ILT_NOISEA3_SIZE; i++) 529 for (i = 0; i < BCM43xx_ILT_NOISEA3_SIZE; i++)
529 bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]); 530 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]);
530 bcm43xx_phy_init_noisescaletbl(bcm); 531 bcm43xx_phy_init_noisescaletbl(bcm);
531 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++) 532 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
532 bcm43xx_ilt_write16(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]); 533 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
533 534
534 bcm43xx_phy_write(bcm, 0x0003, 0x1808); 535 bcm43xx_phy_write(bcm, 0x0003, 0x1808);
535 536
536 bcm43xx_ilt_write16(bcm, 0x0803, 0x000F); 537 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
537 bcm43xx_ilt_write16(bcm, 0x0804, 0x001F); 538 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
538 bcm43xx_ilt_write16(bcm, 0x0805, 0x002A); 539 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
539 bcm43xx_ilt_write16(bcm, 0x0805, 0x0030); 540 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
540 bcm43xx_ilt_write16(bcm, 0x0807, 0x003A); 541 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
541 542
542 bcm43xx_ilt_write16(bcm, 0x0000, 0x0013); 543 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
543 bcm43xx_ilt_write16(bcm, 0x0001, 0x0013); 544 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
544 bcm43xx_ilt_write16(bcm, 0x0002, 0x0013); 545 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
545 bcm43xx_ilt_write16(bcm, 0x0003, 0x0013); 546 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
546 bcm43xx_ilt_write16(bcm, 0x0004, 0x0015); 547 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
547 bcm43xx_ilt_write16(bcm, 0x0005, 0x0015); 548 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
548 bcm43xx_ilt_write16(bcm, 0x0006, 0x0019); 549 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
549 550
550 bcm43xx_ilt_write16(bcm, 0x0404, 0x0003); 551 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
551 bcm43xx_ilt_write16(bcm, 0x0405, 0x0003); 552 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
552 bcm43xx_ilt_write16(bcm, 0x0406, 0x0007); 553 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
553 554
554 bcm43xx_ilt_write16(bcm, 0x3C02, 0x000F); 555 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
555 bcm43xx_ilt_write16(bcm, 0x3C03, 0x0014); 556 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
556 break; 557 break;
557 default: 558 default:
558 assert(0); 559 assert(0);
@@ -598,19 +599,19 @@ static void bcm43xx_phy_inita(struct bcm43xx_private *bcm)
598 bcm43xx_radio_write16(bcm, 0x0019, 0x0000); 599 bcm43xx_radio_write16(bcm, 0x0019, 0x0000);
599 bcm43xx_radio_write16(bcm, 0x0017, 0x0020); 600 bcm43xx_radio_write16(bcm, 0x0017, 0x0020);
600 601
601 tval = bcm43xx_ilt_read16(bcm, 0x3001); 602 tval = bcm43xx_ilt_read(bcm, 0x3001);
602 if (phy->rev == 1) { 603 if (phy->rev == 1) {
603 bcm43xx_ilt_write16(bcm, 0x3001, 604 bcm43xx_ilt_write(bcm, 0x3001,
604 (bcm43xx_ilt_read16(bcm, 0x3001) & 0xFF87) 605 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFF87)
605 | 0x0058); 606 | 0x0058);
606 } else { 607 } else {
607 bcm43xx_ilt_write16(bcm, 0x3001, 608 bcm43xx_ilt_write(bcm, 0x3001,
608 (bcm43xx_ilt_read16(bcm, 0x3001) & 0xFFC3) 609 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFFC3)
609 | 0x002C); 610 | 0x002C);
610 } 611 }
611 bcm43xx_dummy_transmission(bcm); 612 bcm43xx_dummy_transmission(bcm);
612 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_A_PCTL); 613 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_A_PCTL);
613 bcm43xx_ilt_write16(bcm, 0x3001, tval); 614 bcm43xx_ilt_write(bcm, 0x3001, tval);
614 615
615 bcm43xx_radio_set_txpower_a(bcm, 0x0018); 616 bcm43xx_radio_set_txpower_a(bcm, 0x0018);
616 } 617 }