diff options
author | Larry Finger <Larry.Finger@lwfinger.net> | 2007-09-25 19:46:54 -0400 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2007-10-10 19:51:38 -0400 |
commit | 75388acd0cd827dc1498043daa7d1c760902cd67 (patch) | |
tree | 43fac7501291145963444e439f2ff30b9e5726e3 /drivers/net/wireless/b43legacy/xmit.h | |
parent | e4d6b7951812d98417feb10784e400e253caf633 (diff) |
[B43LEGACY]: add mac80211-based driver for legacy BCM43xx devices
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/wireless/b43legacy/xmit.h')
-rw-r--r-- | drivers/net/wireless/b43legacy/xmit.h | 259 |
1 files changed, 259 insertions, 0 deletions
diff --git a/drivers/net/wireless/b43legacy/xmit.h b/drivers/net/wireless/b43legacy/xmit.h new file mode 100644 index 000000000000..8a155d0a5d1f --- /dev/null +++ b/drivers/net/wireless/b43legacy/xmit.h | |||
@@ -0,0 +1,259 @@ | |||
1 | #ifndef B43legacy_XMIT_H_ | ||
2 | #define B43legacy_XMIT_H_ | ||
3 | |||
4 | #include "main.h" | ||
5 | |||
6 | |||
7 | #define _b43legacy_declare_plcp_hdr(size) \ | ||
8 | struct b43legacy_plcp_hdr##size { \ | ||
9 | union { \ | ||
10 | __le32 data; \ | ||
11 | __u8 raw[size]; \ | ||
12 | } __attribute__((__packed__)); \ | ||
13 | } __attribute__((__packed__)) | ||
14 | |||
15 | /* struct b43legacy_plcp_hdr4 */ | ||
16 | _b43legacy_declare_plcp_hdr(4); | ||
17 | /* struct b43legacy_plcp_hdr6 */ | ||
18 | _b43legacy_declare_plcp_hdr(6); | ||
19 | |||
20 | #undef _b43legacy_declare_plcp_hdr | ||
21 | |||
22 | |||
23 | /* TX header for v3 firmware */ | ||
24 | struct b43legacy_txhdr_fw3 { | ||
25 | __le32 mac_ctl; /* MAC TX control */ | ||
26 | __le16 mac_frame_ctl; /* Copy of the FrameControl */ | ||
27 | __le16 tx_fes_time_norm; /* TX FES Time Normal */ | ||
28 | __le16 phy_ctl; /* PHY TX control */ | ||
29 | __u8 iv[16]; /* Encryption IV */ | ||
30 | __u8 tx_receiver[6]; /* TX Frame Receiver address */ | ||
31 | __le16 tx_fes_time_fb; /* TX FES Time Fallback */ | ||
32 | struct b43legacy_plcp_hdr4 rts_plcp_fb; /* RTS fallback PLCP */ | ||
33 | __le16 rts_dur_fb; /* RTS fallback duration */ | ||
34 | struct b43legacy_plcp_hdr4 plcp_fb; /* Fallback PLCP */ | ||
35 | __le16 dur_fb; /* Fallback duration */ | ||
36 | PAD_BYTES(2); | ||
37 | __le16 cookie; | ||
38 | __le16 unknown_scb_stuff; | ||
39 | struct b43legacy_plcp_hdr6 rts_plcp; /* RTS PLCP */ | ||
40 | __u8 rts_frame[18]; /* The RTS frame (if used) */ | ||
41 | struct b43legacy_plcp_hdr6 plcp; | ||
42 | } __attribute__((__packed__)); | ||
43 | |||
44 | /* MAC TX control */ | ||
45 | #define B43legacy_TX4_MAC_KEYIDX 0x0FF00000 /* Security key index */ | ||
46 | #define B43legacy_TX4_MAC_KEYIDX_SHIFT 20 | ||
47 | #define B43legacy_TX4_MAC_KEYALG 0x00070000 /* Security key algorithm */ | ||
48 | #define B43legacy_TX4_MAC_KEYALG_SHIFT 16 | ||
49 | #define B43legacy_TX4_MAC_LIFETIME 0x00001000 | ||
50 | #define B43legacy_TX4_MAC_FRAMEBURST 0x00000800 | ||
51 | #define B43legacy_TX4_MAC_SENDCTS 0x00000400 | ||
52 | #define B43legacy_TX4_MAC_AMPDU 0x00000300 | ||
53 | #define B43legacy_TX4_MAC_AMPDU_SHIFT 8 | ||
54 | #define B43legacy_TX4_MAC_CTSFALLBACKOFDM 0x00000200 | ||
55 | #define B43legacy_TX4_MAC_FALLBACKOFDM 0x00000100 | ||
56 | #define B43legacy_TX4_MAC_5GHZ 0x00000080 | ||
57 | #define B43legacy_TX4_MAC_IGNPMQ 0x00000020 | ||
58 | #define B43legacy_TX4_MAC_HWSEQ 0x00000010 /* Use Hardware Seq No */ | ||
59 | #define B43legacy_TX4_MAC_STMSDU 0x00000008 /* Start MSDU */ | ||
60 | #define B43legacy_TX4_MAC_SENDRTS 0x00000004 | ||
61 | #define B43legacy_TX4_MAC_LONGFRAME 0x00000002 | ||
62 | #define B43legacy_TX4_MAC_ACK 0x00000001 | ||
63 | |||
64 | /* Extra Frame Types */ | ||
65 | #define B43legacy_TX4_EFT_FBOFDM 0x0001 /* Data frame fb rate type */ | ||
66 | #define B43legacy_TX4_EFT_RTSOFDM 0x0004 /* RTS/CTS rate type */ | ||
67 | #define B43legacy_TX4_EFT_RTSFBOFDM 0x0010 /* RTS/CTS fallback rate type */ | ||
68 | |||
69 | /* PHY TX control word */ | ||
70 | #define B43legacy_TX4_PHY_OFDM 0x0001 /* Data frame rate type */ | ||
71 | #define B43legacy_TX4_PHY_SHORTPRMBL 0x0010 /* Use short preamble */ | ||
72 | #define B43legacy_TX4_PHY_ANT 0x03C0 /* Antenna selection */ | ||
73 | #define B43legacy_TX4_PHY_ANT0 0x0000 /* Use antenna 0 */ | ||
74 | #define B43legacy_TX4_PHY_ANT1 0x0100 /* Use antenna 1 */ | ||
75 | #define B43legacy_TX4_PHY_ANTLAST 0x0300 /* Use last used antenna */ | ||
76 | |||
77 | |||
78 | |||
79 | void b43legacy_generate_txhdr(struct b43legacy_wldev *dev, | ||
80 | u8 *txhdr, | ||
81 | const unsigned char *fragment_data, | ||
82 | unsigned int fragment_len, | ||
83 | const struct ieee80211_tx_control *txctl, | ||
84 | u16 cookie); | ||
85 | |||
86 | |||
87 | /* Transmit Status */ | ||
88 | struct b43legacy_txstatus { | ||
89 | u16 cookie; /* The cookie from the txhdr */ | ||
90 | u16 seq; /* Sequence number */ | ||
91 | u8 phy_stat; /* PHY TX status */ | ||
92 | u8 frame_count; /* Frame transmit count */ | ||
93 | u8 rts_count; /* RTS transmit count */ | ||
94 | u8 supp_reason; /* Suppression reason */ | ||
95 | /* flags */ | ||
96 | u8 pm_indicated;/* PM mode indicated to AP */ | ||
97 | u8 intermediate;/* Intermediate status notification */ | ||
98 | u8 for_ampdu; /* Status is for an AMPDU (afterburner) */ | ||
99 | u8 acked; /* Wireless ACK received */ | ||
100 | }; | ||
101 | |||
102 | /* txstatus supp_reason values */ | ||
103 | enum { | ||
104 | B43legacy_TXST_SUPP_NONE, /* Not suppressed */ | ||
105 | B43legacy_TXST_SUPP_PMQ, /* Suppressed due to PMQ entry */ | ||
106 | B43legacy_TXST_SUPP_FLUSH, /* Suppressed due to flush request */ | ||
107 | B43legacy_TXST_SUPP_PREV, /* Previous fragment failed */ | ||
108 | B43legacy_TXST_SUPP_CHAN, /* Channel mismatch */ | ||
109 | B43legacy_TXST_SUPP_LIFE, /* Lifetime expired */ | ||
110 | B43legacy_TXST_SUPP_UNDER, /* Buffer underflow */ | ||
111 | B43legacy_TXST_SUPP_ABNACK, /* Afterburner NACK */ | ||
112 | }; | ||
113 | |||
114 | /* Transmit Status as received through DMA/PIO on old chips */ | ||
115 | struct b43legacy_hwtxstatus { | ||
116 | PAD_BYTES(4); | ||
117 | __le16 cookie; | ||
118 | u8 flags; | ||
119 | u8 count; | ||
120 | PAD_BYTES(2); | ||
121 | __le16 seq; | ||
122 | u8 phy_stat; | ||
123 | PAD_BYTES(1); | ||
124 | } __attribute__((__packed__)); | ||
125 | |||
126 | |||
127 | /* Receive header for v3 firmware. */ | ||
128 | struct b43legacy_rxhdr_fw3 { | ||
129 | __le16 frame_len; /* Frame length */ | ||
130 | PAD_BYTES(2); | ||
131 | __le16 phy_status0; /* PHY RX Status 0 */ | ||
132 | __u8 jssi; /* PHY RX Status 1: JSSI */ | ||
133 | __u8 sig_qual; /* PHY RX Status 1: Signal Quality */ | ||
134 | PAD_BYTES(2); /* PHY RX Status 2 */ | ||
135 | __le16 phy_status3; /* PHY RX Status 3 */ | ||
136 | __le16 mac_status; /* MAC RX status */ | ||
137 | __le16 mac_time; | ||
138 | __le16 channel; | ||
139 | } __attribute__((__packed__)); | ||
140 | |||
141 | |||
142 | /* PHY RX Status 0 */ | ||
143 | #define B43legacy_RX_PHYST0_GAINCTL 0x4000 /* Gain Control */ | ||
144 | #define B43legacy_RX_PHYST0_PLCPHCF 0x0200 | ||
145 | #define B43legacy_RX_PHYST0_PLCPFV 0x0100 | ||
146 | #define B43legacy_RX_PHYST0_SHORTPRMBL 0x0080 /* Recvd with Short Preamble */ | ||
147 | #define B43legacy_RX_PHYST0_LCRS 0x0040 | ||
148 | #define B43legacy_RX_PHYST0_ANT 0x0020 /* Antenna */ | ||
149 | #define B43legacy_RX_PHYST0_UNSRATE 0x0010 | ||
150 | #define B43legacy_RX_PHYST0_CLIP 0x000C | ||
151 | #define B43legacy_RX_PHYST0_CLIP_SHIFT 2 | ||
152 | #define B43legacy_RX_PHYST0_FTYPE 0x0003 /* Frame type */ | ||
153 | #define B43legacy_RX_PHYST0_CCK 0x0000 /* Frame type: CCK */ | ||
154 | #define B43legacy_RX_PHYST0_OFDM 0x0001 /* Frame type: OFDM */ | ||
155 | #define B43legacy_RX_PHYST0_PRE_N 0x0002 /* Pre-standard N-PHY frame */ | ||
156 | #define B43legacy_RX_PHYST0_STD_N 0x0003 /* Standard N-PHY frame */ | ||
157 | |||
158 | /* PHY RX Status 2 */ | ||
159 | #define B43legacy_RX_PHYST2_LNAG 0xC000 /* LNA Gain */ | ||
160 | #define B43legacy_RX_PHYST2_LNAG_SHIFT 14 | ||
161 | #define B43legacy_RX_PHYST2_PNAG 0x3C00 /* PNA Gain */ | ||
162 | #define B43legacy_RX_PHYST2_PNAG_SHIFT 10 | ||
163 | #define B43legacy_RX_PHYST2_FOFF 0x03FF /* F offset */ | ||
164 | |||
165 | /* PHY RX Status 3 */ | ||
166 | #define B43legacy_RX_PHYST3_DIGG 0x1800 /* DIG Gain */ | ||
167 | #define B43legacy_RX_PHYST3_DIGG_SHIFT 11 | ||
168 | #define B43legacy_RX_PHYST3_TRSTATE 0x0400 /* TR state */ | ||
169 | |||
170 | /* MAC RX Status */ | ||
171 | #define B43legacy_RX_MAC_BEACONSENT 0x00008000 /* Beacon send flag */ | ||
172 | #define B43legacy_RX_MAC_KEYIDX 0x000007E0 /* Key index */ | ||
173 | #define B43legacy_RX_MAC_KEYIDX_SHIFT 5 | ||
174 | #define B43legacy_RX_MAC_DECERR 0x00000010 /* Decrypt error */ | ||
175 | #define B43legacy_RX_MAC_DEC 0x00000008 /* Decryption attempted */ | ||
176 | #define B43legacy_RX_MAC_PADDING 0x00000004 /* Pad bytes present */ | ||
177 | #define B43legacy_RX_MAC_RESP 0x00000002 /* Response frame xmitted */ | ||
178 | #define B43legacy_RX_MAC_FCSERR 0x00000001 /* FCS error */ | ||
179 | |||
180 | /* RX channel */ | ||
181 | #define B43legacy_RX_CHAN_GAIN 0xFC00 /* Gain */ | ||
182 | #define B43legacy_RX_CHAN_GAIN_SHIFT 10 | ||
183 | #define B43legacy_RX_CHAN_ID 0x03FC /* Channel ID */ | ||
184 | #define B43legacy_RX_CHAN_ID_SHIFT 2 | ||
185 | #define B43legacy_RX_CHAN_PHYTYPE 0x0003 /* PHY type */ | ||
186 | |||
187 | |||
188 | |||
189 | u8 b43legacy_plcp_get_ratecode_cck(const u8 bitrate); | ||
190 | u8 b43legacy_plcp_get_ratecode_ofdm(const u8 bitrate); | ||
191 | |||
192 | void b43legacy_generate_plcp_hdr(struct b43legacy_plcp_hdr4 *plcp, | ||
193 | const u16 octets, const u8 bitrate); | ||
194 | |||
195 | void b43legacy_rx(struct b43legacy_wldev *dev, | ||
196 | struct sk_buff *skb, | ||
197 | const void *_rxhdr); | ||
198 | |||
199 | void b43legacy_handle_txstatus(struct b43legacy_wldev *dev, | ||
200 | const struct b43legacy_txstatus *status); | ||
201 | |||
202 | void b43legacy_handle_hwtxstatus(struct b43legacy_wldev *dev, | ||
203 | const struct b43legacy_hwtxstatus *hw); | ||
204 | |||
205 | void b43legacy_tx_suspend(struct b43legacy_wldev *dev); | ||
206 | void b43legacy_tx_resume(struct b43legacy_wldev *dev); | ||
207 | |||
208 | |||
209 | #define B43legacy_NR_QOSPARMS 22 | ||
210 | enum { | ||
211 | B43legacy_QOSPARM_TXOP = 0, | ||
212 | B43legacy_QOSPARM_CWMIN, | ||
213 | B43legacy_QOSPARM_CWMAX, | ||
214 | B43legacy_QOSPARM_CWCUR, | ||
215 | B43legacy_QOSPARM_AIFS, | ||
216 | B43legacy_QOSPARM_BSLOTS, | ||
217 | B43legacy_QOSPARM_REGGAP, | ||
218 | B43legacy_QOSPARM_STATUS, | ||
219 | }; | ||
220 | |||
221 | void b43legacy_qos_init(struct b43legacy_wldev *dev); | ||
222 | |||
223 | |||
224 | /* Helper functions for converting the key-table index from "firmware-format" | ||
225 | * to "raw-format" and back. The firmware API changed for this at some revision. | ||
226 | * We need to account for that here. */ | ||
227 | static inline | ||
228 | int b43legacy_new_kidx_api(struct b43legacy_wldev *dev) | ||
229 | { | ||
230 | /* FIXME: Not sure the change was at rev 351 */ | ||
231 | return (dev->fw.rev >= 351); | ||
232 | } | ||
233 | static inline | ||
234 | u8 b43legacy_kidx_to_fw(struct b43legacy_wldev *dev, u8 raw_kidx) | ||
235 | { | ||
236 | u8 firmware_kidx; | ||
237 | if (b43legacy_new_kidx_api(dev)) | ||
238 | firmware_kidx = raw_kidx; | ||
239 | else { | ||
240 | if (raw_kidx >= 4) /* Is per STA key? */ | ||
241 | firmware_kidx = raw_kidx - 4; | ||
242 | else | ||
243 | firmware_kidx = raw_kidx; /* TX default key */ | ||
244 | } | ||
245 | return firmware_kidx; | ||
246 | } | ||
247 | static inline | ||
248 | u8 b43legacy_kidx_to_raw(struct b43legacy_wldev *dev, u8 firmware_kidx) | ||
249 | { | ||
250 | u8 raw_kidx; | ||
251 | if (b43legacy_new_kidx_api(dev)) | ||
252 | raw_kidx = firmware_kidx; | ||
253 | else | ||
254 | /* RX default keys or per STA keys */ | ||
255 | raw_kidx = firmware_kidx + 4; | ||
256 | return raw_kidx; | ||
257 | } | ||
258 | |||
259 | #endif /* B43legacy_XMIT_H_ */ | ||