diff options
author | Pavel Roskin <proski@gnu.org> | 2011-07-25 17:40:22 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-08-08 16:04:08 -0400 |
commit | 191d6a8cc2d282db3707e9c71f49815ccdc79c54 (patch) | |
tree | 5ce5d0ff4972227f543e1adaf21d4e42ea1d7783 /drivers/net/wireless/b43legacy/dma.h | |
parent | ae7f9a740b4ac5a64306abc47a440b794c5b827a (diff) |
b43legacy: remove 64-bit DMA support
Devices supported by b43legacy don't support 64-bit DMA.
Signed-off-by: Pavel Roskin <proski@gnu.org>
Acked-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43legacy/dma.h')
-rw-r--r-- | drivers/net/wireless/b43legacy/dma.h | 107 |
1 files changed, 0 insertions, 107 deletions
diff --git a/drivers/net/wireless/b43legacy/dma.h b/drivers/net/wireless/b43legacy/dma.h index 686941c242fc..504a58767e95 100644 --- a/drivers/net/wireless/b43legacy/dma.h +++ b/drivers/net/wireless/b43legacy/dma.h | |||
@@ -82,90 +82,6 @@ struct b43legacy_dmadesc32 { | |||
82 | #define B43legacy_DMA32_DCTL_FRAMESTART 0x80000000 | 82 | #define B43legacy_DMA32_DCTL_FRAMESTART 0x80000000 |
83 | 83 | ||
84 | 84 | ||
85 | |||
86 | /*** 64-bit DMA Engine. ***/ | ||
87 | |||
88 | /* 64-bit DMA controller registers. */ | ||
89 | #define B43legacy_DMA64_TXCTL 0x00 | ||
90 | #define B43legacy_DMA64_TXENABLE 0x00000001 | ||
91 | #define B43legacy_DMA64_TXSUSPEND 0x00000002 | ||
92 | #define B43legacy_DMA64_TXLOOPBACK 0x00000004 | ||
93 | #define B43legacy_DMA64_TXFLUSH 0x00000010 | ||
94 | #define B43legacy_DMA64_TXADDREXT_MASK 0x00030000 | ||
95 | #define B43legacy_DMA64_TXADDREXT_SHIFT 16 | ||
96 | #define B43legacy_DMA64_TXINDEX 0x04 | ||
97 | #define B43legacy_DMA64_TXRINGLO 0x08 | ||
98 | #define B43legacy_DMA64_TXRINGHI 0x0C | ||
99 | #define B43legacy_DMA64_TXSTATUS 0x10 | ||
100 | #define B43legacy_DMA64_TXSTATDPTR 0x00001FFF | ||
101 | #define B43legacy_DMA64_TXSTAT 0xF0000000 | ||
102 | #define B43legacy_DMA64_TXSTAT_DISABLED 0x00000000 | ||
103 | #define B43legacy_DMA64_TXSTAT_ACTIVE 0x10000000 | ||
104 | #define B43legacy_DMA64_TXSTAT_IDLEWAIT 0x20000000 | ||
105 | #define B43legacy_DMA64_TXSTAT_STOPPED 0x30000000 | ||
106 | #define B43legacy_DMA64_TXSTAT_SUSP 0x40000000 | ||
107 | #define B43legacy_DMA64_TXERROR 0x14 | ||
108 | #define B43legacy_DMA64_TXERRDPTR 0x0001FFFF | ||
109 | #define B43legacy_DMA64_TXERR 0xF0000000 | ||
110 | #define B43legacy_DMA64_TXERR_NOERR 0x00000000 | ||
111 | #define B43legacy_DMA64_TXERR_PROT 0x10000000 | ||
112 | #define B43legacy_DMA64_TXERR_UNDERRUN 0x20000000 | ||
113 | #define B43legacy_DMA64_TXERR_TRANSFER 0x30000000 | ||
114 | #define B43legacy_DMA64_TXERR_DESCREAD 0x40000000 | ||
115 | #define B43legacy_DMA64_TXERR_CORE 0x50000000 | ||
116 | #define B43legacy_DMA64_RXCTL 0x20 | ||
117 | #define B43legacy_DMA64_RXENABLE 0x00000001 | ||
118 | #define B43legacy_DMA64_RXFROFF_MASK 0x000000FE | ||
119 | #define B43legacy_DMA64_RXFROFF_SHIFT 1 | ||
120 | #define B43legacy_DMA64_RXDIRECTFIFO 0x00000100 | ||
121 | #define B43legacy_DMA64_RXADDREXT_MASK 0x00030000 | ||
122 | #define B43legacy_DMA64_RXADDREXT_SHIFT 16 | ||
123 | #define B43legacy_DMA64_RXINDEX 0x24 | ||
124 | #define B43legacy_DMA64_RXRINGLO 0x28 | ||
125 | #define B43legacy_DMA64_RXRINGHI 0x2C | ||
126 | #define B43legacy_DMA64_RXSTATUS 0x30 | ||
127 | #define B43legacy_DMA64_RXSTATDPTR 0x00001FFF | ||
128 | #define B43legacy_DMA64_RXSTAT 0xF0000000 | ||
129 | #define B43legacy_DMA64_RXSTAT_DISABLED 0x00000000 | ||
130 | #define B43legacy_DMA64_RXSTAT_ACTIVE 0x10000000 | ||
131 | #define B43legacy_DMA64_RXSTAT_IDLEWAIT 0x20000000 | ||
132 | #define B43legacy_DMA64_RXSTAT_STOPPED 0x30000000 | ||
133 | #define B43legacy_DMA64_RXSTAT_SUSP 0x40000000 | ||
134 | #define B43legacy_DMA64_RXERROR 0x34 | ||
135 | #define B43legacy_DMA64_RXERRDPTR 0x0001FFFF | ||
136 | #define B43legacy_DMA64_RXERR 0xF0000000 | ||
137 | #define B43legacy_DMA64_RXERR_NOERR 0x00000000 | ||
138 | #define B43legacy_DMA64_RXERR_PROT 0x10000000 | ||
139 | #define B43legacy_DMA64_RXERR_UNDERRUN 0x20000000 | ||
140 | #define B43legacy_DMA64_RXERR_TRANSFER 0x30000000 | ||
141 | #define B43legacy_DMA64_RXERR_DESCREAD 0x40000000 | ||
142 | #define B43legacy_DMA64_RXERR_CORE 0x50000000 | ||
143 | |||
144 | /* 64-bit DMA descriptor. */ | ||
145 | struct b43legacy_dmadesc64 { | ||
146 | __le32 control0; | ||
147 | __le32 control1; | ||
148 | __le32 address_low; | ||
149 | __le32 address_high; | ||
150 | } __packed; | ||
151 | #define B43legacy_DMA64_DCTL0_DTABLEEND 0x10000000 | ||
152 | #define B43legacy_DMA64_DCTL0_IRQ 0x20000000 | ||
153 | #define B43legacy_DMA64_DCTL0_FRAMEEND 0x40000000 | ||
154 | #define B43legacy_DMA64_DCTL0_FRAMESTART 0x80000000 | ||
155 | #define B43legacy_DMA64_DCTL1_BYTECNT 0x00001FFF | ||
156 | #define B43legacy_DMA64_DCTL1_ADDREXT_MASK 0x00030000 | ||
157 | #define B43legacy_DMA64_DCTL1_ADDREXT_SHIFT 16 | ||
158 | |||
159 | |||
160 | |||
161 | struct b43legacy_dmadesc_generic { | ||
162 | union { | ||
163 | struct b43legacy_dmadesc32 dma32; | ||
164 | struct b43legacy_dmadesc64 dma64; | ||
165 | } __packed; | ||
166 | } __packed; | ||
167 | |||
168 | |||
169 | /* Misc DMA constants */ | 85 | /* Misc DMA constants */ |
170 | #define B43legacy_DMA_RINGMEMSIZE PAGE_SIZE | 86 | #define B43legacy_DMA_RINGMEMSIZE PAGE_SIZE |
171 | #define B43legacy_DMA0_RX_FRAMEOFFSET 30 | 87 | #define B43legacy_DMA0_RX_FRAMEOFFSET 30 |
@@ -197,35 +113,12 @@ struct b43legacy_dmadesc_meta { | |||
197 | bool is_last_fragment; | 113 | bool is_last_fragment; |
198 | }; | 114 | }; |
199 | 115 | ||
200 | struct b43legacy_dmaring; | ||
201 | |||
202 | /* Lowlevel DMA operations that differ between 32bit and 64bit DMA. */ | ||
203 | struct b43legacy_dma_ops { | ||
204 | struct b43legacy_dmadesc_generic * (*idx2desc) | ||
205 | (struct b43legacy_dmaring *ring, | ||
206 | int slot, | ||
207 | struct b43legacy_dmadesc_meta | ||
208 | **meta); | ||
209 | void (*fill_descriptor)(struct b43legacy_dmaring *ring, | ||
210 | struct b43legacy_dmadesc_generic *desc, | ||
211 | dma_addr_t dmaaddr, u16 bufsize, | ||
212 | int start, int end, int irq); | ||
213 | void (*poke_tx)(struct b43legacy_dmaring *ring, int slot); | ||
214 | void (*tx_suspend)(struct b43legacy_dmaring *ring); | ||
215 | void (*tx_resume)(struct b43legacy_dmaring *ring); | ||
216 | int (*get_current_rxslot)(struct b43legacy_dmaring *ring); | ||
217 | void (*set_current_rxslot)(struct b43legacy_dmaring *ring, int slot); | ||
218 | }; | ||
219 | |||
220 | enum b43legacy_dmatype { | 116 | enum b43legacy_dmatype { |
221 | B43legacy_DMA_30BIT = 30, | 117 | B43legacy_DMA_30BIT = 30, |
222 | B43legacy_DMA_32BIT = 32, | 118 | B43legacy_DMA_32BIT = 32, |
223 | B43legacy_DMA_64BIT = 64, | ||
224 | }; | 119 | }; |
225 | 120 | ||
226 | struct b43legacy_dmaring { | 121 | struct b43legacy_dmaring { |
227 | /* Lowlevel DMA ops. */ | ||
228 | const struct b43legacy_dma_ops *ops; | ||
229 | /* Kernel virtual base address of the ring memory. */ | 122 | /* Kernel virtual base address of the ring memory. */ |
230 | void *descbase; | 123 | void *descbase; |
231 | /* Meta data about all descriptors. */ | 124 | /* Meta data about all descriptors. */ |