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authorRafał Miłecki <zajec5@gmail.com>2014-07-17 13:31:05 -0400
committerJohn W. Linville <linville@tuxdriver.com>2014-07-18 13:45:26 -0400
commitc2cb2c4cf1a089501242a1701b589d2ad5eb0448 (patch)
treedff25b9f6e707c1d230e027daaa6df2082292db2 /drivers/net/wireless/b43
parentc9325e2f2435d93117e9336d72754b68abda26d4 (diff)
b43: use one shared function for setting MAC frequency
By the way add few chipsets that were tracked with "wl" dumps. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43')
-rw-r--r--drivers/net/wireless/b43/main.c39
-rw-r--r--drivers/net/wireless/b43/main.h1
-rw-r--r--drivers/net/wireless/b43/phy_lcn.c35
-rw-r--r--drivers/net/wireless/b43/phy_n.c7
4 files changed, 42 insertions, 40 deletions
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 3dcd3aa38608..3e127be06bfb 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -2964,6 +2964,45 @@ void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on)
2964 } 2964 }
2965} 2965}
2966 2966
2967/* brcms_b_switch_macfreq */
2968void b43_mac_switch_freq(struct b43_wldev *dev, u8 spurmode)
2969{
2970 u16 chip_id = dev->dev->chip_id;
2971
2972 if (chip_id == BCMA_CHIP_ID_BCM43217 ||
2973 chip_id == BCMA_CHIP_ID_BCM43222 ||
2974 chip_id == BCMA_CHIP_ID_BCM43224 ||
2975 chip_id == BCMA_CHIP_ID_BCM43225 ||
2976 chip_id == BCMA_CHIP_ID_BCM43227 ||
2977 chip_id == BCMA_CHIP_ID_BCM43228) {
2978 switch (spurmode) {
2979 case 2: /* 126 Mhz */
2980 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x2082);
2981 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
2982 break;
2983 case 1: /* 123 Mhz */
2984 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x5341);
2985 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
2986 break;
2987 default: /* 120 Mhz */
2988 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x8889);
2989 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
2990 break;
2991 }
2992 } else if (dev->phy.type == B43_PHYTYPE_LCN) {
2993 switch (spurmode) {
2994 case 1: /* 82 Mhz */
2995 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x7CE0);
2996 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
2997 break;
2998 default: /* 80 Mhz */
2999 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0xCCCD);
3000 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
3001 break;
3002 }
3003 }
3004}
3005
2967static void b43_adjust_opmode(struct b43_wldev *dev) 3006static void b43_adjust_opmode(struct b43_wldev *dev)
2968{ 3007{
2969 struct b43_wl *wl = dev->wl; 3008 struct b43_wl *wl = dev->wl;
diff --git a/drivers/net/wireless/b43/main.h b/drivers/net/wireless/b43/main.h
index f476fc337d64..9f22e4b4c132 100644
--- a/drivers/net/wireless/b43/main.h
+++ b/drivers/net/wireless/b43/main.h
@@ -99,6 +99,7 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags);
99void b43_mac_suspend(struct b43_wldev *dev); 99void b43_mac_suspend(struct b43_wldev *dev);
100void b43_mac_enable(struct b43_wldev *dev); 100void b43_mac_enable(struct b43_wldev *dev);
101void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on); 101void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on);
102void b43_mac_switch_freq(struct b43_wldev *dev, u8 spurmode);
102 103
103 104
104struct b43_request_fw_context; 105struct b43_request_fw_context;
diff --git a/drivers/net/wireless/b43/phy_lcn.c b/drivers/net/wireless/b43/phy_lcn.c
index 0bafa3b17035..e76bbdf3247e 100644
--- a/drivers/net/wireless/b43/phy_lcn.c
+++ b/drivers/net/wireless/b43/phy_lcn.c
@@ -54,39 +54,6 @@ enum lcn_sense_type {
54 B43_SENSE_VBAT, 54 B43_SENSE_VBAT,
55}; 55};
56 56
57/* In theory it's PHY common function, move if needed */
58/* brcms_b_switch_macfreq */
59static void b43_phy_switch_macfreq(struct b43_wldev *dev, u8 spurmode)
60{
61 if (dev->dev->chip_id == 43224 || dev->dev->chip_id == 43225) {
62 switch (spurmode) {
63 case 2: /* 126 Mhz */
64 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x2082);
65 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
66 break;
67 case 1: /* 123 Mhz */
68 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x5341);
69 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
70 break;
71 default: /* 120 Mhz */
72 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x8889);
73 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
74 break;
75 }
76 } else if (dev->phy.type == B43_PHYTYPE_LCN) {
77 switch (spurmode) {
78 case 1: /* 82 Mhz */
79 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x7CE0);
80 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
81 break;
82 default: /* 80 Mhz */
83 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0xCCCD);
84 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
85 break;
86 }
87 }
88}
89
90/************************************************** 57/**************************************************
91 * Radio 2064. 58 * Radio 2064.
92 **************************************************/ 59 **************************************************/
@@ -609,7 +576,7 @@ static void b43_phy_lcn_txrx_spur_avoidance_mode(struct b43_wldev *dev,
609 b43_phy_write(dev, 0x93b, ((0 << 13) + 23)); 576 b43_phy_write(dev, 0x93b, ((0 << 13) + 23));
610 b43_phy_write(dev, 0x93c, ((0 << 13) + 1989)); 577 b43_phy_write(dev, 0x93c, ((0 << 13) + 1989));
611 } 578 }
612 b43_phy_switch_macfreq(dev, enable); 579 b43_mac_switch_freq(dev, enable);
613} 580}
614 581
615/************************************************** 582/**************************************************
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index ef1acaec7027..0f0c1306b0ad 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -6113,12 +6113,7 @@ static void b43_nphy_channel_setup(struct b43_wldev *dev,
6113 6113
6114 b43_nphy_pmu_spur_avoid(dev, avoid); 6114 b43_nphy_pmu_spur_avoid(dev, avoid);
6115 6115
6116 if (dev->dev->chip_id == 43222 || dev->dev->chip_id == 43224 || 6116 b43_mac_switch_freq(dev, avoid);
6117 dev->dev->chip_id == 43225) {
6118 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW,
6119 avoid ? 0x5341 : 0x8889);
6120 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
6121 }
6122 6117
6123 if (dev->phy.rev == 3 || dev->phy.rev == 4) 6118 if (dev->phy.rev == 3 || dev->phy.rev == 4)
6124 ; /* TODO: reset PLL */ 6119 ; /* TODO: reset PLL */