diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2011-08-11 18:03:26 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-08-22 14:45:59 -0400 |
commit | f6a3e99da82167e066ebde975ec604638b42d816 (patch) | |
tree | 1b4224908111ebeef9e9c3cdd2b5e1adf196625c /drivers/net/wireless/b43 | |
parent | 6a461c23e7051d090751a2030e5febf6356c8d57 (diff) |
b43: make forcing clock common (HT-PHY also uses that)
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43')
-rw-r--r-- | drivers/net/wireless/b43/phy_common.c | 32 | ||||
-rw-r--r-- | drivers/net/wireless/b43/phy_common.h | 2 | ||||
-rw-r--r-- | drivers/net/wireless/b43/phy_n.c | 40 |
3 files changed, 38 insertions, 36 deletions
diff --git a/drivers/net/wireless/b43/phy_common.c b/drivers/net/wireless/b43/phy_common.c index 07f009ff5ee2..3ea44bb03684 100644 --- a/drivers/net/wireless/b43/phy_common.c +++ b/drivers/net/wireless/b43/phy_common.c | |||
@@ -448,6 +448,38 @@ bool b43_channel_type_is_40mhz(enum nl80211_channel_type channel_type) | |||
448 | channel_type == NL80211_CHAN_HT40PLUS); | 448 | channel_type == NL80211_CHAN_HT40PLUS); |
449 | } | 449 | } |
450 | 450 | ||
451 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */ | ||
452 | void b43_phy_force_clock(struct b43_wldev *dev, bool force) | ||
453 | { | ||
454 | u32 tmp; | ||
455 | |||
456 | WARN_ON(dev->phy.type != B43_PHYTYPE_N && | ||
457 | dev->phy.type != B43_PHYTYPE_HT); | ||
458 | |||
459 | switch (dev->dev->bus_type) { | ||
460 | #ifdef CONFIG_B43_BCMA | ||
461 | case B43_BUS_BCMA: | ||
462 | tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); | ||
463 | if (force) | ||
464 | tmp |= BCMA_IOCTL_FGC; | ||
465 | else | ||
466 | tmp &= ~BCMA_IOCTL_FGC; | ||
467 | bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); | ||
468 | break; | ||
469 | #endif | ||
470 | #ifdef CONFIG_B43_SSB | ||
471 | case B43_BUS_SSB: | ||
472 | tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); | ||
473 | if (force) | ||
474 | tmp |= SSB_TMSLOW_FGC; | ||
475 | else | ||
476 | tmp &= ~SSB_TMSLOW_FGC; | ||
477 | ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); | ||
478 | break; | ||
479 | #endif | ||
480 | } | ||
481 | } | ||
482 | |||
451 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic */ | 483 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic */ |
452 | struct b43_c32 b43_cordic(int theta) | 484 | struct b43_c32 b43_cordic(int theta) |
453 | { | 485 | { |
diff --git a/drivers/net/wireless/b43/phy_common.h b/drivers/net/wireless/b43/phy_common.h index aa77ba612a92..9233b13fc16d 100644 --- a/drivers/net/wireless/b43/phy_common.h +++ b/drivers/net/wireless/b43/phy_common.h | |||
@@ -444,6 +444,8 @@ void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on); | |||
444 | 444 | ||
445 | bool b43_channel_type_is_40mhz(enum nl80211_channel_type channel_type); | 445 | bool b43_channel_type_is_40mhz(enum nl80211_channel_type channel_type); |
446 | 446 | ||
447 | void b43_phy_force_clock(struct b43_wldev *dev, bool force); | ||
448 | |||
447 | struct b43_c32 b43_cordic(int theta); | 449 | struct b43_c32 b43_cordic(int theta); |
448 | 450 | ||
449 | #endif /* LINUX_B43_PHY_COMMON_H_ */ | 451 | #endif /* LINUX_B43_PHY_COMMON_H_ */ |
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c index 3b46360da99b..2eadadf5f4fc 100644 --- a/drivers/net/wireless/b43/phy_n.c +++ b/drivers/net/wireless/b43/phy_n.c | |||
@@ -600,49 +600,17 @@ static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev) | |||
600 | } | 600 | } |
601 | } | 601 | } |
602 | 602 | ||
603 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */ | ||
604 | static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force) | ||
605 | { | ||
606 | u32 tmp; | ||
607 | |||
608 | if (dev->phy.type != B43_PHYTYPE_N) | ||
609 | return; | ||
610 | |||
611 | switch (dev->dev->bus_type) { | ||
612 | #ifdef CONFIG_B43_BCMA | ||
613 | case B43_BUS_BCMA: | ||
614 | tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); | ||
615 | if (force) | ||
616 | tmp |= BCMA_IOCTL_FGC; | ||
617 | else | ||
618 | tmp &= ~BCMA_IOCTL_FGC; | ||
619 | bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); | ||
620 | break; | ||
621 | #endif | ||
622 | #ifdef CONFIG_B43_SSB | ||
623 | case B43_BUS_SSB: | ||
624 | tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); | ||
625 | if (force) | ||
626 | tmp |= SSB_TMSLOW_FGC; | ||
627 | else | ||
628 | tmp &= ~SSB_TMSLOW_FGC; | ||
629 | ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); | ||
630 | break; | ||
631 | #endif | ||
632 | } | ||
633 | } | ||
634 | |||
635 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */ | 603 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */ |
636 | static void b43_nphy_reset_cca(struct b43_wldev *dev) | 604 | static void b43_nphy_reset_cca(struct b43_wldev *dev) |
637 | { | 605 | { |
638 | u16 bbcfg; | 606 | u16 bbcfg; |
639 | 607 | ||
640 | b43_nphy_bmac_clock_fgc(dev, 1); | 608 | b43_phy_force_clock(dev, 1); |
641 | bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG); | 609 | bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG); |
642 | b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA); | 610 | b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA); |
643 | udelay(1); | 611 | udelay(1); |
644 | b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA); | 612 | b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA); |
645 | b43_nphy_bmac_clock_fgc(dev, 0); | 613 | b43_phy_force_clock(dev, 0); |
646 | b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); | 614 | b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); |
647 | } | 615 | } |
648 | 616 | ||
@@ -3715,11 +3683,11 @@ int b43_phy_initn(struct b43_wldev *dev) | |||
3715 | b43_nphy_workarounds(dev); | 3683 | b43_nphy_workarounds(dev); |
3716 | 3684 | ||
3717 | /* Reset CCA, in init code it differs a little from standard way */ | 3685 | /* Reset CCA, in init code it differs a little from standard way */ |
3718 | b43_nphy_bmac_clock_fgc(dev, 1); | 3686 | b43_phy_force_clock(dev, 1); |
3719 | tmp = b43_phy_read(dev, B43_NPHY_BBCFG); | 3687 | tmp = b43_phy_read(dev, B43_NPHY_BBCFG); |
3720 | b43_phy_write(dev, B43_NPHY_BBCFG, tmp | B43_NPHY_BBCFG_RSTCCA); | 3688 | b43_phy_write(dev, B43_NPHY_BBCFG, tmp | B43_NPHY_BBCFG_RSTCCA); |
3721 | b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA); | 3689 | b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA); |
3722 | b43_nphy_bmac_clock_fgc(dev, 0); | 3690 | b43_phy_force_clock(dev, 0); |
3723 | 3691 | ||
3724 | b43_mac_phy_clock_set(dev, true); | 3692 | b43_mac_phy_clock_set(dev, true); |
3725 | 3693 | ||