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authorHauke Mehrtens <hauke@hauke-m.de>2014-09-14 17:09:11 -0400
committerJohn W. Linville <linville@tuxdriver.com>2014-09-15 15:00:54 -0400
commit0996c3910b8de402c319495c9560f3a909c8b866 (patch)
tree749290dfb42e55288b2a209318cea66eb31b55cc /drivers/net/wireless/b43
parent30adb4d7a96d3e72447ed092e36e89ba3a6ab391 (diff)
b43: update some transmit header constants
Some constants were missing and are added now. The rate mode was renamed, at least the ucode in brcsmac uses 2 for HT rates (iee80211n) and the more recent ucodes are using 3 for VHT (ieee80211ac). Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43')
-rw-r--r--drivers/net/wireless/b43/xmit.h22
1 files changed, 13 insertions, 9 deletions
diff --git a/drivers/net/wireless/b43/xmit.h b/drivers/net/wireless/b43/xmit.h
index 98d90747836a..ba6115308068 100644
--- a/drivers/net/wireless/b43/xmit.h
+++ b/drivers/net/wireless/b43/xmit.h
@@ -97,9 +97,13 @@ struct b43_tx_legacy_rate_phy_ctl_entry {
97}; 97};
98 98
99/* MAC TX control */ 99/* MAC TX control */
100#define B43_TXH_MAC_RTS_FB_SHORTPRMBL 0x80000000 /* RTS fallback preamble */
101#define B43_TXH_MAC_RTS_SHORTPRMBL 0x40000000 /* RTS main rate preamble */
102#define B43_TXH_MAC_FB_SHORTPRMBL 0x20000000 /* Main fallback preamble */
100#define B43_TXH_MAC_USEFBR 0x10000000 /* Use fallback rate for this AMPDU */ 103#define B43_TXH_MAC_USEFBR 0x10000000 /* Use fallback rate for this AMPDU */
101#define B43_TXH_MAC_KEYIDX 0x0FF00000 /* Security key index */ 104#define B43_TXH_MAC_KEYIDX 0x0FF00000 /* Security key index */
102#define B43_TXH_MAC_KEYIDX_SHIFT 20 105#define B43_TXH_MAC_KEYIDX_SHIFT 20
106#define B43_TXH_MAC_ALT_TXPWR 0x00080000 /* Use alternate txpwr defined at loc. M_ALT_TXPWR_IDX */
103#define B43_TXH_MAC_KEYALG 0x00070000 /* Security key algorithm */ 107#define B43_TXH_MAC_KEYALG 0x00070000 /* Security key algorithm */
104#define B43_TXH_MAC_KEYALG_SHIFT 16 108#define B43_TXH_MAC_KEYALG_SHIFT 16
105#define B43_TXH_MAC_AMIC 0x00008000 /* AMIC */ 109#define B43_TXH_MAC_AMIC 0x00008000 /* AMIC */
@@ -126,25 +130,25 @@ struct b43_tx_legacy_rate_phy_ctl_entry {
126#define B43_TXH_EFT_FB 0x03 /* Data frame fallback encoding */ 130#define B43_TXH_EFT_FB 0x03 /* Data frame fallback encoding */
127#define B43_TXH_EFT_FB_CCK 0x00 /* CCK */ 131#define B43_TXH_EFT_FB_CCK 0x00 /* CCK */
128#define B43_TXH_EFT_FB_OFDM 0x01 /* OFDM */ 132#define B43_TXH_EFT_FB_OFDM 0x01 /* OFDM */
129#define B43_TXH_EFT_FB_EWC 0x02 /* EWC */ 133#define B43_TXH_EFT_FB_HT 0x02 /* HT */
130#define B43_TXH_EFT_FB_N 0x03 /* N */ 134#define B43_TXH_EFT_FB_VHT 0x03 /* VHT */
131#define B43_TXH_EFT_RTS 0x0C /* RTS/CTS encoding */ 135#define B43_TXH_EFT_RTS 0x0C /* RTS/CTS encoding */
132#define B43_TXH_EFT_RTS_CCK 0x00 /* CCK */ 136#define B43_TXH_EFT_RTS_CCK 0x00 /* CCK */
133#define B43_TXH_EFT_RTS_OFDM 0x04 /* OFDM */ 137#define B43_TXH_EFT_RTS_OFDM 0x04 /* OFDM */
134#define B43_TXH_EFT_RTS_EWC 0x08 /* EWC */ 138#define B43_TXH_EFT_RTS_HT 0x08 /* HT */
135#define B43_TXH_EFT_RTS_N 0x0C /* N */ 139#define B43_TXH_EFT_RTS_VHT 0x0C /* VHT */
136#define B43_TXH_EFT_RTSFB 0x30 /* RTS/CTS fallback encoding */ 140#define B43_TXH_EFT_RTSFB 0x30 /* RTS/CTS fallback encoding */
137#define B43_TXH_EFT_RTSFB_CCK 0x00 /* CCK */ 141#define B43_TXH_EFT_RTSFB_CCK 0x00 /* CCK */
138#define B43_TXH_EFT_RTSFB_OFDM 0x10 /* OFDM */ 142#define B43_TXH_EFT_RTSFB_OFDM 0x10 /* OFDM */
139#define B43_TXH_EFT_RTSFB_EWC 0x20 /* EWC */ 143#define B43_TXH_EFT_RTSFB_HT 0x20 /* HT */
140#define B43_TXH_EFT_RTSFB_N 0x30 /* N */ 144#define B43_TXH_EFT_RTSFB_VHT 0x30 /* VHT */
141 145
142/* PHY TX control word */ 146/* PHY TX control word */
143#define B43_TXH_PHY_ENC 0x0003 /* Data frame encoding */ 147#define B43_TXH_PHY_ENC 0x0003 /* Data frame encoding */
144#define B43_TXH_PHY_ENC_CCK 0x0000 /* CCK */ 148#define B43_TXH_PHY_ENC_CCK 0x0000 /* CCK */
145#define B43_TXH_PHY_ENC_OFDM 0x0001 /* OFDM */ 149#define B43_TXH_PHY_ENC_OFDM 0x0001 /* OFDM */
146#define B43_TXH_PHY_ENC_EWC 0x0002 /* EWC */ 150#define B43_TXH_PHY_ENC_HT 0x0002 /* HT */
147#define B43_TXH_PHY_ENC_N 0x0003 /* N */ 151#define B43_TXH_PHY_ENC_VHT 0x0003 /* VHT */
148#define B43_TXH_PHY_SHORTPRMBL 0x0010 /* Use short preamble */ 152#define B43_TXH_PHY_SHORTPRMBL 0x0010 /* Use short preamble */
149#define B43_TXH_PHY_ANT 0x03C0 /* Antenna selection */ 153#define B43_TXH_PHY_ANT 0x03C0 /* Antenna selection */
150#define B43_TXH_PHY_ANT0 0x0000 /* Use antenna 0 */ 154#define B43_TXH_PHY_ANT0 0x0000 /* Use antenna 0 */
@@ -162,7 +166,7 @@ struct b43_tx_legacy_rate_phy_ctl_entry {
162#define B43_TXH_PHY1_BW_20 0x0002 /* 20 MHz */ 166#define B43_TXH_PHY1_BW_20 0x0002 /* 20 MHz */
163#define B43_TXH_PHY1_BW_20U 0x0003 /* 20 MHz upper */ 167#define B43_TXH_PHY1_BW_20U 0x0003 /* 20 MHz upper */
164#define B43_TXH_PHY1_BW_40 0x0004 /* 40 MHz */ 168#define B43_TXH_PHY1_BW_40 0x0004 /* 40 MHz */
165#define B43_TXH_PHY1_BW_40DUP 0x0005 /* 50 MHz duplicate */ 169#define B43_TXH_PHY1_BW_40DUP 0x0005 /* 40 MHz duplicate */
166#define B43_TXH_PHY1_MODE 0x0038 /* Mode */ 170#define B43_TXH_PHY1_MODE 0x0038 /* Mode */
167#define B43_TXH_PHY1_MODE_SISO 0x0000 /* SISO */ 171#define B43_TXH_PHY1_MODE_SISO 0x0000 /* SISO */
168#define B43_TXH_PHY1_MODE_CDD 0x0008 /* CDD */ 172#define B43_TXH_PHY1_MODE_CDD 0x0008 /* CDD */