diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2013-03-09 07:56:26 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2013-03-13 14:27:52 -0400 |
commit | 4409a23f6bca71d256e05d03215439d6796d9f4e (patch) | |
tree | 8bae61f4b5760620645b7ef73057b752ed9ff298 /drivers/net/wireless/b43 | |
parent | 396535e137c969dae91c879b8533d74079bba4c2 (diff) |
b43: HT-PHY: implement RSSI polling
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43')
-rw-r--r-- | drivers/net/wireless/b43/phy_ht.c | 96 | ||||
-rw-r--r-- | drivers/net/wireless/b43/phy_ht.h | 5 |
2 files changed, 100 insertions, 1 deletions
diff --git a/drivers/net/wireless/b43/phy_ht.c b/drivers/net/wireless/b43/phy_ht.c index 22fdde613a58..ae9cd2978060 100644 --- a/drivers/net/wireless/b43/phy_ht.c +++ b/drivers/net/wireless/b43/phy_ht.c | |||
@@ -388,6 +388,92 @@ static void b43_phy_ht_tx_tone(struct b43_wldev *dev) | |||
388 | #endif | 388 | #endif |
389 | 389 | ||
390 | /************************************************** | 390 | /************************************************** |
391 | * RSSI | ||
392 | **************************************************/ | ||
393 | |||
394 | #if 0 | ||
395 | static void b43_phy_ht_rssi_select(struct b43_wldev *dev, u8 core_sel, | ||
396 | u8 rssi_type) | ||
397 | { | ||
398 | static const u16 ctl_regs[3][2] = { | ||
399 | { B43_PHY_HT_AFE_C1, B43_PHY_HT_AFE_C1_OVER, }, | ||
400 | { B43_PHY_HT_AFE_C2, B43_PHY_HT_AFE_C2_OVER, }, | ||
401 | { B43_PHY_HT_AFE_C3, B43_PHY_HT_AFE_C3_OVER, }, | ||
402 | }; | ||
403 | static const u16 radio_r[] = { R2059_SYN, R2059_TXRX0, R2059_RXRX1, }; | ||
404 | int core; | ||
405 | |||
406 | if (core_sel == 0) { | ||
407 | b43err(dev->wl, "RSSI selection for core off not implemented yet\n"); | ||
408 | } else { | ||
409 | for (core = 0; core < 3; core++) { | ||
410 | /* Check if caller requested a one specific core */ | ||
411 | if ((core_sel == 1 && core != 0) || | ||
412 | (core_sel == 2 && core != 1) || | ||
413 | (core_sel == 3 && core != 2)) | ||
414 | continue; | ||
415 | |||
416 | switch (rssi_type) { | ||
417 | case 4: | ||
418 | b43_phy_set(dev, ctl_regs[core][0], 0x3 << 8); | ||
419 | b43_phy_set(dev, ctl_regs[core][0], 0x3 << 10); | ||
420 | b43_phy_set(dev, ctl_regs[core][1], 0x1 << 9); | ||
421 | b43_phy_set(dev, ctl_regs[core][1], 0x1 << 10); | ||
422 | |||
423 | b43_radio_set(dev, R2059_RXRX1 | 0xbf, 0x1); | ||
424 | b43_radio_write(dev, radio_r[core] | 0x159, | ||
425 | 0x11); | ||
426 | break; | ||
427 | default: | ||
428 | b43err(dev->wl, "RSSI selection for type %d not implemented yet\n", | ||
429 | rssi_type); | ||
430 | } | ||
431 | } | ||
432 | } | ||
433 | } | ||
434 | |||
435 | static void b43_phy_ht_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf, | ||
436 | u8 nsamp) | ||
437 | { | ||
438 | u16 phy_regs_values[12]; | ||
439 | static const u16 phy_regs_to_save[] = { | ||
440 | B43_PHY_HT_AFE_C1, B43_PHY_HT_AFE_C1_OVER, | ||
441 | 0x848, 0x841, | ||
442 | B43_PHY_HT_AFE_C2, B43_PHY_HT_AFE_C2_OVER, | ||
443 | 0x868, 0x861, | ||
444 | B43_PHY_HT_AFE_C3, B43_PHY_HT_AFE_C3_OVER, | ||
445 | 0x888, 0x881, | ||
446 | }; | ||
447 | u16 tmp[3]; | ||
448 | int i; | ||
449 | |||
450 | for (i = 0; i < 12; i++) | ||
451 | phy_regs_values[i] = b43_phy_read(dev, phy_regs_to_save[i]); | ||
452 | |||
453 | b43_phy_ht_rssi_select(dev, 5, type); | ||
454 | |||
455 | for (i = 0; i < 6; i++) | ||
456 | buf[i] = 0; | ||
457 | |||
458 | for (i = 0; i < nsamp; i++) { | ||
459 | tmp[0] = b43_phy_read(dev, B43_PHY_HT_RSSI_C1); | ||
460 | tmp[1] = b43_phy_read(dev, B43_PHY_HT_RSSI_C2); | ||
461 | tmp[2] = b43_phy_read(dev, B43_PHY_HT_RSSI_C3); | ||
462 | |||
463 | buf[0] += ((s8)((tmp[0] & 0x3F) << 2)) >> 2; | ||
464 | buf[1] += ((s8)(((tmp[0] >> 8) & 0x3F) << 2)) >> 2; | ||
465 | buf[2] += ((s8)((tmp[1] & 0x3F) << 2)) >> 2; | ||
466 | buf[3] += ((s8)(((tmp[1] >> 8) & 0x3F) << 2)) >> 2; | ||
467 | buf[4] += ((s8)((tmp[2] & 0x3F) << 2)) >> 2; | ||
468 | buf[5] += ((s8)(((tmp[2] >> 8) & 0x3F) << 2)) >> 2; | ||
469 | } | ||
470 | |||
471 | for (i = 0; i < 12; i++) | ||
472 | b43_phy_write(dev, phy_regs_to_save[i], phy_regs_values[i]); | ||
473 | } | ||
474 | #endif | ||
475 | |||
476 | /************************************************** | ||
391 | * Tx/Rx | 477 | * Tx/Rx |
392 | **************************************************/ | 478 | **************************************************/ |
393 | 479 | ||
@@ -454,12 +540,20 @@ static void b43_phy_ht_tx_power_ctl(struct b43_wldev *dev, bool enable) | |||
454 | 540 | ||
455 | static void b43_phy_ht_tx_power_ctl_idle_tssi(struct b43_wldev *dev) | 541 | static void b43_phy_ht_tx_power_ctl_idle_tssi(struct b43_wldev *dev) |
456 | { | 542 | { |
543 | struct b43_phy_ht *phy_ht = dev->phy.ht; | ||
544 | s32 rssi_buf[6]; | ||
545 | |||
457 | /* TODO */ | 546 | /* TODO */ |
458 | 547 | ||
459 | b43_phy_ht_tx_tone(dev); | 548 | b43_phy_ht_tx_tone(dev); |
460 | udelay(20); | 549 | udelay(20); |
461 | /* TODO: poll RSSI */ | 550 | b43_phy_ht_poll_rssi(dev, 4, rssi_buf, 1); |
462 | b43_phy_ht_stop_playback(dev); | 551 | b43_phy_ht_stop_playback(dev); |
552 | b43_phy_ht_reset_cca(dev); | ||
553 | |||
554 | phy_ht->idle_tssi[0] = rssi_buf[0] & 0xff; | ||
555 | phy_ht->idle_tssi[1] = rssi_buf[2] & 0xff; | ||
556 | phy_ht->idle_tssi[2] = rssi_buf[4] & 0xff; | ||
463 | 557 | ||
464 | /* TODO */ | 558 | /* TODO */ |
465 | } | 559 | } |
diff --git a/drivers/net/wireless/b43/phy_ht.h b/drivers/net/wireless/b43/phy_ht.h index c51795862b6d..165c5014b7c8 100644 --- a/drivers/net/wireless/b43/phy_ht.h +++ b/drivers/net/wireless/b43/phy_ht.h | |||
@@ -36,6 +36,9 @@ | |||
36 | #define B43_PHY_HT_TXPCTL_CMD_C1_PCTLEN 0x8000 /* TX power control enable */ | 36 | #define B43_PHY_HT_TXPCTL_CMD_C1_PCTLEN 0x8000 /* TX power control enable */ |
37 | #define B43_PHY_HT_TXPCTL_CMD_C2 0x222 | 37 | #define B43_PHY_HT_TXPCTL_CMD_C2 0x222 |
38 | #define B43_PHY_HT_TXPCTL_CMD_C2_INIT 0x007F | 38 | #define B43_PHY_HT_TXPCTL_CMD_C2_INIT 0x007F |
39 | #define B43_PHY_HT_RSSI_C1 0x219 | ||
40 | #define B43_PHY_HT_RSSI_C2 0x21A | ||
41 | #define B43_PHY_HT_RSSI_C3 0x21B | ||
39 | 42 | ||
40 | #define B43_PHY_HT_C1_CLIP1THRES B43_PHY_OFDM(0x00E) | 43 | #define B43_PHY_HT_C1_CLIP1THRES B43_PHY_OFDM(0x00E) |
41 | #define B43_PHY_HT_C2_CLIP1THRES B43_PHY_OFDM(0x04E) | 44 | #define B43_PHY_HT_C2_CLIP1THRES B43_PHY_OFDM(0x04E) |
@@ -91,6 +94,8 @@ struct b43_phy_ht { | |||
91 | u8 tx_pwr_idx[3]; | 94 | u8 tx_pwr_idx[3]; |
92 | 95 | ||
93 | s32 bb_mult_save[3]; | 96 | s32 bb_mult_save[3]; |
97 | |||
98 | u8 idle_tssi[3]; | ||
94 | }; | 99 | }; |
95 | 100 | ||
96 | 101 | ||