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authorMichael Buesch <mb@bu3sch.de>2009-02-20 13:22:36 -0500
committerJohn W. Linville <linville@tuxdriver.com>2009-02-27 14:52:52 -0500
commite59be0b5299ce327d67cfca737b839ef98e0da0e (patch)
treec85dc5b69d3bdeb1641ebfc7c6cd2ca67d8c143d /drivers/net/wireless/b43/phy_g.c
parent9b02f419a7dbd956b2c293e5cb1790b6b687f367 (diff)
b43: Convert usage of b43_phy_set()
This patch converts code to use the new b43_phy_set() API. The semantic patch that makes this change is as follows: // <smpl> @@ expression dev, addr, set; @@ -b43_phy_write(dev, addr, b43_phy_read(dev, addr) | set); +b43_phy_set(dev, addr, set); // </smpl> Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43/phy_g.c')
-rw-r--r--drivers/net/wireless/b43/phy_g.c170
1 files changed, 58 insertions, 112 deletions
diff --git a/drivers/net/wireless/b43/phy_g.c b/drivers/net/wireless/b43/phy_g.c
index 88bb303ae9d5..d3f2a700821f 100644
--- a/drivers/net/wireless/b43/phy_g.c
+++ b/drivers/net/wireless/b43/phy_g.c
@@ -457,7 +457,7 @@ static void b43_calc_nrssi_offset(struct b43_wldev *dev)
457 b43_phy_write(dev, 0x0429, b43_phy_read(dev, 0x0429) & 0x7FFF); 457 b43_phy_write(dev, 0x0429, b43_phy_read(dev, 0x0429) & 0x7FFF);
458 b43_phy_write(dev, 0x0001, 458 b43_phy_write(dev, 0x0001,
459 (b43_phy_read(dev, 0x0001) & 0x3FFF) | 0x4000); 459 (b43_phy_read(dev, 0x0001) & 0x3FFF) | 0x4000);
460 b43_phy_write(dev, 0x0811, b43_phy_read(dev, 0x0811) | 0x000C); 460 b43_phy_set(dev, 0x0811, 0x000C);
461 b43_phy_write(dev, 0x0812, 461 b43_phy_write(dev, 0x0812,
462 (b43_phy_read(dev, 0x0812) & 0xFFF3) | 0x0004); 462 (b43_phy_read(dev, 0x0812) & 0xFFF3) | 0x0004);
463 b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) & ~(0x1 | 0x2)); 463 b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) & ~(0x1 | 0x2));
@@ -475,10 +475,10 @@ static void b43_calc_nrssi_offset(struct b43_wldev *dev)
475 b43_phy_write(dev, 0x002F, 0); 475 b43_phy_write(dev, 0x002F, 0);
476 b43_phy_write(dev, 0x080F, 0); 476 b43_phy_write(dev, 0x080F, 0);
477 b43_phy_write(dev, 0x0810, 0); 477 b43_phy_write(dev, 0x0810, 0);
478 b43_phy_write(dev, 0x0478, b43_phy_read(dev, 0x0478) | 0x0100); 478 b43_phy_set(dev, 0x0478, 0x0100);
479 b43_phy_write(dev, 0x0801, b43_phy_read(dev, 0x0801) | 0x0040); 479 b43_phy_set(dev, 0x0801, 0x0040);
480 b43_phy_write(dev, 0x0060, b43_phy_read(dev, 0x0060) | 0x0040); 480 b43_phy_set(dev, 0x0060, 0x0040);
481 b43_phy_write(dev, 0x0014, b43_phy_read(dev, 0x0014) | 0x0200); 481 b43_phy_set(dev, 0x0014, 0x0200);
482 } 482 }
483 b43_radio_write16(dev, 0x007A, b43_radio_read16(dev, 0x007A) | 0x0070); 483 b43_radio_write16(dev, 0x007A, b43_radio_read16(dev, 0x007A) | 0x0070);
484 b43_radio_write16(dev, 0x007A, b43_radio_read16(dev, 0x007A) | 0x0080); 484 b43_radio_write16(dev, 0x007A, b43_radio_read16(dev, 0x007A) | 0x0080);
@@ -504,27 +504,24 @@ static void b43_calc_nrssi_offset(struct b43_wldev *dev)
504 b43_radio_write16(dev, 0x007A, 504 b43_radio_write16(dev, 0x007A,
505 b43_radio_read16(dev, 0x007A) & 0x007F); 505 b43_radio_read16(dev, 0x007A) & 0x007F);
506 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ 506 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */
507 b43_phy_write(dev, 0x0814, 507 b43_phy_set(dev, 0x0814, 0x0001);
508 b43_phy_read(dev, 0x0814) | 0x0001);
509 b43_phy_write(dev, 0x0815, 508 b43_phy_write(dev, 0x0815,
510 b43_phy_read(dev, 0x0815) & 0xFFFE); 509 b43_phy_read(dev, 0x0815) & 0xFFFE);
511 } 510 }
512 b43_phy_write(dev, 0x0811, b43_phy_read(dev, 0x0811) | 0x000C); 511 b43_phy_set(dev, 0x0811, 0x000C);
513 b43_phy_write(dev, 0x0812, b43_phy_read(dev, 0x0812) | 0x000C); 512 b43_phy_set(dev, 0x0812, 0x000C);
514 b43_phy_write(dev, 0x0811, b43_phy_read(dev, 0x0811) | 0x0030); 513 b43_phy_set(dev, 0x0811, 0x0030);
515 b43_phy_write(dev, 0x0812, b43_phy_read(dev, 0x0812) | 0x0030); 514 b43_phy_set(dev, 0x0812, 0x0030);
516 b43_phy_write(dev, 0x005A, 0x0480); 515 b43_phy_write(dev, 0x005A, 0x0480);
517 b43_phy_write(dev, 0x0059, 0x0810); 516 b43_phy_write(dev, 0x0059, 0x0810);
518 b43_phy_write(dev, 0x0058, 0x000D); 517 b43_phy_write(dev, 0x0058, 0x000D);
519 if (phy->rev == 0) { 518 if (phy->rev == 0) {
520 b43_phy_write(dev, 0x0003, 0x0122); 519 b43_phy_write(dev, 0x0003, 0x0122);
521 } else { 520 } else {
522 b43_phy_write(dev, 0x000A, b43_phy_read(dev, 0x000A) 521 b43_phy_set(dev, 0x000A, 0x2000);
523 | 0x2000);
524 } 522 }
525 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ 523 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */
526 b43_phy_write(dev, 0x0814, 524 b43_phy_set(dev, 0x0814, 0x0004);
527 b43_phy_read(dev, 0x0814) | 0x0004);
528 b43_phy_write(dev, 0x0815, 525 b43_phy_write(dev, 0x0815,
529 b43_phy_read(dev, 0x0815) & 0xFFFB); 526 b43_phy_read(dev, 0x0815) & 0xFFFB);
530 } 527 }
@@ -576,7 +573,7 @@ static void b43_calc_nrssi_offset(struct b43_wldev *dev)
576 b43_radio_write16(dev, 0x0043, backup[11]); 573 b43_radio_write16(dev, 0x0043, backup[11]);
577 b43_radio_write16(dev, 0x007A, backup[10]); 574 b43_radio_write16(dev, 0x007A, backup[10]);
578 b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) | 0x1 | 0x2); 575 b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) | 0x1 | 0x2);
579 b43_phy_write(dev, 0x0429, b43_phy_read(dev, 0x0429) | 0x8000); 576 b43_phy_set(dev, 0x0429, 0x8000);
580 b43_set_original_gains(dev); 577 b43_set_original_gains(dev);
581 if (phy->rev >= 6) { 578 if (phy->rev >= 6) {
582 b43_phy_write(dev, 0x0801, backup[16]); 579 b43_phy_write(dev, 0x0801, backup[16]);
@@ -633,12 +630,8 @@ static void b43_calc_nrssi_slope(struct b43_wldev *dev)
633 case 4: 630 case 4:
634 case 6: 631 case 6:
635 case 7: 632 case 7:
636 b43_phy_write(dev, 0x0478, 633 b43_phy_set(dev, 0x0478, 0x0100);
637 b43_phy_read(dev, 0x0478) 634 b43_phy_set(dev, 0x0801, 0x0040);
638 | 0x0100);
639 b43_phy_write(dev, 0x0801,
640 b43_phy_read(dev, 0x0801)
641 | 0x0040);
642 break; 635 break;
643 case 3: 636 case 3:
644 case 5: 637 case 5:
@@ -647,10 +640,8 @@ static void b43_calc_nrssi_slope(struct b43_wldev *dev)
647 & 0xFFBF); 640 & 0xFFBF);
648 break; 641 break;
649 } 642 }
650 b43_phy_write(dev, 0x0060, b43_phy_read(dev, 0x0060) 643 b43_phy_set(dev, 0x0060, 0x0040);
651 | 0x0040); 644 b43_phy_set(dev, 0x0014, 0x0200);
652 b43_phy_write(dev, 0x0014, b43_phy_read(dev, 0x0014)
653 | 0x0200);
654 } 645 }
655 b43_radio_write16(dev, 0x007A, 646 b43_radio_write16(dev, 0x007A,
656 b43_radio_read16(dev, 0x007A) | 0x0070); 647 b43_radio_read16(dev, 0x007A) | 0x0070);
@@ -743,11 +734,9 @@ static void b43_calc_nrssi_slope(struct b43_wldev *dev)
743 b43_phy_write(dev, 0x0059, backup[5]); 734 b43_phy_write(dev, 0x0059, backup[5]);
744 b43_phy_write(dev, 0x0058, backup[6]); 735 b43_phy_write(dev, 0x0058, backup[6]);
745 b43_synth_pu_workaround(dev, phy->channel); 736 b43_synth_pu_workaround(dev, phy->channel);
746 b43_phy_write(dev, 0x0802, 737 b43_phy_set(dev, 0x0802, (0x0001 | 0x0002));
747 b43_phy_read(dev, 0x0802) | (0x0001 | 0x0002));
748 b43_set_original_gains(dev); 738 b43_set_original_gains(dev);
749 b43_phy_write(dev, B43_PHY_G_CRS, 739 b43_phy_set(dev, B43_PHY_G_CRS, 0x8000);
750 b43_phy_read(dev, B43_PHY_G_CRS) | 0x8000);
751 if (phy->rev >= 3) { 740 if (phy->rev >= 3) {
752 b43_phy_write(dev, 0x0801, backup[14]); 741 b43_phy_write(dev, 0x0801, backup[14]);
753 b43_phy_write(dev, 0x0060, backup[15]); 742 b43_phy_write(dev, 0x0060, backup[15]);
@@ -901,8 +890,7 @@ b43_radio_interference_mitigation_enable(struct b43_wldev *dev, int mode)
901 switch (mode) { 890 switch (mode) {
902 case B43_INTERFMODE_NONWLAN: 891 case B43_INTERFMODE_NONWLAN:
903 if (phy->rev != 1) { 892 if (phy->rev != 1) {
904 b43_phy_write(dev, 0x042B, 893 b43_phy_set(dev, 0x042B, 0x0800);
905 b43_phy_read(dev, 0x042B) | 0x0800);
906 b43_phy_write(dev, B43_PHY_G_CRS, 894 b43_phy_write(dev, B43_PHY_G_CRS,
907 b43_phy_read(dev, 895 b43_phy_read(dev,
908 B43_PHY_G_CRS) & ~0x4000); 896 B43_PHY_G_CRS) & ~0x4000);
@@ -924,10 +912,8 @@ b43_radio_interference_mitigation_enable(struct b43_wldev *dev, int mode)
924 phy_stacksave(0x0406); 912 phy_stacksave(0x0406);
925 b43_phy_write(dev, 0x0406, 0x7E28); 913 b43_phy_write(dev, 0x0406, 0x7E28);
926 914
927 b43_phy_write(dev, 0x042B, b43_phy_read(dev, 0x042B) | 0x0800); 915 b43_phy_set(dev, 0x042B, 0x0800);
928 b43_phy_write(dev, B43_PHY_RADIO_BITFIELD, 916 b43_phy_set(dev, B43_PHY_RADIO_BITFIELD, 0x1000);
929 b43_phy_read(dev,
930 B43_PHY_RADIO_BITFIELD) | 0x1000);
931 917
932 phy_stacksave(0x04A0); 918 phy_stacksave(0x04A0);
933 b43_phy_write(dev, 0x04A0, 919 b43_phy_write(dev, 0x04A0,
@@ -1064,15 +1050,13 @@ b43_radio_interference_mitigation_enable(struct b43_wldev *dev, int mode)
1064 b43_phy_write(dev, 0x0417, (b43_phy_read(dev, 0x0417) 1050 b43_phy_write(dev, 0x0417, (b43_phy_read(dev, 0x0417)
1065 & 0xFE00) | 0x016D); 1051 & 0xFE00) | 0x016D);
1066 } else { 1052 } else {
1067 b43_phy_write(dev, 0x048A, b43_phy_read(dev, 0x048A) 1053 b43_phy_set(dev, 0x048A, 0x1000);
1068 | 0x1000);
1069 b43_phy_write(dev, 0x048A, (b43_phy_read(dev, 0x048A) 1054 b43_phy_write(dev, 0x048A, (b43_phy_read(dev, 0x048A)
1070 & 0x9FFF) | 0x2000); 1055 & 0x9FFF) | 0x2000);
1071 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_ACIW); 1056 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_ACIW);
1072 } 1057 }
1073 if (phy->rev >= 2) { 1058 if (phy->rev >= 2) {
1074 b43_phy_write(dev, 0x042B, b43_phy_read(dev, 0x042B) 1059 b43_phy_set(dev, 0x042B, 0x0800);
1075 | 0x0800);
1076 } 1060 }
1077 b43_phy_write(dev, 0x048C, (b43_phy_read(dev, 0x048C) 1061 b43_phy_write(dev, 0x048C, (b43_phy_read(dev, 0x048C)
1078 & 0xF0FF) | 0x0200); 1062 & 0xF0FF) | 0x0200);
@@ -1106,9 +1090,7 @@ b43_radio_interference_mitigation_disable(struct b43_wldev *dev, int mode)
1106 if (phy->rev != 1) { 1090 if (phy->rev != 1) {
1107 b43_phy_write(dev, 0x042B, 1091 b43_phy_write(dev, 0x042B,
1108 b43_phy_read(dev, 0x042B) & ~0x0800); 1092 b43_phy_read(dev, 0x042B) & ~0x0800);
1109 b43_phy_write(dev, B43_PHY_G_CRS, 1093 b43_phy_set(dev, B43_PHY_G_CRS, 0x4000);
1110 b43_phy_read(dev,
1111 B43_PHY_G_CRS) | 0x4000);
1112 break; 1094 break;
1113 } 1095 }
1114 radio_stackrestore(0x0078); 1096 radio_stackrestore(0x0078);
@@ -1120,8 +1102,7 @@ b43_radio_interference_mitigation_disable(struct b43_wldev *dev, int mode)
1120 b43_phy_read(dev, B43_PHY_RADIO_BITFIELD) 1102 b43_phy_read(dev, B43_PHY_RADIO_BITFIELD)
1121 & ~(1 << 11)); 1103 & ~(1 << 11));
1122 } 1104 }
1123 b43_phy_write(dev, B43_PHY_G_CRS, 1105 b43_phy_set(dev, B43_PHY_G_CRS, 0x4000);
1124 b43_phy_read(dev, B43_PHY_G_CRS) | 0x4000);
1125 phy_stackrestore(0x04A0); 1106 phy_stackrestore(0x04A0);
1126 phy_stackrestore(0x04A1); 1107 phy_stackrestore(0x04A1);
1127 phy_stackrestore(0x04A2); 1108 phy_stackrestore(0x04A2);
@@ -1389,9 +1370,7 @@ static u16 b43_radio_init2050(struct b43_wldev *dev)
1389 sav.phy_crs0 = b43_phy_read(dev, B43_PHY_CRS0); 1370 sav.phy_crs0 = b43_phy_read(dev, B43_PHY_CRS0);
1390 sav.phy_classctl = b43_phy_read(dev, B43_PHY_CLASSCTL); 1371 sav.phy_classctl = b43_phy_read(dev, B43_PHY_CLASSCTL);
1391 1372
1392 b43_phy_write(dev, B43_PHY_ANALOGOVER, 1373 b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0003);
1393 b43_phy_read(dev, B43_PHY_ANALOGOVER)
1394 | 0x0003);
1395 b43_phy_write(dev, B43_PHY_ANALOGOVERVAL, 1374 b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
1396 b43_phy_read(dev, B43_PHY_ANALOGOVERVAL) 1375 b43_phy_read(dev, B43_PHY_ANALOGOVERVAL)
1397 & 0xFFFC); 1376 & 0xFFFC);
@@ -1637,8 +1616,8 @@ static void b43_phy_initb5(struct b43_wldev *dev)
1637 } 1616 }
1638 b43_write16(dev, B43_MMIO_PHY_RADIO, 0x0000); 1617 b43_write16(dev, B43_MMIO_PHY_RADIO, 0x0000);
1639 1618
1640 b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) | 0x0100); 1619 b43_phy_set(dev, 0x0802, 0x0100);
1641 b43_phy_write(dev, 0x042B, b43_phy_read(dev, 0x042B) | 0x2000); 1620 b43_phy_set(dev, 0x042B, 0x2000);
1642 1621
1643 b43_phy_write(dev, 0x001C, 0x186A); 1622 b43_phy_write(dev, 0x001C, 0x186A);
1644 1623
@@ -1651,9 +1630,7 @@ static void b43_phy_initb5(struct b43_wldev *dev)
1651 } 1630 }
1652 1631
1653 if (dev->bad_frames_preempt) { 1632 if (dev->bad_frames_preempt) {
1654 b43_phy_write(dev, B43_PHY_RADIO_BITFIELD, 1633 b43_phy_set(dev, B43_PHY_RADIO_BITFIELD, (1 << 11));
1655 b43_phy_read(dev,
1656 B43_PHY_RADIO_BITFIELD) | (1 << 11));
1657 } 1634 }
1658 1635
1659 if (phy->analog == 1) { 1636 if (phy->analog == 1) {
@@ -1775,8 +1752,8 @@ static void b43_phy_initb6(struct b43_wldev *dev)
1775 b43_radio_read16(dev, 0x007A) | 0x0020); 1752 b43_radio_read16(dev, 0x007A) | 0x0020);
1776 b43_radio_write16(dev, 0x0051, 1753 b43_radio_write16(dev, 0x0051,
1777 b43_radio_read16(dev, 0x0051) | 0x0004); 1754 b43_radio_read16(dev, 0x0051) | 0x0004);
1778 b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) | 0x0100); 1755 b43_phy_set(dev, 0x0802, 0x0100);
1779 b43_phy_write(dev, 0x042B, b43_phy_read(dev, 0x042B) | 0x2000); 1756 b43_phy_set(dev, 0x042B, 0x2000);
1780 b43_phy_write(dev, 0x5B, 0); 1757 b43_phy_write(dev, 0x5B, 0);
1781 b43_phy_write(dev, 0x5C, 0); 1758 b43_phy_write(dev, 0x5C, 0);
1782 } 1759 }
@@ -1870,34 +1847,26 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
1870 1847
1871 b43_phy_write(dev, B43_PHY_CRS0, 1848 b43_phy_write(dev, B43_PHY_CRS0,
1872 b43_phy_read(dev, B43_PHY_CRS0) & 0x3FFF); 1849 b43_phy_read(dev, B43_PHY_CRS0) & 0x3FFF);
1873 b43_phy_write(dev, B43_PHY_CCKBBANDCFG, 1850 b43_phy_set(dev, B43_PHY_CCKBBANDCFG, 0x8000);
1874 b43_phy_read(dev, B43_PHY_CCKBBANDCFG) | 0x8000); 1851 b43_phy_set(dev, B43_PHY_RFOVER, 0x0002);
1875 b43_phy_write(dev, B43_PHY_RFOVER,
1876 b43_phy_read(dev, B43_PHY_RFOVER) | 0x0002);
1877 b43_phy_write(dev, B43_PHY_RFOVERVAL, 1852 b43_phy_write(dev, B43_PHY_RFOVERVAL,
1878 b43_phy_read(dev, B43_PHY_RFOVERVAL) & 0xFFFD); 1853 b43_phy_read(dev, B43_PHY_RFOVERVAL) & 0xFFFD);
1879 b43_phy_write(dev, B43_PHY_RFOVER, 1854 b43_phy_set(dev, B43_PHY_RFOVER, 0x0001);
1880 b43_phy_read(dev, B43_PHY_RFOVER) | 0x0001);
1881 b43_phy_write(dev, B43_PHY_RFOVERVAL, 1855 b43_phy_write(dev, B43_PHY_RFOVERVAL,
1882 b43_phy_read(dev, B43_PHY_RFOVERVAL) & 0xFFFE); 1856 b43_phy_read(dev, B43_PHY_RFOVERVAL) & 0xFFFE);
1883 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ 1857 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */
1884 b43_phy_write(dev, B43_PHY_ANALOGOVER, 1858 b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0001);
1885 b43_phy_read(dev, B43_PHY_ANALOGOVER) | 0x0001);
1886 b43_phy_write(dev, B43_PHY_ANALOGOVERVAL, 1859 b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
1887 b43_phy_read(dev, 1860 b43_phy_read(dev,
1888 B43_PHY_ANALOGOVERVAL) & 0xFFFE); 1861 B43_PHY_ANALOGOVERVAL) & 0xFFFE);
1889 b43_phy_write(dev, B43_PHY_ANALOGOVER, 1862 b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0002);
1890 b43_phy_read(dev, B43_PHY_ANALOGOVER) | 0x0002);
1891 b43_phy_write(dev, B43_PHY_ANALOGOVERVAL, 1863 b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
1892 b43_phy_read(dev, 1864 b43_phy_read(dev,
1893 B43_PHY_ANALOGOVERVAL) & 0xFFFD); 1865 B43_PHY_ANALOGOVERVAL) & 0xFFFD);
1894 } 1866 }
1895 b43_phy_write(dev, B43_PHY_RFOVER, 1867 b43_phy_set(dev, B43_PHY_RFOVER, 0x000C);
1896 b43_phy_read(dev, B43_PHY_RFOVER) | 0x000C); 1868 b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x000C);
1897 b43_phy_write(dev, B43_PHY_RFOVERVAL, 1869 b43_phy_set(dev, B43_PHY_RFOVER, 0x0030);
1898 b43_phy_read(dev, B43_PHY_RFOVERVAL) | 0x000C);
1899 b43_phy_write(dev, B43_PHY_RFOVER,
1900 b43_phy_read(dev, B43_PHY_RFOVER) | 0x0030);
1901 b43_phy_write(dev, B43_PHY_RFOVERVAL, 1870 b43_phy_write(dev, B43_PHY_RFOVERVAL,
1902 (b43_phy_read(dev, B43_PHY_RFOVERVAL) 1871 (b43_phy_read(dev, B43_PHY_RFOVERVAL)
1903 & 0xFFCF) | 0x10); 1872 & 0xFFCF) | 0x10);
@@ -1906,11 +1875,9 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
1906 b43_phy_write(dev, B43_PHY_CCK(0x59), 0xC810); 1875 b43_phy_write(dev, B43_PHY_CCK(0x59), 0xC810);
1907 b43_phy_write(dev, B43_PHY_CCK(0x58), 0x000D); 1876 b43_phy_write(dev, B43_PHY_CCK(0x58), 0x000D);
1908 1877
1909 b43_phy_write(dev, B43_PHY_CCK(0x0A), 1878 b43_phy_set(dev, B43_PHY_CCK(0x0A), 0x2000);
1910 b43_phy_read(dev, B43_PHY_CCK(0x0A)) | 0x2000);
1911 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */ 1879 if (phy->rev != 1) { /* Not in specs, but needed to prevent PPC machine check */
1912 b43_phy_write(dev, B43_PHY_ANALOGOVER, 1880 b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0004);
1913 b43_phy_read(dev, B43_PHY_ANALOGOVER) | 0x0004);
1914 b43_phy_write(dev, B43_PHY_ANALOGOVERVAL, 1881 b43_phy_write(dev, B43_PHY_ANALOGOVERVAL,
1915 b43_phy_read(dev, 1882 b43_phy_read(dev,
1916 B43_PHY_ANALOGOVERVAL) & 0xFFFB); 1883 B43_PHY_ANALOGOVERVAL) & 0xFFFB);
@@ -1941,19 +1908,14 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
1941 (b43_phy_read(dev, B43_PHY_CCK(0x2B)) 1908 (b43_phy_read(dev, B43_PHY_CCK(0x2B))
1942 & 0xC0FF) | 0x800); 1909 & 0xC0FF) | 0x800);
1943 1910
1944 b43_phy_write(dev, B43_PHY_RFOVER, 1911 b43_phy_set(dev, B43_PHY_RFOVER, 0x0100);
1945 b43_phy_read(dev, B43_PHY_RFOVER) | 0x0100);
1946 b43_phy_write(dev, B43_PHY_RFOVERVAL, 1912 b43_phy_write(dev, B43_PHY_RFOVERVAL,
1947 b43_phy_read(dev, B43_PHY_RFOVERVAL) & 0xCFFF); 1913 b43_phy_read(dev, B43_PHY_RFOVERVAL) & 0xCFFF);
1948 1914
1949 if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA) { 1915 if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA) {
1950 if (phy->rev >= 7) { 1916 if (phy->rev >= 7) {
1951 b43_phy_write(dev, B43_PHY_RFOVER, 1917 b43_phy_set(dev, B43_PHY_RFOVER, 0x0800);
1952 b43_phy_read(dev, B43_PHY_RFOVER) 1918 b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x8000);
1953 | 0x0800);
1954 b43_phy_write(dev, B43_PHY_RFOVERVAL,
1955 b43_phy_read(dev, B43_PHY_RFOVERVAL)
1956 | 0x8000);
1957 } 1919 }
1958 } 1920 }
1959 b43_radio_write16(dev, 0x7A, b43_radio_read16(dev, 0x7A) 1921 b43_radio_write16(dev, 0x7A, b43_radio_read16(dev, 0x7A)
@@ -1970,9 +1932,7 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
1970 b43_phy_write(dev, B43_PHY_PGACTL, 1932 b43_phy_write(dev, B43_PHY_PGACTL,
1971 (b43_phy_read(dev, B43_PHY_PGACTL) 1933 (b43_phy_read(dev, B43_PHY_PGACTL)
1972 & 0x0FFF) | 0xA000); 1934 & 0x0FFF) | 0xA000);
1973 b43_phy_write(dev, B43_PHY_PGACTL, 1935 b43_phy_set(dev, B43_PHY_PGACTL, 0xF000);
1974 b43_phy_read(dev, B43_PHY_PGACTL)
1975 | 0xF000);
1976 udelay(20); 1936 udelay(20);
1977 if (b43_phy_read(dev, B43_PHY_LO_LEAKAGE) >= 0xDFC) 1937 if (b43_phy_read(dev, B43_PHY_LO_LEAKAGE) >= 0xDFC)
1978 goto exit_loop1; 1938 goto exit_loop1;
@@ -1982,9 +1942,7 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
1982 loop1_outer_done = i; 1942 loop1_outer_done = i;
1983 loop1_inner_done = j; 1943 loop1_inner_done = j;
1984 if (j >= 8) { 1944 if (j >= 8) {
1985 b43_phy_write(dev, B43_PHY_RFOVERVAL, 1945 b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x30);
1986 b43_phy_read(dev, B43_PHY_RFOVERVAL)
1987 | 0x30);
1988 trsw_rx = 0x1B; 1946 trsw_rx = 0x1B;
1989 for (j = j - 8; j < 16; j++) { 1947 for (j = j - 8; j < 16; j++) {
1990 b43_phy_write(dev, B43_PHY_RFOVERVAL, 1948 b43_phy_write(dev, B43_PHY_RFOVERVAL,
@@ -1993,9 +1951,7 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
1993 b43_phy_write(dev, B43_PHY_PGACTL, 1951 b43_phy_write(dev, B43_PHY_PGACTL,
1994 (b43_phy_read(dev, B43_PHY_PGACTL) 1952 (b43_phy_read(dev, B43_PHY_PGACTL)
1995 & 0x0FFF) | 0xA000); 1953 & 0x0FFF) | 0xA000);
1996 b43_phy_write(dev, B43_PHY_PGACTL, 1954 b43_phy_set(dev, B43_PHY_PGACTL, 0xF000);
1997 b43_phy_read(dev, B43_PHY_PGACTL)
1998 | 0xF000);
1999 udelay(20); 1955 udelay(20);
2000 trsw_rx -= 3; 1956 trsw_rx -= 3;
2001 if (b43_phy_read(dev, B43_PHY_LO_LEAKAGE) >= 0xDFC) 1957 if (b43_phy_read(dev, B43_PHY_LO_LEAKAGE) >= 0xDFC)
@@ -2048,23 +2004,19 @@ static void b43_hardware_pctl_early_init(struct b43_wldev *dev)
2048 2004
2049 b43_phy_write(dev, 0x0036, b43_phy_read(dev, 0x0036) & 0xFEFF); 2005 b43_phy_write(dev, 0x0036, b43_phy_read(dev, 0x0036) & 0xFEFF);
2050 b43_phy_write(dev, 0x002F, 0x0202); 2006 b43_phy_write(dev, 0x002F, 0x0202);
2051 b43_phy_write(dev, 0x047C, b43_phy_read(dev, 0x047C) | 0x0002); 2007 b43_phy_set(dev, 0x047C, 0x0002);
2052 b43_phy_write(dev, 0x047A, b43_phy_read(dev, 0x047A) | 0xF000); 2008 b43_phy_set(dev, 0x047A, 0xF000);
2053 if (phy->radio_ver == 0x2050 && phy->radio_rev == 8) { 2009 if (phy->radio_ver == 0x2050 && phy->radio_rev == 8) {
2054 b43_phy_write(dev, 0x047A, (b43_phy_read(dev, 0x047A) 2010 b43_phy_write(dev, 0x047A, (b43_phy_read(dev, 0x047A)
2055 & 0xFF0F) | 0x0010); 2011 & 0xFF0F) | 0x0010);
2056 b43_phy_write(dev, 0x005D, b43_phy_read(dev, 0x005D) 2012 b43_phy_set(dev, 0x005D, 0x8000);
2057 | 0x8000);
2058 b43_phy_write(dev, 0x004E, (b43_phy_read(dev, 0x004E) 2013 b43_phy_write(dev, 0x004E, (b43_phy_read(dev, 0x004E)
2059 & 0xFFC0) | 0x0010); 2014 & 0xFFC0) | 0x0010);
2060 b43_phy_write(dev, 0x002E, 0xC07F); 2015 b43_phy_write(dev, 0x002E, 0xC07F);
2061 b43_phy_write(dev, 0x0036, b43_phy_read(dev, 0x0036) 2016 b43_phy_set(dev, 0x0036, 0x0400);
2062 | 0x0400);
2063 } else { 2017 } else {
2064 b43_phy_write(dev, 0x0036, b43_phy_read(dev, 0x0036) 2018 b43_phy_set(dev, 0x0036, 0x0200);
2065 | 0x0200); 2019 b43_phy_set(dev, 0x0036, 0x0400);
2066 b43_phy_write(dev, 0x0036, b43_phy_read(dev, 0x0036)
2067 | 0x0400);
2068 b43_phy_write(dev, 0x005D, b43_phy_read(dev, 0x005D) 2020 b43_phy_write(dev, 0x005D, b43_phy_read(dev, 0x005D)
2069 & 0x7FFF); 2021 & 0x7FFF);
2070 b43_phy_write(dev, 0x004F, b43_phy_read(dev, 0x004F) 2022 b43_phy_write(dev, 0x004F, b43_phy_read(dev, 0x004F)
@@ -2099,8 +2051,7 @@ static void b43_hardware_pctl_init_gphy(struct b43_wldev *dev)
2099 b43_phy_write(dev, 0x0014, 0x0000); 2051 b43_phy_write(dev, 0x0014, 0x0000);
2100 2052
2101 B43_WARN_ON(phy->rev < 6); 2053 B43_WARN_ON(phy->rev < 6);
2102 b43_phy_write(dev, 0x0478, b43_phy_read(dev, 0x0478) 2054 b43_phy_set(dev, 0x0478, 0x0800);
2103 | 0x0800);
2104 b43_phy_write(dev, 0x0478, b43_phy_read(dev, 0x0478) 2055 b43_phy_write(dev, 0x0478, b43_phy_read(dev, 0x0478)
2105 & 0xFEFF); 2056 & 0xFEFF);
2106 b43_phy_write(dev, 0x0801, b43_phy_read(dev, 0x0801) 2057 b43_phy_write(dev, 0x0801, b43_phy_read(dev, 0x0801)
@@ -2228,12 +2179,8 @@ static void b43_phy_initg(struct b43_wldev *dev)
2228 if ((phy->rev <= 2 && phy->gmode) || phy->rev >= 2) 2179 if ((phy->rev <= 2 && phy->gmode) || phy->rev >= 2)
2229 b43_phy_write(dev, B43_PHY_OFDM(0x7E), 0x78); 2180 b43_phy_write(dev, B43_PHY_OFDM(0x7E), 0x78);
2230 if (phy->radio_rev == 8) { 2181 if (phy->radio_rev == 8) {
2231 b43_phy_write(dev, B43_PHY_EXTG(0x01), 2182 b43_phy_set(dev, B43_PHY_EXTG(0x01), 0x80);
2232 b43_phy_read(dev, B43_PHY_EXTG(0x01)) 2183 b43_phy_set(dev, B43_PHY_OFDM(0x3E), 0x4);
2233 | 0x80);
2234 b43_phy_write(dev, B43_PHY_OFDM(0x3E),
2235 b43_phy_read(dev, B43_PHY_OFDM(0x3E))
2236 | 0x4);
2237 } 2184 }
2238 if (has_loopback_gain(phy)) 2185 if (has_loopback_gain(phy))
2239 b43_calc_loopback_gain(dev); 2186 b43_calc_loopback_gain(dev);
@@ -2520,8 +2467,7 @@ static u8 b43_gphy_aci_scan(struct b43_wldev *dev)
2520 b43_phy_write(dev, 0x0802, 2467 b43_phy_write(dev, 0x0802,
2521 (b43_phy_read(dev, 0x0802) & 0xFFFC) | 0x0003); 2468 (b43_phy_read(dev, 0x0802) & 0xFFFC) | 0x0003);
2522 b43_phy_write(dev, 0x0403, b43_phy_read(dev, 0x0403) & 0xFFF8); 2469 b43_phy_write(dev, 0x0403, b43_phy_read(dev, 0x0403) & 0xFFF8);
2523 b43_phy_write(dev, B43_PHY_G_CRS, 2470 b43_phy_set(dev, B43_PHY_G_CRS, 0x8000);
2524 b43_phy_read(dev, B43_PHY_G_CRS) | 0x8000);
2525 b43_set_original_gains(dev); 2471 b43_set_original_gains(dev);
2526 for (i = 0; i < 13; i++) { 2472 for (i = 0; i < 13; i++) {
2527 if (!ret[i]) 2473 if (!ret[i])
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 14:49:01 -0500