b43: complete PHY reset

Use separated function for taking PHY out of reset and implement reset
for BCMA.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 58 insertions, 7 deletions

diff --git a/drivers/net/wireless/b43/phy_common.c b/drivers/net/wireless/b43/phy_common.c
index 85773a443499..26e390f9e291 100644
--- a/drivers/net/wireless/b43/phy_common.c
+++ b/drivers/net/wireless/b43/phy_common.c
@@ -314,15 +314,22 @@ void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set)
 
 void b43_phy_put_into_reset(struct b43_wldev *dev)
 {
-#ifdef CONFIG_B43_SSB
         u32 tmp;
-#endif
 
         switch (dev->dev->bus_type) {
 #ifdef CONFIG_B43_BCMA
         case B43_BUS_BCMA:
-                b43err(dev->wl,
-                       "Putting PHY into reset not supported on BCMA\n");
+                tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
+                tmp &= ~B43_BCMA_IOCTL_GMODE;
+                tmp |= B43_BCMA_IOCTL_PHY_RESET;
+                tmp |= BCMA_IOCTL_FGC;
+                bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
+                udelay(1);
+
+                tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
+                tmp &= ~BCMA_IOCTL_FGC;
+                bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
+                udelay(1);
                 break;
 #endif
 #ifdef CONFIG_B43_SSB
@@ -332,14 +339,58 @@ void b43_phy_put_into_reset(struct b43_wldev *dev)
                 tmp |= B43_TMSLOW_PHYRESET;
                 tmp |= SSB_TMSLOW_FGC;
                 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
-                msleep(1);
+                usleep_range(1000, 2000);
 
                 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
                 tmp &= ~SSB_TMSLOW_FGC;
-                tmp |= B43_TMSLOW_PHYRESET;
                 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
-                msleep(1);
+                usleep_range(1000, 2000);
+
+                break;
+#endif
+        }
+}
 
+void b43_phy_take_out_of_reset(struct b43_wldev *dev)
+{
+        u32 tmp;
+
+        switch (dev->dev->bus_type) {
+#ifdef CONFIG_B43_BCMA
+        case B43_BUS_BCMA:
+                /* Unset reset bit (with forcing clock) */
+                tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
+                tmp &= ~B43_BCMA_IOCTL_PHY_RESET;
+                tmp &= ~B43_BCMA_IOCTL_PHY_CLKEN;
+                tmp |= BCMA_IOCTL_FGC;
+                bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
+                udelay(1);
+
+                /* Do not force clock anymore */
+                tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
+                tmp &= ~BCMA_IOCTL_FGC;
+                tmp |= B43_BCMA_IOCTL_PHY_CLKEN;
+                bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
+                udelay(1);
+                break;
+#endif
+#ifdef CONFIG_B43_SSB
+        case B43_BUS_SSB:
+                /* Unset reset bit (with forcing clock) */
+                tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
+                tmp &= ~B43_TMSLOW_PHYRESET;
+                tmp &= ~B43_TMSLOW_PHYCLKEN;
+                tmp |= SSB_TMSLOW_FGC;
+                ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
+                ssb_read32(dev->dev->sdev, SSB_TMSLOW); /* flush */
+                usleep_range(1000, 2000);
+
+                tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
+                tmp &= ~SSB_TMSLOW_FGC;
+                tmp |= B43_TMSLOW_PHYCLKEN;
+                ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
+                ssb_read32(dev->dev->sdev, SSB_TMSLOW); /* flush */
+                usleep_range(1000, 2000);
                 break;
 #endif
         }