diff options
author | Stefano Brivio <stefano.brivio@polimi.it> | 2007-11-06 16:49:05 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-01-28 18:04:31 -0500 |
commit | 61bca6eb85c863603d6054530e2f65c3b9aba85b (patch) | |
tree | 9b67e165af38ae504d64d3b03882fb4ce3efb016 /drivers/net/wireless/b43/phy.h | |
parent | db9683fb19a0f0da1cb4c296ffe1a8db03333cbc (diff) |
b43: rewrite A PHY initialization
Rewrite and sync A PHY initialization with specs, thus allowing for further
work to be done on 802.11a support. Note that A PHY initialization involves
G PHYs as well.
Signed-off-by: Stefano Brivio <stefano.brivio@polimi.it>
Acked-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43/phy.h')
-rw-r--r-- | drivers/net/wireless/b43/phy.h | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/drivers/net/wireless/b43/phy.h b/drivers/net/wireless/b43/phy.h index c64d74504fc0..1c7eac25a302 100644 --- a/drivers/net/wireless/b43/phy.h +++ b/drivers/net/wireless/b43/phy.h | |||
@@ -27,8 +27,11 @@ struct b43_phy; | |||
27 | #define B43_PHY_PWRDOWN B43_PHY_OFDM(0x03) /* Powerdown */ | 27 | #define B43_PHY_PWRDOWN B43_PHY_OFDM(0x03) /* Powerdown */ |
28 | #define B43_PHY_CRSTHRES1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 */ | 28 | #define B43_PHY_CRSTHRES1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 */ |
29 | #define B43_PHY_LNAHPFCTL B43_PHY_OFDM(0x1C) /* LNA/HPF control */ | 29 | #define B43_PHY_LNAHPFCTL B43_PHY_OFDM(0x1C) /* LNA/HPF control */ |
30 | #define B43_PHY_LPFGAINCTL B43_PHY_OFDM(0x20) /* LPF Gain control */ | ||
30 | #define B43_PHY_ADIVRELATED B43_PHY_OFDM(0x27) /* FIXME rename */ | 31 | #define B43_PHY_ADIVRELATED B43_PHY_OFDM(0x27) /* FIXME rename */ |
31 | #define B43_PHY_CRS0 B43_PHY_OFDM(0x29) | 32 | #define B43_PHY_CRS0 B43_PHY_OFDM(0x29) |
33 | #define B43_PHY_CRS0_EN 0x4000 | ||
34 | #define B43_PHY_PEAK_COUNT B43_PHY_OFDM(0x30) | ||
32 | #define B43_PHY_ANTDWELL B43_PHY_OFDM(0x2B) /* Antenna dwell */ | 35 | #define B43_PHY_ANTDWELL B43_PHY_OFDM(0x2B) /* Antenna dwell */ |
33 | #define B43_PHY_ANTDWELL_AUTODIV1 0x0100 /* Automatic RX diversity start antenna */ | 36 | #define B43_PHY_ANTDWELL_AUTODIV1 0x0100 /* Automatic RX diversity start antenna */ |
34 | #define B43_PHY_ENCORE B43_PHY_OFDM(0x49) /* "Encore" (RangeMax / BroadRange) */ | 37 | #define B43_PHY_ENCORE B43_PHY_OFDM(0x49) /* "Encore" (RangeMax / BroadRange) */ |
@@ -37,6 +40,7 @@ struct b43_phy; | |||
37 | #define B43_PHY_OFDM61 B43_PHY_OFDM(0x61) /* FIXME rename */ | 40 | #define B43_PHY_OFDM61 B43_PHY_OFDM(0x61) /* FIXME rename */ |
38 | #define B43_PHY_OFDM61_10 0x0010 /* FIXME rename */ | 41 | #define B43_PHY_OFDM61_10 0x0010 /* FIXME rename */ |
39 | #define B43_PHY_IQBAL B43_PHY_OFDM(0x69) /* I/Q balance */ | 42 | #define B43_PHY_IQBAL B43_PHY_OFDM(0x69) /* I/Q balance */ |
43 | #define B43_PHY_BBTXDC_BIAS B43_PHY_OFDM(0x6B) /* Baseband TX DC bias */ | ||
40 | #define B43_PHY_OTABLECTL B43_PHY_OFDM(0x72) /* OFDM table control (see below) */ | 44 | #define B43_PHY_OTABLECTL B43_PHY_OFDM(0x72) /* OFDM table control (see below) */ |
41 | #define B43_PHY_OTABLEOFF 0x03FF /* OFDM table offset (see below) */ | 45 | #define B43_PHY_OTABLEOFF 0x03FF /* OFDM table offset (see below) */ |
42 | #define B43_PHY_OTABLENR 0xFC00 /* OFDM table number (see below) */ | 46 | #define B43_PHY_OTABLENR 0xFC00 /* OFDM table number (see below) */ |
@@ -44,6 +48,9 @@ struct b43_phy; | |||
44 | #define B43_PHY_OTABLEI B43_PHY_OFDM(0x73) /* OFDM table data I */ | 48 | #define B43_PHY_OTABLEI B43_PHY_OFDM(0x73) /* OFDM table data I */ |
45 | #define B43_PHY_OTABLEQ B43_PHY_OFDM(0x74) /* OFDM table data Q */ | 49 | #define B43_PHY_OTABLEQ B43_PHY_OFDM(0x74) /* OFDM table data Q */ |
46 | #define B43_PHY_HPWR_TSSICTL B43_PHY_OFDM(0x78) /* Hardware power TSSI control */ | 50 | #define B43_PHY_HPWR_TSSICTL B43_PHY_OFDM(0x78) /* Hardware power TSSI control */ |
51 | #define B43_PHY_ADCCTL B43_PHY_OFDM(0x7A) /* ADC control */ | ||
52 | #define B43_PHY_IDLE_TSSI B43_PHY_OFDM(0x7B) | ||
53 | #define B43_PHY_A_TEMP_SENSE B43_PHY_OFDM(0x7C) /* A PHY temperature sense */ | ||
47 | #define B43_PHY_NRSSITHRES B43_PHY_OFDM(0x8A) /* NRSSI threshold */ | 54 | #define B43_PHY_NRSSITHRES B43_PHY_OFDM(0x8A) /* NRSSI threshold */ |
48 | #define B43_PHY_ANTWRSETT B43_PHY_OFDM(0x8C) /* Antenna WR settle */ | 55 | #define B43_PHY_ANTWRSETT B43_PHY_OFDM(0x8C) /* Antenna WR settle */ |
49 | #define B43_PHY_ANTWRSETT_ARXDIV 0x2000 /* Automatic RX diversity enabled */ | 56 | #define B43_PHY_ANTWRSETT_ARXDIV 0x2000 /* Automatic RX diversity enabled */ |
@@ -54,6 +61,8 @@ struct b43_phy; | |||
54 | #define B43_PHY_N1N2GAIN B43_PHY_OFDM(0xA2) | 61 | #define B43_PHY_N1N2GAIN B43_PHY_OFDM(0xA2) |
55 | #define B43_PHY_CLIPTHRES B43_PHY_OFDM(0xA3) | 62 | #define B43_PHY_CLIPTHRES B43_PHY_OFDM(0xA3) |
56 | #define B43_PHY_CLIPN1P2THRES B43_PHY_OFDM(0xA4) | 63 | #define B43_PHY_CLIPN1P2THRES B43_PHY_OFDM(0xA4) |
64 | #define B43_PHY_CCKSHIFTBITS_WA B43_PHY_OFDM(0xA5) /* CCK shiftbits workaround, FIXME rename */ | ||
65 | #define B43_PHY_CCKSHIFTBITS B43_PHY_OFDM(0xA7) /* FIXME rename */ | ||
57 | #define B43_PHY_DIVSRCHIDX B43_PHY_OFDM(0xA8) /* Divider search gain/index */ | 66 | #define B43_PHY_DIVSRCHIDX B43_PHY_OFDM(0xA8) /* Divider search gain/index */ |
58 | #define B43_PHY_CLIPP2THRES B43_PHY_OFDM(0xA9) | 67 | #define B43_PHY_CLIPP2THRES B43_PHY_OFDM(0xA9) |
59 | #define B43_PHY_CLIPP3THRES B43_PHY_OFDM(0xAA) | 68 | #define B43_PHY_CLIPP3THRES B43_PHY_OFDM(0xAA) |
@@ -125,13 +134,14 @@ struct b43_phy; | |||
125 | #define B43_OFDMTAB_DC B43_OFDMTAB(0x0E, 7) | 134 | #define B43_OFDMTAB_DC B43_OFDMTAB(0x0E, 7) |
126 | #define B43_OFDMTAB_PWRDYN2 B43_OFDMTAB(0x0E, 12) | 135 | #define B43_OFDMTAB_PWRDYN2 B43_OFDMTAB(0x0E, 12) |
127 | #define B43_OFDMTAB_LNAGAIN B43_OFDMTAB(0x0E, 13) | 136 | #define B43_OFDMTAB_LNAGAIN B43_OFDMTAB(0x0E, 13) |
128 | //TODO | 137 | #define B43_OFDMTAB_UNKNOWN_0F B43_OFDMTAB(0x0F, 0) //TODO rename |
138 | #define B43_OFDMTAB_UNKNOWN_APHY B43_OFDMTAB(0x0F, 7) //TODO rename | ||
129 | #define B43_OFDMTAB_LPFGAIN B43_OFDMTAB(0x0F, 12) | 139 | #define B43_OFDMTAB_LPFGAIN B43_OFDMTAB(0x0F, 12) |
130 | #define B43_OFDMTAB_RSSI B43_OFDMTAB(0x10, 0) | 140 | #define B43_OFDMTAB_RSSI B43_OFDMTAB(0x10, 0) |
131 | //TODO | 141 | #define B43_OFDMTAB_UNKNOWN_11 B43_OFDMTAB(0x11, 4) //TODO rename |
132 | #define B43_OFDMTAB_AGC1_R1 B43_OFDMTAB(0x13, 0) | 142 | #define B43_OFDMTAB_AGC1_R1 B43_OFDMTAB(0x13, 0) |
133 | #define B43_OFDMTAB_GAINX_R1 B43_OFDMTAB(0x14, 0) //TODO rename | 143 | #define B43_OFDMTAB_GAINX_R1 B43_OFDMTAB(0x14, 0) //TODO remove! |
134 | #define B43_OFDMTAB_MINSIGSQ B43_OFDMTAB(0x14, 1) | 144 | #define B43_OFDMTAB_MINSIGSQ B43_OFDMTAB(0x14, 0) |
135 | #define B43_OFDMTAB_AGC3_R1 B43_OFDMTAB(0x15, 0) | 145 | #define B43_OFDMTAB_AGC3_R1 B43_OFDMTAB(0x15, 0) |
136 | #define B43_OFDMTAB_WRSSI_R1 B43_OFDMTAB(0x15, 4) | 146 | #define B43_OFDMTAB_WRSSI_R1 B43_OFDMTAB(0x15, 4) |
137 | #define B43_OFDMTAB_TSSI B43_OFDMTAB(0x15, 0) | 147 | #define B43_OFDMTAB_TSSI B43_OFDMTAB(0x15, 0) |