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authorMichael Buesch <mb@bu3sch.de>2008-02-05 06:50:41 -0500
committerJohn W. Linville <linville@tuxdriver.com>2008-02-05 14:35:47 -0500
commitb79caa68c0d48477453a90d12be34b47cb75f3a8 (patch)
tree103b22e57178cdfcdab2afd2fbd2d9ca45644fc7 /drivers/net/wireless/b43/dma.h
parent532031d7f426eb02f854d13184416cabcb01bdd5 (diff)
b43: Fix DMA for 30/32-bit DMA engines
This checks if the DMA address is bigger than what the controller can manage. It will reallocate the buffers in the GFP_DMA zone in that case. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43/dma.h')
-rw-r--r--drivers/net/wireless/b43/dma.h20
1 files changed, 9 insertions, 11 deletions
diff --git a/drivers/net/wireless/b43/dma.h b/drivers/net/wireless/b43/dma.h
index 58db03ac536e..c0d6b69e6501 100644
--- a/drivers/net/wireless/b43/dma.h
+++ b/drivers/net/wireless/b43/dma.h
@@ -203,6 +203,12 @@ struct b43_dma_ops {
203 void (*set_current_rxslot) (struct b43_dmaring * ring, int slot); 203 void (*set_current_rxslot) (struct b43_dmaring * ring, int slot);
204}; 204};
205 205
206enum b43_dmatype {
207 B43_DMA_30BIT = 30,
208 B43_DMA_32BIT = 32,
209 B43_DMA_64BIT = 64,
210};
211
206struct b43_dmaring { 212struct b43_dmaring {
207 /* Lowlevel DMA ops. */ 213 /* Lowlevel DMA ops. */
208 const struct b43_dma_ops *ops; 214 const struct b43_dma_ops *ops;
@@ -235,8 +241,8 @@ struct b43_dmaring {
235 int index; 241 int index;
236 /* Boolean. Is this a TX ring? */ 242 /* Boolean. Is this a TX ring? */
237 bool tx; 243 bool tx;
238 /* Boolean. 64bit DMA if true, 32bit DMA otherwise. */ 244 /* The type of DMA engine used. */
239 bool dma64; 245 enum b43_dmatype type;
240 /* Boolean. Is this ring stopped at ieee80211 level? */ 246 /* Boolean. Is this ring stopped at ieee80211 level? */
241 bool stopped; 247 bool stopped;
242 /* Lock, only used for TX. */ 248 /* Lock, only used for TX. */
@@ -255,8 +261,7 @@ static inline u32 b43_dma_read(struct b43_dmaring *ring, u16 offset)
255 return b43_read32(ring->dev, ring->mmio_base + offset); 261 return b43_read32(ring->dev, ring->mmio_base + offset);
256} 262}
257 263
258static inline 264static inline void b43_dma_write(struct b43_dmaring *ring, u16 offset, u32 value)
259 void b43_dma_write(struct b43_dmaring *ring, u16 offset, u32 value)
260{ 265{
261 b43_write32(ring->dev, ring->mmio_base + offset, value); 266 b43_write32(ring->dev, ring->mmio_base + offset, value);
262} 267}
@@ -264,13 +269,6 @@ static inline
264int b43_dma_init(struct b43_wldev *dev); 269int b43_dma_init(struct b43_wldev *dev);
265void b43_dma_free(struct b43_wldev *dev); 270void b43_dma_free(struct b43_wldev *dev);
266 271
267int b43_dmacontroller_rx_reset(struct b43_wldev *dev,
268 u16 dmacontroller_mmio_base, int dma64);
269int b43_dmacontroller_tx_reset(struct b43_wldev *dev,
270 u16 dmacontroller_mmio_base, int dma64);
271
272u16 b43_dmacontroller_base(int dma64bit, int dmacontroller_idx);
273
274void b43_dma_tx_suspend(struct b43_wldev *dev); 272void b43_dma_tx_suspend(struct b43_wldev *dev);
275void b43_dma_tx_resume(struct b43_wldev *dev); 273void b43_dma_tx_resume(struct b43_wldev *dev);
276 274