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authorMichael Buesch <mb@bu3sch.de>2008-01-05 18:09:46 -0500
committerDavid S. Miller <davem@davemloft.net>2008-01-28 18:09:21 -0500
commit96c755a3923748313851da42018c962f5609942f (patch)
tree667d32e6bc2b84c322f5da08e431da10a6578903 /drivers/net/wireless/b43/b43.h
parentd5c71e464170e823b5ae5fe7b3555f3c31694148 (diff)
b43: Fix any N-PHY related WARN_ON() in the attach stage.
This fixes all WARN_ON()s in the attach stage. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43/b43.h')
-rw-r--r--drivers/net/wireless/b43/b43.h15
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index c19b773c978a..086a9c6c2b07 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -328,17 +328,22 @@ enum {
328#define B43_MACCMD_CCA 0x00000008 /* Clear channel assessment */ 328#define B43_MACCMD_CCA 0x00000008 /* Clear channel assessment */
329#define B43_MACCMD_BGNOISE 0x00000010 /* Background noise */ 329#define B43_MACCMD_BGNOISE 0x00000010 /* Background noise */
330 330
331/* 802.11 core specific TM State Low flags */ 331/* 802.11 core specific TM State Low (SSB_TMSLOW) flags */
332#define B43_TMSLOW_GMODE 0x20000000 /* G Mode Enable */ 332#define B43_TMSLOW_GMODE 0x20000000 /* G Mode Enable */
333#define B43_TMSLOW_PLLREFSEL 0x00200000 /* PLL Frequency Reference Select */ 333#define B43_TMSLOW_PHYCLKSPEED 0x00C00000 /* PHY clock speed mask (N-PHY only) */
334#define B43_TMSLOW_PHYCLKSPEED_40MHZ 0x00000000 /* 40 MHz PHY */
335#define B43_TMSLOW_PHYCLKSPEED_80MHZ 0x00400000 /* 80 MHz PHY */
336#define B43_TMSLOW_PHYCLKSPEED_160MHZ 0x00800000 /* 160 MHz PHY */
337#define B43_TMSLOW_PLLREFSEL 0x00200000 /* PLL Frequency Reference Select (rev >= 5) */
334#define B43_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Control Enable (rev >= 5) */ 338#define B43_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Control Enable (rev >= 5) */
335#define B43_TMSLOW_PHYRESET 0x00080000 /* PHY Reset */ 339#define B43_TMSLOW_PHYRESET 0x00080000 /* PHY Reset */
336#define B43_TMSLOW_PHYCLKEN 0x00040000 /* PHY Clock Enable */ 340#define B43_TMSLOW_PHYCLKEN 0x00040000 /* PHY Clock Enable */
337 341
338/* 802.11 core specific TM State High flags */ 342/* 802.11 core specific TM State High (SSB_TMSHIGH) flags */
343#define B43_TMSHIGH_DUALBAND_PHY 0x00080000 /* Dualband PHY available */
339#define B43_TMSHIGH_FCLOCK 0x00040000 /* Fast Clock Available (rev >= 5) */ 344#define B43_TMSHIGH_FCLOCK 0x00040000 /* Fast Clock Available (rev >= 5) */
340#define B43_TMSHIGH_APHY 0x00020000 /* A-PHY available (rev >= 5) */ 345#define B43_TMSHIGH_HAVE_5GHZ_PHY 0x00020000 /* 5 GHz PHY available (rev >= 5) */
341#define B43_TMSHIGH_GPHY 0x00010000 /* G-PHY available (rev >= 5) */ 346#define B43_TMSHIGH_HAVE_2GHZ_PHY 0x00010000 /* 2.4 GHz PHY available (rev >= 5) */
342 347
343/* Generic-Interrupt reasons. */ 348/* Generic-Interrupt reasons. */
344#define B43_IRQ_MAC_SUSPENDED 0x00000001 349#define B43_IRQ_MAC_SUSPENDED 0x00000001