diff options
author | Luis R. Rodriguez <lrodriguez@atheros.com> | 2010-04-15 17:38:19 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-04-16 15:43:20 -0400 |
commit | 8525f2801df14b6c4ae6a96127e47d646be5304c (patch) | |
tree | f5fcd937c457e5d9003c027f6f62d68079f04cd9 /drivers/net/wireless/ath | |
parent | db3cc53a2faea2da5730304af06a77d343f314a5 (diff) |
ath9k_hw: Add AR9003 PHY support
This add stubs for PHY support for the AR9003 hardware family.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/Makefile | 1 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.c | 147 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 20 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 3 |
4 files changed, 167 insertions, 4 deletions
diff --git a/drivers/net/wireless/ath/ath9k/Makefile b/drivers/net/wireless/ath/ath9k/Makefile index db63ba298049..ecf3f8c71d6f 100644 --- a/drivers/net/wireless/ath/ath9k/Makefile +++ b/drivers/net/wireless/ath/ath9k/Makefile | |||
@@ -14,6 +14,7 @@ ath9k-$(CONFIG_ATH9K_DEBUGFS) += debug.o | |||
14 | obj-$(CONFIG_ATH9K) += ath9k.o | 14 | obj-$(CONFIG_ATH9K) += ath9k.o |
15 | 15 | ||
16 | ath9k_hw-y:= hw.o \ | 16 | ath9k_hw-y:= hw.o \ |
17 | ar9003_phy.o \ | ||
17 | ar9002_phy.o \ | 18 | ar9002_phy.o \ |
18 | ar5008_phy.o \ | 19 | ar5008_phy.o \ |
19 | eeprom.o \ | 20 | eeprom.o \ |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c new file mode 100644 index 000000000000..c4511b8ff75a --- /dev/null +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c | |||
@@ -0,0 +1,147 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2010 Atheros Communications Inc. | ||
3 | * | ||
4 | * Permission to use, copy, modify, and/or distribute this software for any | ||
5 | * purpose with or without fee is hereby granted, provided that the above | ||
6 | * copyright notice and this permission notice appear in all copies. | ||
7 | * | ||
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | ||
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | ||
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | ||
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | ||
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | ||
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | ||
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | ||
15 | */ | ||
16 | |||
17 | #include "hw.h" | ||
18 | |||
19 | /** | ||
20 | * ar9003_hw_set_channel - set channel on single-chip device | ||
21 | * @ah: atheros hardware structure | ||
22 | * @chan: | ||
23 | * | ||
24 | * This is the function to change channel on single-chip devices, that is | ||
25 | * all devices after ar9280. | ||
26 | * | ||
27 | * This function takes the channel value in MHz and sets | ||
28 | * hardware channel value. Assumes writes have been enabled to analog bus. | ||
29 | * | ||
30 | * Actual Expression, | ||
31 | * | ||
32 | * For 2GHz channel, | ||
33 | * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) | ||
34 | * (freq_ref = 40MHz) | ||
35 | * | ||
36 | * For 5GHz channel, | ||
37 | * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10) | ||
38 | * (freq_ref = 40MHz/(24>>amodeRefSel)) | ||
39 | * | ||
40 | * For 5GHz channels which are 5MHz spaced, | ||
41 | * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) | ||
42 | * (freq_ref = 40MHz) | ||
43 | */ | ||
44 | static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) | ||
45 | { | ||
46 | /* TODO */ | ||
47 | return 0; | ||
48 | } | ||
49 | |||
50 | /** | ||
51 | * ar9003_hw_spur_mitigate - convert baseband spur frequency | ||
52 | * @ah: atheros hardware structure | ||
53 | * @chan: | ||
54 | * | ||
55 | * For single-chip solutions. Converts to baseband spur frequency given the | ||
56 | * input channel frequency and compute register settings below. | ||
57 | * | ||
58 | * Spur mitigation for MRC CCK | ||
59 | */ | ||
60 | static void ar9003_hw_spur_mitigate(struct ath_hw *ah, | ||
61 | struct ath9k_channel *chan) | ||
62 | { | ||
63 | /* TODO */ | ||
64 | } | ||
65 | |||
66 | static u32 ar9003_hw_compute_pll_control(struct ath_hw *ah, | ||
67 | struct ath9k_channel *chan) | ||
68 | { | ||
69 | /* TODO */ | ||
70 | return 0; | ||
71 | } | ||
72 | |||
73 | static void ar9003_hw_set_channel_regs(struct ath_hw *ah, | ||
74 | struct ath9k_channel *chan) | ||
75 | { | ||
76 | /* TODO */ | ||
77 | } | ||
78 | |||
79 | static void ar9003_hw_init_bb(struct ath_hw *ah, | ||
80 | struct ath9k_channel *chan) | ||
81 | { | ||
82 | /* TODO */ | ||
83 | } | ||
84 | |||
85 | static int ar9003_hw_process_ini(struct ath_hw *ah, | ||
86 | struct ath9k_channel *chan) | ||
87 | { | ||
88 | /* TODO */ | ||
89 | return -1; | ||
90 | } | ||
91 | |||
92 | static void ar9003_hw_set_rfmode(struct ath_hw *ah, | ||
93 | struct ath9k_channel *chan) | ||
94 | { | ||
95 | /* TODO */ | ||
96 | } | ||
97 | |||
98 | static void ar9003_hw_mark_phy_inactive(struct ath_hw *ah) | ||
99 | { | ||
100 | /* TODO */ | ||
101 | } | ||
102 | |||
103 | static void ar9003_hw_set_delta_slope(struct ath_hw *ah, | ||
104 | struct ath9k_channel *chan) | ||
105 | { | ||
106 | /* TODO */ | ||
107 | } | ||
108 | |||
109 | static bool ar9003_hw_rfbus_req(struct ath_hw *ah) | ||
110 | { | ||
111 | /* TODO */ | ||
112 | return false; | ||
113 | } | ||
114 | |||
115 | static void ar9003_hw_rfbus_done(struct ath_hw *ah) | ||
116 | { | ||
117 | /* TODO */ | ||
118 | } | ||
119 | |||
120 | static void ar9003_hw_enable_rfkill(struct ath_hw *ah) | ||
121 | { | ||
122 | /* TODO */ | ||
123 | } | ||
124 | |||
125 | static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value) | ||
126 | { | ||
127 | /* TODO */ | ||
128 | } | ||
129 | |||
130 | void ar9003_hw_attach_phy_ops(struct ath_hw *ah) | ||
131 | { | ||
132 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); | ||
133 | |||
134 | priv_ops->rf_set_freq = ar9003_hw_set_channel; | ||
135 | priv_ops->spur_mitigate_freq = ar9003_hw_spur_mitigate; | ||
136 | priv_ops->compute_pll_control = ar9003_hw_compute_pll_control; | ||
137 | priv_ops->set_channel_regs = ar9003_hw_set_channel_regs; | ||
138 | priv_ops->init_bb = ar9003_hw_init_bb; | ||
139 | priv_ops->process_ini = ar9003_hw_process_ini; | ||
140 | priv_ops->set_rfmode = ar9003_hw_set_rfmode; | ||
141 | priv_ops->mark_phy_inactive = ar9003_hw_mark_phy_inactive; | ||
142 | priv_ops->set_delta_slope = ar9003_hw_set_delta_slope; | ||
143 | priv_ops->rfbus_req = ar9003_hw_rfbus_req; | ||
144 | priv_ops->rfbus_done = ar9003_hw_rfbus_done; | ||
145 | priv_ops->enable_rfkill = ar9003_hw_enable_rfkill; | ||
146 | priv_ops->set_diversity = ar9003_hw_set_diversity; | ||
147 | } | ||
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 7952818e6307..f057d1ad9290 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #define ATH9K_CLOCK_RATE_2GHZ_OFDM 44 | 27 | #define ATH9K_CLOCK_RATE_2GHZ_OFDM 44 |
28 | 28 | ||
29 | static void ar9002_hw_attach_ops(struct ath_hw *ah); | 29 | static void ar9002_hw_attach_ops(struct ath_hw *ah); |
30 | static void ar9003_hw_attach_ops(struct ath_hw *ah); | ||
30 | 31 | ||
31 | static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type); | 32 | static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type); |
32 | 33 | ||
@@ -858,6 +859,14 @@ static void ath9k_hw_init_eeprom_fix(struct ath_hw *ah) | |||
858 | "needs fixup for AR_AN_TOP2 register\n"); | 859 | "needs fixup for AR_AN_TOP2 register\n"); |
859 | } | 860 | } |
860 | 861 | ||
862 | static void ath9k_hw_attach_ops(struct ath_hw *ah) | ||
863 | { | ||
864 | if (AR_SREV_9300_20_OR_LATER(ah)) | ||
865 | ar9003_hw_attach_ops(ah); | ||
866 | else | ||
867 | ar9002_hw_attach_ops(ah); | ||
868 | } | ||
869 | |||
861 | /* Called for all hardware families */ | 870 | /* Called for all hardware families */ |
862 | static int __ath9k_hw_init(struct ath_hw *ah) | 871 | static int __ath9k_hw_init(struct ath_hw *ah) |
863 | { | 872 | { |
@@ -873,7 +882,7 @@ static int __ath9k_hw_init(struct ath_hw *ah) | |||
873 | return -EIO; | 882 | return -EIO; |
874 | } | 883 | } |
875 | 884 | ||
876 | ar9002_hw_attach_ops(ah); | 885 | ath9k_hw_attach_ops(ah); |
877 | 886 | ||
878 | if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) { | 887 | if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) { |
879 | ath_print(common, ATH_DBG_FATAL, "Couldn't wakeup chip\n"); | 888 | ath_print(common, ATH_DBG_FATAL, "Couldn't wakeup chip\n"); |
@@ -3524,8 +3533,13 @@ static void ar9002_hw_attach_ops(struct ath_hw *ah) | |||
3524 | 3533 | ||
3525 | ops->config_pci_powersave = ar9002_hw_configpcipowersave; | 3534 | ops->config_pci_powersave = ar9002_hw_configpcipowersave; |
3526 | 3535 | ||
3536 | ar5008_hw_attach_phy_ops(ah); | ||
3527 | if (AR_SREV_9280_10_OR_LATER(ah)) | 3537 | if (AR_SREV_9280_10_OR_LATER(ah)) |
3528 | ar9002_hw_attach_phy_ops(ah); | 3538 | ar9002_hw_attach_phy_ops(ah); |
3529 | else | 3539 | } |
3530 | ar5008_hw_attach_phy_ops(ah); | 3540 | |
3541 | /* Sets up the AR9003 hardware familiy callbacks */ | ||
3542 | static void ar9003_hw_attach_ops(struct ath_hw *ah) | ||
3543 | { | ||
3544 | ar9003_hw_attach_phy_ops(ah); | ||
3531 | } | 3545 | } |
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index a1ce79d1795d..3bc362134dce 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -783,8 +783,9 @@ void ath9k_hw_htc_resetinit(struct ath_hw *ah); | |||
783 | void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled, | 783 | void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled, |
784 | u32 *coef_mantissa, u32 *coef_exponent); | 784 | u32 *coef_mantissa, u32 *coef_exponent); |
785 | 785 | ||
786 | void ar9002_hw_attach_phy_ops(struct ath_hw *ah); | ||
787 | void ar5008_hw_attach_phy_ops(struct ath_hw *ah); | 786 | void ar5008_hw_attach_phy_ops(struct ath_hw *ah); |
787 | void ar9002_hw_attach_phy_ops(struct ath_hw *ah); | ||
788 | void ar9003_hw_attach_phy_ops(struct ath_hw *ah); | ||
788 | 789 | ||
789 | #define ATH_PCIE_CAP_LINK_CTRL 0x70 | 790 | #define ATH_PCIE_CAP_LINK_CTRL 0x70 |
790 | #define ATH_PCIE_CAP_LINK_L0S 1 | 791 | #define ATH_PCIE_CAP_LINK_L0S 1 |