diff options
author | Sujith <Sujith.Manoharan@atheros.com> | 2008-11-28 11:51:08 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-12-05 09:35:09 -0500 |
commit | 2a163c6de452c0b321396caceac5d163949b4cf2 (patch) | |
tree | a1541dec446e68806c353637d768f93cb395cc38 /drivers/net/wireless/ath9k | |
parent | 826d268091f0e0ecc50103f648b6183eb3efe04d (diff) |
ath9k: Add a debugfs file for dumping DMA status
Debugfs file location: ath9k/<wiphy>/dma
Contains values in DMA debug registers.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k')
-rw-r--r-- | drivers/net/wireless/ath9k/ath9k.h | 1 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/beacon.c | 1 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/core.h | 1 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/debug.c | 100 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/mac.c | 72 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/main.c | 1 |
6 files changed, 102 insertions, 74 deletions
diff --git a/drivers/net/wireless/ath9k/ath9k.h b/drivers/net/wireless/ath9k/ath9k.h index 5b9bc545e964..9eaa3fce631c 100644 --- a/drivers/net/wireless/ath9k/ath9k.h +++ b/drivers/net/wireless/ath9k/ath9k.h | |||
@@ -1009,7 +1009,6 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah, enum ath9k_int ints); | |||
1009 | 1009 | ||
1010 | /* MAC (PCU/QCU) */ | 1010 | /* MAC (PCU/QCU) */ |
1011 | 1011 | ||
1012 | void ath9k_hw_dmaRegDump(struct ath_hal *ah); | ||
1013 | u32 ath9k_hw_gettxbuf(struct ath_hal *ah, u32 q); | 1012 | u32 ath9k_hw_gettxbuf(struct ath_hal *ah, u32 q); |
1014 | bool ath9k_hw_puttxbuf(struct ath_hal *ah, u32 q, u32 txdp); | 1013 | bool ath9k_hw_puttxbuf(struct ath_hal *ah, u32 q, u32 txdp); |
1015 | bool ath9k_hw_txstart(struct ath_hal *ah, u32 q); | 1014 | bool ath9k_hw_txstart(struct ath_hal *ah, u32 q); |
diff --git a/drivers/net/wireless/ath9k/beacon.c b/drivers/net/wireless/ath9k/beacon.c index 88fbfe5bb7b5..ca5782fa7627 100644 --- a/drivers/net/wireless/ath9k/beacon.c +++ b/drivers/net/wireless/ath9k/beacon.c | |||
@@ -492,7 +492,6 @@ void ath9k_beacon_tasklet(unsigned long data) | |||
492 | DPRINTF(sc, ATH_DBG_BEACON, | 492 | DPRINTF(sc, ATH_DBG_BEACON, |
493 | "beacon is officially " | 493 | "beacon is officially " |
494 | "stuck\n"); | 494 | "stuck\n"); |
495 | ath9k_hw_dmaRegDump(ah); | ||
496 | } | 495 | } |
497 | } else { | 496 | } else { |
498 | DPRINTF(sc, ATH_DBG_BEACON, | 497 | DPRINTF(sc, ATH_DBG_BEACON, |
diff --git a/drivers/net/wireless/ath9k/core.h b/drivers/net/wireless/ath9k/core.h index 5b755582b33e..8c11c0f5c644 100644 --- a/drivers/net/wireless/ath9k/core.h +++ b/drivers/net/wireless/ath9k/core.h | |||
@@ -92,6 +92,7 @@ struct ath9k_debug { | |||
92 | int debug_mask; | 92 | int debug_mask; |
93 | struct dentry *debugfs_root; | 93 | struct dentry *debugfs_root; |
94 | struct dentry *debugfs_phy; | 94 | struct dentry *debugfs_phy; |
95 | struct dentry *debugfs_dma; | ||
95 | }; | 96 | }; |
96 | 97 | ||
97 | void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...); | 98 | void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...); |
diff --git a/drivers/net/wireless/ath9k/debug.c b/drivers/net/wireless/ath9k/debug.c index c146e484ef54..da52812c3a94 100644 --- a/drivers/net/wireless/ath9k/debug.c +++ b/drivers/net/wireless/ath9k/debug.c | |||
@@ -15,6 +15,8 @@ | |||
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include "core.h" | 17 | #include "core.h" |
18 | #include "reg.h" | ||
19 | #include "hw.h" | ||
18 | 20 | ||
19 | static unsigned int ath9k_debug = DBG_DEFAULT; | 21 | static unsigned int ath9k_debug = DBG_DEFAULT; |
20 | module_param_named(debug, ath9k_debug, uint, 0); | 22 | module_param_named(debug, ath9k_debug, uint, 0); |
@@ -34,6 +36,98 @@ void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...) | |||
34 | } | 36 | } |
35 | } | 37 | } |
36 | 38 | ||
39 | static int ath9k_debugfs_open(struct inode *inode, struct file *file) | ||
40 | { | ||
41 | file->private_data = inode->i_private; | ||
42 | return 0; | ||
43 | } | ||
44 | |||
45 | static ssize_t read_file_dma(struct file *file, char __user *user_buf, | ||
46 | size_t count, loff_t *ppos) | ||
47 | { | ||
48 | struct ath_softc *sc = file->private_data; | ||
49 | struct ath_hal *ah = sc->sc_ah; | ||
50 | char buf[1024]; | ||
51 | unsigned int len = 0; | ||
52 | u32 val[ATH9K_NUM_DMA_DEBUG_REGS]; | ||
53 | int i, qcuOffset = 0, dcuOffset = 0; | ||
54 | u32 *qcuBase = &val[0], *dcuBase = &val[4]; | ||
55 | |||
56 | REG_WRITE(ah, AR_MACMISC, | ||
57 | ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) | | ||
58 | (AR_MACMISC_MISC_OBS_BUS_1 << | ||
59 | AR_MACMISC_MISC_OBS_BUS_MSB_S))); | ||
60 | |||
61 | len += snprintf(buf + len, sizeof(buf) - len, | ||
62 | "Raw DMA Debug values:\n"); | ||
63 | |||
64 | for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++) { | ||
65 | if (i % 4 == 0) | ||
66 | len += snprintf(buf + len, sizeof(buf) - len, "\n"); | ||
67 | |||
68 | val[i] = REG_READ(ah, AR_DMADBG_0 + (i * sizeof(u32))); | ||
69 | len += snprintf(buf + len, sizeof(buf) - len, "%d: %08x ", | ||
70 | i, val[i]); | ||
71 | } | ||
72 | |||
73 | len += snprintf(buf + len, sizeof(buf) - len, "\n\n"); | ||
74 | len += snprintf(buf + len, sizeof(buf) - len, | ||
75 | "Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n"); | ||
76 | |||
77 | for (i = 0; i < ATH9K_NUM_QUEUES; i++, qcuOffset += 4, dcuOffset += 5) { | ||
78 | if (i == 8) { | ||
79 | qcuOffset = 0; | ||
80 | qcuBase++; | ||
81 | } | ||
82 | |||
83 | if (i == 6) { | ||
84 | dcuOffset = 0; | ||
85 | dcuBase++; | ||
86 | } | ||
87 | |||
88 | len += snprintf(buf + len, sizeof(buf) - len, | ||
89 | "%2d %2x %1x %2x %2x\n", | ||
90 | i, (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset, | ||
91 | (*qcuBase & (0x8 << qcuOffset)) >> (qcuOffset + 3), | ||
92 | val[2] & (0x7 << (i * 3)) >> (i * 3), | ||
93 | (*dcuBase & (0x1f << dcuOffset)) >> dcuOffset); | ||
94 | } | ||
95 | |||
96 | len += snprintf(buf + len, sizeof(buf) - len, "\n"); | ||
97 | |||
98 | len += snprintf(buf + len, sizeof(buf) - len, | ||
99 | "qcu_stitch state: %2x qcu_fetch state: %2x\n", | ||
100 | (val[3] & 0x003c0000) >> 18, (val[3] & 0x03c00000) >> 22); | ||
101 | len += snprintf(buf + len, sizeof(buf) - len, | ||
102 | "qcu_complete state: %2x dcu_complete state: %2x\n", | ||
103 | (val[3] & 0x1c000000) >> 26, (val[6] & 0x3)); | ||
104 | len += snprintf(buf + len, sizeof(buf) - len, | ||
105 | "dcu_arb state: %2x dcu_fp state: %2x\n", | ||
106 | (val[5] & 0x06000000) >> 25, (val[5] & 0x38000000) >> 27); | ||
107 | len += snprintf(buf + len, sizeof(buf) - len, | ||
108 | "chan_idle_dur: %3d chan_idle_dur_valid: %1d\n", | ||
109 | (val[6] & 0x000003fc) >> 2, (val[6] & 0x00000400) >> 10); | ||
110 | len += snprintf(buf + len, sizeof(buf) - len, | ||
111 | "txfifo_valid_0: %1d txfifo_valid_1: %1d\n", | ||
112 | (val[6] & 0x00000800) >> 11, (val[6] & 0x00001000) >> 12); | ||
113 | len += snprintf(buf + len, sizeof(buf) - len, | ||
114 | "txfifo_dcu_num_0: %2d txfifo_dcu_num_1: %2d\n", | ||
115 | (val[6] & 0x0001e000) >> 13, (val[6] & 0x001e0000) >> 17); | ||
116 | |||
117 | len += snprintf(buf + len, sizeof(buf) - len, "pcu observe: 0x%x \n", | ||
118 | REG_READ(ah, AR_OBS_BUS_1)); | ||
119 | len += snprintf(buf + len, sizeof(buf) - len, | ||
120 | "AR_CR: 0x%x \n", REG_READ(ah, AR_CR)); | ||
121 | |||
122 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | ||
123 | } | ||
124 | |||
125 | static const struct file_operations fops_dma = { | ||
126 | .read = read_file_dma, | ||
127 | .open = ath9k_debugfs_open, | ||
128 | .owner = THIS_MODULE | ||
129 | }; | ||
130 | |||
37 | int ath9k_init_debug(struct ath_softc *sc) | 131 | int ath9k_init_debug(struct ath_softc *sc) |
38 | { | 132 | { |
39 | sc->sc_debug.debug_mask = ath9k_debug; | 133 | sc->sc_debug.debug_mask = ath9k_debug; |
@@ -47,6 +141,11 @@ int ath9k_init_debug(struct ath_softc *sc) | |||
47 | if (!sc->sc_debug.debugfs_phy) | 141 | if (!sc->sc_debug.debugfs_phy) |
48 | goto err; | 142 | goto err; |
49 | 143 | ||
144 | sc->sc_debug.debugfs_dma = debugfs_create_file("dma", S_IRUGO, | ||
145 | sc->sc_debug.debugfs_phy, sc, &fops_dma); | ||
146 | if (!sc->sc_debug.debugfs_dma) | ||
147 | goto err; | ||
148 | |||
50 | return 0; | 149 | return 0; |
51 | err: | 150 | err: |
52 | ath9k_exit_debug(sc); | 151 | ath9k_exit_debug(sc); |
@@ -55,6 +154,7 @@ err: | |||
55 | 154 | ||
56 | void ath9k_exit_debug(struct ath_softc *sc) | 155 | void ath9k_exit_debug(struct ath_softc *sc) |
57 | { | 156 | { |
157 | debugfs_remove(sc->sc_debug.debugfs_dma); | ||
58 | debugfs_remove(sc->sc_debug.debugfs_phy); | 158 | debugfs_remove(sc->sc_debug.debugfs_phy); |
59 | debugfs_remove(sc->sc_debug.debugfs_root); | 159 | debugfs_remove(sc->sc_debug.debugfs_root); |
60 | } | 160 | } |
diff --git a/drivers/net/wireless/ath9k/mac.c b/drivers/net/wireless/ath9k/mac.c index 8d2b139818ee..a4e98986dbcd 100644 --- a/drivers/net/wireless/ath9k/mac.c +++ b/drivers/net/wireless/ath9k/mac.c | |||
@@ -40,78 +40,6 @@ static void ath9k_hw_set_txq_interrupts(struct ath_hal *ah, | |||
40 | AR_IMR_S2_QCU_TXURN, ahp->ah_txUrnInterruptMask); | 40 | AR_IMR_S2_QCU_TXURN, ahp->ah_txUrnInterruptMask); |
41 | } | 41 | } |
42 | 42 | ||
43 | void ath9k_hw_dmaRegDump(struct ath_hal *ah) | ||
44 | { | ||
45 | u32 val[ATH9K_NUM_DMA_DEBUG_REGS]; | ||
46 | int qcuOffset = 0, dcuOffset = 0; | ||
47 | u32 *qcuBase = &val[0], *dcuBase = &val[4]; | ||
48 | int i; | ||
49 | |||
50 | REG_WRITE(ah, AR_MACMISC, | ||
51 | ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) | | ||
52 | (AR_MACMISC_MISC_OBS_BUS_1 << | ||
53 | AR_MACMISC_MISC_OBS_BUS_MSB_S))); | ||
54 | |||
55 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "Raw DMA Debug values:\n"); | ||
56 | |||
57 | for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++) { | ||
58 | if (i % 4 == 0) | ||
59 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n"); | ||
60 | |||
61 | val[i] = REG_READ(ah, AR_DMADBG_0 + (i * sizeof(u32))); | ||
62 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "%d: %08x ", i, val[i]); | ||
63 | } | ||
64 | |||
65 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n\n"); | ||
66 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, | ||
67 | "Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n"); | ||
68 | |||
69 | for (i = 0; i < ATH9K_NUM_QUEUES; | ||
70 | i++, qcuOffset += 4, dcuOffset += 5) { | ||
71 | if (i == 8) { | ||
72 | qcuOffset = 0; | ||
73 | qcuBase++; | ||
74 | } | ||
75 | |||
76 | if (i == 6) { | ||
77 | dcuOffset = 0; | ||
78 | dcuBase++; | ||
79 | } | ||
80 | |||
81 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, | ||
82 | "%2d %2x %1x %2x %2x\n", | ||
83 | i, (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset, | ||
84 | (*qcuBase & (0x8 << qcuOffset)) >> (qcuOffset + 3), | ||
85 | val[2] & (0x7 << (i * 3)) >> (i * 3), | ||
86 | (*dcuBase & (0x1f << dcuOffset)) >> dcuOffset); | ||
87 | } | ||
88 | |||
89 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n"); | ||
90 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, | ||
91 | "qcu_stitch state: %2x qcu_fetch state: %2x\n", | ||
92 | (val[3] & 0x003c0000) >> 18, (val[3] & 0x03c00000) >> 22); | ||
93 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, | ||
94 | "qcu_complete state: %2x dcu_complete state: %2x\n", | ||
95 | (val[3] & 0x1c000000) >> 26, (val[6] & 0x3)); | ||
96 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, | ||
97 | "dcu_arb state: %2x dcu_fp state: %2x\n", | ||
98 | (val[5] & 0x06000000) >> 25, (val[5] & 0x38000000) >> 27); | ||
99 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, | ||
100 | "chan_idle_dur: %3d chan_idle_dur_valid: %1d\n", | ||
101 | (val[6] & 0x000003fc) >> 2, (val[6] & 0x00000400) >> 10); | ||
102 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, | ||
103 | "txfifo_valid_0: %1d txfifo_valid_1: %1d\n", | ||
104 | (val[6] & 0x00000800) >> 11, (val[6] & 0x00001000) >> 12); | ||
105 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, | ||
106 | "txfifo_dcu_num_0: %2d txfifo_dcu_num_1: %2d\n", | ||
107 | (val[6] & 0x0001e000) >> 13, (val[6] & 0x001e0000) >> 17); | ||
108 | |||
109 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "pcu observe 0x%x \n", | ||
110 | REG_READ(ah, AR_OBS_BUS_1)); | ||
111 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, | ||
112 | "AR_CR 0x%x \n", REG_READ(ah, AR_CR)); | ||
113 | } | ||
114 | |||
115 | u32 ath9k_hw_gettxbuf(struct ath_hal *ah, u32 q) | 43 | u32 ath9k_hw_gettxbuf(struct ath_hal *ah, u32 q) |
116 | { | 44 | { |
117 | return REG_READ(ah, AR_QTXDP(q)); | 45 | return REG_READ(ah, AR_QTXDP(q)); |
diff --git a/drivers/net/wireless/ath9k/main.c b/drivers/net/wireless/ath9k/main.c index 71389643b1b1..ac37605d65af 100644 --- a/drivers/net/wireless/ath9k/main.c +++ b/drivers/net/wireless/ath9k/main.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/nl80211.h> | 17 | #include <linux/nl80211.h> |
18 | #include "core.h" | 18 | #include "core.h" |
19 | #include "reg.h" | 19 | #include "reg.h" |
20 | #include "hw.h" | ||
20 | 21 | ||
21 | #define ATH_PCI_VERSION "0.1" | 22 | #define ATH_PCI_VERSION "0.1" |
22 | 23 | ||