diff options
author | Sujith <Sujith.Manoharan@atheros.com> | 2008-08-07 01:22:38 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-08-07 09:49:43 -0400 |
commit | 60b67f519213cf6d59236d065b0953962b56abca (patch) | |
tree | 3af58f097b3899aea9b525c563626930c4cab4b4 /drivers/net/wireless/ath9k/regd.c | |
parent | b08cbcd4546445740c2a04291204b56f8baf7be2 (diff) |
ath9k: Cleanup data structures related to HW capabilities
Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k/regd.c')
-rw-r--r-- | drivers/net/wireless/ath9k/regd.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/net/wireless/ath9k/regd.c b/drivers/net/wireless/ath9k/regd.c index 7b0176e3eb40..05e10c485fa4 100644 --- a/drivers/net/wireless/ath9k/regd.c +++ b/drivers/net/wireless/ath9k/regd.c | |||
@@ -87,7 +87,7 @@ static bool ath9k_regd_is_fcc_midband_supported(struct ath_hal *ah) | |||
87 | { | 87 | { |
88 | u32 regcap; | 88 | u32 regcap; |
89 | 89 | ||
90 | regcap = ah->ah_caps.halRegCap; | 90 | regcap = ah->ah_caps.reg_cap; |
91 | 91 | ||
92 | if (regcap & AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND) | 92 | if (regcap & AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND) |
93 | return true; | 93 | return true; |
@@ -138,7 +138,7 @@ ath9k_regd_get_wmodes_nreg(struct ath_hal *ah, | |||
138 | { | 138 | { |
139 | u32 modesAvail; | 139 | u32 modesAvail; |
140 | 140 | ||
141 | modesAvail = ah->ah_caps.halWirelessModes; | 141 | modesAvail = ah->ah_caps.wireless_modes; |
142 | 142 | ||
143 | if ((modesAvail & ATH9K_MODE_SEL_11G) && (!country->allow11g)) | 143 | if ((modesAvail & ATH9K_MODE_SEL_11G) && (!country->allow11g)) |
144 | modesAvail &= ~ATH9K_MODE_SEL_11G; | 144 | modesAvail &= ~ATH9K_MODE_SEL_11G; |
@@ -436,7 +436,7 @@ ath9k_regd_add_channel(struct ath_hal *ah, | |||
436 | return false; | 436 | return false; |
437 | } | 437 | } |
438 | if ((fband->channelBW == CHANNEL_HALF_BW) && | 438 | if ((fband->channelBW == CHANNEL_HALF_BW) && |
439 | !ah->ah_caps.halChanHalfRate) { | 439 | !(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_HALFRATE)) { |
440 | DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, | 440 | DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, |
441 | "%s: Skipping %u half rate channel\n", | 441 | "%s: Skipping %u half rate channel\n", |
442 | __func__, c); | 442 | __func__, c); |
@@ -444,7 +444,7 @@ ath9k_regd_add_channel(struct ath_hal *ah, | |||
444 | } | 444 | } |
445 | 445 | ||
446 | if ((fband->channelBW == CHANNEL_QUARTER_BW) && | 446 | if ((fband->channelBW == CHANNEL_QUARTER_BW) && |
447 | !ah->ah_caps.halChanQuarterRate) { | 447 | !(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_QUARTERRATE)) { |
448 | DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, | 448 | DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, |
449 | "%s: Skipping %u quarter rate channel\n", | 449 | "%s: Skipping %u quarter rate channel\n", |
450 | __func__, c); | 450 | __func__, c); |
@@ -529,7 +529,7 @@ ath9k_regd_add_channel(struct ath_hal *ah, | |||
529 | if ((c < 2412) || (c > 2462)) { | 529 | if ((c < 2412) || (c > 2462)) { |
530 | if (rd5GHz.regDmnEnum == MKK1 || | 530 | if (rd5GHz.regDmnEnum == MKK1 || |
531 | rd5GHz.regDmnEnum == MKK2) { | 531 | rd5GHz.regDmnEnum == MKK2) { |
532 | u32 regcap = ah->ah_caps.halRegCap; | 532 | u32 regcap = ah->ah_caps.reg_cap; |
533 | if (!(regcap & | 533 | if (!(regcap & |
534 | (AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN | | 534 | (AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN | |
535 | AR_EEPROM_EEREGCAP_EN_KK_U2 | | 535 | AR_EEPROM_EEREGCAP_EN_KK_U2 | |
@@ -594,7 +594,7 @@ static bool ath9k_regd_japan_check(struct ath_hal *ah, | |||
594 | 594 | ||
595 | for (i = 0; i < ARRAY_SIZE(j_bandcheck); i++) { | 595 | for (i = 0; i < ARRAY_SIZE(j_bandcheck); i++) { |
596 | if (j_bandcheck[i].freqbandbit == b) { | 596 | if (j_bandcheck[i].freqbandbit == b) { |
597 | regcap = ah->ah_caps.halRegCap; | 597 | regcap = ah->ah_caps.reg_cap; |
598 | if ((j_bandcheck[i].eepromflagtocheck & regcap) == 0) { | 598 | if ((j_bandcheck[i].eepromflagtocheck & regcap) == 0) { |
599 | skipband = true; | 599 | skipband = true; |
600 | } else if ((regcap & AR_EEPROM_EEREGCAP_EN_KK_U2) || | 600 | } else if ((regcap & AR_EEPROM_EEREGCAP_EN_KK_U2) || |
@@ -726,7 +726,7 @@ ath9k_regd_init_channels(struct ath_hal *ah, | |||
726 | } | 726 | } |
727 | 727 | ||
728 | if (country == NULL) { | 728 | if (country == NULL) { |
729 | modesAvail = ah->ah_caps.halWirelessModes; | 729 | modesAvail = ah->ah_caps.wireless_modes; |
730 | } else { | 730 | } else { |
731 | modesAvail = ath9k_regd_get_wmodes_nreg(ah, country, &rd5GHz); | 731 | modesAvail = ath9k_regd_get_wmodes_nreg(ah, country, &rd5GHz); |
732 | if (!enableOutdoor) | 732 | if (!enableOutdoor) |