diff options
author | Senthil Balasubramanian <senthilkumar@atheros.com> | 2009-03-06 00:54:10 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-03-16 18:09:31 -0400 |
commit | 4e845168380a5954dd8702be5229e3e1b477ed81 (patch) | |
tree | de3f029f4ab97e2c7f7cf3693e3b08194d9f5b2a /drivers/net/wireless/ath9k/phy.h | |
parent | b03a9db95a285e13a5e4f2913e9d22a84bf50cc6 (diff) |
ath9k: INI update for AR9285 and periodic PA offset caliberation
This patch updates the initvalues for AR9285 chipset and also adds
periodic PA offset caliberation.
Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k/phy.h')
-rw-r--r-- | drivers/net/wireless/ath9k/phy.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath9k/phy.h b/drivers/net/wireless/ath9k/phy.h index 6222e32c7748..1eac8c707342 100644 --- a/drivers/net/wireless/ath9k/phy.h +++ b/drivers/net/wireless/ath9k/phy.h | |||
@@ -446,6 +446,9 @@ bool ath9k_hw_init_rf(struct ath_hw *ah, | |||
446 | #define AR_PHY_TPCRG1_PD_GAIN_3 0x00300000 | 446 | #define AR_PHY_TPCRG1_PD_GAIN_3 0x00300000 |
447 | #define AR_PHY_TPCRG1_PD_GAIN_3_S 20 | 447 | #define AR_PHY_TPCRG1_PD_GAIN_3_S 20 |
448 | 448 | ||
449 | #define AR_PHY_TPCRG1_PD_CAL_ENABLE 0x00400000 | ||
450 | #define AR_PHY_TPCRG1_PD_CAL_ENABLE_S 22 | ||
451 | |||
449 | #define AR_PHY_TX_PWRCTRL4 0xa264 | 452 | #define AR_PHY_TX_PWRCTRL4 0xa264 |
450 | #define AR_PHY_TX_PWRCTRL_PD_AVG_VALID 0x00000001 | 453 | #define AR_PHY_TX_PWRCTRL_PD_AVG_VALID 0x00000001 |
451 | #define AR_PHY_TX_PWRCTRL_PD_AVG_VALID_S 0 | 454 | #define AR_PHY_TX_PWRCTRL_PD_AVG_VALID_S 0 |
@@ -513,6 +516,7 @@ bool ath9k_hw_init_rf(struct ath_hw *ah, | |||
513 | /* Carrier leak calibration control, do it after AGC calibration */ | 516 | /* Carrier leak calibration control, do it after AGC calibration */ |
514 | #define AR_PHY_CL_CAL_CTL 0xA358 | 517 | #define AR_PHY_CL_CAL_CTL 0xA358 |
515 | #define AR_PHY_CL_CAL_ENABLE 0x00000002 | 518 | #define AR_PHY_CL_CAL_ENABLE 0x00000002 |
519 | #define AR_PHY_PARALLEL_CAL_ENABLE 0x00000001 | ||
516 | 520 | ||
517 | #define AR_PHY_POWER_TX_RATE5 0xA38C | 521 | #define AR_PHY_POWER_TX_RATE5 0xA38C |
518 | #define AR_PHY_POWER_TX_RATE6 0xA390 | 522 | #define AR_PHY_POWER_TX_RATE6 0xA390 |