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authorSujith <Sujith.Manoharan@atheros.com>2008-10-29 00:46:30 -0400
committerJohn W. Linville <linville@tuxdriver.com>2008-11-10 15:16:05 -0500
commitf1dc56003b23d2d5bb5a756de6b1633a76c9e697 (patch)
treef530aa716620322192bb0e7e083c903bf0e55544 /drivers/net/wireless/ath9k/phy.c
parent5640b08ef7e88b606c740e746cb77bc97d78508e (diff)
ath9k: Refactor hw.c
Split hw.c into more manageable files: ani.c calib.c eeprom.c mac.c Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k/phy.c')
-rw-r--r--drivers/net/wireless/ath9k/phy.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/net/wireless/ath9k/phy.c b/drivers/net/wireless/ath9k/phy.c
index eb9121fdfd38..4f1c8bf8342b 100644
--- a/drivers/net/wireless/ath9k/phy.c
+++ b/drivers/net/wireless/ath9k/phy.c
@@ -215,7 +215,7 @@ ath9k_hw_set_rf_regs(struct ath_hal *ah, struct ath9k_channel *chan,
215 if (AR_SREV_9280_10_OR_LATER(ah)) 215 if (AR_SREV_9280_10_OR_LATER(ah))
216 return true; 216 return true;
217 217
218 eepMinorRev = ath9k_hw_get_eeprom(ahp, EEP_MINOR_REV); 218 eepMinorRev = ath9k_hw_get_eeprom(ah, EEP_MINOR_REV);
219 219
220 RF_BANK_SETUP(ahp->ah_analogBank0Data, &ahp->ah_iniBank0, 1); 220 RF_BANK_SETUP(ahp->ah_analogBank0Data, &ahp->ah_iniBank0, 1);
221 221
@@ -235,15 +235,15 @@ ath9k_hw_set_rf_regs(struct ath_hal *ah, struct ath9k_channel *chan,
235 235
236 if (eepMinorRev >= 2) { 236 if (eepMinorRev >= 2) {
237 if (IS_CHAN_2GHZ(chan)) { 237 if (IS_CHAN_2GHZ(chan)) {
238 ob2GHz = ath9k_hw_get_eeprom(ahp, EEP_OB_2); 238 ob2GHz = ath9k_hw_get_eeprom(ah, EEP_OB_2);
239 db2GHz = ath9k_hw_get_eeprom(ahp, EEP_DB_2); 239 db2GHz = ath9k_hw_get_eeprom(ah, EEP_DB_2);
240 ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data, 240 ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data,
241 ob2GHz, 3, 197, 0); 241 ob2GHz, 3, 197, 0);
242 ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data, 242 ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data,
243 db2GHz, 3, 194, 0); 243 db2GHz, 3, 194, 0);
244 } else { 244 } else {
245 ob5GHz = ath9k_hw_get_eeprom(ahp, EEP_OB_5); 245 ob5GHz = ath9k_hw_get_eeprom(ah, EEP_OB_5);
246 db5GHz = ath9k_hw_get_eeprom(ahp, EEP_DB_5); 246 db5GHz = ath9k_hw_get_eeprom(ah, EEP_DB_5);
247 ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data, 247 ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data,
248 ob5GHz, 3, 203, 0); 248 ob5GHz, 3, 203, 0);
249 ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data, 249 ath9k_phy_modify_rx_buffer(ahp->ah_analogBank6Data,