diff options
author | Sujith <Sujith.Manoharan@atheros.com> | 2009-02-16 02:53:20 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-02-27 14:52:37 -0500 |
commit | 0caa7b14f36e8c3c43dd9294a960ae55cafe07fb (patch) | |
tree | 13a878857346d4bb67e57b31f6ab25a03ed4c6d7 /drivers/net/wireless/ath9k/hw.c | |
parent | 70768496db9ee27d53d3d03d50c93fbf4c0198a0 (diff) |
ath9k: Fix HW wait timeout
RX and calibration have different timeout requirements.
This patch fixes it by changing the HW wait routine
to accept a timeout value.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k/hw.c')
-rw-r--r-- | drivers/net/wireless/ath9k/hw.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c index 1c02358b31f5..eeee5b808154 100644 --- a/drivers/net/wireless/ath9k/hw.c +++ b/drivers/net/wireless/ath9k/hw.c | |||
@@ -84,11 +84,13 @@ static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs) | |||
84 | return ath9k_hw_mac_clks(ah, usecs); | 84 | return ath9k_hw_mac_clks(ah, usecs); |
85 | } | 85 | } |
86 | 86 | ||
87 | bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val) | 87 | bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout) |
88 | { | 88 | { |
89 | int i; | 89 | int i; |
90 | 90 | ||
91 | for (i = 0; i < (AH_TIMEOUT / AH_TIME_QUANTUM); i++) { | 91 | BUG_ON(timeout < AH_TIME_QUANTUM); |
92 | |||
93 | for (i = 0; i < (timeout / AH_TIME_QUANTUM); i++) { | ||
92 | if ((REG_READ(ah, reg) & mask) == val) | 94 | if ((REG_READ(ah, reg) & mask) == val) |
93 | return true; | 95 | return true; |
94 | 96 | ||
@@ -96,8 +98,8 @@ bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val) | |||
96 | } | 98 | } |
97 | 99 | ||
98 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, | 100 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, |
99 | "timeout on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n", | 101 | "timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n", |
100 | reg, REG_READ(ah, reg), mask, val); | 102 | timeout, reg, REG_READ(ah, reg), mask, val); |
101 | 103 | ||
102 | return false; | 104 | return false; |
103 | } | 105 | } |
@@ -1516,7 +1518,7 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type) | |||
1516 | udelay(50); | 1518 | udelay(50); |
1517 | 1519 | ||
1518 | REG_WRITE(ah, AR_RTC_RC, 0); | 1520 | REG_WRITE(ah, AR_RTC_RC, 0); |
1519 | if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0)) { | 1521 | if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) { |
1520 | DPRINTF(ah->ah_sc, ATH_DBG_RESET, | 1522 | DPRINTF(ah->ah_sc, ATH_DBG_RESET, |
1521 | "RTC stuck in MAC reset\n"); | 1523 | "RTC stuck in MAC reset\n"); |
1522 | return false; | 1524 | return false; |
@@ -1545,7 +1547,8 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah) | |||
1545 | if (!ath9k_hw_wait(ah, | 1547 | if (!ath9k_hw_wait(ah, |
1546 | AR_RTC_STATUS, | 1548 | AR_RTC_STATUS, |
1547 | AR_RTC_STATUS_M, | 1549 | AR_RTC_STATUS_M, |
1548 | AR_RTC_STATUS_ON)) { | 1550 | AR_RTC_STATUS_ON, |
1551 | AH_WAIT_TIMEOUT)) { | ||
1549 | DPRINTF(ah->ah_sc, ATH_DBG_RESET, "RTC not waking up\n"); | 1552 | DPRINTF(ah->ah_sc, ATH_DBG_RESET, "RTC not waking up\n"); |
1550 | return false; | 1553 | return false; |
1551 | } | 1554 | } |
@@ -1640,7 +1643,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah, | |||
1640 | 1643 | ||
1641 | REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN); | 1644 | REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN); |
1642 | if (!ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN, | 1645 | if (!ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN, |
1643 | AR_PHY_RFBUS_GRANT_EN)) { | 1646 | AR_PHY_RFBUS_GRANT_EN, AH_WAIT_TIMEOUT)) { |
1644 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, | 1647 | DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, |
1645 | "Could not kill baseband RX\n"); | 1648 | "Could not kill baseband RX\n"); |
1646 | return false; | 1649 | return false; |