ath9k: Use cleaner debug masks

Remove all the useless __func__ prefixes in debug messages,
and replace the DPRINTF macro with a function.

Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 77 insertions, 112 deletions

diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c
index 6eef10477896..b3f2899026d6 100644
--- a/drivers/net/wireless/ath9k/hw.c
+++ b/drivers/net/wireless/ath9k/hw.c
@@ -104,9 +104,10 @@ bool ath9k_hw_wait(struct ath_hal *ah, u32 reg, u32 mask, u32 val)
 
                 udelay(AH_TIME_QUANTUM);
         }
-        DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
-                "%s: timeout on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
-                __func__, reg, REG_READ(ah, reg), mask, val);
+
+        DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                "timeout on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
+                reg, REG_READ(ah, reg), mask, val);
 
         return false;
 }
@@ -188,8 +189,8 @@ u16 ath9k_hw_computetxtime(struct ath_hal *ah,
                 }
                 break;
         default:
-                DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
-                        "%s: unknown phy %u (rate ix %u)\n", __func__,
+                DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                        "Unknown phy %u (rate ix %u)\n",
                         rates->info[rateix].phy, rateix);
                 txTime = 0;
                 break;
@@ -355,9 +356,9 @@ static bool ath9k_hw_chip_test(struct ath_hal *ah)
                         rdData = REG_READ(ah, addr);
                         if (rdData != wrData) {
                                 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                                        "%s: address test failed "
+                                        "address test failed "
                                         "addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
-                                        __func__, addr, wrData, rdData);
+                                        addr, wrData, rdData);
                                 return false;
                         }
                 }
@@ -367,9 +368,9 @@ static bool ath9k_hw_chip_test(struct ath_hal *ah)
                         rdData = REG_READ(ah, addr);
                         if (wrData != rdData) {
                                 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                                        "%s: address test failed "
+                                        "address test failed "
                                         "addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
-                                        __func__, addr, wrData, rdData);
+                                        addr, wrData, rdData);
                                 return false;
                         }
                 }
@@ -449,8 +450,7 @@ static struct ath_hal_5416 *ath9k_hw_newstate(u16 devid,
         ahp = kzalloc(sizeof(struct ath_hal_5416), GFP_KERNEL);
         if (ahp == NULL) {
                 DPRINTF(sc, ATH_DBG_FATAL,
-                        "%s: cannot allocate memory for state block\n",
-                        __func__);
+                        "Cannot allocate memory for state block\n");
                 *status = -ENOMEM;
                 return NULL;
         }
@@ -497,8 +497,7 @@ static int ath9k_hw_rfattach(struct ath_hal *ah)
         rfStatus = ath9k_hw_init_rf(ah, &ecode);
         if (!rfStatus) {
                 DPRINTF(ah->ah_sc, ATH_DBG_RESET,
-                        "%s: RF setup failed, status %u\n", __func__,
-                        ecode);
+                        "RF setup failed, status %u\n", ecode);
                 return ecode;
         }
 
@@ -523,9 +522,9 @@ static int ath9k_hw_rf_claim(struct ath_hal *ah)
                 break;
         default:
                 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
-                        "%s: 5G Radio Chip Rev 0x%02X is not "
+                        "5G Radio Chip Rev 0x%02X is not "
                         "supported by this driver\n",
-                        __func__, ah->ah_analog5GhzRev);
+                        ah->ah_analog5GhzRev);
                 return -EOPNOTSUPP;
         }
 
@@ -550,7 +549,7 @@ static int ath9k_hw_init_macaddr(struct ath_hal *ah)
         }
         if (sum == 0 || sum == 0xffff * 3) {
                 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
-                        "%s: mac address read failed: %pM\n", __func__,
+                        "mac address read failed: %pM\n",
                         ahp->ah_macaddr);
                 return -EADDRNOTAVAIL;
         }
@@ -612,7 +611,7 @@ static int ath9k_hw_post_attach(struct ath_hal *ah)
 
         if (!ath9k_hw_chip_test(ah)) {
                 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                        "%s: hardware self-test failed\n", __func__);
+                        "hardware self-test failed\n");
                 return -ENODEV;
         }
 
@@ -658,15 +657,13 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
                 ahp->ah_intrMitigation = true;
 
         if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
-                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: couldn't reset chip\n",
-                         __func__);
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "Couldn't reset chip\n");
                 ecode = -EIO;
                 goto bad;
         }
 
         if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) {
-                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: couldn't wakeup chip\n",
-                         __func__);
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "Couldn't wakeup chip\n");
                 ecode = -EIO;
                 goto bad;
         }
@@ -682,17 +679,16 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
         }
 
         DPRINTF(ah->ah_sc, ATH_DBG_RESET,
-                "%s: serialize_regmode is %d\n",
-                __func__, ah->ah_config.serialize_regmode);
+                "serialize_regmode is %d\n",
+                ah->ah_config.serialize_regmode);
 
         if ((ah->ah_macVersion != AR_SREV_VERSION_5416_PCI) &&
             (ah->ah_macVersion != AR_SREV_VERSION_5416_PCIE) &&
             (ah->ah_macVersion != AR_SREV_VERSION_9160) &&
             (!AR_SREV_9100(ah)) && (!AR_SREV_9280(ah))) {
                 DPRINTF(ah->ah_sc, ATH_DBG_RESET,
-                        "%s: Mac Chip Rev 0x%02x.%x is not supported by "
-                        "this driver\n", __func__,
-                        ah->ah_macVersion, ah->ah_macRev);
+                        "Mac Chip Rev 0x%02x.%x is not supported by "
+                        "this driver\n", ah->ah_macVersion, ah->ah_macRev);
                 ecode = -EOPNOTSUPP;
                 goto bad;
         }
@@ -737,7 +733,7 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
         }
 
         DPRINTF(ah->ah_sc, ATH_DBG_RESET,
-                "%s: This Mac Chip Rev 0x%02x.%x is \n", __func__,
+                "This Mac Chip Rev 0x%02x.%x is \n",
                 ah->ah_macVersion, ah->ah_macRev);
 
         if (AR_SREV_9280_20_OR_LATER(ah)) {
@@ -874,7 +870,7 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
 #endif
         if (!ath9k_hw_fill_cap_info(ah)) {
                 DPRINTF(ah->ah_sc, ATH_DBG_RESET,
-                        "%s:failed ath9k_hw_fill_cap_info\n", __func__);
+                        "failed ath9k_hw_fill_cap_info\n");
                 ecode = -EINVAL;
                 goto bad;
         }
@@ -882,8 +878,7 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
         ecode = ath9k_hw_init_macaddr(ah);
         if (ecode != 0) {
                 DPRINTF(ah->ah_sc, ATH_DBG_RESET,
-                        "%s: failed initializing mac address\n",
-                        __func__);
+                        "failed initializing mac address\n");
                 goto bad;
         }
 
@@ -1080,8 +1075,7 @@ static bool ath9k_hw_set_ack_timeout(struct ath_hal *ah, u32 us)
         struct ath_hal_5416 *ahp = AH5416(ah);
 
         if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_ACK))) {
-                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: bad ack timeout %u\n",
-                         __func__, us);
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "bad ack timeout %u\n", us);
                 ahp->ah_acktimeout = (u32) -1;
                 return false;
         } else {
@@ -1097,8 +1091,7 @@ static bool ath9k_hw_set_cts_timeout(struct ath_hal *ah, u32 us)
         struct ath_hal_5416 *ahp = AH5416(ah);
 
         if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_CTS))) {
-                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: bad cts timeout %u\n",
-                         __func__, us);
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "bad cts timeout %u\n", us);
                 ahp->ah_ctstimeout = (u32) -1;
                 return false;
         } else {
@@ -1115,7 +1108,7 @@ static bool ath9k_hw_set_global_txtimeout(struct ath_hal *ah, u32 tu)
 
         if (tu > 0xFFFF) {
                 DPRINTF(ah->ah_sc, ATH_DBG_XMIT,
-                        "%s: bad global tx timeout %u\n", __func__, tu);
+                        "bad global tx timeout %u\n", tu);
                 ahp->ah_globaltxtimeout = (u32) -1;
                 return false;
         } else {
@@ -1129,8 +1122,8 @@ static void ath9k_hw_init_user_settings(struct ath_hal *ah)
 {
         struct ath_hal_5416 *ahp = AH5416(ah);
 
-        DPRINTF(ah->ah_sc, ATH_DBG_RESET, "--AP %s ahp->ah_miscMode 0x%x\n",
-                 __func__, ahp->ah_miscMode);
+        DPRINTF(ah->ah_sc, ATH_DBG_RESET, "ahp->ah_miscMode 0x%x\n",
+                ahp->ah_miscMode);
 
         if (ahp->ah_miscMode != 0)
                 REG_WRITE(ah, AR_PCU_MISC,
@@ -1176,7 +1169,7 @@ struct ath_hal *ath9k_hw_attach(u16 devid, struct ath_softc *sc,
                 break;
         default:
                 DPRINTF(ah->ah_sc, ATH_DBG_ANY,
-                         "devid=0x%x not supported.\n", devid);
+                        "devid=0x%x not supported.\n", devid);
                 ah = NULL;
                 *error = -ENXIO;
                 break;
@@ -1355,13 +1348,13 @@ static int ath9k_hw_process_ini(struct ath_hal *ah,
                                           (u32) ah->ah_powerLimit));
         if (status != 0) {
                 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
-                        "%s: error init'ing transmit power\n", __func__);
+                        "error init'ing transmit power\n");
                 return -EIO;
         }
 
         if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
                 DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
-                        "%s: ar5416SetRfRegs failed\n", __func__);
+                        "ar5416SetRfRegs failed\n");
                 return -EIO;
         }
 
@@ -1533,8 +1526,7 @@ static bool ath9k_hw_set_reset(struct ath_hal *ah, int type)
         REG_WRITE(ah, (u16) (AR_RTC_RC), 0);
         if (!ath9k_hw_wait(ah, (u16) (AR_RTC_RC), AR_RTC_RC_M, 0)) {
                 DPRINTF(ah->ah_sc, ATH_DBG_RESET,
-                        "%s: RTC stuck in MAC reset\n",
-                        __func__);
+                        "RTC stuck in MAC reset\n");
                 return false;
         }
 
@@ -1561,8 +1553,7 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hal *ah)
                            AR_RTC_STATUS,
                            AR_RTC_STATUS_M,
                            AR_RTC_STATUS_ON)) {
-                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: RTC not waking up\n",
-                         __func__);
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "RTC not waking up\n");
                 return false;
         }
 
@@ -1641,9 +1632,8 @@ static struct ath9k_channel *ath9k_hw_check_chan(struct ath_hal *ah,
 {
         if (!(IS_CHAN_2GHZ(chan) ^ IS_CHAN_5GHZ(chan))) {
                 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
-                        "%s: invalid channel %u/0x%x; not marked as "
-                        "2GHz or 5GHz\n", __func__, chan->channel,
-                        chan->channelFlags);
+                        "invalid channel %u/0x%x; not marked as "
+                        "2GHz or 5GHz\n", chan->channel, chan->channelFlags);
                 return NULL;
         }
 
@@ -1652,9 +1642,9 @@ static struct ath9k_channel *ath9k_hw_check_chan(struct ath_hal *ah,
             !IS_CHAN_HT20(chan) &&
             !IS_CHAN_HT40(chan)) {
                 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
-                        "%s: invalid channel %u/0x%x; not marked as "
+                        "invalid channel %u/0x%x; not marked as "
                         "OFDM or CCK or HT20 or HT40PLUS or HT40MINUS\n",
-                        __func__, chan->channel, chan->channelFlags);
+                        chan->channel, chan->channelFlags);
                 return NULL;
         }
 
@@ -1670,8 +1660,7 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
         for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
                 if (ath9k_hw_numtxpending(ah, qnum)) {
                         DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
-                                "%s: Transmit frames pending on queue %d\n",
-                                __func__, qnum);
+                                "Transmit frames pending on queue %d\n", qnum);
                         return false;
                 }
         }
@@ -1679,8 +1668,8 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
         REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN);
         if (!ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN,
                            AR_PHY_RFBUS_GRANT_EN)) {
-                DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
-                        "%s: Could not kill baseband RX\n", __func__);
+                DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
+                        "Could not kill baseband RX\n");
                 return false;
         }
 
@@ -1689,13 +1678,13 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
         if (AR_SREV_9280_10_OR_LATER(ah)) {
                 if (!(ath9k_hw_ar9280_set_channel(ah, chan))) {
                         DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
-                                "%s: failed to set channel\n", __func__);
+                                "failed to set channel\n");
                         return false;
                 }
         } else {
                 if (!(ath9k_hw_set_channel(ah, chan))) {
                         DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
-                                "%s: failed to set channel\n", __func__);
+                                "failed to set channel\n");
                         return false;
                 }
         }
@@ -1707,7 +1696,7 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
                                  min((u32) MAX_RATE_POWER,
                                      (u32) ah->ah_powerLimit)) != 0) {
                 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
-                        "%s: error init'ing transmit power\n", __func__);
+                        "error init'ing transmit power\n");
                 return false;
         }
 
@@ -2211,8 +2200,8 @@ bool ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
 
         if (ath9k_hw_check_chan(ah, chan) == NULL) {
                 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
-                        "%s: invalid channel %u/0x%x; no mapping\n",
-                        __func__, chan->channel, chan->channelFlags);
+                        "invalid channel %u/0x%x; no mapping\n",
+                        chan->channel, chan->channelFlags);
                 ecode = -EINVAL;
                 goto bad;
         }
@@ -2254,8 +2243,7 @@ bool ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
         ath9k_hw_mark_phy_inactive(ah);
 
         if (!ath9k_hw_chip_reset(ah, chan)) {
-                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: chip reset failed\n",
-                         __func__);
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "chip reset failed\n");
                 ecode = -EINVAL;
                 goto bad;
         }
@@ -2289,7 +2277,7 @@ bool ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
 
         if (!ath9k_hw_eeprom_set_board_values(ah, chan)) {
                 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
-                        "%s: error setting board options\n", __func__);
+                        "error setting board options\n");
                 ecode = -EIO;
                 goto bad;
         }
@@ -2379,15 +2367,13 @@ bool ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
                 mask = REG_READ(ah, AR_CFG);
                 if (mask & (AR_CFG_SWRB | AR_CFG_SWTB | AR_CFG_SWRG)) {
                         DPRINTF(ah->ah_sc, ATH_DBG_RESET,
-                                "%s CFG Byte Swap Set 0x%x\n", __func__,
-                                mask);
+                                "CFG Byte Swap Set 0x%x\n", mask);
                 } else {
                         mask =
                                 INIT_CONFIG_STATUS | AR_CFG_SWRB | AR_CFG_SWTB;
                         REG_WRITE(ah, AR_CFG, mask);
                         DPRINTF(ah->ah_sc, ATH_DBG_RESET,
-                                "%s Setting CFG 0x%x\n", __func__,
-                                REG_READ(ah, AR_CFG));
+                                "Setting CFG 0x%x\n", REG_READ(ah, AR_CFG));
                 }
         } else {
 #ifdef __BIG_ENDIAN
@@ -2412,7 +2398,7 @@ bool ath9k_hw_keyreset(struct ath_hal *ah, u16 entry)
 
         if (entry >= ah->ah_caps.keycache_size) {
                 DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
-                        "%s: entry %u out of range\n", __func__, entry);
+                        "entry %u out of range\n", entry);
                 return false;
         }
 
@@ -2449,7 +2435,7 @@ bool ath9k_hw_keysetmac(struct ath_hal *ah, u16 entry, const u8 *mac)
 
         if (entry >= ah->ah_caps.keycache_size) {
                 DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
-                        "%s: entry %u out of range\n", __func__, entry);
+                        "entry %u out of range\n", entry);
                 return false;
         }
 
@@ -2485,7 +2471,7 @@ bool ath9k_hw_set_keycache_entry(struct ath_hal *ah, u16 entry,
 
         if (entry >= pCap->keycache_size) {
                 DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
-                        "%s: entry %u out of range\n", __func__, entry);
+                        "entry %u out of range\n", entry);
                 return false;
         }
 
@@ -2496,8 +2482,7 @@ bool ath9k_hw_set_keycache_entry(struct ath_hal *ah, u16 entry,
         case ATH9K_CIPHER_AES_CCM:
                 if (!(pCap->hw_caps & ATH9K_HW_CAP_CIPHER_AESCCM)) {
                         DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
-                                "%s: AES-CCM not supported by "
-                                "mac rev 0x%x\n", __func__,
+                                "AES-CCM not supported by mac rev 0x%x\n",
                                 ah->ah_macRev);
                         return false;
                 }
@@ -2508,16 +2493,14 @@ bool ath9k_hw_set_keycache_entry(struct ath_hal *ah, u16 entry,
                 if (ATH9K_IS_MIC_ENABLED(ah)
                     && entry + 64 >= pCap->keycache_size) {
                         DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
-                                "%s: entry %u inappropriate for TKIP\n",
-                                __func__, entry);
+                                "entry %u inappropriate for TKIP\n", entry);
                         return false;
                 }
                 break;
         case ATH9K_CIPHER_WEP:
                 if (k->kv_len < LEN_WEP40) {
                         DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
-                                "%s: WEP key length %u too small\n",
-                                __func__, k->kv_len);
+                                "WEP key length %u too small\n", k->kv_len);
                         return false;
                 }
                 if (k->kv_len <= LEN_WEP40)
@@ -2532,8 +2515,7 @@ bool ath9k_hw_set_keycache_entry(struct ath_hal *ah, u16 entry,
                 break;
         default:
                 DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
-                        "%s: cipher %u not supported\n", __func__,
-                        k->kv_type);
+                        "cipher %u not supported\n", k->kv_type);
                 return false;
         }
 
@@ -2682,8 +2664,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hal *ah,
                 }
                 if (i == 0) {
                         DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
-                                "%s: Failed to wakeup in %uus\n",
-                                __func__, POWER_UP_TIME / 20);
+                                "Failed to wakeup in %uus\n", POWER_UP_TIME / 20);
                         return false;
                 }
         }
@@ -2705,7 +2686,7 @@ bool ath9k_hw_setpower(struct ath_hal *ah,
         };
         int status = true, setChip = true;
 
-        DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, "%s: %s -> %s (%s)\n", __func__,
+        DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, "%s -> %s (%s)\n",
                 modes[ahp->ah_powerMode], modes[mode],
                 setChip ? "set chip " : "");
 
@@ -2722,7 +2703,7 @@ bool ath9k_hw_setpower(struct ath_hal *ah,
                 break;
         default:
                 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
-                        "%s: unknown power mode %u\n", __func__, mode);
+                        "Unknown power mode %u\n", mode);
                 return false;
         }
         ahp->ah_powerMode = mode;
@@ -2899,8 +2880,7 @@ bool ath9k_hw_getisr(struct ath_hal *ah, enum ath9k_int *masked)
 
                 if (isr & AR_ISR_RXORN) {
                         DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
-                                "%s: receive FIFO overrun interrupt\n",
-                                __func__);
+                                "receive FIFO overrun interrupt\n");
                 }
 
                 if (!AR_SREV_9100(ah)) {
@@ -2926,27 +2906,23 @@ bool ath9k_hw_getisr(struct ath_hal *ah, enum ath9k_int *masked)
                 if (fatal_int) {
                         if (sync_cause & AR_INTR_SYNC_HOST1_FATAL) {
                                 DPRINTF(ah->ah_sc, ATH_DBG_ANY,
-                                        "%s: received PCI FATAL interrupt\n",
-                                        __func__);
+                                        "received PCI FATAL interrupt\n");
                         }
                         if (sync_cause & AR_INTR_SYNC_HOST1_PERR) {
                                 DPRINTF(ah->ah_sc, ATH_DBG_ANY,
-                                        "%s: received PCI PERR interrupt\n",
-                                        __func__);
+                                        "received PCI PERR interrupt\n");
                         }
                 }
                 if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT) {
                         DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
-                                "%s: AR_INTR_SYNC_RADM_CPL_TIMEOUT\n",
-                                __func__);
+                                "AR_INTR_SYNC_RADM_CPL_TIMEOUT\n");
                         REG_WRITE(ah, AR_RC, AR_RC_HOSTIF);
                         REG_WRITE(ah, AR_RC, 0);
                         *masked |= ATH9K_INT_FATAL;
                 }
                 if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT) {
                         DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
-                                "%s: AR_INTR_SYNC_LOCAL_TIMEOUT\n",
-                                __func__);
+                                "AR_INTR_SYNC_LOCAL_TIMEOUT\n");
                 }
 
                 REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause);
@@ -2968,12 +2944,10 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah, enum ath9k_int ints)
         u32 mask, mask2;
         struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
 
-        DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: 0x%x => 0x%x\n", __func__,
-                 omask, ints);
+        DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints);
 
         if (omask & ATH9K_INT_GLOBAL) {
-                DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: disable IER\n",
-                         __func__);
+                DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "disable IER\n");
                 REG_WRITE(ah, AR_IER, AR_IER_DISABLE);
                 (void) REG_READ(ah, AR_IER);
                 if (!AR_SREV_9100(ah)) {
@@ -3028,8 +3002,7 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah, enum ath9k_int ints)
                         mask2 |= AR_IMR_S2_CST;
         }
 
-        DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: new IMR 0x%x\n", __func__,
-                 mask);
+        DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "new IMR 0x%x\n", mask);
         REG_WRITE(ah, AR_IMR, mask);
         mask = REG_READ(ah, AR_IMR_S2) & ~(AR_IMR_S2_TIM |
                                            AR_IMR_S2_DTIM |
@@ -3049,8 +3022,7 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah, enum ath9k_int ints)
         }
 
         if (ints & ATH9K_INT_GLOBAL) {
-                DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: enable IER\n",
-                         __func__);
+                DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "enable IER\n");
                 REG_WRITE(ah, AR_IER, AR_IER_ENABLE);
                 if (!AR_SREV_9100(ah)) {
                         REG_WRITE(ah, AR_INTR_ASYNC_ENABLE,
@@ -3156,14 +3128,10 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hal *ah,
         else
                 nextTbtt = bs->bs_nexttbtt;
 
-        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: next DTIM %d\n", __func__,
-                 bs->bs_nextdtim);
-        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: next beacon %d\n", __func__,
-                 nextTbtt);
-        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: beacon period %d\n", __func__,
-                 beaconintval);
-        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: DTIM period %d\n", __func__,
-                 dtimperiod);
+        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "next DTIM %d\n", bs->bs_nextdtim);
+        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "next beacon %d\n", nextTbtt);
+        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "beacon period %d\n", beaconintval);
+        DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "DTIM period %d\n", dtimperiod);
 
         REG_WRITE(ah, AR_NEXT_DTIM,
                   TU_TO_USEC(bs->bs_nextdtim - SLEEP_SLOP));
@@ -3216,8 +3184,7 @@ bool ath9k_hw_fill_cap_info(struct ath_hal *ah)
                 else if (ah->ah_currentRD == 0x41)
                         ah->ah_currentRD = 0x43;
                 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
-                        "%s: regdomain mapped to 0x%x\n", __func__,
-                        ah->ah_currentRD);
+                        "regdomain mapped to 0x%x\n", ah->ah_currentRD);
         }
 
         eeval = ath9k_hw_get_eeprom(ah, EEP_OP_MODE);
@@ -3823,8 +3790,7 @@ void ath9k_hw_reset_tsf(struct ath_hal *ah)
                 count++;
                 if (count > 10) {
                         DPRINTF(ah->ah_sc, ATH_DBG_RESET,
-                                "%s: AR_SLP32_TSF_WRITE_STATUS limit exceeded\n",
-                                __func__);
+                                "AR_SLP32_TSF_WRITE_STATUS limit exceeded\n");
                         break;
                 }
                 udelay(10);
@@ -3849,8 +3815,7 @@ bool ath9k_hw_setslottime(struct ath_hal *ah, u32 us)
         struct ath_hal_5416 *ahp = AH5416(ah);
 
         if (us < ATH9K_SLOT_TIME_9 || us > ath9k_hw_mac_to_usec(ah, 0xffff)) {
-                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: bad slot time %u\n",
-                         __func__, us);
+                DPRINTF(ah->ah_sc, ATH_DBG_RESET, "bad slot time %u\n", us);
                 ahp->ah_slottime = (u32) -1;
                 return false;
         } else {