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authorSujith <Sujith.Manoharan@atheros.com>2009-02-09 02:57:08 -0500
committerJohn W. Linville <linville@tuxdriver.com>2009-02-13 13:45:01 -0500
commitd6bad496c6fbe3adb3323915a8b0430fa2955199 (patch)
tree02078701fd5cdf419684eb57e2ffb497b084c916 /drivers/net/wireless/ath9k/hw.c
parentd535a42a21eb62bb0e7f35b8ae39da07b679dda4 (diff)
ath9k: Move regulatory information to a separate structure
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k/hw.c')
-rw-r--r--drivers/net/wireless/ath9k/hw.c37
1 files changed, 19 insertions, 18 deletions
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c
index 164a543248d3..9eafada743d4 100644
--- a/drivers/net/wireless/ath9k/hw.c
+++ b/drivers/net/wireless/ath9k/hw.c
@@ -409,7 +409,7 @@ static struct ath_hal_5416 *ath9k_hw_newstate(u16 devid,
409 ah->ah_sc = sc; 409 ah->ah_sc = sc;
410 ah->ah_sh = mem; 410 ah->ah_sh = mem;
411 ah->hw_version.magic = AR5416_MAGIC; 411 ah->hw_version.magic = AR5416_MAGIC;
412 ah->ah_countryCode = CTRY_DEFAULT; 412 ah->regulatory.country_code = CTRY_DEFAULT;
413 ah->hw_version.devid = devid; 413 ah->hw_version.devid = devid;
414 ah->hw_version.subvendorid = 0; 414 ah->hw_version.subvendorid = 0;
415 415
@@ -419,8 +419,8 @@ static struct ath_hal_5416 *ath9k_hw_newstate(u16 devid,
419 if (!AR_SREV_9100(ah)) 419 if (!AR_SREV_9100(ah))
420 ah->ah_flags = AH_USE_EEPROM; 420 ah->ah_flags = AH_USE_EEPROM;
421 421
422 ah->ah_powerLimit = MAX_RATE_POWER; 422 ah->regulatory.power_limit = MAX_RATE_POWER;
423 ah->ah_tpScale = ATH9K_TP_SCALE_MAX; 423 ah->regulatory.tp_scale = ATH9K_TP_SCALE_MAX;
424 ahp->ah_atimWindow = 0; 424 ahp->ah_atimWindow = 0;
425 ahp->ah_diversityControl = ah->ah_config.diversity_control; 425 ahp->ah_diversityControl = ah->ah_config.diversity_control;
426 ahp->ah_antennaSwitchSwap = 426 ahp->ah_antennaSwitchSwap =
@@ -1337,7 +1337,7 @@ static int ath9k_hw_process_ini(struct ath_hal *ah,
1337 channel->max_antenna_gain * 2, 1337 channel->max_antenna_gain * 2,
1338 channel->max_power * 2, 1338 channel->max_power * 2,
1339 min((u32) MAX_RATE_POWER, 1339 min((u32) MAX_RATE_POWER,
1340 (u32) ah->ah_powerLimit)); 1340 (u32) ah->regulatory.power_limit));
1341 if (status != 0) { 1341 if (status != 0) {
1342 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, 1342 DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
1343 "error init'ing transmit power\n"); 1343 "error init'ing transmit power\n");
@@ -1668,7 +1668,7 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
1668 channel->max_antenna_gain * 2, 1668 channel->max_antenna_gain * 2,
1669 channel->max_power * 2, 1669 channel->max_power * 2,
1670 min((u32) MAX_RATE_POWER, 1670 min((u32) MAX_RATE_POWER,
1671 (u32) ah->ah_powerLimit)) != 0) { 1671 (u32) ah->regulatory.power_limit)) != 0) {
1672 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 1672 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
1673 "error init'ing transmit power\n"); 1673 "error init'ing transmit power\n");
1674 return false; 1674 return false;
@@ -3136,21 +3136,22 @@ bool ath9k_hw_fill_cap_info(struct ath_hal *ah)
3136 3136
3137 eeval = ath9k_hw_get_eeprom(ah, EEP_REG_0); 3137 eeval = ath9k_hw_get_eeprom(ah, EEP_REG_0);
3138 3138
3139 ah->ah_currentRD = eeval; 3139 ah->regulatory.current_rd = eeval;
3140 3140
3141 eeval = ath9k_hw_get_eeprom(ah, EEP_REG_1); 3141 eeval = ath9k_hw_get_eeprom(ah, EEP_REG_1);
3142 ah->ah_currentRDExt = eeval; 3142 ah->regulatory.current_rd_ext = eeval;
3143 3143
3144 capField = ath9k_hw_get_eeprom(ah, EEP_OP_CAP); 3144 capField = ath9k_hw_get_eeprom(ah, EEP_OP_CAP);
3145 3145
3146 if (ah->ah_opmode != NL80211_IFTYPE_AP && 3146 if (ah->ah_opmode != NL80211_IFTYPE_AP &&
3147 ah->hw_version.subvendorid == AR_SUBVENDOR_ID_NEW_A) { 3147 ah->hw_version.subvendorid == AR_SUBVENDOR_ID_NEW_A) {
3148 if (ah->ah_currentRD == 0x64 || ah->ah_currentRD == 0x65) 3148 if (ah->regulatory.current_rd == 0x64 ||
3149 ah->ah_currentRD += 5; 3149 ah->regulatory.current_rd == 0x65)
3150 else if (ah->ah_currentRD == 0x41) 3150 ah->regulatory.current_rd += 5;
3151 ah->ah_currentRD = 0x43; 3151 else if (ah->regulatory.current_rd == 0x41)
3152 ah->regulatory.current_rd = 0x43;
3152 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 3153 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
3153 "regdomain mapped to 0x%x\n", ah->ah_currentRD); 3154 "regdomain mapped to 0x%x\n", ah->regulatory.current_rd);
3154 } 3155 }
3155 3156
3156 eeval = ath9k_hw_get_eeprom(ah, EEP_OP_MODE); 3157 eeval = ath9k_hw_get_eeprom(ah, EEP_OP_MODE);
@@ -3292,7 +3293,7 @@ bool ath9k_hw_fill_cap_info(struct ath_hal *ah)
3292 else 3293 else
3293 pCap->hw_caps |= ATH9K_HW_CAP_4KB_SPLITTRANS; 3294 pCap->hw_caps |= ATH9K_HW_CAP_4KB_SPLITTRANS;
3294 3295
3295 if (ah->ah_currentRDExt & (1 << REG_EXT_JAPAN_MIDBAND)) { 3296 if (ah->regulatory.current_rd_ext & (1 << REG_EXT_JAPAN_MIDBAND)) {
3296 pCap->reg_cap = 3297 pCap->reg_cap =
3297 AR_EEPROM_EEREGCAP_EN_KK_NEW_11A | 3298 AR_EEPROM_EEREGCAP_EN_KK_NEW_11A |
3298 AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN | 3299 AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN |
@@ -3392,13 +3393,13 @@ bool ath9k_hw_getcapability(struct ath_hal *ah, enum ath9k_capability_type type,
3392 case 0: 3393 case 0:
3393 return 0; 3394 return 0;
3394 case 1: 3395 case 1:
3395 *result = ah->ah_powerLimit; 3396 *result = ah->regulatory.power_limit;
3396 return 0; 3397 return 0;
3397 case 2: 3398 case 2:
3398 *result = ah->ah_maxPowerLevel; 3399 *result = ah->regulatory.max_power_level;
3399 return 0; 3400 return 0;
3400 case 3: 3401 case 3:
3401 *result = ah->ah_tpScale; 3402 *result = ah->regulatory.tp_scale;
3402 return 0; 3403 return 0;
3403 } 3404 }
3404 return false; 3405 return false;
@@ -3655,14 +3656,14 @@ bool ath9k_hw_set_txpowerlimit(struct ath_hal *ah, u32 limit)
3655 struct ath9k_channel *chan = ah->ah_curchan; 3656 struct ath9k_channel *chan = ah->ah_curchan;
3656 struct ieee80211_channel *channel = chan->chan; 3657 struct ieee80211_channel *channel = chan->chan;
3657 3658
3658 ah->ah_powerLimit = min(limit, (u32) MAX_RATE_POWER); 3659 ah->regulatory.power_limit = min(limit, (u32) MAX_RATE_POWER);
3659 3660
3660 if (ath9k_hw_set_txpower(ah, chan, 3661 if (ath9k_hw_set_txpower(ah, chan,
3661 ath9k_regd_get_ctl(ah, chan), 3662 ath9k_regd_get_ctl(ah, chan),
3662 channel->max_antenna_gain * 2, 3663 channel->max_antenna_gain * 2,
3663 channel->max_power * 2, 3664 channel->max_power * 2,
3664 min((u32) MAX_RATE_POWER, 3665 min((u32) MAX_RATE_POWER,
3665 (u32) ah->ah_powerLimit)) != 0) 3666 (u32) ah->regulatory.power_limit)) != 0)
3666 return false; 3667 return false;
3667 3668
3668 return true; 3669 return true;