diff options
author | Sujith <Sujith.Manoharan@atheros.com> | 2009-02-09 02:57:06 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-02-13 13:44:59 -0500 |
commit | d535a42a21eb62bb0e7f35b8ae39da07b679dda4 (patch) | |
tree | 667627a2fb955a61701da3b52254b739861eadb1 /drivers/net/wireless/ath9k/hw.c | |
parent | 17d7904de85125c62c7258d7cb21207f26d04048 (diff) |
ath9k: Store HW version information in a separate structure
This patch moves all the HW version/revision specific
information into a separate structure.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k/hw.c')
-rw-r--r-- | drivers/net/wireless/ath9k/hw.c | 62 |
1 files changed, 32 insertions, 30 deletions
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c index 1a6c5acc3f0e..164a543248d3 100644 --- a/drivers/net/wireless/ath9k/hw.c +++ b/drivers/net/wireless/ath9k/hw.c | |||
@@ -229,16 +229,17 @@ static void ath9k_hw_read_revisions(struct ath_hal *ah) | |||
229 | 229 | ||
230 | if (val == 0xFF) { | 230 | if (val == 0xFF) { |
231 | val = REG_READ(ah, AR_SREV); | 231 | val = REG_READ(ah, AR_SREV); |
232 | ah->ah_macVersion = (val & AR_SREV_VERSION2) >> AR_SREV_TYPE2_S; | 232 | ah->hw_version.macVersion = |
233 | ah->ah_macRev = MS(val, AR_SREV_REVISION2); | 233 | (val & AR_SREV_VERSION2) >> AR_SREV_TYPE2_S; |
234 | ah->hw_version.macRev = MS(val, AR_SREV_REVISION2); | ||
234 | ah->ah_isPciExpress = (val & AR_SREV_TYPE2_HOST_MODE) ? 0 : 1; | 235 | ah->ah_isPciExpress = (val & AR_SREV_TYPE2_HOST_MODE) ? 0 : 1; |
235 | } else { | 236 | } else { |
236 | if (!AR_SREV_9100(ah)) | 237 | if (!AR_SREV_9100(ah)) |
237 | ah->ah_macVersion = MS(val, AR_SREV_VERSION); | 238 | ah->hw_version.macVersion = MS(val, AR_SREV_VERSION); |
238 | 239 | ||
239 | ah->ah_macRev = val & AR_SREV_REVISION; | 240 | ah->hw_version.macRev = val & AR_SREV_REVISION; |
240 | 241 | ||
241 | if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCIE) | 242 | if (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCIE) |
242 | ah->ah_isPciExpress = true; | 243 | ah->ah_isPciExpress = true; |
243 | } | 244 | } |
244 | } | 245 | } |
@@ -407,14 +408,14 @@ static struct ath_hal_5416 *ath9k_hw_newstate(u16 devid, | |||
407 | ah = &ahp->ah; | 408 | ah = &ahp->ah; |
408 | ah->ah_sc = sc; | 409 | ah->ah_sc = sc; |
409 | ah->ah_sh = mem; | 410 | ah->ah_sh = mem; |
410 | ah->ah_magic = AR5416_MAGIC; | 411 | ah->hw_version.magic = AR5416_MAGIC; |
411 | ah->ah_countryCode = CTRY_DEFAULT; | 412 | ah->ah_countryCode = CTRY_DEFAULT; |
412 | ah->ah_devid = devid; | 413 | ah->hw_version.devid = devid; |
413 | ah->ah_subvendorid = 0; | 414 | ah->hw_version.subvendorid = 0; |
414 | 415 | ||
415 | ah->ah_flags = 0; | 416 | ah->ah_flags = 0; |
416 | if ((devid == AR5416_AR9100_DEVID)) | 417 | if ((devid == AR5416_AR9100_DEVID)) |
417 | ah->ah_macVersion = AR_SREV_VERSION_9100; | 418 | ah->hw_version.macVersion = AR_SREV_VERSION_9100; |
418 | if (!AR_SREV_9100(ah)) | 419 | if (!AR_SREV_9100(ah)) |
419 | ah->ah_flags = AH_USE_EEPROM; | 420 | ah->ah_flags = AH_USE_EEPROM; |
420 | 421 | ||
@@ -473,11 +474,11 @@ static int ath9k_hw_rf_claim(struct ath_hal *ah) | |||
473 | DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL, | 474 | DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL, |
474 | "5G Radio Chip Rev 0x%02X is not " | 475 | "5G Radio Chip Rev 0x%02X is not " |
475 | "supported by this driver\n", | 476 | "supported by this driver\n", |
476 | ah->ah_analog5GhzRev); | 477 | ah->hw_version.analog5GhzRev); |
477 | return -EOPNOTSUPP; | 478 | return -EOPNOTSUPP; |
478 | } | 479 | } |
479 | 480 | ||
480 | ah->ah_analog5GhzRev = val; | 481 | ah->hw_version.analog5GhzRev = val; |
481 | 482 | ||
482 | return 0; | 483 | return 0; |
483 | } | 484 | } |
@@ -615,7 +616,7 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc, | |||
615 | } | 616 | } |
616 | 617 | ||
617 | if (ah->ah_config.serialize_regmode == SER_REG_MODE_AUTO) { | 618 | if (ah->ah_config.serialize_regmode == SER_REG_MODE_AUTO) { |
618 | if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCI) { | 619 | if (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) { |
619 | ah->ah_config.serialize_regmode = | 620 | ah->ah_config.serialize_regmode = |
620 | SER_REG_MODE_ON; | 621 | SER_REG_MODE_ON; |
621 | } else { | 622 | } else { |
@@ -628,13 +629,14 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc, | |||
628 | "serialize_regmode is %d\n", | 629 | "serialize_regmode is %d\n", |
629 | ah->ah_config.serialize_regmode); | 630 | ah->ah_config.serialize_regmode); |
630 | 631 | ||
631 | if ((ah->ah_macVersion != AR_SREV_VERSION_5416_PCI) && | 632 | if ((ah->hw_version.macVersion != AR_SREV_VERSION_5416_PCI) && |
632 | (ah->ah_macVersion != AR_SREV_VERSION_5416_PCIE) && | 633 | (ah->hw_version.macVersion != AR_SREV_VERSION_5416_PCIE) && |
633 | (ah->ah_macVersion != AR_SREV_VERSION_9160) && | 634 | (ah->hw_version.macVersion != AR_SREV_VERSION_9160) && |
634 | (!AR_SREV_9100(ah)) && (!AR_SREV_9280(ah)) && (!AR_SREV_9285(ah))) { | 635 | (!AR_SREV_9100(ah)) && (!AR_SREV_9280(ah)) && (!AR_SREV_9285(ah))) { |
635 | DPRINTF(ah->ah_sc, ATH_DBG_RESET, | 636 | DPRINTF(ah->ah_sc, ATH_DBG_RESET, |
636 | "Mac Chip Rev 0x%02x.%x is not supported by " | 637 | "Mac Chip Rev 0x%02x.%x is not supported by " |
637 | "this driver\n", ah->ah_macVersion, ah->ah_macRev); | 638 | "this driver\n", ah->hw_version.macVersion, |
639 | ah->hw_version.macRev); | ||
638 | ecode = -EOPNOTSUPP; | 640 | ecode = -EOPNOTSUPP; |
639 | goto bad; | 641 | goto bad; |
640 | } | 642 | } |
@@ -644,7 +646,7 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc, | |||
644 | ahp->ah_suppCals = IQ_MISMATCH_CAL; | 646 | ahp->ah_suppCals = IQ_MISMATCH_CAL; |
645 | ah->ah_isPciExpress = false; | 647 | ah->ah_isPciExpress = false; |
646 | } | 648 | } |
647 | ah->ah_phyRev = REG_READ(ah, AR_PHY_CHIP_ID); | 649 | ah->hw_version.phyRev = REG_READ(ah, AR_PHY_CHIP_ID); |
648 | 650 | ||
649 | if (AR_SREV_9160_10_OR_LATER(ah)) { | 651 | if (AR_SREV_9160_10_OR_LATER(ah)) { |
650 | if (AR_SREV_9280_10_OR_LATER(ah)) { | 652 | if (AR_SREV_9280_10_OR_LATER(ah)) { |
@@ -680,7 +682,7 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc, | |||
680 | 682 | ||
681 | DPRINTF(ah->ah_sc, ATH_DBG_RESET, | 683 | DPRINTF(ah->ah_sc, ATH_DBG_RESET, |
682 | "This Mac Chip Rev 0x%02x.%x is \n", | 684 | "This Mac Chip Rev 0x%02x.%x is \n", |
683 | ah->ah_macVersion, ah->ah_macRev); | 685 | ah->hw_version.macVersion, ah->hw_version.macRev); |
684 | 686 | ||
685 | if (AR_SREV_9285_12_OR_LATER(ah)) { | 687 | if (AR_SREV_9285_12_OR_LATER(ah)) { |
686 | INIT_INI_ARRAY(&ahp->ah_iniModes, ar9285Modes_9285_1_2, | 688 | INIT_INI_ARRAY(&ahp->ah_iniModes, ar9285Modes_9285_1_2, |
@@ -830,7 +832,7 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc, | |||
830 | if (AR_SREV_9280_20(ah)) | 832 | if (AR_SREV_9280_20(ah)) |
831 | ath9k_hw_init_txgain_ini(ah); | 833 | ath9k_hw_init_txgain_ini(ah); |
832 | 834 | ||
833 | if (ah->ah_devid == AR9280_DEVID_PCI) { | 835 | if (ah->hw_version.devid == AR9280_DEVID_PCI) { |
834 | for (i = 0; i < ahp->ah_iniModes.ia_rows; i++) { | 836 | for (i = 0; i < ahp->ah_iniModes.ia_rows; i++) { |
835 | u32 reg = INI_RA(&ahp->ah_iniModes, i, 0); | 837 | u32 reg = INI_RA(&ahp->ah_iniModes, i, 0); |
836 | 838 | ||
@@ -990,7 +992,7 @@ static void ath9k_hw_init_chain_masks(struct ath_hal *ah) | |||
990 | REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP, | 992 | REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP, |
991 | AR_PHY_SWAP_ALT_CHAIN); | 993 | AR_PHY_SWAP_ALT_CHAIN); |
992 | case 0x3: | 994 | case 0x3: |
993 | if (((ah)->ah_macVersion <= AR_SREV_VERSION_9160)) { | 995 | if (((ah)->hw_version.macVersion <= AR_SREV_VERSION_9160)) { |
994 | REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7); | 996 | REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7); |
995 | REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, 0x7); | 997 | REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, 0x7); |
996 | break; | 998 | break; |
@@ -1181,7 +1183,7 @@ static u32 ath9k_hw_def_ini_fixup(struct ath_hal *ah, | |||
1181 | { | 1183 | { |
1182 | struct base_eep_header *pBase = &(pEepData->baseEepHeader); | 1184 | struct base_eep_header *pBase = &(pEepData->baseEepHeader); |
1183 | 1185 | ||
1184 | switch (ah->ah_devid) { | 1186 | switch (ah->hw_version.devid) { |
1185 | case AR9280_DEVID_PCI: | 1187 | case AR9280_DEVID_PCI: |
1186 | if (reg == 0x7894) { | 1188 | if (reg == 0x7894) { |
1187 | DPRINTF(ah->ah_sc, ATH_DBG_ANY, | 1189 | DPRINTF(ah->ah_sc, ATH_DBG_ANY, |
@@ -2438,7 +2440,7 @@ bool ath9k_hw_set_keycache_entry(struct ath_hal *ah, u16 entry, | |||
2438 | if (!(pCap->hw_caps & ATH9K_HW_CAP_CIPHER_AESCCM)) { | 2440 | if (!(pCap->hw_caps & ATH9K_HW_CAP_CIPHER_AESCCM)) { |
2439 | DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE, | 2441 | DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE, |
2440 | "AES-CCM not supported by mac rev 0x%x\n", | 2442 | "AES-CCM not supported by mac rev 0x%x\n", |
2441 | ah->ah_macRev); | 2443 | ah->hw_version.macRev); |
2442 | return false; | 2444 | return false; |
2443 | } | 2445 | } |
2444 | keyType = AR_KEYTABLE_TYPE_CCM; | 2446 | keyType = AR_KEYTABLE_TYPE_CCM; |
@@ -2687,7 +2689,7 @@ void ath9k_hw_configpcipowersave(struct ath_hal *ah, int restore) | |||
2687 | } | 2689 | } |
2688 | udelay(1000); | 2690 | udelay(1000); |
2689 | } else if (AR_SREV_9280(ah) && | 2691 | } else if (AR_SREV_9280(ah) && |
2690 | (ah->ah_macRev == AR_SREV_REVISION_9280_10)) { | 2692 | (ah->hw_version.macRev == AR_SREV_REVISION_9280_10)) { |
2691 | REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fd00); | 2693 | REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fd00); |
2692 | REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924); | 2694 | REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924); |
2693 | 2695 | ||
@@ -3142,7 +3144,7 @@ bool ath9k_hw_fill_cap_info(struct ath_hal *ah) | |||
3142 | capField = ath9k_hw_get_eeprom(ah, EEP_OP_CAP); | 3144 | capField = ath9k_hw_get_eeprom(ah, EEP_OP_CAP); |
3143 | 3145 | ||
3144 | if (ah->ah_opmode != NL80211_IFTYPE_AP && | 3146 | if (ah->ah_opmode != NL80211_IFTYPE_AP && |
3145 | ah->ah_subvendorid == AR_SUBVENDOR_ID_NEW_A) { | 3147 | ah->hw_version.subvendorid == AR_SUBVENDOR_ID_NEW_A) { |
3146 | if (ah->ah_currentRD == 0x64 || ah->ah_currentRD == 0x65) | 3148 | if (ah->ah_currentRD == 0x64 || ah->ah_currentRD == 0x65) |
3147 | ah->ah_currentRD += 5; | 3149 | ah->ah_currentRD += 5; |
3148 | else if (ah->ah_currentRD == 0x41) | 3150 | else if (ah->ah_currentRD == 0x41) |
@@ -3195,7 +3197,7 @@ bool ath9k_hw_fill_cap_info(struct ath_hal *ah) | |||
3195 | (ath9k_hw_gpio_get(ah, 0)) ? 0x5 : 0x7; | 3197 | (ath9k_hw_gpio_get(ah, 0)) ? 0x5 : 0x7; |
3196 | } | 3198 | } |
3197 | 3199 | ||
3198 | if (!(AR_SREV_9280(ah) && (ah->ah_macRev == 0))) | 3200 | if (!(AR_SREV_9280(ah) && (ah->hw_version.macRev == 0))) |
3199 | ahp->ah_miscMode |= AR_PCU_MIC_NEW_LOC_ENA; | 3201 | ahp->ah_miscMode |= AR_PCU_MIC_NEW_LOC_ENA; |
3200 | 3202 | ||
3201 | pCap->low_2ghz_chan = 2312; | 3203 | pCap->low_2ghz_chan = 2312; |
@@ -3276,11 +3278,11 @@ bool ath9k_hw_fill_cap_info(struct ath_hal *ah) | |||
3276 | } | 3278 | } |
3277 | #endif | 3279 | #endif |
3278 | 3280 | ||
3279 | if ((ah->ah_macVersion == AR_SREV_VERSION_5416_PCI) || | 3281 | if ((ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || |
3280 | (ah->ah_macVersion == AR_SREV_VERSION_5416_PCIE) || | 3282 | (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCIE) || |
3281 | (ah->ah_macVersion == AR_SREV_VERSION_9160) || | 3283 | (ah->hw_version.macVersion == AR_SREV_VERSION_9160) || |
3282 | (ah->ah_macVersion == AR_SREV_VERSION_9100) || | 3284 | (ah->hw_version.macVersion == AR_SREV_VERSION_9100) || |
3283 | (ah->ah_macVersion == AR_SREV_VERSION_9280)) | 3285 | (ah->hw_version.macVersion == AR_SREV_VERSION_9280)) |
3284 | pCap->hw_caps &= ~ATH9K_HW_CAP_AUTOSLEEP; | 3286 | pCap->hw_caps &= ~ATH9K_HW_CAP_AUTOSLEEP; |
3285 | else | 3287 | else |
3286 | pCap->hw_caps |= ATH9K_HW_CAP_AUTOSLEEP; | 3288 | pCap->hw_caps |= ATH9K_HW_CAP_AUTOSLEEP; |