diff options
author | David S. Miller <davem@davemloft.net> | 2009-02-03 15:41:58 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-02-03 15:41:58 -0500 |
commit | 1725d409caba16ea5fc694bd50e95e79e8ced11a (patch) | |
tree | 688fe26dd4ceda5364692f0ce307aadb6f04f331 /drivers/net/wireless/ath9k/ath9k.h | |
parent | b3ff29d2ccfe3af065a9b393699a8fbf2abd1b15 (diff) | |
parent | b8abde45d7d6ab9e8ceced9b5990eeb1149d0b97 (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6
Diffstat (limited to 'drivers/net/wireless/ath9k/ath9k.h')
-rw-r--r-- | drivers/net/wireless/ath9k/ath9k.h | 71 |
1 files changed, 29 insertions, 42 deletions
diff --git a/drivers/net/wireless/ath9k/ath9k.h b/drivers/net/wireless/ath9k/ath9k.h index d27813502953..5289d2878111 100644 --- a/drivers/net/wireless/ath9k/ath9k.h +++ b/drivers/net/wireless/ath9k/ath9k.h | |||
@@ -198,6 +198,7 @@ enum ath9k_hw_caps { | |||
198 | ATH9K_HW_CAP_AUTOSLEEP = BIT(19), | 198 | ATH9K_HW_CAP_AUTOSLEEP = BIT(19), |
199 | ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(20), | 199 | ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(20), |
200 | ATH9K_HW_CAP_WOW_MATCHPATTERN_EXACT = BIT(21), | 200 | ATH9K_HW_CAP_WOW_MATCHPATTERN_EXACT = BIT(21), |
201 | ATH9K_HW_CAP_BT_COEX = BIT(22) | ||
201 | }; | 202 | }; |
202 | 203 | ||
203 | enum ath9k_capability_type { | 204 | enum ath9k_capability_type { |
@@ -453,24 +454,15 @@ struct ath9k_11n_rate_series { | |||
453 | CHANNEL_HT40MINUS) | 454 | CHANNEL_HT40MINUS) |
454 | 455 | ||
455 | struct ath9k_channel { | 456 | struct ath9k_channel { |
457 | struct ieee80211_channel *chan; | ||
456 | u16 channel; | 458 | u16 channel; |
457 | u32 channelFlags; | 459 | u32 channelFlags; |
458 | u8 privFlags; | ||
459 | int8_t maxRegTxPower; | ||
460 | int8_t maxTxPower; | ||
461 | int8_t minTxPower; | ||
462 | u32 chanmode; | 460 | u32 chanmode; |
463 | int32_t CalValid; | 461 | int32_t CalValid; |
464 | bool oneTimeCalsDone; | 462 | bool oneTimeCalsDone; |
465 | int8_t iCoff; | 463 | int8_t iCoff; |
466 | int8_t qCoff; | 464 | int8_t qCoff; |
467 | int16_t rawNoiseFloor; | 465 | int16_t rawNoiseFloor; |
468 | int8_t antennaMax; | ||
469 | u32 regDmnFlags; | ||
470 | u32 conformanceTestLimit[3]; /* 0:11a, 1: 11b, 2:11g */ | ||
471 | #ifdef ATH_NF_PER_CHAN | ||
472 | struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS]; | ||
473 | #endif | ||
474 | }; | 466 | }; |
475 | 467 | ||
476 | #define IS_CHAN_A(_c) ((((_c)->channelFlags & CHANNEL_A) == CHANNEL_A) || \ | 468 | #define IS_CHAN_A(_c) ((((_c)->channelFlags & CHANNEL_A) == CHANNEL_A) || \ |
@@ -498,7 +490,6 @@ struct ath9k_channel { | |||
498 | ((_c)->chanmode == CHANNEL_G_HT40MINUS)) | 490 | ((_c)->chanmode == CHANNEL_G_HT40MINUS)) |
499 | #define IS_CHAN_HT(_c) (IS_CHAN_HT20((_c)) || IS_CHAN_HT40((_c))) | 491 | #define IS_CHAN_HT(_c) (IS_CHAN_HT20((_c)) || IS_CHAN_HT40((_c))) |
500 | 492 | ||
501 | #define IS_CHAN_IN_PUBLIC_SAFETY_BAND(_c) ((_c) > 4940 && (_c) < 4990) | ||
502 | #define IS_CHAN_A_5MHZ_SPACED(_c) \ | 493 | #define IS_CHAN_A_5MHZ_SPACED(_c) \ |
503 | ((((_c)->channelFlags & CHANNEL_5GHZ) != 0) && \ | 494 | ((((_c)->channelFlags & CHANNEL_5GHZ) != 0) && \ |
504 | (((_c)->channel % 20) != 0) && \ | 495 | (((_c)->channel % 20) != 0) && \ |
@@ -751,6 +742,7 @@ struct ath9k_node_stats { | |||
751 | #define AR_GPIO_OUTPUT_MUX_AS_OUTPUT 0 | 742 | #define AR_GPIO_OUTPUT_MUX_AS_OUTPUT 0 |
752 | #define AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED 1 | 743 | #define AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED 1 |
753 | #define AR_GPIO_OUTPUT_MUX_AS_PCIE_POWER_LED 2 | 744 | #define AR_GPIO_OUTPUT_MUX_AS_PCIE_POWER_LED 2 |
745 | #define AR_GPIO_OUTPUT_MUX_AS_TX_FRAME 3 | ||
754 | #define AR_GPIO_OUTPUT_MUX_AS_MAC_NETWORK_LED 5 | 746 | #define AR_GPIO_OUTPUT_MUX_AS_MAC_NETWORK_LED 5 |
755 | #define AR_GPIO_OUTPUT_MUX_AS_MAC_POWER_LED 6 | 747 | #define AR_GPIO_OUTPUT_MUX_AS_MAC_POWER_LED 6 |
756 | 748 | ||
@@ -787,23 +779,24 @@ struct ath_hal { | |||
787 | u16 ah_currentRD; | 779 | u16 ah_currentRD; |
788 | u16 ah_currentRDExt; | 780 | u16 ah_currentRDExt; |
789 | u16 ah_currentRDInUse; | 781 | u16 ah_currentRDInUse; |
790 | u16 ah_currentRD5G; | 782 | char alpha2[2]; |
791 | u16 ah_currentRD2G; | 783 | struct reg_dmn_pair_mapping *regpair; |
792 | char ah_iso[4]; | 784 | enum ath9k_power_mode ah_power_mode; |
785 | enum ath9k_power_mode ah_restore_mode; | ||
793 | 786 | ||
794 | struct ath9k_channel ah_channels[150]; | 787 | struct ath9k_channel ah_channels[38]; |
795 | struct ath9k_channel *ah_curchan; | 788 | struct ath9k_channel *ah_curchan; |
796 | u32 ah_nchan; | ||
797 | 789 | ||
798 | bool ah_isPciExpress; | 790 | bool ah_isPciExpress; |
799 | u16 ah_txTrigLevel; | 791 | u16 ah_txTrigLevel; |
800 | u16 ah_rfsilent; | 792 | u16 ah_rfsilent; |
801 | u32 ah_rfkill_gpio; | 793 | u32 ah_rfkill_gpio; |
802 | u32 ah_rfkill_polarity; | 794 | u32 ah_rfkill_polarity; |
803 | 795 | u32 ah_btactive_gpio; | |
804 | #ifndef ATH_NF_PER_CHAN | 796 | u32 ah_wlanactive_gpio; |
805 | struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS]; | 797 | struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS]; |
806 | #endif | 798 | |
799 | bool sw_mgmt_crypto; | ||
807 | }; | 800 | }; |
808 | 801 | ||
809 | struct chan_centers { | 802 | struct chan_centers { |
@@ -816,8 +809,6 @@ struct ath_rate_table; | |||
816 | 809 | ||
817 | /* Helpers */ | 810 | /* Helpers */ |
818 | 811 | ||
819 | enum wireless_mode ath9k_hw_chan2wmode(struct ath_hal *ah, | ||
820 | const struct ath9k_channel *chan); | ||
821 | bool ath9k_hw_wait(struct ath_hal *ah, u32 reg, u32 mask, u32 val); | 812 | bool ath9k_hw_wait(struct ath_hal *ah, u32 reg, u32 mask, u32 val); |
822 | u32 ath9k_hw_reverse_bits(u32 val, u32 n); | 813 | u32 ath9k_hw_reverse_bits(u32 val, u32 n); |
823 | bool ath9k_get_channel_edges(struct ath_hal *ah, | 814 | bool ath9k_get_channel_edges(struct ath_hal *ah, |
@@ -827,7 +818,6 @@ u16 ath9k_hw_computetxtime(struct ath_hal *ah, | |||
827 | struct ath_rate_table *rates, | 818 | struct ath_rate_table *rates, |
828 | u32 frameLen, u16 rateix, | 819 | u32 frameLen, u16 rateix, |
829 | bool shortPreamble); | 820 | bool shortPreamble); |
830 | u32 ath9k_hw_mhz2ieee(struct ath_hal *ah, u32 freq, u32 flags); | ||
831 | void ath9k_hw_get_channel_centers(struct ath_hal *ah, | 821 | void ath9k_hw_get_channel_centers(struct ath_hal *ah, |
832 | struct ath9k_channel *chan, | 822 | struct ath9k_channel *chan, |
833 | struct chan_centers *centers); | 823 | struct chan_centers *centers); |
@@ -843,11 +833,8 @@ void ath9k_hw_rfdetach(struct ath_hal *ah); | |||
843 | 833 | ||
844 | /* HW Reset */ | 834 | /* HW Reset */ |
845 | 835 | ||
846 | bool ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan, | 836 | int ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan, |
847 | enum ath9k_ht_macmode macmode, | 837 | bool bChannelChange); |
848 | u8 txchainmask, u8 rxchainmask, | ||
849 | enum ath9k_ht_extprotspacing extprotspacing, | ||
850 | bool bChannelChange, int *status); | ||
851 | 838 | ||
852 | /* Key Cache Management */ | 839 | /* Key Cache Management */ |
853 | 840 | ||
@@ -887,7 +874,6 @@ void ath9k_hw_set_gpio(struct ath_hal *ah, u32 gpio, u32 val); | |||
887 | #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE) | 874 | #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE) |
888 | void ath9k_enable_rfkill(struct ath_hal *ah); | 875 | void ath9k_enable_rfkill(struct ath_hal *ah); |
889 | #endif | 876 | #endif |
890 | int ath9k_hw_select_antconfig(struct ath_hal *ah, u32 cfg); | ||
891 | u32 ath9k_hw_getdefantenna(struct ath_hal *ah); | 877 | u32 ath9k_hw_getdefantenna(struct ath_hal *ah); |
892 | void ath9k_hw_setantenna(struct ath_hal *ah, u32 antenna); | 878 | void ath9k_hw_setantenna(struct ath_hal *ah, u32 antenna); |
893 | bool ath9k_hw_setantennaswitch(struct ath_hal *ah, | 879 | bool ath9k_hw_setantennaswitch(struct ath_hal *ah, |
@@ -912,23 +898,25 @@ void ath9k_hw_getbssidmask(struct ath_hal *ah, u8 *mask); | |||
912 | bool ath9k_hw_setbssidmask(struct ath_hal *ah, const u8 *mask); | 898 | bool ath9k_hw_setbssidmask(struct ath_hal *ah, const u8 *mask); |
913 | void ath9k_hw_write_associd(struct ath_hal *ah, const u8 *bssid, u16 assocId); | 899 | void ath9k_hw_write_associd(struct ath_hal *ah, const u8 *bssid, u16 assocId); |
914 | u64 ath9k_hw_gettsf64(struct ath_hal *ah); | 900 | u64 ath9k_hw_gettsf64(struct ath_hal *ah); |
901 | void ath9k_hw_settsf64(struct ath_hal *ah, u64 tsf64); | ||
915 | void ath9k_hw_reset_tsf(struct ath_hal *ah); | 902 | void ath9k_hw_reset_tsf(struct ath_hal *ah); |
916 | bool ath9k_hw_set_tsfadjust(struct ath_hal *ah, u32 setting); | 903 | bool ath9k_hw_set_tsfadjust(struct ath_hal *ah, u32 setting); |
917 | bool ath9k_hw_setslottime(struct ath_hal *ah, u32 us); | 904 | bool ath9k_hw_setslottime(struct ath_hal *ah, u32 us); |
918 | void ath9k_hw_set11nmac2040(struct ath_hal *ah, enum ath9k_ht_macmode mode); | 905 | void ath9k_hw_set11nmac2040(struct ath_hal *ah, enum ath9k_ht_macmode mode); |
919 | 906 | ||
920 | /* Regulatory */ | 907 | /* Regulatory */ |
908 | u16 ath9k_regd_get_rd(struct ath_hal *ah); | ||
909 | bool ath9k_is_world_regd(struct ath_hal *ah); | ||
910 | const struct ieee80211_regdomain *ath9k_world_regdomain(struct ath_hal *ah); | ||
911 | const struct ieee80211_regdomain *ath9k_default_world_regdomain(void); | ||
912 | |||
913 | void ath9k_reg_apply_world_flags(struct wiphy *wiphy, enum reg_set_by setby); | ||
914 | void ath9k_reg_apply_radar_flags(struct wiphy *wiphy); | ||
921 | 915 | ||
922 | bool ath9k_regd_is_public_safety_sku(struct ath_hal *ah); | 916 | int ath9k_regd_init(struct ath_hal *ah); |
923 | struct ath9k_channel* ath9k_regd_check_channel(struct ath_hal *ah, | 917 | bool ath9k_regd_is_eeprom_valid(struct ath_hal *ah); |
924 | const struct ath9k_channel *c); | ||
925 | u32 ath9k_regd_get_ctl(struct ath_hal *ah, struct ath9k_channel *chan); | 918 | u32 ath9k_regd_get_ctl(struct ath_hal *ah, struct ath9k_channel *chan); |
926 | u32 ath9k_regd_get_antenna_allowed(struct ath_hal *ah, | 919 | int ath9k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request); |
927 | struct ath9k_channel *chan); | ||
928 | bool ath9k_regd_init_channels(struct ath_hal *ah, | ||
929 | u32 maxchans, u32 *nchans, u8 *regclassids, | ||
930 | u32 maxregids, u32 *nregids, u16 cc, | ||
931 | bool enableOutdoor, bool enableExtendedChannels); | ||
932 | 920 | ||
933 | /* ANI */ | 921 | /* ANI */ |
934 | 922 | ||
@@ -951,8 +939,7 @@ void ath9k_hw_ani_detach(struct ath_hal *ah); | |||
951 | 939 | ||
952 | /* Calibration */ | 940 | /* Calibration */ |
953 | 941 | ||
954 | void ath9k_hw_reset_calvalid(struct ath_hal *ah, struct ath9k_channel *chan, | 942 | bool ath9k_hw_reset_calvalid(struct ath_hal *ah); |
955 | bool *isCalDone); | ||
956 | void ath9k_hw_start_nfcal(struct ath_hal *ah); | 943 | void ath9k_hw_start_nfcal(struct ath_hal *ah); |
957 | void ath9k_hw_loadnf(struct ath_hal *ah, struct ath9k_channel *chan); | 944 | void ath9k_hw_loadnf(struct ath_hal *ah, struct ath9k_channel *chan); |
958 | int16_t ath9k_hw_getnf(struct ath_hal *ah, | 945 | int16_t ath9k_hw_getnf(struct ath_hal *ah, |
@@ -987,9 +974,8 @@ bool ath9k_hw_set_power_cal_table(struct ath_hal *ah, | |||
987 | int16_t *pTxPowerIndexOffset); | 974 | int16_t *pTxPowerIndexOffset); |
988 | bool ath9k_hw_eeprom_set_board_values(struct ath_hal *ah, | 975 | bool ath9k_hw_eeprom_set_board_values(struct ath_hal *ah, |
989 | struct ath9k_channel *chan); | 976 | struct ath9k_channel *chan); |
990 | int ath9k_hw_get_eeprom_antenna_cfg(struct ath_hal *ah, | 977 | u16 ath9k_hw_get_eeprom_antenna_cfg(struct ath_hal *ah, |
991 | struct ath9k_channel *chan, | 978 | struct ath9k_channel *chan); |
992 | u8 index, u16 *config); | ||
993 | u8 ath9k_hw_get_num_ant_config(struct ath_hal *ah, | 979 | u8 ath9k_hw_get_num_ant_config(struct ath_hal *ah, |
994 | enum ieee80211_band freq_band); | 980 | enum ieee80211_band freq_band); |
995 | u16 ath9k_hw_eeprom_get_spur_chan(struct ath_hal *ah, u16 i, bool is2GHz); | 981 | u16 ath9k_hw_eeprom_get_spur_chan(struct ath_hal *ah, u16 i, bool is2GHz); |
@@ -1053,5 +1039,6 @@ void ath9k_hw_rxena(struct ath_hal *ah); | |||
1053 | void ath9k_hw_startpcureceive(struct ath_hal *ah); | 1039 | void ath9k_hw_startpcureceive(struct ath_hal *ah); |
1054 | void ath9k_hw_stoppcurecv(struct ath_hal *ah); | 1040 | void ath9k_hw_stoppcurecv(struct ath_hal *ah); |
1055 | bool ath9k_hw_stopdmarecv(struct ath_hal *ah); | 1041 | bool ath9k_hw_stopdmarecv(struct ath_hal *ah); |
1042 | void ath9k_hw_btcoex_enable(struct ath_hal *ah); | ||
1056 | 1043 | ||
1057 | #endif | 1044 | #endif |