diff options
author | Sujith <Sujith.Manoharan@atheros.com> | 2009-02-09 02:57:26 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-02-13 13:45:10 -0500 |
commit | 2660b81a378ab227b78c4cc618453fa7e19a7c7b (patch) | |
tree | ea305af43f0e27c86538fecce6c9a4e0151dbc78 /drivers/net/wireless/ath9k/ani.c | |
parent | f74df6fbe31561091bf42be0ed30232be2b9d3ac (diff) |
ath9k: Remove all the useless ah_ variable prefixes
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k/ani.c')
-rw-r--r-- | drivers/net/wireless/ath9k/ani.c | 186 |
1 files changed, 93 insertions, 93 deletions
diff --git a/drivers/net/wireless/ath9k/ani.c b/drivers/net/wireless/ath9k/ani.c index 6bd2d5766019..d4df7e611df5 100644 --- a/drivers/net/wireless/ath9k/ani.c +++ b/drivers/net/wireless/ath9k/ani.c | |||
@@ -21,12 +21,12 @@ static int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah, | |||
21 | { | 21 | { |
22 | int i; | 22 | int i; |
23 | 23 | ||
24 | for (i = 0; i < ARRAY_SIZE(ah->ah_ani); i++) { | 24 | for (i = 0; i < ARRAY_SIZE(ah->ani); i++) { |
25 | if (ah->ah_ani[i].c && | 25 | if (ah->ani[i].c && |
26 | ah->ah_ani[i].c->channel == chan->channel) | 26 | ah->ani[i].c->channel == chan->channel) |
27 | return i; | 27 | return i; |
28 | if (ah->ah_ani[i].c == NULL) { | 28 | if (ah->ani[i].c == NULL) { |
29 | ah->ah_ani[i].c = chan; | 29 | ah->ani[i].c = chan; |
30 | return i; | 30 | return i; |
31 | } | 31 | } |
32 | } | 32 | } |
@@ -40,37 +40,37 @@ static int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah, | |||
40 | static bool ath9k_hw_ani_control(struct ath_hw *ah, | 40 | static bool ath9k_hw_ani_control(struct ath_hw *ah, |
41 | enum ath9k_ani_cmd cmd, int param) | 41 | enum ath9k_ani_cmd cmd, int param) |
42 | { | 42 | { |
43 | struct ar5416AniState *aniState = ah->ah_curani; | 43 | struct ar5416AniState *aniState = ah->curani; |
44 | 44 | ||
45 | switch (cmd & ah->ah_ani_function) { | 45 | switch (cmd & ah->ani_function) { |
46 | case ATH9K_ANI_NOISE_IMMUNITY_LEVEL:{ | 46 | case ATH9K_ANI_NOISE_IMMUNITY_LEVEL:{ |
47 | u32 level = param; | 47 | u32 level = param; |
48 | 48 | ||
49 | if (level >= ARRAY_SIZE(ah->ah_totalSizeDesired)) { | 49 | if (level >= ARRAY_SIZE(ah->totalSizeDesired)) { |
50 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, | 50 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, |
51 | "level out of range (%u > %u)\n", | 51 | "level out of range (%u > %u)\n", |
52 | level, | 52 | level, |
53 | (unsigned)ARRAY_SIZE(ah->ah_totalSizeDesired)); | 53 | (unsigned)ARRAY_SIZE(ah->totalSizeDesired)); |
54 | return false; | 54 | return false; |
55 | } | 55 | } |
56 | 56 | ||
57 | REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, | 57 | REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, |
58 | AR_PHY_DESIRED_SZ_TOT_DES, | 58 | AR_PHY_DESIRED_SZ_TOT_DES, |
59 | ah->ah_totalSizeDesired[level]); | 59 | ah->totalSizeDesired[level]); |
60 | REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, | 60 | REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, |
61 | AR_PHY_AGC_CTL1_COARSE_LOW, | 61 | AR_PHY_AGC_CTL1_COARSE_LOW, |
62 | ah->ah_coarseLow[level]); | 62 | ah->coarse_low[level]); |
63 | REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, | 63 | REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, |
64 | AR_PHY_AGC_CTL1_COARSE_HIGH, | 64 | AR_PHY_AGC_CTL1_COARSE_HIGH, |
65 | ah->ah_coarseHigh[level]); | 65 | ah->coarse_high[level]); |
66 | REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, | 66 | REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, |
67 | AR_PHY_FIND_SIG_FIRPWR, | 67 | AR_PHY_FIND_SIG_FIRPWR, |
68 | ah->ah_firpwr[level]); | 68 | ah->firpwr[level]); |
69 | 69 | ||
70 | if (level > aniState->noiseImmunityLevel) | 70 | if (level > aniState->noiseImmunityLevel) |
71 | ah->ah_stats.ast_ani_niup++; | 71 | ah->stats.ast_ani_niup++; |
72 | else if (level < aniState->noiseImmunityLevel) | 72 | else if (level < aniState->noiseImmunityLevel) |
73 | ah->ah_stats.ast_ani_nidown++; | 73 | ah->stats.ast_ani_nidown++; |
74 | aniState->noiseImmunityLevel = level; | 74 | aniState->noiseImmunityLevel = level; |
75 | break; | 75 | break; |
76 | } | 76 | } |
@@ -124,9 +124,9 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah, | |||
124 | 124 | ||
125 | if (!on != aniState->ofdmWeakSigDetectOff) { | 125 | if (!on != aniState->ofdmWeakSigDetectOff) { |
126 | if (on) | 126 | if (on) |
127 | ah->ah_stats.ast_ani_ofdmon++; | 127 | ah->stats.ast_ani_ofdmon++; |
128 | else | 128 | else |
129 | ah->ah_stats.ast_ani_ofdmoff++; | 129 | ah->stats.ast_ani_ofdmoff++; |
130 | aniState->ofdmWeakSigDetectOff = !on; | 130 | aniState->ofdmWeakSigDetectOff = !on; |
131 | } | 131 | } |
132 | break; | 132 | break; |
@@ -140,9 +140,9 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah, | |||
140 | weakSigThrCck[high]); | 140 | weakSigThrCck[high]); |
141 | if (high != aniState->cckWeakSigThreshold) { | 141 | if (high != aniState->cckWeakSigThreshold) { |
142 | if (high) | 142 | if (high) |
143 | ah->ah_stats.ast_ani_cckhigh++; | 143 | ah->stats.ast_ani_cckhigh++; |
144 | else | 144 | else |
145 | ah->ah_stats.ast_ani_ccklow++; | 145 | ah->stats.ast_ani_ccklow++; |
146 | aniState->cckWeakSigThreshold = high; | 146 | aniState->cckWeakSigThreshold = high; |
147 | } | 147 | } |
148 | break; | 148 | break; |
@@ -162,9 +162,9 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah, | |||
162 | AR_PHY_FIND_SIG_FIRSTEP, | 162 | AR_PHY_FIND_SIG_FIRSTEP, |
163 | firstep[level]); | 163 | firstep[level]); |
164 | if (level > aniState->firstepLevel) | 164 | if (level > aniState->firstepLevel) |
165 | ah->ah_stats.ast_ani_stepup++; | 165 | ah->stats.ast_ani_stepup++; |
166 | else if (level < aniState->firstepLevel) | 166 | else if (level < aniState->firstepLevel) |
167 | ah->ah_stats.ast_ani_stepdown++; | 167 | ah->stats.ast_ani_stepdown++; |
168 | aniState->firstepLevel = level; | 168 | aniState->firstepLevel = level; |
169 | break; | 169 | break; |
170 | } | 170 | } |
@@ -185,9 +185,9 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah, | |||
185 | AR_PHY_TIMING5_CYCPWR_THR1, | 185 | AR_PHY_TIMING5_CYCPWR_THR1, |
186 | cycpwrThr1[level]); | 186 | cycpwrThr1[level]); |
187 | if (level > aniState->spurImmunityLevel) | 187 | if (level > aniState->spurImmunityLevel) |
188 | ah->ah_stats.ast_ani_spurup++; | 188 | ah->stats.ast_ani_spurup++; |
189 | else if (level < aniState->spurImmunityLevel) | 189 | else if (level < aniState->spurImmunityLevel) |
190 | ah->ah_stats.ast_ani_spurdown++; | 190 | ah->stats.ast_ani_spurdown++; |
191 | aniState->spurImmunityLevel = level; | 191 | aniState->spurImmunityLevel = level; |
192 | break; | 192 | break; |
193 | } | 193 | } |
@@ -235,10 +235,10 @@ static void ath9k_ani_restart(struct ath_hw *ah) | |||
235 | if (!DO_ANI(ah)) | 235 | if (!DO_ANI(ah)) |
236 | return; | 236 | return; |
237 | 237 | ||
238 | aniState = ah->ah_curani; | 238 | aniState = ah->curani; |
239 | 239 | ||
240 | aniState->listenTime = 0; | 240 | aniState->listenTime = 0; |
241 | if (ah->ah_hasHwPhyCounters) { | 241 | if (ah->has_hw_phycounters) { |
242 | if (aniState->ofdmTrigHigh > AR_PHY_COUNTMAX) { | 242 | if (aniState->ofdmTrigHigh > AR_PHY_COUNTMAX) { |
243 | aniState->ofdmPhyErrBase = 0; | 243 | aniState->ofdmPhyErrBase = 0; |
244 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, | 244 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, |
@@ -279,7 +279,7 @@ static void ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah) | |||
279 | if (!DO_ANI(ah)) | 279 | if (!DO_ANI(ah)) |
280 | return; | 280 | return; |
281 | 281 | ||
282 | aniState = ah->ah_curani; | 282 | aniState = ah->curani; |
283 | 283 | ||
284 | if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) { | 284 | if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) { |
285 | if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, | 285 | if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, |
@@ -295,7 +295,7 @@ static void ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah) | |||
295 | } | 295 | } |
296 | } | 296 | } |
297 | 297 | ||
298 | if (ah->ah_opmode == NL80211_IFTYPE_AP) { | 298 | if (ah->opmode == NL80211_IFTYPE_AP) { |
299 | if (aniState->firstepLevel < HAL_FIRST_STEP_MAX) { | 299 | if (aniState->firstepLevel < HAL_FIRST_STEP_MAX) { |
300 | ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, | 300 | ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, |
301 | aniState->firstepLevel + 1); | 301 | aniState->firstepLevel + 1); |
@@ -350,14 +350,14 @@ static void ath9k_hw_ani_cck_err_trigger(struct ath_hw *ah) | |||
350 | if (!DO_ANI(ah)) | 350 | if (!DO_ANI(ah)) |
351 | return; | 351 | return; |
352 | 352 | ||
353 | aniState = ah->ah_curani; | 353 | aniState = ah->curani; |
354 | if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) { | 354 | if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) { |
355 | if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, | 355 | if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, |
356 | aniState->noiseImmunityLevel + 1)) { | 356 | aniState->noiseImmunityLevel + 1)) { |
357 | return; | 357 | return; |
358 | } | 358 | } |
359 | } | 359 | } |
360 | if (ah->ah_opmode == NL80211_IFTYPE_AP) { | 360 | if (ah->opmode == NL80211_IFTYPE_AP) { |
361 | if (aniState->firstepLevel < HAL_FIRST_STEP_MAX) { | 361 | if (aniState->firstepLevel < HAL_FIRST_STEP_MAX) { |
362 | ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, | 362 | ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, |
363 | aniState->firstepLevel + 1); | 363 | aniState->firstepLevel + 1); |
@@ -383,9 +383,9 @@ static void ath9k_hw_ani_lower_immunity(struct ath_hw *ah) | |||
383 | struct ar5416AniState *aniState; | 383 | struct ar5416AniState *aniState; |
384 | int32_t rssi; | 384 | int32_t rssi; |
385 | 385 | ||
386 | aniState = ah->ah_curani; | 386 | aniState = ah->curani; |
387 | 387 | ||
388 | if (ah->ah_opmode == NL80211_IFTYPE_AP) { | 388 | if (ah->opmode == NL80211_IFTYPE_AP) { |
389 | if (aniState->firstepLevel > 0) { | 389 | if (aniState->firstepLevel > 0) { |
390 | if (ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, | 390 | if (ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, |
391 | aniState->firstepLevel - 1)) | 391 | aniState->firstepLevel - 1)) |
@@ -441,11 +441,11 @@ static int32_t ath9k_hw_ani_get_listen_time(struct ath_hw *ah) | |||
441 | rxFrameCount = REG_READ(ah, AR_RFCNT); | 441 | rxFrameCount = REG_READ(ah, AR_RFCNT); |
442 | cycleCount = REG_READ(ah, AR_CCCNT); | 442 | cycleCount = REG_READ(ah, AR_CCCNT); |
443 | 443 | ||
444 | aniState = ah->ah_curani; | 444 | aniState = ah->curani; |
445 | if (aniState->cycleCount == 0 || aniState->cycleCount > cycleCount) { | 445 | if (aniState->cycleCount == 0 || aniState->cycleCount > cycleCount) { |
446 | 446 | ||
447 | listenTime = 0; | 447 | listenTime = 0; |
448 | ah->ah_stats.ast_ani_lzero++; | 448 | ah->stats.ast_ani_lzero++; |
449 | } else { | 449 | } else { |
450 | int32_t ccdelta = cycleCount - aniState->cycleCount; | 450 | int32_t ccdelta = cycleCount - aniState->cycleCount; |
451 | int32_t rfdelta = rxFrameCount - aniState->rxFrameCount; | 451 | int32_t rfdelta = rxFrameCount - aniState->rxFrameCount; |
@@ -462,21 +462,21 @@ static int32_t ath9k_hw_ani_get_listen_time(struct ath_hw *ah) | |||
462 | void ath9k_ani_reset(struct ath_hw *ah) | 462 | void ath9k_ani_reset(struct ath_hw *ah) |
463 | { | 463 | { |
464 | struct ar5416AniState *aniState; | 464 | struct ar5416AniState *aniState; |
465 | struct ath9k_channel *chan = ah->ah_curchan; | 465 | struct ath9k_channel *chan = ah->curchan; |
466 | int index; | 466 | int index; |
467 | 467 | ||
468 | if (!DO_ANI(ah)) | 468 | if (!DO_ANI(ah)) |
469 | return; | 469 | return; |
470 | 470 | ||
471 | index = ath9k_hw_get_ani_channel_idx(ah, chan); | 471 | index = ath9k_hw_get_ani_channel_idx(ah, chan); |
472 | aniState = &ah->ah_ani[index]; | 472 | aniState = &ah->ani[index]; |
473 | ah->ah_curani = aniState; | 473 | ah->curani = aniState; |
474 | 474 | ||
475 | if (DO_ANI(ah) && ah->ah_opmode != NL80211_IFTYPE_STATION | 475 | if (DO_ANI(ah) && ah->opmode != NL80211_IFTYPE_STATION |
476 | && ah->ah_opmode != NL80211_IFTYPE_ADHOC) { | 476 | && ah->opmode != NL80211_IFTYPE_ADHOC) { |
477 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, | 477 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, |
478 | "Reset ANI state opmode %u\n", ah->ah_opmode); | 478 | "Reset ANI state opmode %u\n", ah->opmode); |
479 | ah->ah_stats.ast_ani_reset++; | 479 | ah->stats.ast_ani_reset++; |
480 | 480 | ||
481 | ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, 0); | 481 | ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, 0); |
482 | ath9k_hw_ani_control(ah, ATH9K_ANI_SPUR_IMMUNITY_LEVEL, 0); | 482 | ath9k_hw_ani_control(ah, ATH9K_ANI_SPUR_IMMUNITY_LEVEL, 0); |
@@ -489,15 +489,15 @@ void ath9k_ani_reset(struct ath_hw *ah) | |||
489 | ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) | | 489 | ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) | |
490 | ATH9K_RX_FILTER_PHYERR); | 490 | ATH9K_RX_FILTER_PHYERR); |
491 | 491 | ||
492 | if (ah->ah_opmode == NL80211_IFTYPE_AP) { | 492 | if (ah->opmode == NL80211_IFTYPE_AP) { |
493 | ah->ah_curani->ofdmTrigHigh = | 493 | ah->curani->ofdmTrigHigh = |
494 | ah->ah_config.ofdm_trig_high; | 494 | ah->config.ofdm_trig_high; |
495 | ah->ah_curani->ofdmTrigLow = | 495 | ah->curani->ofdmTrigLow = |
496 | ah->ah_config.ofdm_trig_low; | 496 | ah->config.ofdm_trig_low; |
497 | ah->ah_curani->cckTrigHigh = | 497 | ah->curani->cckTrigHigh = |
498 | ah->ah_config.cck_trig_high; | 498 | ah->config.cck_trig_high; |
499 | ah->ah_curani->cckTrigLow = | 499 | ah->curani->cckTrigLow = |
500 | ah->ah_config.cck_trig_low; | 500 | ah->config.cck_trig_low; |
501 | } | 501 | } |
502 | ath9k_ani_restart(ah); | 502 | ath9k_ani_restart(ah); |
503 | return; | 503 | return; |
@@ -518,7 +518,7 @@ void ath9k_ani_reset(struct ath_hw *ah) | |||
518 | if (aniState->firstepLevel != 0) | 518 | if (aniState->firstepLevel != 0) |
519 | ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, | 519 | ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, |
520 | aniState->firstepLevel); | 520 | aniState->firstepLevel); |
521 | if (ah->ah_hasHwPhyCounters) { | 521 | if (ah->has_hw_phycounters) { |
522 | ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) & | 522 | ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) & |
523 | ~ATH9K_RX_FILTER_PHYERR); | 523 | ~ATH9K_RX_FILTER_PHYERR); |
524 | ath9k_ani_restart(ah); | 524 | ath9k_ani_restart(ah); |
@@ -542,19 +542,19 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah, | |||
542 | if (!DO_ANI(ah)) | 542 | if (!DO_ANI(ah)) |
543 | return; | 543 | return; |
544 | 544 | ||
545 | aniState = ah->ah_curani; | 545 | aniState = ah->curani; |
546 | ah->ah_stats.ast_nodestats = *stats; | 546 | ah->stats.ast_nodestats = *stats; |
547 | 547 | ||
548 | listenTime = ath9k_hw_ani_get_listen_time(ah); | 548 | listenTime = ath9k_hw_ani_get_listen_time(ah); |
549 | if (listenTime < 0) { | 549 | if (listenTime < 0) { |
550 | ah->ah_stats.ast_ani_lneg++; | 550 | ah->stats.ast_ani_lneg++; |
551 | ath9k_ani_restart(ah); | 551 | ath9k_ani_restart(ah); |
552 | return; | 552 | return; |
553 | } | 553 | } |
554 | 554 | ||
555 | aniState->listenTime += listenTime; | 555 | aniState->listenTime += listenTime; |
556 | 556 | ||
557 | if (ah->ah_hasHwPhyCounters) { | 557 | if (ah->has_hw_phycounters) { |
558 | u32 phyCnt1, phyCnt2; | 558 | u32 phyCnt1, phyCnt2; |
559 | u32 ofdmPhyErrCnt, cckPhyErrCnt; | 559 | u32 ofdmPhyErrCnt, cckPhyErrCnt; |
560 | 560 | ||
@@ -591,24 +591,24 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah, | |||
591 | } | 591 | } |
592 | 592 | ||
593 | ofdmPhyErrCnt = phyCnt1 - aniState->ofdmPhyErrBase; | 593 | ofdmPhyErrCnt = phyCnt1 - aniState->ofdmPhyErrBase; |
594 | ah->ah_stats.ast_ani_ofdmerrs += | 594 | ah->stats.ast_ani_ofdmerrs += |
595 | ofdmPhyErrCnt - aniState->ofdmPhyErrCount; | 595 | ofdmPhyErrCnt - aniState->ofdmPhyErrCount; |
596 | aniState->ofdmPhyErrCount = ofdmPhyErrCnt; | 596 | aniState->ofdmPhyErrCount = ofdmPhyErrCnt; |
597 | 597 | ||
598 | cckPhyErrCnt = phyCnt2 - aniState->cckPhyErrBase; | 598 | cckPhyErrCnt = phyCnt2 - aniState->cckPhyErrBase; |
599 | ah->ah_stats.ast_ani_cckerrs += | 599 | ah->stats.ast_ani_cckerrs += |
600 | cckPhyErrCnt - aniState->cckPhyErrCount; | 600 | cckPhyErrCnt - aniState->cckPhyErrCount; |
601 | aniState->cckPhyErrCount = cckPhyErrCnt; | 601 | aniState->cckPhyErrCount = cckPhyErrCnt; |
602 | } | 602 | } |
603 | 603 | ||
604 | if (aniState->listenTime > 5 * ah->ah_aniPeriod) { | 604 | if (aniState->listenTime > 5 * ah->aniperiod) { |
605 | if (aniState->ofdmPhyErrCount <= aniState->listenTime * | 605 | if (aniState->ofdmPhyErrCount <= aniState->listenTime * |
606 | aniState->ofdmTrigLow / 1000 && | 606 | aniState->ofdmTrigLow / 1000 && |
607 | aniState->cckPhyErrCount <= aniState->listenTime * | 607 | aniState->cckPhyErrCount <= aniState->listenTime * |
608 | aniState->cckTrigLow / 1000) | 608 | aniState->cckTrigLow / 1000) |
609 | ath9k_hw_ani_lower_immunity(ah); | 609 | ath9k_hw_ani_lower_immunity(ah); |
610 | ath9k_ani_restart(ah); | 610 | ath9k_ani_restart(ah); |
611 | } else if (aniState->listenTime > ah->ah_aniPeriod) { | 611 | } else if (aniState->listenTime > ah->aniperiod) { |
612 | if (aniState->ofdmPhyErrCount > aniState->listenTime * | 612 | if (aniState->ofdmPhyErrCount > aniState->listenTime * |
613 | aniState->ofdmTrigHigh / 1000) { | 613 | aniState->ofdmTrigHigh / 1000) { |
614 | ath9k_hw_ani_ofdm_err_trigger(ah); | 614 | ath9k_hw_ani_ofdm_err_trigger(ah); |
@@ -624,7 +624,7 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah, | |||
624 | 624 | ||
625 | bool ath9k_hw_phycounters(struct ath_hw *ah) | 625 | bool ath9k_hw_phycounters(struct ath_hw *ah) |
626 | { | 626 | { |
627 | return ah->ah_hasHwPhyCounters ? true : false; | 627 | return ah->has_hw_phycounters ? true : false; |
628 | } | 628 | } |
629 | 629 | ||
630 | void ath9k_enable_mib_counters(struct ath_hw *ah) | 630 | void ath9k_enable_mib_counters(struct ath_hw *ah) |
@@ -712,7 +712,7 @@ void ath9k_hw_procmibevent(struct ath_hw *ah, | |||
712 | 712 | ||
713 | /* Clear the mib counters and save them in the stats */ | 713 | /* Clear the mib counters and save them in the stats */ |
714 | ath9k_hw_update_mibstats(ah, &ah->ah_mibStats); | 714 | ath9k_hw_update_mibstats(ah, &ah->ah_mibStats); |
715 | ah->ah_stats.ast_nodestats = *stats; | 715 | ah->stats.ast_nodestats = *stats; |
716 | 716 | ||
717 | if (!DO_ANI(ah)) | 717 | if (!DO_ANI(ah)) |
718 | return; | 718 | return; |
@@ -722,17 +722,17 @@ void ath9k_hw_procmibevent(struct ath_hw *ah, | |||
722 | phyCnt2 = REG_READ(ah, AR_PHY_ERR_2); | 722 | phyCnt2 = REG_READ(ah, AR_PHY_ERR_2); |
723 | if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) || | 723 | if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) || |
724 | ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) { | 724 | ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) { |
725 | struct ar5416AniState *aniState = ah->ah_curani; | 725 | struct ar5416AniState *aniState = ah->curani; |
726 | u32 ofdmPhyErrCnt, cckPhyErrCnt; | 726 | u32 ofdmPhyErrCnt, cckPhyErrCnt; |
727 | 727 | ||
728 | /* NB: only use ast_ani_*errs with AH_PRIVATE_DIAG */ | 728 | /* NB: only use ast_ani_*errs with AH_PRIVATE_DIAG */ |
729 | ofdmPhyErrCnt = phyCnt1 - aniState->ofdmPhyErrBase; | 729 | ofdmPhyErrCnt = phyCnt1 - aniState->ofdmPhyErrBase; |
730 | ah->ah_stats.ast_ani_ofdmerrs += | 730 | ah->stats.ast_ani_ofdmerrs += |
731 | ofdmPhyErrCnt - aniState->ofdmPhyErrCount; | 731 | ofdmPhyErrCnt - aniState->ofdmPhyErrCount; |
732 | aniState->ofdmPhyErrCount = ofdmPhyErrCnt; | 732 | aniState->ofdmPhyErrCount = ofdmPhyErrCnt; |
733 | 733 | ||
734 | cckPhyErrCnt = phyCnt2 - aniState->cckPhyErrBase; | 734 | cckPhyErrCnt = phyCnt2 - aniState->cckPhyErrBase; |
735 | ah->ah_stats.ast_ani_cckerrs += | 735 | ah->stats.ast_ani_cckerrs += |
736 | cckPhyErrCnt - aniState->cckPhyErrCount; | 736 | cckPhyErrCnt - aniState->cckPhyErrCount; |
737 | aniState->cckPhyErrCount = cckPhyErrCnt; | 737 | aniState->cckPhyErrCount = cckPhyErrCnt; |
738 | 738 | ||
@@ -761,10 +761,10 @@ void ath9k_hw_ani_setup(struct ath_hw *ah) | |||
761 | const int firpwr[] = { -78, -78, -78, -78, -80 }; | 761 | const int firpwr[] = { -78, -78, -78, -78, -80 }; |
762 | 762 | ||
763 | for (i = 0; i < 5; i++) { | 763 | for (i = 0; i < 5; i++) { |
764 | ah->ah_totalSizeDesired[i] = totalSizeDesired[i]; | 764 | ah->totalSizeDesired[i] = totalSizeDesired[i]; |
765 | ah->ah_coarseHigh[i] = coarseHigh[i]; | 765 | ah->coarse_high[i] = coarseHigh[i]; |
766 | ah->ah_coarseLow[i] = coarseLow[i]; | 766 | ah->coarse_low[i] = coarseLow[i]; |
767 | ah->ah_firpwr[i] = firpwr[i]; | 767 | ah->firpwr[i] = firpwr[i]; |
768 | } | 768 | } |
769 | } | 769 | } |
770 | 770 | ||
@@ -774,50 +774,50 @@ void ath9k_hw_ani_attach(struct ath_hw *ah) | |||
774 | 774 | ||
775 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Attach ANI\n"); | 775 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Attach ANI\n"); |
776 | 776 | ||
777 | ah->ah_hasHwPhyCounters = 1; | 777 | ah->has_hw_phycounters = 1; |
778 | 778 | ||
779 | memset(ah->ah_ani, 0, sizeof(ah->ah_ani)); | 779 | memset(ah->ani, 0, sizeof(ah->ani)); |
780 | for (i = 0; i < ARRAY_SIZE(ah->ah_ani); i++) { | 780 | for (i = 0; i < ARRAY_SIZE(ah->ani); i++) { |
781 | ah->ah_ani[i].ofdmTrigHigh = ATH9K_ANI_OFDM_TRIG_HIGH; | 781 | ah->ani[i].ofdmTrigHigh = ATH9K_ANI_OFDM_TRIG_HIGH; |
782 | ah->ah_ani[i].ofdmTrigLow = ATH9K_ANI_OFDM_TRIG_LOW; | 782 | ah->ani[i].ofdmTrigLow = ATH9K_ANI_OFDM_TRIG_LOW; |
783 | ah->ah_ani[i].cckTrigHigh = ATH9K_ANI_CCK_TRIG_HIGH; | 783 | ah->ani[i].cckTrigHigh = ATH9K_ANI_CCK_TRIG_HIGH; |
784 | ah->ah_ani[i].cckTrigLow = ATH9K_ANI_CCK_TRIG_LOW; | 784 | ah->ani[i].cckTrigLow = ATH9K_ANI_CCK_TRIG_LOW; |
785 | ah->ah_ani[i].rssiThrHigh = ATH9K_ANI_RSSI_THR_HIGH; | 785 | ah->ani[i].rssiThrHigh = ATH9K_ANI_RSSI_THR_HIGH; |
786 | ah->ah_ani[i].rssiThrLow = ATH9K_ANI_RSSI_THR_LOW; | 786 | ah->ani[i].rssiThrLow = ATH9K_ANI_RSSI_THR_LOW; |
787 | ah->ah_ani[i].ofdmWeakSigDetectOff = | 787 | ah->ani[i].ofdmWeakSigDetectOff = |
788 | !ATH9K_ANI_USE_OFDM_WEAK_SIG; | 788 | !ATH9K_ANI_USE_OFDM_WEAK_SIG; |
789 | ah->ah_ani[i].cckWeakSigThreshold = | 789 | ah->ani[i].cckWeakSigThreshold = |
790 | ATH9K_ANI_CCK_WEAK_SIG_THR; | 790 | ATH9K_ANI_CCK_WEAK_SIG_THR; |
791 | ah->ah_ani[i].spurImmunityLevel = ATH9K_ANI_SPUR_IMMUNE_LVL; | 791 | ah->ani[i].spurImmunityLevel = ATH9K_ANI_SPUR_IMMUNE_LVL; |
792 | ah->ah_ani[i].firstepLevel = ATH9K_ANI_FIRSTEP_LVL; | 792 | ah->ani[i].firstepLevel = ATH9K_ANI_FIRSTEP_LVL; |
793 | if (ah->ah_hasHwPhyCounters) { | 793 | if (ah->has_hw_phycounters) { |
794 | ah->ah_ani[i].ofdmPhyErrBase = | 794 | ah->ani[i].ofdmPhyErrBase = |
795 | AR_PHY_COUNTMAX - ATH9K_ANI_OFDM_TRIG_HIGH; | 795 | AR_PHY_COUNTMAX - ATH9K_ANI_OFDM_TRIG_HIGH; |
796 | ah->ah_ani[i].cckPhyErrBase = | 796 | ah->ani[i].cckPhyErrBase = |
797 | AR_PHY_COUNTMAX - ATH9K_ANI_CCK_TRIG_HIGH; | 797 | AR_PHY_COUNTMAX - ATH9K_ANI_CCK_TRIG_HIGH; |
798 | } | 798 | } |
799 | } | 799 | } |
800 | if (ah->ah_hasHwPhyCounters) { | 800 | if (ah->has_hw_phycounters) { |
801 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, | 801 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, |
802 | "Setting OfdmErrBase = 0x%08x\n", | 802 | "Setting OfdmErrBase = 0x%08x\n", |
803 | ah->ah_ani[0].ofdmPhyErrBase); | 803 | ah->ani[0].ofdmPhyErrBase); |
804 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Setting cckErrBase = 0x%08x\n", | 804 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Setting cckErrBase = 0x%08x\n", |
805 | ah->ah_ani[0].cckPhyErrBase); | 805 | ah->ani[0].cckPhyErrBase); |
806 | 806 | ||
807 | REG_WRITE(ah, AR_PHY_ERR_1, ah->ah_ani[0].ofdmPhyErrBase); | 807 | REG_WRITE(ah, AR_PHY_ERR_1, ah->ani[0].ofdmPhyErrBase); |
808 | REG_WRITE(ah, AR_PHY_ERR_2, ah->ah_ani[0].cckPhyErrBase); | 808 | REG_WRITE(ah, AR_PHY_ERR_2, ah->ani[0].cckPhyErrBase); |
809 | ath9k_enable_mib_counters(ah); | 809 | ath9k_enable_mib_counters(ah); |
810 | } | 810 | } |
811 | ah->ah_aniPeriod = ATH9K_ANI_PERIOD; | 811 | ah->aniperiod = ATH9K_ANI_PERIOD; |
812 | if (ah->ah_config.enable_ani) | 812 | if (ah->config.enable_ani) |
813 | ah->ah_procPhyErr |= HAL_PROCESS_ANI; | 813 | ah->proc_phyerr |= HAL_PROCESS_ANI; |
814 | } | 814 | } |
815 | 815 | ||
816 | void ath9k_hw_ani_detach(struct ath_hw *ah) | 816 | void ath9k_hw_ani_detach(struct ath_hw *ah) |
817 | { | 817 | { |
818 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Detach ANI\n"); | 818 | DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Detach ANI\n"); |
819 | 819 | ||
820 | if (ah->ah_hasHwPhyCounters) { | 820 | if (ah->has_hw_phycounters) { |
821 | ath9k_hw_disable_mib_counters(ah); | 821 | ath9k_hw_disable_mib_counters(ah); |
822 | REG_WRITE(ah, AR_PHY_ERR_1, 0); | 822 | REG_WRITE(ah, AR_PHY_ERR_1, 0); |
823 | REG_WRITE(ah, AR_PHY_ERR_2, 0); | 823 | REG_WRITE(ah, AR_PHY_ERR_2, 0); |