diff options
author | Rajkumar Manoharan <rmanoharan@atheros.com> | 2011-03-15 10:25:38 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-03-30 14:15:11 -0400 |
commit | b0a9ede228175c25f76314a028d305fd5b2de427 (patch) | |
tree | ee160305418e13122f59043886bdcca00b9f13b5 /drivers/net/wireless/ath/key.c | |
parent | 81544026e4cecb85a8b727d5f64cb3c8a8cb64a3 (diff) |
ath: Speedup key set/reset ops for HTC driver
By enabling buffered register write for ath9k_htc driver
avoids unnecessary dissociation while rekeying phase under
heavy traffic exchange.
Signed-off-by: Rajkumar Manoharan <rmanoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/key.c')
-rw-r--r-- | drivers/net/wireless/ath/key.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/key.c b/drivers/net/wireless/ath/key.c index 37b8e115375a..0d4f39cbdcab 100644 --- a/drivers/net/wireless/ath/key.c +++ b/drivers/net/wireless/ath/key.c | |||
@@ -23,6 +23,14 @@ | |||
23 | 23 | ||
24 | #define REG_READ (common->ops->read) | 24 | #define REG_READ (common->ops->read) |
25 | #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) | 25 | #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) |
26 | #define ENABLE_REGWRITE_BUFFER(_ah) \ | ||
27 | if (common->ops->enable_write_buffer) \ | ||
28 | common->ops->enable_write_buffer((_ah)); | ||
29 | |||
30 | #define REGWRITE_BUFFER_FLUSH(_ah) \ | ||
31 | if (common->ops->write_flush) \ | ||
32 | common->ops->write_flush((_ah)); | ||
33 | |||
26 | 34 | ||
27 | #define IEEE80211_WEP_NKID 4 /* number of key ids */ | 35 | #define IEEE80211_WEP_NKID 4 /* number of key ids */ |
28 | 36 | ||
@@ -42,6 +50,8 @@ bool ath_hw_keyreset(struct ath_common *common, u16 entry) | |||
42 | 50 | ||
43 | keyType = REG_READ(ah, AR_KEYTABLE_TYPE(entry)); | 51 | keyType = REG_READ(ah, AR_KEYTABLE_TYPE(entry)); |
44 | 52 | ||
53 | ENABLE_REGWRITE_BUFFER(ah); | ||
54 | |||
45 | REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0); | 55 | REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0); |
46 | REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0); | 56 | REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0); |
47 | REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0); | 57 | REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0); |
@@ -66,6 +76,8 @@ bool ath_hw_keyreset(struct ath_common *common, u16 entry) | |||
66 | 76 | ||
67 | } | 77 | } |
68 | 78 | ||
79 | REGWRITE_BUFFER_FLUSH(ah); | ||
80 | |||
69 | return true; | 81 | return true; |
70 | } | 82 | } |
71 | EXPORT_SYMBOL(ath_hw_keyreset); | 83 | EXPORT_SYMBOL(ath_hw_keyreset); |
@@ -104,9 +116,13 @@ static bool ath_hw_keysetmac(struct ath_common *common, | |||
104 | } else { | 116 | } else { |
105 | macLo = macHi = 0; | 117 | macLo = macHi = 0; |
106 | } | 118 | } |
119 | ENABLE_REGWRITE_BUFFER(ah); | ||
120 | |||
107 | REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo); | 121 | REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo); |
108 | REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), macHi | unicast_flag); | 122 | REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), macHi | unicast_flag); |
109 | 123 | ||
124 | REGWRITE_BUFFER_FLUSH(ah); | ||
125 | |||
110 | return true; | 126 | return true; |
111 | } | 127 | } |
112 | 128 | ||
@@ -223,6 +239,8 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry, | |||
223 | mic3 = get_unaligned_le16(k->kv_txmic + 0) & 0xffff; | 239 | mic3 = get_unaligned_le16(k->kv_txmic + 0) & 0xffff; |
224 | mic4 = get_unaligned_le32(k->kv_txmic + 4); | 240 | mic4 = get_unaligned_le32(k->kv_txmic + 4); |
225 | 241 | ||
242 | ENABLE_REGWRITE_BUFFER(ah); | ||
243 | |||
226 | /* Write RX[31:0] and TX[31:16] */ | 244 | /* Write RX[31:0] and TX[31:16] */ |
227 | REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0); | 245 | REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0); |
228 | REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), mic1); | 246 | REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), mic1); |
@@ -236,6 +254,8 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry, | |||
236 | REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry), | 254 | REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry), |
237 | AR_KEYTABLE_TYPE_CLR); | 255 | AR_KEYTABLE_TYPE_CLR); |
238 | 256 | ||
257 | REGWRITE_BUFFER_FLUSH(ah); | ||
258 | |||
239 | } else { | 259 | } else { |
240 | /* | 260 | /* |
241 | * TKIP uses four key cache entries (two for group | 261 | * TKIP uses four key cache entries (two for group |
@@ -258,6 +278,8 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry, | |||
258 | mic0 = get_unaligned_le32(k->kv_mic + 0); | 278 | mic0 = get_unaligned_le32(k->kv_mic + 0); |
259 | mic2 = get_unaligned_le32(k->kv_mic + 4); | 279 | mic2 = get_unaligned_le32(k->kv_mic + 4); |
260 | 280 | ||
281 | ENABLE_REGWRITE_BUFFER(ah); | ||
282 | |||
261 | /* Write MIC key[31:0] */ | 283 | /* Write MIC key[31:0] */ |
262 | REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0); | 284 | REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0); |
263 | REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0); | 285 | REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0); |
@@ -270,8 +292,12 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry, | |||
270 | REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0); | 292 | REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0); |
271 | REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry), | 293 | REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry), |
272 | AR_KEYTABLE_TYPE_CLR); | 294 | AR_KEYTABLE_TYPE_CLR); |
295 | |||
296 | REGWRITE_BUFFER_FLUSH(ah); | ||
273 | } | 297 | } |
274 | 298 | ||
299 | ENABLE_REGWRITE_BUFFER(ah); | ||
300 | |||
275 | /* MAC address registers are reserved for the MIC entry */ | 301 | /* MAC address registers are reserved for the MIC entry */ |
276 | REG_WRITE(ah, AR_KEYTABLE_MAC0(micentry), 0); | 302 | REG_WRITE(ah, AR_KEYTABLE_MAC0(micentry), 0); |
277 | REG_WRITE(ah, AR_KEYTABLE_MAC1(micentry), 0); | 303 | REG_WRITE(ah, AR_KEYTABLE_MAC1(micentry), 0); |
@@ -283,7 +309,11 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry, | |||
283 | */ | 309 | */ |
284 | REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0); | 310 | REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0); |
285 | REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1); | 311 | REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1); |
312 | |||
313 | REGWRITE_BUFFER_FLUSH(ah); | ||
286 | } else { | 314 | } else { |
315 | ENABLE_REGWRITE_BUFFER(ah); | ||
316 | |||
287 | /* Write key[47:0] */ | 317 | /* Write key[47:0] */ |
288 | REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0); | 318 | REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0); |
289 | REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1); | 319 | REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1); |
@@ -296,6 +326,8 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry, | |||
296 | REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4); | 326 | REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4); |
297 | REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType); | 327 | REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType); |
298 | 328 | ||
329 | REGWRITE_BUFFER_FLUSH(ah); | ||
330 | |||
299 | /* Write MAC address for the entry */ | 331 | /* Write MAC address for the entry */ |
300 | (void) ath_hw_keysetmac(common, entry, mac); | 332 | (void) ath_hw_keysetmac(common, entry, mac); |
301 | } | 333 | } |