diff options
author | Felix Fietkau <nbd@openwrt.org> | 2010-04-15 17:39:22 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-04-16 15:43:43 -0400 |
commit | 57b32227cd7f1f81f4143d8bc82a5ffe37ab4df9 (patch) | |
tree | 0b8b4730d9785c024d1f0a31ffb91b4e8f47dc17 /drivers/net/wireless/ath/ath9k | |
parent | c14a85dad438ee2c3d0bec6f11295d3a6efd4127 (diff) |
ath9k_hw: Update ath9k_hw_set_dma for AR9300
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 18 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/reg.h | 6 |
2 files changed, 21 insertions, 3 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index ccd819a4a816..fd146c8d4cd8 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -836,13 +836,16 @@ u32 ath9k_regd_get_ctl(struct ath_regulatory *reg, struct ath9k_channel *chan) | |||
836 | 836 | ||
837 | static inline void ath9k_hw_set_dma(struct ath_hw *ah) | 837 | static inline void ath9k_hw_set_dma(struct ath_hw *ah) |
838 | { | 838 | { |
839 | struct ath_common *common = ath9k_hw_common(ah); | ||
839 | u32 regval; | 840 | u32 regval; |
840 | 841 | ||
841 | /* | 842 | /* |
842 | * set AHB_MODE not to do cacheline prefetches | 843 | * set AHB_MODE not to do cacheline prefetches |
843 | */ | 844 | */ |
844 | regval = REG_READ(ah, AR_AHB_MODE); | 845 | if (!AR_SREV_9300_20_OR_LATER(ah)) { |
845 | REG_WRITE(ah, AR_AHB_MODE, regval | AR_AHB_PREFETCH_RD_EN); | 846 | regval = REG_READ(ah, AR_AHB_MODE); |
847 | REG_WRITE(ah, AR_AHB_MODE, regval | AR_AHB_PREFETCH_RD_EN); | ||
848 | } | ||
846 | 849 | ||
847 | /* | 850 | /* |
848 | * let mac dma reads be in 128 byte chunks | 851 | * let mac dma reads be in 128 byte chunks |
@@ -855,7 +858,8 @@ static inline void ath9k_hw_set_dma(struct ath_hw *ah) | |||
855 | * The initial value depends on whether aggregation is enabled, and is | 858 | * The initial value depends on whether aggregation is enabled, and is |
856 | * adjusted whenever underruns are detected. | 859 | * adjusted whenever underruns are detected. |
857 | */ | 860 | */ |
858 | REG_RMW_FIELD(ah, AR_TXCFG, AR_FTRIG, ah->tx_trig_level); | 861 | if (!AR_SREV_9300_20_OR_LATER(ah)) |
862 | REG_RMW_FIELD(ah, AR_TXCFG, AR_FTRIG, ah->tx_trig_level); | ||
859 | 863 | ||
860 | /* | 864 | /* |
861 | * let mac dma writes be in 128 byte chunks | 865 | * let mac dma writes be in 128 byte chunks |
@@ -868,6 +872,14 @@ static inline void ath9k_hw_set_dma(struct ath_hw *ah) | |||
868 | */ | 872 | */ |
869 | REG_WRITE(ah, AR_RXFIFO_CFG, 0x200); | 873 | REG_WRITE(ah, AR_RXFIFO_CFG, 0x200); |
870 | 874 | ||
875 | if (AR_SREV_9300_20_OR_LATER(ah)) { | ||
876 | REG_RMW_FIELD(ah, AR_RXBP_THRESH, AR_RXBP_THRESH_HP, 0x1); | ||
877 | REG_RMW_FIELD(ah, AR_RXBP_THRESH, AR_RXBP_THRESH_LP, 0x1); | ||
878 | |||
879 | ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize - | ||
880 | ah->caps.rx_status_len); | ||
881 | } | ||
882 | |||
871 | /* | 883 | /* |
872 | * reduce the number of usable entries in PCU TXBUF to avoid | 884 | * reduce the number of usable entries in PCU TXBUF to avoid |
873 | * wrap around issues. | 885 | * wrap around issues. |
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index 12f16215c588..2ca478c802c4 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h | |||
@@ -39,6 +39,12 @@ | |||
39 | #define AR_CFG_PCI_MASTER_REQ_Q_THRESH 0x00060000 | 39 | #define AR_CFG_PCI_MASTER_REQ_Q_THRESH 0x00060000 |
40 | #define AR_CFG_PCI_MASTER_REQ_Q_THRESH_S 17 | 40 | #define AR_CFG_PCI_MASTER_REQ_Q_THRESH_S 17 |
41 | 41 | ||
42 | #define AR_RXBP_THRESH 0x0018 | ||
43 | #define AR_RXBP_THRESH_HP 0x0000000f | ||
44 | #define AR_RXBP_THRESH_HP_S 0 | ||
45 | #define AR_RXBP_THRESH_LP 0x00003f00 | ||
46 | #define AR_RXBP_THRESH_LP_S 8 | ||
47 | |||
42 | #define AR_MIRT 0x0020 | 48 | #define AR_MIRT 0x0020 |
43 | #define AR_MIRT_VAL 0x0000ffff | 49 | #define AR_MIRT_VAL 0x0000ffff |
44 | #define AR_MIRT_VAL_S 16 | 50 | #define AR_MIRT_VAL_S 16 |