diff options
author | Rajkumar Manoharan <rmanohar@qca.qualcomm.com> | 2011-08-27 02:43:21 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-08-29 15:33:02 -0400 |
commit | a7be039d347743c289b7280d5de82abf7bbdf1d8 (patch) | |
tree | 397e4ac8dab82668aec9d312801ac0114f57066c /drivers/net/wireless/ath/ath9k/reg.h | |
parent | e3f2acc76dbae64d1b08455bbbaa855141d0238d (diff) |
ath9k: Fix eifs/usec timeout for AR9287 v1.3+
For AR9287 v1.3+ chips, MAC runs at 117MHz. But the initvals
IFS parameters are loaded based on 44/88MHz clockrate. So
eifs/usec from ini should not be used for AR9287 v1.3+.
The mentioned values are tested on 2 chain HT40 mode.
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/reg.h')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index a3b8bbc6c063..17a272f4d8d6 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h | |||
@@ -619,6 +619,7 @@ | |||
619 | #define AR_D_GBL_IFS_EIFS 0x10b0 | 619 | #define AR_D_GBL_IFS_EIFS 0x10b0 |
620 | #define AR_D_GBL_IFS_EIFS_M 0x0000FFFF | 620 | #define AR_D_GBL_IFS_EIFS_M 0x0000FFFF |
621 | #define AR_D_GBL_IFS_EIFS_RESV0 0xFFFF0000 | 621 | #define AR_D_GBL_IFS_EIFS_RESV0 0xFFFF0000 |
622 | #define AR_D_GBL_IFS_EIFS_ASYNC_FIFO 363 | ||
622 | 623 | ||
623 | #define AR_D_GBL_IFS_MISC 0x10f0 | 624 | #define AR_D_GBL_IFS_MISC 0x10f0 |
624 | #define AR_D_GBL_IFS_MISC_LFSR_SLICE_SEL 0x00000007 | 625 | #define AR_D_GBL_IFS_MISC_LFSR_SLICE_SEL 0x00000007 |
@@ -1503,6 +1504,7 @@ enum { | |||
1503 | #define AR_USEC_TX_LAT_S 14 | 1504 | #define AR_USEC_TX_LAT_S 14 |
1504 | #define AR_USEC_RX_LAT 0x1F800000 | 1505 | #define AR_USEC_RX_LAT 0x1F800000 |
1505 | #define AR_USEC_RX_LAT_S 23 | 1506 | #define AR_USEC_RX_LAT_S 23 |
1507 | #define AR_USEC_ASYNC_FIFO 0x12E00074 | ||
1506 | 1508 | ||
1507 | #define AR_RESET_TSF 0x8020 | 1509 | #define AR_RESET_TSF 0x8020 |
1508 | #define AR_RESET_TSF_ONCE 0x01000000 | 1510 | #define AR_RESET_TSF_ONCE 0x01000000 |