diff options
author | Vivek Natarajan <vnatarajan@atheros.com> | 2010-04-05 05:18:04 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-04-07 14:37:57 -0400 |
commit | 53bc7aa08b48e5cd745f986731cc7dc24eef2a9f (patch) | |
tree | 5ddee6375615343ff30a63878ef4765b2cd2921c /drivers/net/wireless/ath/ath9k/reg.h | |
parent | d5cdfacb35ed886271d1ccfffbded98d3447da17 (diff) |
ath9k: Add support for newer AR9285 chipsets.
This patch adds support for a modified newer version of AR9285
chipsets.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/reg.h')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/reg.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index 198e41dd38a6..7e36ad7421b7 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h | |||
@@ -679,7 +679,7 @@ | |||
679 | 679 | ||
680 | #define AR_WA 0x4004 | 680 | #define AR_WA 0x4004 |
681 | #define AR_WA_D3_L1_DISABLE (1 << 14) | 681 | #define AR_WA_D3_L1_DISABLE (1 << 14) |
682 | #define AR9285_WA_DEFAULT 0x004a05cb | 682 | #define AR9285_WA_DEFAULT 0x004a050b |
683 | #define AR9280_WA_DEFAULT 0x0040073b | 683 | #define AR9280_WA_DEFAULT 0x0040073b |
684 | #define AR_WA_DEFAULT 0x0000073f | 684 | #define AR_WA_DEFAULT 0x0000073f |
685 | 685 | ||
@@ -845,6 +845,10 @@ | |||
845 | (AR_SREV_9271(_ah) && \ | 845 | (AR_SREV_9271(_ah) && \ |
846 | ((_ah)->hw_version.macRev == AR_SREV_REVISION_9271_11)) | 846 | ((_ah)->hw_version.macRev == AR_SREV_REVISION_9271_11)) |
847 | 847 | ||
848 | #define AR_SREV_9285E_20(_ah) \ | ||
849 | (AR_SREV_9285_12_OR_LATER(_ah) && \ | ||
850 | ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1)) | ||
851 | |||
848 | #define AR_RADIO_SREV_MAJOR 0xf0 | 852 | #define AR_RADIO_SREV_MAJOR 0xf0 |
849 | #define AR_RAD5133_SREV_MAJOR 0xc0 | 853 | #define AR_RAD5133_SREV_MAJOR 0xc0 |
850 | #define AR_RAD2133_SREV_MAJOR 0xd0 | 854 | #define AR_RAD2133_SREV_MAJOR 0xd0 |
@@ -1181,6 +1185,13 @@ enum { | |||
1181 | #define AR9285_AN_RF2G4_DB2_4 0x00003800 | 1185 | #define AR9285_AN_RF2G4_DB2_4 0x00003800 |
1182 | #define AR9285_AN_RF2G4_DB2_4_S 11 | 1186 | #define AR9285_AN_RF2G4_DB2_4_S 11 |
1183 | 1187 | ||
1188 | #define AR9285_RF2G5 0x7830 | ||
1189 | #define AR9285_RF2G5_IC50TX 0xfffff8ff | ||
1190 | #define AR9285_RF2G5_IC50TX_SET 0x00000400 | ||
1191 | #define AR9285_RF2G5_IC50TX_XE_SET 0x00000500 | ||
1192 | #define AR9285_RF2G5_IC50TX_CLEAR 0x00000700 | ||
1193 | #define AR9285_RF2G5_IC50TX_CLEAR_S 8 | ||
1194 | |||
1184 | /* AR9271 : 0x7828, 0x782c different setting from AR9285 */ | 1195 | /* AR9271 : 0x7828, 0x782c different setting from AR9285 */ |
1185 | #define AR9271_AN_RF2G3_OB_cck 0x001C0000 | 1196 | #define AR9271_AN_RF2G3_OB_cck 0x001C0000 |
1186 | #define AR9271_AN_RF2G3_OB_cck_S 18 | 1197 | #define AR9271_AN_RF2G3_OB_cck_S 18 |