diff options
author | Luis R. Rodriguez <lrodriguez@atheros.com> | 2009-09-07 07:52:26 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-10-07 16:39:19 -0400 |
commit | 4d6b228d84ba992ee13c90312c1ed539191c94b1 (patch) | |
tree | e6a0aa0b51f60bbde79d6a8da9490fb1837f4fae /drivers/net/wireless/ath/ath9k/main.c | |
parent | d519e17e2d01a0ee9abe083019532061b4438065 (diff) |
ath9k: use ath_hw for DPRINTF() and debug init/exit
DPRINTF() is used in hw specific related code, as such
ensure we don't rely on the private driver core ath_softc
struct when calling it. Drivers can then implement their
own DPRINTF() as they see fit.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/main.c')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/main.c | 148 |
1 files changed, 76 insertions, 72 deletions
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index 52bed89063d4..68d8dd9602dc 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
@@ -224,7 +224,7 @@ static void ath_setup_rates(struct ath_softc *sc, enum ieee80211_band band) | |||
224 | } | 224 | } |
225 | sband->n_bitrates++; | 225 | sband->n_bitrates++; |
226 | 226 | ||
227 | DPRINTF(sc, ATH_DBG_CONFIG, "Rate: %2dMbps, ratecode: %2d\n", | 227 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Rate: %2dMbps, ratecode: %2d\n", |
228 | rate[i].bitrate / 10, rate[i].hw_value); | 228 | rate[i].bitrate / 10, rate[i].hw_value); |
229 | } | 229 | } |
230 | } | 230 | } |
@@ -280,7 +280,7 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, | |||
280 | if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET)) | 280 | if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET)) |
281 | fastcc = false; | 281 | fastcc = false; |
282 | 282 | ||
283 | DPRINTF(sc, ATH_DBG_CONFIG, | 283 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, |
284 | "(%u MHz) -> (%u MHz), chanwidth: %d\n", | 284 | "(%u MHz) -> (%u MHz), chanwidth: %d\n", |
285 | sc->sc_ah->curchan->channel, | 285 | sc->sc_ah->curchan->channel, |
286 | channel->center_freq, sc->tx_chan_width); | 286 | channel->center_freq, sc->tx_chan_width); |
@@ -289,7 +289,7 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, | |||
289 | 289 | ||
290 | r = ath9k_hw_reset(ah, hchan, fastcc); | 290 | r = ath9k_hw_reset(ah, hchan, fastcc); |
291 | if (r) { | 291 | if (r) { |
292 | DPRINTF(sc, ATH_DBG_FATAL, | 292 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, |
293 | "Unable to reset channel (%u Mhz) " | 293 | "Unable to reset channel (%u Mhz) " |
294 | "reset status %d\n", | 294 | "reset status %d\n", |
295 | channel->center_freq, r); | 295 | channel->center_freq, r); |
@@ -301,7 +301,7 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, | |||
301 | sc->sc_flags &= ~SC_OP_FULL_RESET; | 301 | sc->sc_flags &= ~SC_OP_FULL_RESET; |
302 | 302 | ||
303 | if (ath_startrecv(sc) != 0) { | 303 | if (ath_startrecv(sc) != 0) { |
304 | DPRINTF(sc, ATH_DBG_FATAL, | 304 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, |
305 | "Unable to restart recv logic\n"); | 305 | "Unable to restart recv logic\n"); |
306 | r = -EIO; | 306 | r = -EIO; |
307 | goto ps_restore; | 307 | goto ps_restore; |
@@ -353,7 +353,7 @@ static void ath_ani_calibrate(unsigned long data) | |||
353 | /* Long calibration runs independently of short calibration. */ | 353 | /* Long calibration runs independently of short calibration. */ |
354 | if ((timestamp - sc->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) { | 354 | if ((timestamp - sc->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) { |
355 | longcal = true; | 355 | longcal = true; |
356 | DPRINTF(sc, ATH_DBG_ANI, "longcal @%lu\n", jiffies); | 356 | DPRINTF(sc->sc_ah, ATH_DBG_ANI, "longcal @%lu\n", jiffies); |
357 | sc->ani.longcal_timer = timestamp; | 357 | sc->ani.longcal_timer = timestamp; |
358 | } | 358 | } |
359 | 359 | ||
@@ -361,7 +361,7 @@ static void ath_ani_calibrate(unsigned long data) | |||
361 | if (!sc->ani.caldone) { | 361 | if (!sc->ani.caldone) { |
362 | if ((timestamp - sc->ani.shortcal_timer) >= short_cal_interval) { | 362 | if ((timestamp - sc->ani.shortcal_timer) >= short_cal_interval) { |
363 | shortcal = true; | 363 | shortcal = true; |
364 | DPRINTF(sc, ATH_DBG_ANI, "shortcal @%lu\n", jiffies); | 364 | DPRINTF(sc->sc_ah, ATH_DBG_ANI, "shortcal @%lu\n", jiffies); |
365 | sc->ani.shortcal_timer = timestamp; | 365 | sc->ani.shortcal_timer = timestamp; |
366 | sc->ani.resetcal_timer = timestamp; | 366 | sc->ani.resetcal_timer = timestamp; |
367 | } | 367 | } |
@@ -395,7 +395,7 @@ static void ath_ani_calibrate(unsigned long data) | |||
395 | sc->ani.noise_floor = ath9k_hw_getchan_noise(ah, | 395 | sc->ani.noise_floor = ath9k_hw_getchan_noise(ah, |
396 | ah->curchan); | 396 | ah->curchan); |
397 | 397 | ||
398 | DPRINTF(sc, ATH_DBG_ANI," calibrate chan %u/%x nf: %d\n", | 398 | DPRINTF(sc->sc_ah, ATH_DBG_ANI," calibrate chan %u/%x nf: %d\n", |
399 | ah->curchan->channel, ah->curchan->channelFlags, | 399 | ah->curchan->channel, ah->curchan->channelFlags, |
400 | sc->ani.noise_floor); | 400 | sc->ani.noise_floor); |
401 | } | 401 | } |
@@ -448,7 +448,7 @@ void ath_update_chainmask(struct ath_softc *sc, int is_ht) | |||
448 | sc->rx_chainmask = 1; | 448 | sc->rx_chainmask = 1; |
449 | } | 449 | } |
450 | 450 | ||
451 | DPRINTF(sc, ATH_DBG_CONFIG, "tx chmask: %d, rx chmask: %d\n", | 451 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "tx chmask: %d, rx chmask: %d\n", |
452 | sc->tx_chainmask, sc->rx_chainmask); | 452 | sc->tx_chainmask, sc->rx_chainmask); |
453 | } | 453 | } |
454 | 454 | ||
@@ -502,7 +502,7 @@ static void ath9k_tasklet(unsigned long data) | |||
502 | * TSF sync does not look correct; remain awake to sync with | 502 | * TSF sync does not look correct; remain awake to sync with |
503 | * the next Beacon. | 503 | * the next Beacon. |
504 | */ | 504 | */ |
505 | DPRINTF(sc, ATH_DBG_PS, "TSFOOR - Sync with next Beacon\n"); | 505 | DPRINTF(sc->sc_ah, ATH_DBG_PS, "TSFOOR - Sync with next Beacon\n"); |
506 | sc->sc_flags |= SC_OP_WAIT_FOR_BEACON | SC_OP_BEACON_SYNC; | 506 | sc->sc_flags |= SC_OP_WAIT_FOR_BEACON | SC_OP_BEACON_SYNC; |
507 | } | 507 | } |
508 | 508 | ||
@@ -702,7 +702,7 @@ static int ath_setkey_tkip(struct ath_softc *sc, u16 keyix, const u8 *key, | |||
702 | memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic)); | 702 | memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic)); |
703 | if (!ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, NULL)) { | 703 | if (!ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, NULL)) { |
704 | /* TX MIC entry failed. No need to proceed further */ | 704 | /* TX MIC entry failed. No need to proceed further */ |
705 | DPRINTF(sc, ATH_DBG_FATAL, | 705 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, |
706 | "Setting TX MIC Key Failed\n"); | 706 | "Setting TX MIC Key Failed\n"); |
707 | return 0; | 707 | return 0; |
708 | } | 708 | } |
@@ -907,7 +907,7 @@ static void setup_ht_cap(struct ath_softc *sc, | |||
907 | rx_streams = !(sc->rx_chainmask & (sc->rx_chainmask - 1)) ? 1 : 2; | 907 | rx_streams = !(sc->rx_chainmask & (sc->rx_chainmask - 1)) ? 1 : 2; |
908 | 908 | ||
909 | if (tx_streams != rx_streams) { | 909 | if (tx_streams != rx_streams) { |
910 | DPRINTF(sc, ATH_DBG_CONFIG, "TX streams %d, RX streams: %d\n", | 910 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "TX streams %d, RX streams: %d\n", |
911 | tx_streams, rx_streams); | 911 | tx_streams, rx_streams); |
912 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; | 912 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
913 | ht_info->mcs.tx_params |= ((tx_streams - 1) << | 913 | ht_info->mcs.tx_params |= ((tx_streams - 1) << |
@@ -927,7 +927,7 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc, | |||
927 | { | 927 | { |
928 | 928 | ||
929 | if (bss_conf->assoc) { | 929 | if (bss_conf->assoc) { |
930 | DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info ASSOC %d, bssid: %pM\n", | 930 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Bss Info ASSOC %d, bssid: %pM\n", |
931 | bss_conf->aid, sc->curbssid); | 931 | bss_conf->aid, sc->curbssid); |
932 | 932 | ||
933 | /* New association, store aid */ | 933 | /* New association, store aid */ |
@@ -949,7 +949,7 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc, | |||
949 | 949 | ||
950 | ath_start_ani(sc); | 950 | ath_start_ani(sc); |
951 | } else { | 951 | } else { |
952 | DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info DISASSOC\n"); | 952 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Bss Info DISASSOC\n"); |
953 | sc->curaid = 0; | 953 | sc->curaid = 0; |
954 | /* Stop ANI */ | 954 | /* Stop ANI */ |
955 | del_timer_sync(&sc->ani.timer); | 955 | del_timer_sync(&sc->ani.timer); |
@@ -1042,7 +1042,7 @@ static int ath_register_led(struct ath_softc *sc, struct ath_led *led, | |||
1042 | 1042 | ||
1043 | ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev); | 1043 | ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev); |
1044 | if (ret) | 1044 | if (ret) |
1045 | DPRINTF(sc, ATH_DBG_FATAL, | 1045 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, |
1046 | "Failed to register led:%s", led->name); | 1046 | "Failed to register led:%s", led->name); |
1047 | else | 1047 | else |
1048 | led->registered = 1; | 1048 | led->registered = 1; |
@@ -1139,7 +1139,7 @@ void ath_radio_enable(struct ath_softc *sc) | |||
1139 | spin_lock_bh(&sc->sc_resetlock); | 1139 | spin_lock_bh(&sc->sc_resetlock); |
1140 | r = ath9k_hw_reset(ah, ah->curchan, false); | 1140 | r = ath9k_hw_reset(ah, ah->curchan, false); |
1141 | if (r) { | 1141 | if (r) { |
1142 | DPRINTF(sc, ATH_DBG_FATAL, | 1142 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, |
1143 | "Unable to reset channel %u (%uMhz) ", | 1143 | "Unable to reset channel %u (%uMhz) ", |
1144 | "reset status %d\n", | 1144 | "reset status %d\n", |
1145 | channel->center_freq, r); | 1145 | channel->center_freq, r); |
@@ -1148,7 +1148,7 @@ void ath_radio_enable(struct ath_softc *sc) | |||
1148 | 1148 | ||
1149 | ath_update_txpow(sc); | 1149 | ath_update_txpow(sc); |
1150 | if (ath_startrecv(sc) != 0) { | 1150 | if (ath_startrecv(sc) != 0) { |
1151 | DPRINTF(sc, ATH_DBG_FATAL, | 1151 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, |
1152 | "Unable to restart recv logic\n"); | 1152 | "Unable to restart recv logic\n"); |
1153 | return; | 1153 | return; |
1154 | } | 1154 | } |
@@ -1194,7 +1194,7 @@ void ath_radio_disable(struct ath_softc *sc) | |||
1194 | spin_lock_bh(&sc->sc_resetlock); | 1194 | spin_lock_bh(&sc->sc_resetlock); |
1195 | r = ath9k_hw_reset(ah, ah->curchan, false); | 1195 | r = ath9k_hw_reset(ah, ah->curchan, false); |
1196 | if (r) { | 1196 | if (r) { |
1197 | DPRINTF(sc, ATH_DBG_FATAL, | 1197 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, |
1198 | "Unable to reset channel %u (%uMhz) " | 1198 | "Unable to reset channel %u (%uMhz) " |
1199 | "reset status %d\n", | 1199 | "reset status %d\n", |
1200 | channel->center_freq, r); | 1200 | channel->center_freq, r); |
@@ -1248,11 +1248,12 @@ void ath_cleanup(struct ath_softc *sc) | |||
1248 | void ath_detach(struct ath_softc *sc) | 1248 | void ath_detach(struct ath_softc *sc) |
1249 | { | 1249 | { |
1250 | struct ieee80211_hw *hw = sc->hw; | 1250 | struct ieee80211_hw *hw = sc->hw; |
1251 | struct ath_hw *ah = sc->sc_ah; | ||
1251 | int i = 0; | 1252 | int i = 0; |
1252 | 1253 | ||
1253 | ath9k_ps_wakeup(sc); | 1254 | ath9k_ps_wakeup(sc); |
1254 | 1255 | ||
1255 | DPRINTF(sc, ATH_DBG_CONFIG, "Detach ATH hw\n"); | 1256 | dev_dbg(sc->dev, "Detach ATH hw\n"); |
1256 | 1257 | ||
1257 | ath_deinit_leds(sc); | 1258 | ath_deinit_leds(sc); |
1258 | wiphy_rfkill_stop_polling(sc->hw->wiphy); | 1259 | wiphy_rfkill_stop_polling(sc->hw->wiphy); |
@@ -1273,7 +1274,7 @@ void ath_detach(struct ath_softc *sc) | |||
1273 | tasklet_kill(&sc->bcon_tasklet); | 1274 | tasklet_kill(&sc->bcon_tasklet); |
1274 | 1275 | ||
1275 | if (!(sc->sc_flags & SC_OP_INVALID)) | 1276 | if (!(sc->sc_flags & SC_OP_INVALID)) |
1276 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); | 1277 | ath9k_hw_setpower(ah, ATH9K_PM_AWAKE); |
1277 | 1278 | ||
1278 | /* cleanup tx queues */ | 1279 | /* cleanup tx queues */ |
1279 | for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) | 1280 | for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) |
@@ -1282,11 +1283,11 @@ void ath_detach(struct ath_softc *sc) | |||
1282 | 1283 | ||
1283 | if ((sc->btcoex_info.no_stomp_timer) && | 1284 | if ((sc->btcoex_info.no_stomp_timer) && |
1284 | sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE) | 1285 | sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE) |
1285 | ath_gen_timer_free(sc->sc_ah, sc->btcoex_info.no_stomp_timer); | 1286 | ath_gen_timer_free(ah, sc->btcoex_info.no_stomp_timer); |
1286 | 1287 | ||
1287 | ath9k_hw_detach(sc->sc_ah); | 1288 | ath9k_hw_detach(ah); |
1289 | ath9k_exit_debug(sc->sc_ah); | ||
1288 | sc->sc_ah = NULL; | 1290 | sc->sc_ah = NULL; |
1289 | ath9k_exit_debug(sc); | ||
1290 | } | 1291 | } |
1291 | 1292 | ||
1292 | static int ath9k_reg_notifier(struct wiphy *wiphy, | 1293 | static int ath9k_reg_notifier(struct wiphy *wiphy, |
@@ -1315,9 +1316,6 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid) | |||
1315 | /* XXX: hardware will not be ready until ath_open() being called */ | 1316 | /* XXX: hardware will not be ready until ath_open() being called */ |
1316 | sc->sc_flags |= SC_OP_INVALID; | 1317 | sc->sc_flags |= SC_OP_INVALID; |
1317 | 1318 | ||
1318 | if (ath9k_init_debug(sc) < 0) | ||
1319 | printk(KERN_ERR "Unable to create debugfs files\n"); | ||
1320 | |||
1321 | spin_lock_init(&sc->wiphy_lock); | 1319 | spin_lock_init(&sc->wiphy_lock); |
1322 | spin_lock_init(&sc->sc_resetlock); | 1320 | spin_lock_init(&sc->sc_resetlock); |
1323 | spin_lock_init(&sc->sc_serial_rw); | 1321 | spin_lock_init(&sc->sc_serial_rw); |
@@ -1347,9 +1345,12 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid) | |||
1347 | ah->hw_version.subsysid = subsysid; | 1345 | ah->hw_version.subsysid = subsysid; |
1348 | sc->sc_ah = ah; | 1346 | sc->sc_ah = ah; |
1349 | 1347 | ||
1348 | if (ath9k_init_debug(ah) < 0) | ||
1349 | dev_err(sc->dev, "Unable to create debugfs files\n"); | ||
1350 | |||
1350 | r = ath9k_hw_init(ah); | 1351 | r = ath9k_hw_init(ah); |
1351 | if (r) { | 1352 | if (r) { |
1352 | DPRINTF(sc, ATH_DBG_FATAL, | 1353 | DPRINTF(ah, ATH_DBG_FATAL, |
1353 | "Unable to initialize hardware; " | 1354 | "Unable to initialize hardware; " |
1354 | "initialization status: %d\n", r); | 1355 | "initialization status: %d\n", r); |
1355 | goto bad; | 1356 | goto bad; |
@@ -1358,7 +1359,7 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid) | |||
1358 | /* Get the hardware key cache size. */ | 1359 | /* Get the hardware key cache size. */ |
1359 | sc->keymax = ah->caps.keycache_size; | 1360 | sc->keymax = ah->caps.keycache_size; |
1360 | if (sc->keymax > ATH_KEYMAX) { | 1361 | if (sc->keymax > ATH_KEYMAX) { |
1361 | DPRINTF(sc, ATH_DBG_ANY, | 1362 | DPRINTF(ah, ATH_DBG_ANY, |
1362 | "Warning, using only %u entries in %u key cache\n", | 1363 | "Warning, using only %u entries in %u key cache\n", |
1363 | ATH_KEYMAX, sc->keymax); | 1364 | ATH_KEYMAX, sc->keymax); |
1364 | sc->keymax = ATH_KEYMAX; | 1365 | sc->keymax = ATH_KEYMAX; |
@@ -1388,14 +1389,14 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid) | |||
1388 | */ | 1389 | */ |
1389 | sc->beacon.beaconq = ath_beaconq_setup(ah); | 1390 | sc->beacon.beaconq = ath_beaconq_setup(ah); |
1390 | if (sc->beacon.beaconq == -1) { | 1391 | if (sc->beacon.beaconq == -1) { |
1391 | DPRINTF(sc, ATH_DBG_FATAL, | 1392 | DPRINTF(ah, ATH_DBG_FATAL, |
1392 | "Unable to setup a beacon xmit queue\n"); | 1393 | "Unable to setup a beacon xmit queue\n"); |
1393 | r = -EIO; | 1394 | r = -EIO; |
1394 | goto bad2; | 1395 | goto bad2; |
1395 | } | 1396 | } |
1396 | sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0); | 1397 | sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0); |
1397 | if (sc->beacon.cabq == NULL) { | 1398 | if (sc->beacon.cabq == NULL) { |
1398 | DPRINTF(sc, ATH_DBG_FATAL, | 1399 | DPRINTF(ah, ATH_DBG_FATAL, |
1399 | "Unable to setup CAB xmit queue\n"); | 1400 | "Unable to setup CAB xmit queue\n"); |
1400 | r = -EIO; | 1401 | r = -EIO; |
1401 | goto bad2; | 1402 | goto bad2; |
@@ -1410,26 +1411,26 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid) | |||
1410 | /* Setup data queues */ | 1411 | /* Setup data queues */ |
1411 | /* NB: ensure BK queue is the lowest priority h/w queue */ | 1412 | /* NB: ensure BK queue is the lowest priority h/w queue */ |
1412 | if (!ath_tx_setup(sc, ATH9K_WME_AC_BK)) { | 1413 | if (!ath_tx_setup(sc, ATH9K_WME_AC_BK)) { |
1413 | DPRINTF(sc, ATH_DBG_FATAL, | 1414 | DPRINTF(ah, ATH_DBG_FATAL, |
1414 | "Unable to setup xmit queue for BK traffic\n"); | 1415 | "Unable to setup xmit queue for BK traffic\n"); |
1415 | r = -EIO; | 1416 | r = -EIO; |
1416 | goto bad2; | 1417 | goto bad2; |
1417 | } | 1418 | } |
1418 | 1419 | ||
1419 | if (!ath_tx_setup(sc, ATH9K_WME_AC_BE)) { | 1420 | if (!ath_tx_setup(sc, ATH9K_WME_AC_BE)) { |
1420 | DPRINTF(sc, ATH_DBG_FATAL, | 1421 | DPRINTF(ah, ATH_DBG_FATAL, |
1421 | "Unable to setup xmit queue for BE traffic\n"); | 1422 | "Unable to setup xmit queue for BE traffic\n"); |
1422 | r = -EIO; | 1423 | r = -EIO; |
1423 | goto bad2; | 1424 | goto bad2; |
1424 | } | 1425 | } |
1425 | if (!ath_tx_setup(sc, ATH9K_WME_AC_VI)) { | 1426 | if (!ath_tx_setup(sc, ATH9K_WME_AC_VI)) { |
1426 | DPRINTF(sc, ATH_DBG_FATAL, | 1427 | DPRINTF(ah, ATH_DBG_FATAL, |
1427 | "Unable to setup xmit queue for VI traffic\n"); | 1428 | "Unable to setup xmit queue for VI traffic\n"); |
1428 | r = -EIO; | 1429 | r = -EIO; |
1429 | goto bad2; | 1430 | goto bad2; |
1430 | } | 1431 | } |
1431 | if (!ath_tx_setup(sc, ATH9K_WME_AC_VO)) { | 1432 | if (!ath_tx_setup(sc, ATH9K_WME_AC_VO)) { |
1432 | DPRINTF(sc, ATH_DBG_FATAL, | 1433 | DPRINTF(ah, ATH_DBG_FATAL, |
1433 | "Unable to setup xmit queue for VO traffic\n"); | 1434 | "Unable to setup xmit queue for VO traffic\n"); |
1434 | r = -EIO; | 1435 | r = -EIO; |
1435 | goto bad2; | 1436 | goto bad2; |
@@ -1529,9 +1530,9 @@ bad2: | |||
1529 | ath_tx_cleanupq(sc, &sc->tx.txq[i]); | 1530 | ath_tx_cleanupq(sc, &sc->tx.txq[i]); |
1530 | bad: | 1531 | bad: |
1531 | ath9k_hw_detach(ah); | 1532 | ath9k_hw_detach(ah); |
1532 | sc->sc_ah = NULL; | ||
1533 | bad_no_ah: | 1533 | bad_no_ah: |
1534 | ath9k_exit_debug(sc); | 1534 | ath9k_exit_debug(sc->sc_ah); |
1535 | sc->sc_ah = NULL; | ||
1535 | 1536 | ||
1536 | return r; | 1537 | return r; |
1537 | } | 1538 | } |
@@ -1577,18 +1578,21 @@ void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw) | |||
1577 | int ath_init_device(u16 devid, struct ath_softc *sc, u16 subsysid) | 1578 | int ath_init_device(u16 devid, struct ath_softc *sc, u16 subsysid) |
1578 | { | 1579 | { |
1579 | struct ieee80211_hw *hw = sc->hw; | 1580 | struct ieee80211_hw *hw = sc->hw; |
1581 | struct ath_hw *ah; | ||
1580 | int error = 0, i; | 1582 | int error = 0, i; |
1581 | struct ath_regulatory *reg; | 1583 | struct ath_regulatory *reg; |
1582 | 1584 | ||
1583 | DPRINTF(sc, ATH_DBG_CONFIG, "Attach ATH hw\n"); | 1585 | dev_dbg(sc->dev, "Attach ATH hw\n"); |
1584 | 1586 | ||
1585 | error = ath_init_softc(devid, sc, subsysid); | 1587 | error = ath_init_softc(devid, sc, subsysid); |
1586 | if (error != 0) | 1588 | if (error != 0) |
1587 | return error; | 1589 | return error; |
1588 | 1590 | ||
1591 | ah = sc->sc_ah; | ||
1592 | |||
1589 | /* get mac address from hardware and set in mac80211 */ | 1593 | /* get mac address from hardware and set in mac80211 */ |
1590 | 1594 | ||
1591 | SET_IEEE80211_PERM_ADDR(hw, sc->sc_ah->macaddr); | 1595 | SET_IEEE80211_PERM_ADDR(hw, ah->macaddr); |
1592 | 1596 | ||
1593 | ath_set_hw_capab(sc, hw); | 1597 | ath_set_hw_capab(sc, hw); |
1594 | 1598 | ||
@@ -1599,9 +1603,9 @@ int ath_init_device(u16 devid, struct ath_softc *sc, u16 subsysid) | |||
1599 | 1603 | ||
1600 | reg = &sc->common.regulatory; | 1604 | reg = &sc->common.regulatory; |
1601 | 1605 | ||
1602 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) { | 1606 | if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) { |
1603 | setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap); | 1607 | setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap); |
1604 | if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) | 1608 | if (test_bit(ATH9K_MODE_11A, ah->caps.wireless_modes)) |
1605 | setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap); | 1609 | setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap); |
1606 | } | 1610 | } |
1607 | 1611 | ||
@@ -1639,9 +1643,9 @@ error_attach: | |||
1639 | if (ATH_TXQ_SETUP(sc, i)) | 1643 | if (ATH_TXQ_SETUP(sc, i)) |
1640 | ath_tx_cleanupq(sc, &sc->tx.txq[i]); | 1644 | ath_tx_cleanupq(sc, &sc->tx.txq[i]); |
1641 | 1645 | ||
1642 | ath9k_hw_detach(sc->sc_ah); | 1646 | ath9k_hw_detach(ah); |
1647 | ath9k_exit_debug(ah); | ||
1643 | sc->sc_ah = NULL; | 1648 | sc->sc_ah = NULL; |
1644 | ath9k_exit_debug(sc); | ||
1645 | 1649 | ||
1646 | return error; | 1650 | return error; |
1647 | } | 1651 | } |
@@ -1660,12 +1664,12 @@ int ath_reset(struct ath_softc *sc, bool retry_tx) | |||
1660 | spin_lock_bh(&sc->sc_resetlock); | 1664 | spin_lock_bh(&sc->sc_resetlock); |
1661 | r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false); | 1665 | r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false); |
1662 | if (r) | 1666 | if (r) |
1663 | DPRINTF(sc, ATH_DBG_FATAL, | 1667 | DPRINTF(ah, ATH_DBG_FATAL, |
1664 | "Unable to reset hardware; reset status %d\n", r); | 1668 | "Unable to reset hardware; reset status %d\n", r); |
1665 | spin_unlock_bh(&sc->sc_resetlock); | 1669 | spin_unlock_bh(&sc->sc_resetlock); |
1666 | 1670 | ||
1667 | if (ath_startrecv(sc) != 0) | 1671 | if (ath_startrecv(sc) != 0) |
1668 | DPRINTF(sc, ATH_DBG_FATAL, "Unable to start recv logic\n"); | 1672 | DPRINTF(ah, ATH_DBG_FATAL, "Unable to start recv logic\n"); |
1669 | 1673 | ||
1670 | /* | 1674 | /* |
1671 | * We may be doing a reset in response to a request | 1675 | * We may be doing a reset in response to a request |
@@ -1713,13 +1717,13 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, | |||
1713 | struct ath_buf *bf; | 1717 | struct ath_buf *bf; |
1714 | int i, bsize, error; | 1718 | int i, bsize, error; |
1715 | 1719 | ||
1716 | DPRINTF(sc, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n", | 1720 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n", |
1717 | name, nbuf, ndesc); | 1721 | name, nbuf, ndesc); |
1718 | 1722 | ||
1719 | INIT_LIST_HEAD(head); | 1723 | INIT_LIST_HEAD(head); |
1720 | /* ath_desc must be a multiple of DWORDs */ | 1724 | /* ath_desc must be a multiple of DWORDs */ |
1721 | if ((sizeof(struct ath_desc) % 4) != 0) { | 1725 | if ((sizeof(struct ath_desc) % 4) != 0) { |
1722 | DPRINTF(sc, ATH_DBG_FATAL, "ath_desc not DWORD aligned\n"); | 1726 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, "ath_desc not DWORD aligned\n"); |
1723 | ASSERT((sizeof(struct ath_desc) % 4) == 0); | 1727 | ASSERT((sizeof(struct ath_desc) % 4) == 0); |
1724 | error = -ENOMEM; | 1728 | error = -ENOMEM; |
1725 | goto fail; | 1729 | goto fail; |
@@ -1753,7 +1757,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, | |||
1753 | goto fail; | 1757 | goto fail; |
1754 | } | 1758 | } |
1755 | ds = dd->dd_desc; | 1759 | ds = dd->dd_desc; |
1756 | DPRINTF(sc, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n", | 1760 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n", |
1757 | name, ds, (u32) dd->dd_desc_len, | 1761 | name, ds, (u32) dd->dd_desc_len, |
1758 | ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len); | 1762 | ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len); |
1759 | 1763 | ||
@@ -1905,7 +1909,7 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1905 | struct ath9k_channel *init_channel; | 1909 | struct ath9k_channel *init_channel; |
1906 | int r; | 1910 | int r; |
1907 | 1911 | ||
1908 | DPRINTF(sc, ATH_DBG_CONFIG, "Starting driver with " | 1912 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Starting driver with " |
1909 | "initial channel: %d MHz\n", curchan->center_freq); | 1913 | "initial channel: %d MHz\n", curchan->center_freq); |
1910 | 1914 | ||
1911 | mutex_lock(&sc->mutex); | 1915 | mutex_lock(&sc->mutex); |
@@ -1950,7 +1954,7 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1950 | spin_lock_bh(&sc->sc_resetlock); | 1954 | spin_lock_bh(&sc->sc_resetlock); |
1951 | r = ath9k_hw_reset(sc->sc_ah, init_channel, false); | 1955 | r = ath9k_hw_reset(sc->sc_ah, init_channel, false); |
1952 | if (r) { | 1956 | if (r) { |
1953 | DPRINTF(sc, ATH_DBG_FATAL, | 1957 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, |
1954 | "Unable to reset hardware; reset status %d " | 1958 | "Unable to reset hardware; reset status %d " |
1955 | "(freq %u MHz)\n", r, | 1959 | "(freq %u MHz)\n", r, |
1956 | curchan->center_freq); | 1960 | curchan->center_freq); |
@@ -1973,7 +1977,7 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1973 | * here except setup the interrupt mask. | 1977 | * here except setup the interrupt mask. |
1974 | */ | 1978 | */ |
1975 | if (ath_startrecv(sc) != 0) { | 1979 | if (ath_startrecv(sc) != 0) { |
1976 | DPRINTF(sc, ATH_DBG_FATAL, "Unable to start recv logic\n"); | 1980 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, "Unable to start recv logic\n"); |
1977 | r = -EIO; | 1981 | r = -EIO; |
1978 | goto mutex_unlock; | 1982 | goto mutex_unlock; |
1979 | } | 1983 | } |
@@ -2042,7 +2046,7 @@ static int ath9k_tx(struct ieee80211_hw *hw, | |||
2042 | if (ieee80211_is_data(hdr->frame_control) && | 2046 | if (ieee80211_is_data(hdr->frame_control) && |
2043 | !ieee80211_is_nullfunc(hdr->frame_control) && | 2047 | !ieee80211_is_nullfunc(hdr->frame_control) && |
2044 | !ieee80211_has_pm(hdr->frame_control)) { | 2048 | !ieee80211_has_pm(hdr->frame_control)) { |
2045 | DPRINTF(sc, ATH_DBG_PS, "Add PM=1 for a TX frame " | 2049 | DPRINTF(sc->sc_ah, ATH_DBG_PS, "Add PM=1 for a TX frame " |
2046 | "while in PS mode\n"); | 2050 | "while in PS mode\n"); |
2047 | hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM); | 2051 | hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM); |
2048 | } | 2052 | } |
@@ -2058,11 +2062,11 @@ static int ath9k_tx(struct ieee80211_hw *hw, | |||
2058 | ath9k_ps_wakeup(sc); | 2062 | ath9k_ps_wakeup(sc); |
2059 | ath9k_hw_setrxabort(sc->sc_ah, 0); | 2063 | ath9k_hw_setrxabort(sc->sc_ah, 0); |
2060 | if (ieee80211_is_pspoll(hdr->frame_control)) { | 2064 | if (ieee80211_is_pspoll(hdr->frame_control)) { |
2061 | DPRINTF(sc, ATH_DBG_PS, "Sending PS-Poll to pick a " | 2065 | DPRINTF(sc->sc_ah, ATH_DBG_PS, "Sending PS-Poll to pick a " |
2062 | "buffered frame\n"); | 2066 | "buffered frame\n"); |
2063 | sc->sc_flags |= SC_OP_WAIT_FOR_PSPOLL_DATA; | 2067 | sc->sc_flags |= SC_OP_WAIT_FOR_PSPOLL_DATA; |
2064 | } else { | 2068 | } else { |
2065 | DPRINTF(sc, ATH_DBG_PS, "Wake up to complete TX\n"); | 2069 | DPRINTF(sc->sc_ah, ATH_DBG_PS, "Wake up to complete TX\n"); |
2066 | sc->sc_flags |= SC_OP_WAIT_FOR_TX_ACK; | 2070 | sc->sc_flags |= SC_OP_WAIT_FOR_TX_ACK; |
2067 | } | 2071 | } |
2068 | /* | 2072 | /* |
@@ -2104,10 +2108,10 @@ static int ath9k_tx(struct ieee80211_hw *hw, | |||
2104 | if (!txctl.txq) | 2108 | if (!txctl.txq) |
2105 | goto exit; | 2109 | goto exit; |
2106 | 2110 | ||
2107 | DPRINTF(sc, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb); | 2111 | DPRINTF(sc->sc_ah, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb); |
2108 | 2112 | ||
2109 | if (ath_tx_start(hw, skb, &txctl) != 0) { | 2113 | if (ath_tx_start(hw, skb, &txctl) != 0) { |
2110 | DPRINTF(sc, ATH_DBG_XMIT, "TX failed\n"); | 2114 | DPRINTF(sc->sc_ah, ATH_DBG_XMIT, "TX failed\n"); |
2111 | goto exit; | 2115 | goto exit; |
2112 | } | 2116 | } |
2113 | 2117 | ||
@@ -2135,7 +2139,7 @@ static void ath9k_stop(struct ieee80211_hw *hw) | |||
2135 | } | 2139 | } |
2136 | 2140 | ||
2137 | if (sc->sc_flags & SC_OP_INVALID) { | 2141 | if (sc->sc_flags & SC_OP_INVALID) { |
2138 | DPRINTF(sc, ATH_DBG_ANY, "Device not present\n"); | 2142 | DPRINTF(sc->sc_ah, ATH_DBG_ANY, "Device not present\n"); |
2139 | mutex_unlock(&sc->mutex); | 2143 | mutex_unlock(&sc->mutex); |
2140 | return; | 2144 | return; |
2141 | } | 2145 | } |
@@ -2171,7 +2175,7 @@ static void ath9k_stop(struct ieee80211_hw *hw) | |||
2171 | 2175 | ||
2172 | mutex_unlock(&sc->mutex); | 2176 | mutex_unlock(&sc->mutex); |
2173 | 2177 | ||
2174 | DPRINTF(sc, ATH_DBG_CONFIG, "Driver halt\n"); | 2178 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Driver halt\n"); |
2175 | } | 2179 | } |
2176 | 2180 | ||
2177 | static int ath9k_add_interface(struct ieee80211_hw *hw, | 2181 | static int ath9k_add_interface(struct ieee80211_hw *hw, |
@@ -2205,13 +2209,13 @@ static int ath9k_add_interface(struct ieee80211_hw *hw, | |||
2205 | ic_opmode = conf->type; | 2209 | ic_opmode = conf->type; |
2206 | break; | 2210 | break; |
2207 | default: | 2211 | default: |
2208 | DPRINTF(sc, ATH_DBG_FATAL, | 2212 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, |
2209 | "Interface type %d not yet supported\n", conf->type); | 2213 | "Interface type %d not yet supported\n", conf->type); |
2210 | ret = -EOPNOTSUPP; | 2214 | ret = -EOPNOTSUPP; |
2211 | goto out; | 2215 | goto out; |
2212 | } | 2216 | } |
2213 | 2217 | ||
2214 | DPRINTF(sc, ATH_DBG_CONFIG, "Attach a VIF of type: %d\n", ic_opmode); | 2218 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Attach a VIF of type: %d\n", ic_opmode); |
2215 | 2219 | ||
2216 | /* Set the VIF opmode */ | 2220 | /* Set the VIF opmode */ |
2217 | avp->av_opmode = ic_opmode; | 2221 | avp->av_opmode = ic_opmode; |
@@ -2264,7 +2268,7 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw, | |||
2264 | struct ath_vif *avp = (void *)conf->vif->drv_priv; | 2268 | struct ath_vif *avp = (void *)conf->vif->drv_priv; |
2265 | int i; | 2269 | int i; |
2266 | 2270 | ||
2267 | DPRINTF(sc, ATH_DBG_CONFIG, "Detach Interface\n"); | 2271 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Detach Interface\n"); |
2268 | 2272 | ||
2269 | mutex_lock(&sc->mutex); | 2273 | mutex_lock(&sc->mutex); |
2270 | 2274 | ||
@@ -2318,7 +2322,7 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
2318 | } | 2322 | } |
2319 | else if (all_wiphys_idle) { | 2323 | else if (all_wiphys_idle) { |
2320 | ath_radio_enable(sc); | 2324 | ath_radio_enable(sc); |
2321 | DPRINTF(sc, ATH_DBG_CONFIG, | 2325 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, |
2322 | "not-idle: enabling radio\n"); | 2326 | "not-idle: enabling radio\n"); |
2323 | } | 2327 | } |
2324 | } | 2328 | } |
@@ -2372,7 +2376,7 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
2372 | goto skip_chan_change; | 2376 | goto skip_chan_change; |
2373 | } | 2377 | } |
2374 | 2378 | ||
2375 | DPRINTF(sc, ATH_DBG_CONFIG, "Set channel: %d MHz\n", | 2379 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Set channel: %d MHz\n", |
2376 | curchan->center_freq); | 2380 | curchan->center_freq); |
2377 | 2381 | ||
2378 | /* XXX: remove me eventualy */ | 2382 | /* XXX: remove me eventualy */ |
@@ -2381,7 +2385,7 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
2381 | ath_update_chainmask(sc, conf_is_ht(conf)); | 2385 | ath_update_chainmask(sc, conf_is_ht(conf)); |
2382 | 2386 | ||
2383 | if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) { | 2387 | if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) { |
2384 | DPRINTF(sc, ATH_DBG_FATAL, "Unable to set channel\n"); | 2388 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, "Unable to set channel\n"); |
2385 | mutex_unlock(&sc->mutex); | 2389 | mutex_unlock(&sc->mutex); |
2386 | return -EINVAL; | 2390 | return -EINVAL; |
2387 | } | 2391 | } |
@@ -2392,7 +2396,7 @@ skip_chan_change: | |||
2392 | sc->config.txpowlimit = 2 * conf->power_level; | 2396 | sc->config.txpowlimit = 2 * conf->power_level; |
2393 | 2397 | ||
2394 | if (disable_radio) { | 2398 | if (disable_radio) { |
2395 | DPRINTF(sc, ATH_DBG_CONFIG, "idle: disabling radio\n"); | 2399 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "idle: disabling radio\n"); |
2396 | ath_radio_disable(sc); | 2400 | ath_radio_disable(sc); |
2397 | } | 2401 | } |
2398 | 2402 | ||
@@ -2429,7 +2433,7 @@ static void ath9k_configure_filter(struct ieee80211_hw *hw, | |||
2429 | ath9k_hw_setrxfilter(sc->sc_ah, rfilt); | 2433 | ath9k_hw_setrxfilter(sc->sc_ah, rfilt); |
2430 | ath9k_ps_restore(sc); | 2434 | ath9k_ps_restore(sc); |
2431 | 2435 | ||
2432 | DPRINTF(sc, ATH_DBG_CONFIG, "Set HW RX filter: 0x%x\n", rfilt); | 2436 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Set HW RX filter: 0x%x\n", rfilt); |
2433 | } | 2437 | } |
2434 | 2438 | ||
2435 | static void ath9k_sta_notify(struct ieee80211_hw *hw, | 2439 | static void ath9k_sta_notify(struct ieee80211_hw *hw, |
@@ -2473,7 +2477,7 @@ static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue, | |||
2473 | qi.tqi_burstTime = params->txop; | 2477 | qi.tqi_burstTime = params->txop; |
2474 | qnum = ath_get_hal_qnum(queue, sc); | 2478 | qnum = ath_get_hal_qnum(queue, sc); |
2475 | 2479 | ||
2476 | DPRINTF(sc, ATH_DBG_CONFIG, | 2480 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, |
2477 | "Configure tx [queue/halq] [%d/%d], " | 2481 | "Configure tx [queue/halq] [%d/%d], " |
2478 | "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", | 2482 | "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", |
2479 | queue, qnum, params->aifs, params->cw_min, | 2483 | queue, qnum, params->aifs, params->cw_min, |
@@ -2481,7 +2485,7 @@ static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue, | |||
2481 | 2485 | ||
2482 | ret = ath_txq_update(sc, qnum, &qi); | 2486 | ret = ath_txq_update(sc, qnum, &qi); |
2483 | if (ret) | 2487 | if (ret) |
2484 | DPRINTF(sc, ATH_DBG_FATAL, "TXQ Update failed\n"); | 2488 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, "TXQ Update failed\n"); |
2485 | 2489 | ||
2486 | mutex_unlock(&sc->mutex); | 2490 | mutex_unlock(&sc->mutex); |
2487 | 2491 | ||
@@ -2503,7 +2507,7 @@ static int ath9k_set_key(struct ieee80211_hw *hw, | |||
2503 | 2507 | ||
2504 | mutex_lock(&sc->mutex); | 2508 | mutex_lock(&sc->mutex); |
2505 | ath9k_ps_wakeup(sc); | 2509 | ath9k_ps_wakeup(sc); |
2506 | DPRINTF(sc, ATH_DBG_CONFIG, "Set HW Key\n"); | 2510 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Set HW Key\n"); |
2507 | 2511 | ||
2508 | switch (cmd) { | 2512 | switch (cmd) { |
2509 | case SET_KEY: | 2513 | case SET_KEY: |
@@ -2577,7 +2581,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw, | |||
2577 | /* Set aggregation protection mode parameters */ | 2581 | /* Set aggregation protection mode parameters */ |
2578 | sc->config.ath_aggr_prot = 0; | 2582 | sc->config.ath_aggr_prot = 0; |
2579 | 2583 | ||
2580 | DPRINTF(sc, ATH_DBG_CONFIG, | 2584 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, |
2581 | "RX filter 0x%x bssid %pM aid 0x%x\n", | 2585 | "RX filter 0x%x bssid %pM aid 0x%x\n", |
2582 | rfilt, sc->curbssid, sc->curaid); | 2586 | rfilt, sc->curbssid, sc->curaid); |
2583 | 2587 | ||
@@ -2626,7 +2630,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw, | |||
2626 | ath_update_chainmask(sc, 0); | 2630 | ath_update_chainmask(sc, 0); |
2627 | 2631 | ||
2628 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { | 2632 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { |
2629 | DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n", | 2633 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n", |
2630 | bss_conf->use_short_preamble); | 2634 | bss_conf->use_short_preamble); |
2631 | if (bss_conf->use_short_preamble) | 2635 | if (bss_conf->use_short_preamble) |
2632 | sc->sc_flags |= SC_OP_PREAMBLE_SHORT; | 2636 | sc->sc_flags |= SC_OP_PREAMBLE_SHORT; |
@@ -2635,7 +2639,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw, | |||
2635 | } | 2639 | } |
2636 | 2640 | ||
2637 | if (changed & BSS_CHANGED_ERP_CTS_PROT) { | 2641 | if (changed & BSS_CHANGED_ERP_CTS_PROT) { |
2638 | DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n", | 2642 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n", |
2639 | bss_conf->use_cts_prot); | 2643 | bss_conf->use_cts_prot); |
2640 | if (bss_conf->use_cts_prot && | 2644 | if (bss_conf->use_cts_prot && |
2641 | hw->conf.channel->band != IEEE80211_BAND_5GHZ) | 2645 | hw->conf.channel->band != IEEE80211_BAND_5GHZ) |
@@ -2645,7 +2649,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw, | |||
2645 | } | 2649 | } |
2646 | 2650 | ||
2647 | if (changed & BSS_CHANGED_ASSOC) { | 2651 | if (changed & BSS_CHANGED_ASSOC) { |
2648 | DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n", | 2652 | DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n", |
2649 | bss_conf->assoc); | 2653 | bss_conf->assoc); |
2650 | ath9k_bss_assoc_info(sc, vif, bss_conf); | 2654 | ath9k_bss_assoc_info(sc, vif, bss_conf); |
2651 | } | 2655 | } |
@@ -2726,7 +2730,7 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw, | |||
2726 | ath_tx_aggr_resume(sc, sta, tid); | 2730 | ath_tx_aggr_resume(sc, sta, tid); |
2727 | break; | 2731 | break; |
2728 | default: | 2732 | default: |
2729 | DPRINTF(sc, ATH_DBG_FATAL, "Unknown AMPDU action\n"); | 2733 | DPRINTF(sc->sc_ah, ATH_DBG_FATAL, "Unknown AMPDU action\n"); |
2730 | } | 2734 | } |
2731 | 2735 | ||
2732 | return ret; | 2736 | return ret; |