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authorVasanthakumar Thiagarajan <vasanth@atheros.com>2010-04-15 17:39:33 -0400
committerJohn W. Linville <linville@tuxdriver.com>2010-04-16 15:43:47 -0400
commit4adfcdedd4e0c05c1b659da5f2b8bc4e2d4a86df (patch)
tree8284739015fbcb27d9f7ff27b5d8853557d7e83b /drivers/net/wireless/ath/ath9k/init.c
parent3deb4da554c3ad9b059f51d19eebadf8525da4a4 (diff)
ath9k: Setup appropriate tx desc for regular dma and edma
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/init.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/init.c26
1 files changed, 16 insertions, 10 deletions
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index 1956c611503e..58a87f7931df 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -233,31 +233,37 @@ static int ath9k_reg_notifier(struct wiphy *wiphy,
233*/ 233*/
234int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, 234int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
235 struct list_head *head, const char *name, 235 struct list_head *head, const char *name,
236 int nbuf, int ndesc) 236 int nbuf, int ndesc, bool is_tx)
237{ 237{
238#define DS2PHYS(_dd, _ds) \ 238#define DS2PHYS(_dd, _ds) \
239 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 239 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
240#define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0) 240#define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
241#define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096) 241#define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
242 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 242 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
243 struct ath_desc *ds; 243 u8 *ds;
244 struct ath_buf *bf; 244 struct ath_buf *bf;
245 int i, bsize, error; 245 int i, bsize, error, desc_len;
246 246
247 ath_print(common, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n", 247 ath_print(common, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n",
248 name, nbuf, ndesc); 248 name, nbuf, ndesc);
249 249
250 INIT_LIST_HEAD(head); 250 INIT_LIST_HEAD(head);
251
252 if (is_tx)
253 desc_len = sc->sc_ah->caps.tx_desc_len;
254 else
255 desc_len = sizeof(struct ath_desc);
256
251 /* ath_desc must be a multiple of DWORDs */ 257 /* ath_desc must be a multiple of DWORDs */
252 if ((sizeof(struct ath_desc) % 4) != 0) { 258 if ((desc_len % 4) != 0) {
253 ath_print(common, ATH_DBG_FATAL, 259 ath_print(common, ATH_DBG_FATAL,
254 "ath_desc not DWORD aligned\n"); 260 "ath_desc not DWORD aligned\n");
255 BUG_ON((sizeof(struct ath_desc) % 4) != 0); 261 BUG_ON((desc_len % 4) != 0);
256 error = -ENOMEM; 262 error = -ENOMEM;
257 goto fail; 263 goto fail;
258 } 264 }
259 265
260 dd->dd_desc_len = sizeof(struct ath_desc) * nbuf * ndesc; 266 dd->dd_desc_len = desc_len * nbuf * ndesc;
261 267
262 /* 268 /*
263 * Need additional DMA memory because we can't use 269 * Need additional DMA memory because we can't use
@@ -270,7 +276,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
270 u32 dma_len; 276 u32 dma_len;
271 277
272 while (ndesc_skipped) { 278 while (ndesc_skipped) {
273 dma_len = ndesc_skipped * sizeof(struct ath_desc); 279 dma_len = ndesc_skipped * desc_len;
274 dd->dd_desc_len += dma_len; 280 dd->dd_desc_len += dma_len;
275 281
276 ndesc_skipped = ATH_DESC_4KB_BOUND_NUM_SKIPPED(dma_len); 282 ndesc_skipped = ATH_DESC_4KB_BOUND_NUM_SKIPPED(dma_len);
@@ -284,7 +290,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
284 error = -ENOMEM; 290 error = -ENOMEM;
285 goto fail; 291 goto fail;
286 } 292 }
287 ds = dd->dd_desc; 293 ds = (u8 *) dd->dd_desc;
288 ath_print(common, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n", 294 ath_print(common, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
289 name, ds, (u32) dd->dd_desc_len, 295 name, ds, (u32) dd->dd_desc_len,
290 ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len); 296 ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
@@ -298,7 +304,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
298 } 304 }
299 dd->dd_bufptr = bf; 305 dd->dd_bufptr = bf;
300 306
301 for (i = 0; i < nbuf; i++, bf++, ds += ndesc) { 307 for (i = 0; i < nbuf; i++, bf++, ds += (desc_len * ndesc)) {
302 bf->bf_desc = ds; 308 bf->bf_desc = ds;
303 bf->bf_daddr = DS2PHYS(dd, ds); 309 bf->bf_daddr = DS2PHYS(dd, ds);
304 310
@@ -314,7 +320,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
314 ((caddr_t) dd->dd_desc + 320 ((caddr_t) dd->dd_desc +
315 dd->dd_desc_len)); 321 dd->dd_desc_len));
316 322
317 ds += ndesc; 323 ds += (desc_len * ndesc);
318 bf->bf_desc = ds; 324 bf->bf_desc = ds;
319 bf->bf_daddr = DS2PHYS(dd, ds); 325 bf->bf_daddr = DS2PHYS(dd, ds);
320 } 326 }